2 * GPIO interface for Intel Poulsbo SCH
4 * Copyright (c) 2010 CompuLab Ltd
5 * Author: Denis Turischev <denis@compulab.co.il>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License 2 as published
9 * by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/init.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
25 #include <linux/errno.h>
26 #include <linux/acpi.h>
27 #include <linux/platform_device.h>
28 #include <linux/pci_ids.h>
30 #include <linux/gpio.h>
32 static DEFINE_SPINLOCK(gpio_lock
);
42 static unsigned short gpio_ba
;
44 static int sch_gpio_core_direction_in(struct gpio_chip
*gc
, unsigned gpio_num
)
47 unsigned short offset
, bit
;
49 spin_lock(&gpio_lock
);
51 offset
= CGIO
+ gpio_num
/ 8;
54 curr_dirs
= inb(gpio_ba
+ offset
);
56 if (!(curr_dirs
& (1 << bit
)))
57 outb(curr_dirs
| (1 << bit
), gpio_ba
+ offset
);
59 spin_unlock(&gpio_lock
);
63 static int sch_gpio_core_get(struct gpio_chip
*gc
, unsigned gpio_num
)
66 unsigned short offset
, bit
;
68 offset
= CGLV
+ gpio_num
/ 8;
71 res
= !!(inb(gpio_ba
+ offset
) & (1 << bit
));
75 static void sch_gpio_core_set(struct gpio_chip
*gc
, unsigned gpio_num
, int val
)
78 unsigned short offset
, bit
;
80 spin_lock(&gpio_lock
);
82 offset
= CGLV
+ gpio_num
/ 8;
85 curr_vals
= inb(gpio_ba
+ offset
);
88 outb(curr_vals
| (1 << bit
), gpio_ba
+ offset
);
90 outb((curr_vals
& ~(1 << bit
)), gpio_ba
+ offset
);
91 spin_unlock(&gpio_lock
);
94 static int sch_gpio_core_direction_out(struct gpio_chip
*gc
,
95 unsigned gpio_num
, int val
)
98 unsigned short offset
, bit
;
100 sch_gpio_core_set(gc
, gpio_num
, val
);
102 spin_lock(&gpio_lock
);
104 offset
= CGIO
+ gpio_num
/ 8;
107 curr_dirs
= inb(gpio_ba
+ offset
);
108 if (curr_dirs
& (1 << bit
))
109 outb(curr_dirs
& ~(1 << bit
), gpio_ba
+ offset
);
111 spin_unlock(&gpio_lock
);
115 static struct gpio_chip sch_gpio_core
= {
116 .label
= "sch_gpio_core",
117 .owner
= THIS_MODULE
,
118 .direction_input
= sch_gpio_core_direction_in
,
119 .get
= sch_gpio_core_get
,
120 .direction_output
= sch_gpio_core_direction_out
,
121 .set
= sch_gpio_core_set
,
124 static int sch_gpio_resume_direction_in(struct gpio_chip
*gc
,
129 spin_lock(&gpio_lock
);
131 curr_dirs
= inb(gpio_ba
+ RGIO
);
133 if (!(curr_dirs
& (1 << gpio_num
)))
134 outb(curr_dirs
| (1 << gpio_num
) , gpio_ba
+ RGIO
);
136 spin_unlock(&gpio_lock
);
140 static int sch_gpio_resume_get(struct gpio_chip
*gc
, unsigned gpio_num
)
142 return !!(inb(gpio_ba
+ RGLV
) & (1 << gpio_num
));
145 static void sch_gpio_resume_set(struct gpio_chip
*gc
,
146 unsigned gpio_num
, int val
)
150 spin_lock(&gpio_lock
);
152 curr_vals
= inb(gpio_ba
+ RGLV
);
155 outb(curr_vals
| (1 << gpio_num
), gpio_ba
+ RGLV
);
157 outb((curr_vals
& ~(1 << gpio_num
)), gpio_ba
+ RGLV
);
159 spin_unlock(&gpio_lock
);
162 static int sch_gpio_resume_direction_out(struct gpio_chip
*gc
,
163 unsigned gpio_num
, int val
)
167 sch_gpio_resume_set(gc
, gpio_num
, val
);
169 spin_lock(&gpio_lock
);
171 curr_dirs
= inb(gpio_ba
+ RGIO
);
172 if (curr_dirs
& (1 << gpio_num
))
173 outb(curr_dirs
& ~(1 << gpio_num
), gpio_ba
+ RGIO
);
175 spin_unlock(&gpio_lock
);
179 static struct gpio_chip sch_gpio_resume
= {
180 .label
= "sch_gpio_resume",
181 .owner
= THIS_MODULE
,
182 .direction_input
= sch_gpio_resume_direction_in
,
183 .get
= sch_gpio_resume_get
,
184 .direction_output
= sch_gpio_resume_direction_out
,
185 .set
= sch_gpio_resume_set
,
188 static int __devinit
sch_gpio_probe(struct platform_device
*pdev
)
190 struct resource
*res
;
197 res
= platform_get_resource(pdev
, IORESOURCE_IO
, 0);
201 if (!request_region(res
->start
, resource_size(res
), pdev
->name
))
204 gpio_ba
= res
->start
;
207 case PCI_DEVICE_ID_INTEL_SCH_LPC
:
208 sch_gpio_core
.base
= 0;
209 sch_gpio_core
.ngpio
= 10;
211 sch_gpio_resume
.base
= 10;
212 sch_gpio_resume
.ngpio
= 4;
215 * GPIO[6:0] enabled by default
216 * GPIO7 is configured by the CMC as SLPIOVR
217 * Enable GPIO[9:8] core powered gpios explicitly
219 outb(0x3, gpio_ba
+ CGEN
+ 1);
221 * SUS_GPIO[2:0] enabled by default
222 * Enable SUS_GPIO3 resume powered gpio explicitly
224 outb(0x8, gpio_ba
+ RGEN
);
227 case PCI_DEVICE_ID_INTEL_ITC_LPC
:
228 sch_gpio_core
.base
= 0;
229 sch_gpio_core
.ngpio
= 5;
231 sch_gpio_resume
.base
= 5;
232 sch_gpio_resume
.ngpio
= 9;
239 sch_gpio_core
.dev
= &pdev
->dev
;
240 sch_gpio_resume
.dev
= &pdev
->dev
;
242 err
= gpiochip_add(&sch_gpio_core
);
244 goto err_sch_gpio_core
;
246 err
= gpiochip_add(&sch_gpio_resume
);
248 goto err_sch_gpio_resume
;
253 err
= gpiochip_remove(&sch_gpio_core
);
255 dev_err(&pdev
->dev
, "%s failed, %d\n",
256 "gpiochip_remove()", err
);
259 release_region(res
->start
, resource_size(res
));
265 static int __devexit
sch_gpio_remove(struct platform_device
*pdev
)
267 struct resource
*res
;
271 err
= gpiochip_remove(&sch_gpio_core
);
273 dev_err(&pdev
->dev
, "%s failed, %d\n",
274 "gpiochip_remove()", err
);
275 err
= gpiochip_remove(&sch_gpio_resume
);
277 dev_err(&pdev
->dev
, "%s failed, %d\n",
278 "gpiochip_remove()", err
);
280 res
= platform_get_resource(pdev
, IORESOURCE_IO
, 0);
282 release_region(res
->start
, resource_size(res
));
291 static struct platform_driver sch_gpio_driver
= {
294 .owner
= THIS_MODULE
,
296 .probe
= sch_gpio_probe
,
297 .remove
= __devexit_p(sch_gpio_remove
),
300 module_platform_driver(sch_gpio_driver
);
302 MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
303 MODULE_DESCRIPTION("GPIO interface for Intel Poulsbo SCH");
304 MODULE_LICENSE("GPL");
305 MODULE_ALIAS("platform:sch_gpio");