drivers/video/chipsfb.c

   1 /*
   2  *  drivers/video/chipsfb.c -- frame buffer device for
   3  *  Chips & Technologies 65550 chip.
   4  *
   5  *  Copyright (C) 1998-2002 Paul Mackerras
   6  *
   7  *  This file is derived from the Powermac "chips" driver:
   8  *  Copyright (C) 1997 Fabio Riccardi.
   9  *  And from the frame buffer device for Open Firmware-initialized devices:
  10  *  Copyright (C) 1997 Geert Uytterhoeven.
  11  *
  12  *  This file is subject to the terms and conditions of the GNU General Public
  13  *  License. See the file COPYING in the main directory of this archive for
  14  *  more details.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/errno.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/slab.h>
  23 #include <linux/vmalloc.h>
  24 #include <linux/delay.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/fb.h>
  27 #include <linux/init.h>
  28 #include <linux/pci.h>
  29 #include <linux/console.h>
  30 #include <asm/io.h>
  31
  32 #ifdef CONFIG_PMAC_BACKLIGHT
  33 #include <asm/backlight.h>
  34 #endif
  35
  36 /*
  37  * Since we access the display with inb/outb to fixed port numbers,
  38  * we can only handle one 6555x chip.  -- paulus
  39  */
  40 #define write_ind(num, val, ap, dp)     do { \
  41         outb((num), (ap)); outb((val), (dp)); \
  42 } while (0)
  43 #define read_ind(num, var, ap, dp)      do { \
  44         outb((num), (ap)); var = inb((dp)); \
  45 } while (0)
  46
  47 /* extension registers */
  48 #define write_xr(num, val)      write_ind(num, val, 0x3d6, 0x3d7)
  49 #define read_xr(num, var)       read_ind(num, var, 0x3d6, 0x3d7)
  50 /* flat panel registers */
  51 #define write_fr(num, val)      write_ind(num, val, 0x3d0, 0x3d1)
  52 #define read_fr(num, var)       read_ind(num, var, 0x3d0, 0x3d1)
  53 /* CRTC registers */
  54 #define write_cr(num, val)      write_ind(num, val, 0x3d4, 0x3d5)
  55 #define read_cr(num, var)       read_ind(num, var, 0x3d4, 0x3d5)
  56 /* graphics registers */
  57 #define write_gr(num, val)      write_ind(num, val, 0x3ce, 0x3cf)
  58 #define read_gr(num, var)       read_ind(num, var, 0x3ce, 0x3cf)
  59 /* sequencer registers */
  60 #define write_sr(num, val)      write_ind(num, val, 0x3c4, 0x3c5)
  61 #define read_sr(num, var)       read_ind(num, var, 0x3c4, 0x3c5)
  62 /* attribute registers - slightly strange */
  63 #define write_ar(num, val)      do { \
  64         inb(0x3da); write_ind(num, val, 0x3c0, 0x3c0); \
  65 } while (0)
  66 #define read_ar(num, var)       do { \
  67         inb(0x3da); read_ind(num, var, 0x3c0, 0x3c1); \
  68 } while (0)
  69
  70 /*
  71  * Exported functions
  72  */
  73 int chips_init(void);
  74
  75 static int chipsfb_pci_init(struct pci_dev *dp, const struct pci_device_id *);
  76 static int chipsfb_check_var(struct fb_var_screeninfo *var,
  77                              struct fb_info *info);
  78 static int chipsfb_set_par(struct fb_info *info);
  79 static int chipsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  80                              u_int transp, struct fb_info *info);
  81 static int chipsfb_blank(int blank, struct fb_info *info);
  82
  83 static struct fb_ops chipsfb_ops = {
  84         .owner          = THIS_MODULE,
  85         .fb_check_var   = chipsfb_check_var,
  86         .fb_set_par     = chipsfb_set_par,
  87         .fb_setcolreg   = chipsfb_setcolreg,
  88         .fb_blank       = chipsfb_blank,
  89         .fb_fillrect    = cfb_fillrect,
  90         .fb_copyarea    = cfb_copyarea,
  91         .fb_imageblit   = cfb_imageblit,
  92 };
  93
  94 static int chipsfb_check_var(struct fb_var_screeninfo *var,
  95                              struct fb_info *info)
  96 {
  97         if (var->xres > 800 || var->yres > 600
  98             || var->xres_virtual > 800 || var->yres_virtual > 600
  99             || (var->bits_per_pixel != 8 && var->bits_per_pixel != 16)
 100             || var->nonstd
 101             || (var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
 102                 return -EINVAL;
 103
 104         var->xres = var->xres_virtual = 800;
 105         var->yres = var->yres_virtual = 600;
 106
 107         return 0;
 108 }
 109
 110 static int chipsfb_set_par(struct fb_info *info)
 111 {
 112         if (info->var.bits_per_pixel == 16) {
 113                 write_cr(0x13, 200);            // Set line length (doublewords)
 114                 write_xr(0x81, 0x14);           // 15 bit (555) color mode
 115                 write_xr(0x82, 0x00);           // Disable palettes
 116                 write_xr(0x20, 0x10);           // 16 bit blitter mode
 117
 118                 info->fix.line_length = 800*2;
 119                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 120
 121                 info->var.red.offset = 10;
 122                 info->var.green.offset = 5;
 123                 info->var.blue.offset = 0;
 124                 info->var.red.length = info->var.green.length =
 125                         info->var.blue.length = 5;
 126
 127         } else {
 128                 /* p->var.bits_per_pixel == 8 */
 129                 write_cr(0x13, 100);            // Set line length (doublewords)
 130                 write_xr(0x81, 0x12);           // 8 bit color mode
 131                 write_xr(0x82, 0x08);           // Graphics gamma enable
 132                 write_xr(0x20, 0x00);           // 8 bit blitter mode
 133
 134                 info->fix.line_length = 800;
 135                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 136
 137                 info->var.red.offset = info->var.green.offset =
 138                         info->var.blue.offset = 0;
 139                 info->var.red.length = info->var.green.length =
 140                         info->var.blue.length = 8;
 141
 142         }
 143         return 0;
 144 }
 145
 146 static int chipsfb_blank(int blank, struct fb_info *info)
 147 {
 148 #ifdef CONFIG_PMAC_BACKLIGHT
 149         mutex_lock(&pmac_backlight_mutex);
 150
 151         if (pmac_backlight) {
 152                 /* used to disable backlight only for blank > 1, but it seems
 153                  * useful at blank = 1 too (saves battery, extends backlight
 154                  * life)
 155                  */
 156                 down(&pmac_backlight->sem);
 157                 if (blank)
 158                         pmac_backlight->props->power = FB_BLANK_POWERDOWN;
 159                 else
 160                         pmac_backlight->props->power = FB_BLANK_UNBLANK;
 161                 pmac_backlight->props->update_status(pmac_backlight);
 162                 up(&pmac_backlight->sem);
 163         }
 164
 165         mutex_unlock(&pmac_backlight_mutex);
 166 #endif /* CONFIG_PMAC_BACKLIGHT */
 167
 168         return 1;       /* get fb_blank to set the colormap to all black */
 169 }
 170
 171 static int chipsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 172                              u_int transp, struct fb_info *info)
 173 {
 174         if (regno > 255)
 175                 return 1;
 176         red >>= 8;
 177         green >>= 8;
 178         blue >>= 8;
 179         outb(regno, 0x3c8);
 180         udelay(1);
 181         outb(red, 0x3c9);
 182         outb(green, 0x3c9);
 183         outb(blue, 0x3c9);
 184
 185         return 0;
 186 }
 187
 188 struct chips_init_reg {
 189         unsigned char addr;
 190         unsigned char data;
 191 };
 192
 193 static struct chips_init_reg chips_init_sr[] = {
 194         { 0x00, 0x03 },
 195         { 0x01, 0x01 },
 196         { 0x02, 0x0f },
 197         { 0x04, 0x0e }
 198 };
 199
 200 static struct chips_init_reg chips_init_gr[] = {
 201         { 0x05, 0x00 },
 202         { 0x06, 0x0d },
 203         { 0x08, 0xff }
 204 };
 205
 206 static struct chips_init_reg chips_init_ar[] = {
 207         { 0x10, 0x01 },
 208         { 0x12, 0x0f },
 209         { 0x13, 0x00 }
 210 };
 211
 212 static struct chips_init_reg chips_init_cr[] = {
 213         { 0x00, 0x7f },
 214         { 0x01, 0x63 },
 215         { 0x02, 0x63 },
 216         { 0x03, 0x83 },
 217         { 0x04, 0x66 },
 218         { 0x05, 0x10 },
 219         { 0x06, 0x72 },
 220         { 0x07, 0x3e },
 221         { 0x08, 0x00 },
 222         { 0x09, 0x40 },
 223         { 0x0c, 0x00 },
 224         { 0x0d, 0x00 },
 225         { 0x10, 0x59 },
 226         { 0x11, 0x0d },
 227         { 0x12, 0x57 },
 228         { 0x13, 0x64 },
 229         { 0x14, 0x00 },
 230         { 0x15, 0x57 },
 231         { 0x16, 0x73 },
 232         { 0x17, 0xe3 },
 233         { 0x18, 0xff },
 234         { 0x30, 0x02 },
 235         { 0x31, 0x02 },
 236         { 0x32, 0x02 },
 237         { 0x33, 0x02 },
 238         { 0x40, 0x00 },
 239         { 0x41, 0x00 },
 240         { 0x40, 0x80 }
 241 };
 242
 243 static struct chips_init_reg chips_init_fr[] = {
 244         { 0x01, 0x02 },
 245         { 0x03, 0x08 },
 246         { 0x04, 0x81 },
 247         { 0x05, 0x21 },
 248         { 0x08, 0x0c },
 249         { 0x0a, 0x74 },
 250         { 0x0b, 0x11 },
 251         { 0x10, 0x0c },
 252         { 0x11, 0xe0 },
 253         /* { 0x12, 0x40 }, -- 3400 needs 40, 2400 needs 48, no way to tell */
 254         { 0x20, 0x63 },
 255         { 0x21, 0x68 },
 256         { 0x22, 0x19 },
 257         { 0x23, 0x7f },
 258         { 0x24, 0x68 },
 259         { 0x26, 0x00 },
 260         { 0x27, 0x0f },
 261         { 0x30, 0x57 },
 262         { 0x31, 0x58 },
 263         { 0x32, 0x0d },
 264         { 0x33, 0x72 },
 265         { 0x34, 0x02 },
 266         { 0x35, 0x22 },
 267         { 0x36, 0x02 },
 268         { 0x37, 0x00 }
 269 };
 270
 271 static struct chips_init_reg chips_init_xr[] = {
 272         { 0xce, 0x00 },         /* set default memory clock */
 273         { 0xcc, 0x43 },         /* memory clock ratio */
 274         { 0xcd, 0x18 },
 275         { 0xce, 0xa1 },
 276         { 0xc8, 0x84 },
 277         { 0xc9, 0x0a },
 278         { 0xca, 0x00 },
 279         { 0xcb, 0x20 },
 280         { 0xcf, 0x06 },
 281         { 0xd0, 0x0e },
 282         { 0x09, 0x01 },
 283         { 0x0a, 0x02 },
 284         { 0x0b, 0x01 },
 285         { 0x20, 0x00 },
 286         { 0x40, 0x03 },
 287         { 0x41, 0x01 },
 288         { 0x42, 0x00 },
 289         { 0x80, 0x82 },
 290         { 0x81, 0x12 },
 291         { 0x82, 0x08 },
 292         { 0xa0, 0x00 },
 293         { 0xa8, 0x00 }
 294 };
 295
 296 static void __init chips_hw_init(void)
 297 {
 298         int i;
 299
 300         for (i = 0; i < ARRAY_SIZE(chips_init_xr); ++i)
 301                 write_xr(chips_init_xr[i].addr, chips_init_xr[i].data);
 302         outb(0x29, 0x3c2); /* set misc output reg */
 303         for (i = 0; i < ARRAY_SIZE(chips_init_sr); ++i)
 304                 write_sr(chips_init_sr[i].addr, chips_init_sr[i].data);
 305         for (i = 0; i < ARRAY_SIZE(chips_init_gr); ++i)
 306                 write_gr(chips_init_gr[i].addr, chips_init_gr[i].data);
 307         for (i = 0; i < ARRAY_SIZE(chips_init_ar); ++i)
 308                 write_ar(chips_init_ar[i].addr, chips_init_ar[i].data);
 309         for (i = 0; i < ARRAY_SIZE(chips_init_cr); ++i)
 310                 write_cr(chips_init_cr[i].addr, chips_init_cr[i].data);
 311         for (i = 0; i < ARRAY_SIZE(chips_init_fr); ++i)
 312                 write_fr(chips_init_fr[i].addr, chips_init_fr[i].data);
 313 }
 314
 315 static struct fb_fix_screeninfo chipsfb_fix __initdata = {
 316         .id =           "C&T 65550",
 317         .type =         FB_TYPE_PACKED_PIXELS,
 318         .visual =       FB_VISUAL_PSEUDOCOLOR,
 319         .accel =        FB_ACCEL_NONE,
 320         .line_length =  800,
 321
 322 // FIXME: Assumes 1MB frame buffer, but 65550 supports 1MB or 2MB.
 323 // * "3500" PowerBook G3 (the original PB G3) has 2MB.
 324 // * 2400 has 1MB composed of 2 Mitsubishi M5M4V4265CTP DRAM chips.
 325 //   Motherboard actually supports 2MB -- there are two blank locations
 326 //   for a second pair of DRAMs.  (Thanks, Apple!)
 327 // * 3400 has 1MB (I think).  Don't know if it's expandable.
 328 // -- Tim Seufert
 329         .smem_len =     0x100000,       /* 1MB */
 330 };
 331
 332 static struct fb_var_screeninfo chipsfb_var __initdata = {
 333         .xres = 800,
 334         .yres = 600,
 335         .xres_virtual = 800,
 336         .yres_virtual = 600,
 337         .bits_per_pixel = 8,
 338         .red = { .length = 8 },
 339         .green = { .length = 8 },
 340         .blue = { .length = 8 },
 341         .height = -1,
 342         .width = -1,
 343         .vmode = FB_VMODE_NONINTERLACED,
 344         .pixclock = 10000,
 345         .left_margin = 16,
 346         .right_margin = 16,
 347         .upper_margin = 16,
 348         .lower_margin = 16,
 349         .hsync_len = 8,
 350         .vsync_len = 8,
 351 };
 352
 353 static void __init init_chips(struct fb_info *p, unsigned long addr)
 354 {
 355         memset(p->screen_base, 0, 0x100000);
 356
 357         p->fix = chipsfb_fix;
 358         p->fix.smem_start = addr;
 359
 360         p->var = chipsfb_var;
 361
 362         p->fbops = &chipsfb_ops;
 363         p->flags = FBINFO_DEFAULT;
 364
 365         fb_alloc_cmap(&p->cmap, 256, 0);
 366
 367         chips_hw_init();
 368 }
 369
 370 static int __devinit
 371 chipsfb_pci_init(struct pci_dev *dp, const struct pci_device_id *ent)
 372 {
 373         struct fb_info *p;
 374         unsigned long addr, size;
 375         unsigned short cmd;
 376         int rc = -ENODEV;
 377
 378         if (pci_enable_device(dp) < 0) {
 379                 dev_err(&dp->dev, "Cannot enable PCI device\n");
 380                 goto err_out;
 381         }
 382
 383         if ((dp->resource[0].flags & IORESOURCE_MEM) == 0)
 384                 goto err_disable;
 385         addr = pci_resource_start(dp, 0);
 386         size = pci_resource_len(dp, 0);
 387         if (addr == 0)
 388                 goto err_disable;
 389
 390         p = framebuffer_alloc(0, &dp->dev);
 391         if (p == NULL) {
 392                 dev_err(&dp->dev, "Cannot allocate framebuffer structure\n");
 393                 rc = -ENOMEM;
 394                 goto err_disable;
 395         }
 396
 397         if (pci_request_region(dp, 0, "chipsfb") != 0) {
 398                 dev_err(&dp->dev, "Cannot request framebuffer\n");
 399                 rc = -EBUSY;
 400                 goto err_release_fb;
 401         }
 402
 403 #ifdef __BIG_ENDIAN
 404         addr += 0x800000;       // Use big-endian aperture
 405 #endif
 406
 407         /* we should use pci_enable_device here, but,
 408            the device doesn't declare its I/O ports in its BARs
 409            so pci_enable_device won't turn on I/O responses */
 410         pci_read_config_word(dp, PCI_COMMAND, &cmd);
 411         cmd |= 3;       /* enable memory and IO space */
 412         pci_write_config_word(dp, PCI_COMMAND, cmd);
 413
 414 #ifdef CONFIG_PMAC_BACKLIGHT
 415         /* turn on the backlight */
 416         mutex_lock(&pmac_backlight_mutex);
 417         if (pmac_backlight) {
 418                 down(&pmac_backlight->sem);
 419                 pmac_backlight->props->power = FB_BLANK_UNBLANK;
 420                 pmac_backlight->props->update_status(pmac_backlight);
 421                 up(&pmac_backlight->sem);
 422         }
 423         mutex_unlock(&pmac_backlight_mutex);
 424 #endif /* CONFIG_PMAC_BACKLIGHT */
 425
 426 #ifdef CONFIG_PPC
 427         p->screen_base = __ioremap(addr, 0x200000, _PAGE_NO_CACHE);
 428 #else
 429         p->screen_base = ioremap(addr, 0x200000);
 430 #endif
 431         if (p->screen_base == NULL) {
 432                 dev_err(&dp->dev, "Cannot map framebuffer\n");
 433                 rc = -ENOMEM;
 434                 goto err_release_pci;
 435         }
 436
 437         pci_set_drvdata(dp, p);
 438         p->device = &dp->dev;
 439
 440         init_chips(p, addr);
 441
 442         if (register_framebuffer(p) < 0) {
 443                 dev_err(&dp->dev,"C&T 65550 framebuffer failed to register\n");
 444                 goto err_unmap;
 445         }
 446
 447         dev_info(&dp->dev,"fb%d: Chips 65550 frame buffer"
 448                  " (%dK RAM detected)\n",
 449                  p->node, p->fix.smem_len / 1024);
 450
 451         return 0;
 452
 453  err_unmap:
 454         iounmap(p->screen_base);
 455  err_release_pci:
 456         pci_release_region(dp, 0);
 457  err_release_fb:
 458         framebuffer_release(p);
 459  err_disable:
 460  err_out:
 461         return rc;
 462 }
 463
 464 static void __devexit chipsfb_remove(struct pci_dev *dp)
 465 {
 466         struct fb_info *p = pci_get_drvdata(dp);
 467
 468         if (p->screen_base == NULL)
 469                 return;
 470         unregister_framebuffer(p);
 471         iounmap(p->screen_base);
 472         p->screen_base = NULL;
 473         pci_release_region(dp, 0);
 474 }
 475
 476 #ifdef CONFIG_PM
 477 static int chipsfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
 478 {
 479         struct fb_info *p = pci_get_drvdata(pdev);
 480
 481         if (state.event == pdev->dev.power.power_state.event)
 482                 return 0;
 483         if (state.event != PM_SUSPEND_MEM)
 484                 goto done;
 485
 486         acquire_console_sem();
 487         chipsfb_blank(1, p);
 488         fb_set_suspend(p, 1);
 489         release_console_sem();
 490  done:
 491         pdev->dev.power.power_state = state;
 492         return 0;
 493 }
 494
 495 static int chipsfb_pci_resume(struct pci_dev *pdev)
 496 {
 497         struct fb_info *p = pci_get_drvdata(pdev);
 498
 499         acquire_console_sem();
 500         fb_set_suspend(p, 0);
 501         chipsfb_blank(0, p);
 502         release_console_sem();
 503
 504         pdev->dev.power.power_state = PMSG_ON;
 505         return 0;
 506 }
 507 #endif /* CONFIG_PM */
 508
 509
 510 static struct pci_device_id chipsfb_pci_tbl[] = {
 511         { PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_65550, PCI_ANY_ID, PCI_ANY_ID },
 512         { 0 }
 513 };
 514
 515 MODULE_DEVICE_TABLE(pci, chipsfb_pci_tbl);
 516
 517 static struct pci_driver chipsfb_driver = {
 518         .name =         "chipsfb",
 519         .id_table =     chipsfb_pci_tbl,
 520         .probe =        chipsfb_pci_init,
 521         .remove =       __devexit_p(chipsfb_remove),
 522 #ifdef CONFIG_PM
 523         .suspend =      chipsfb_pci_suspend,
 524         .resume =       chipsfb_pci_resume,
 525 #endif
 526 };
 527
 528 int __init chips_init(void)
 529 {
 530         if (fb_get_options("chipsfb", NULL))
 531                 return -ENODEV;
 532
 533         return pci_register_driver(&chipsfb_driver);
 534 }
 535
 536 module_init(chips_init);
 537
 538 static void __exit chipsfb_exit(void)
 539 {
 540         pci_unregister_driver(&chipsfb_driver);
 541 }
 542
 543 MODULE_LICENSE("GPL");