2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
7 * Added support for Audigy 2 Value.
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 #include <sound/driver.h>
33 #include <linux/delay.h>
34 #include <linux/init.h>
35 #include <linux/interrupt.h>
36 #include <linux/pci.h>
37 #include <linux/slab.h>
38 #include <linux/vmalloc.h>
40 #include <sound/core.h>
41 #include <sound/emu10k1.h>
45 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Creative Labs, Inc.");
46 MODULE_DESCRIPTION("Routines for control of EMU10K1 chips");
47 MODULE_LICENSE("GPL");
50 /*************************************************************************
52 *************************************************************************/
54 void snd_emu10k1_voice_init(emu10k1_t
* emu
, int ch
)
56 snd_emu10k1_ptr_write(emu
, DCYSUSV
, ch
, 0);
57 snd_emu10k1_ptr_write(emu
, IP
, ch
, 0);
58 snd_emu10k1_ptr_write(emu
, VTFT
, ch
, 0xffff);
59 snd_emu10k1_ptr_write(emu
, CVCF
, ch
, 0xffff);
60 snd_emu10k1_ptr_write(emu
, PTRX
, ch
, 0);
61 snd_emu10k1_ptr_write(emu
, CPF
, ch
, 0);
62 snd_emu10k1_ptr_write(emu
, CCR
, ch
, 0);
64 snd_emu10k1_ptr_write(emu
, PSST
, ch
, 0);
65 snd_emu10k1_ptr_write(emu
, DSL
, ch
, 0x10);
66 snd_emu10k1_ptr_write(emu
, CCCA
, ch
, 0);
67 snd_emu10k1_ptr_write(emu
, Z1
, ch
, 0);
68 snd_emu10k1_ptr_write(emu
, Z2
, ch
, 0);
69 snd_emu10k1_ptr_write(emu
, FXRT
, ch
, 0x32100000);
71 snd_emu10k1_ptr_write(emu
, ATKHLDM
, ch
, 0);
72 snd_emu10k1_ptr_write(emu
, DCYSUSM
, ch
, 0);
73 snd_emu10k1_ptr_write(emu
, IFATN
, ch
, 0xffff);
74 snd_emu10k1_ptr_write(emu
, PEFE
, ch
, 0);
75 snd_emu10k1_ptr_write(emu
, FMMOD
, ch
, 0);
76 snd_emu10k1_ptr_write(emu
, TREMFRQ
, ch
, 24); /* 1 Hz */
77 snd_emu10k1_ptr_write(emu
, FM2FRQ2
, ch
, 24); /* 1 Hz */
78 snd_emu10k1_ptr_write(emu
, TEMPENV
, ch
, 0);
80 /*** these are last so OFF prevents writing ***/
81 snd_emu10k1_ptr_write(emu
, LFOVAL2
, ch
, 0);
82 snd_emu10k1_ptr_write(emu
, LFOVAL1
, ch
, 0);
83 snd_emu10k1_ptr_write(emu
, ATKHLDV
, ch
, 0);
84 snd_emu10k1_ptr_write(emu
, ENVVOL
, ch
, 0);
85 snd_emu10k1_ptr_write(emu
, ENVVAL
, ch
, 0);
87 /* Audigy extra stuffs */
89 snd_emu10k1_ptr_write(emu
, 0x4c, ch
, 0); /* ?? */
90 snd_emu10k1_ptr_write(emu
, 0x4d, ch
, 0); /* ?? */
91 snd_emu10k1_ptr_write(emu
, 0x4e, ch
, 0); /* ?? */
92 snd_emu10k1_ptr_write(emu
, 0x4f, ch
, 0); /* ?? */
93 snd_emu10k1_ptr_write(emu
, A_FXRT1
, ch
, 0x03020100);
94 snd_emu10k1_ptr_write(emu
, A_FXRT2
, ch
, 0x3f3f3f3f);
95 snd_emu10k1_ptr_write(emu
, A_SENDAMOUNTS
, ch
, 0);
99 static int __devinit
snd_emu10k1_init(emu10k1_t
* emu
, int enable_ir
)
102 unsigned int silent_page
;
104 emu
->fx8010
.itram_size
= (16 * 1024)/2;
105 emu
->fx8010
.etram_pages
.area
= NULL
;
106 emu
->fx8010
.etram_pages
.bytes
= 0;
108 /* disable audio and lock cache */
109 outl(HCFG_LOCKSOUNDCACHE
| HCFG_LOCKTANKCACHE_MASK
| HCFG_MUTEBUTTONENABLE
, emu
->port
+ HCFG
);
111 /* reset recording buffers */
112 snd_emu10k1_ptr_write(emu
, MICBS
, 0, ADCBS_BUFSIZE_NONE
);
113 snd_emu10k1_ptr_write(emu
, MICBA
, 0, 0);
114 snd_emu10k1_ptr_write(emu
, FXBS
, 0, ADCBS_BUFSIZE_NONE
);
115 snd_emu10k1_ptr_write(emu
, FXBA
, 0, 0);
116 snd_emu10k1_ptr_write(emu
, ADCBS
, 0, ADCBS_BUFSIZE_NONE
);
117 snd_emu10k1_ptr_write(emu
, ADCBA
, 0, 0);
119 /* disable channel interrupt */
120 outl(0, emu
->port
+ INTE
);
121 snd_emu10k1_ptr_write(emu
, CLIEL
, 0, 0);
122 snd_emu10k1_ptr_write(emu
, CLIEH
, 0, 0);
123 snd_emu10k1_ptr_write(emu
, SOLEL
, 0, 0);
124 snd_emu10k1_ptr_write(emu
, SOLEH
, 0, 0);
127 /* set SPDIF bypass mode */
128 snd_emu10k1_ptr_write(emu
, SPBYPASS
, 0, SPBYPASS_FORMAT
);
129 /* enable rear left + rear right AC97 slots */
130 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_REAR_RIGHT
| AC97SLOT_REAR_LEFT
);
133 /* init envelope engine */
134 for (ch
= 0; ch
< NUM_G
; ch
++) {
135 emu
->voices
[ch
].emu
= emu
;
136 emu
->voices
[ch
].number
= ch
;
137 snd_emu10k1_voice_init(emu
, ch
);
141 * Init to 0x02109204 :
142 * Clock accuracy = 0 (1000ppm)
143 * Sample Rate = 2 (48kHz)
144 * Audio Channel = 1 (Left of 2)
145 * Source Number = 0 (Unspecified)
146 * Generation Status = 1 (Original for Cat Code 12)
147 * Cat Code = 12 (Digital Signal Mixer)
149 * Emphasis = 0 (None)
150 * CP = 1 (Copyright unasserted)
151 * AN = 0 (Audio data)
154 snd_emu10k1_ptr_write(emu
, SPCS0
, 0,
156 SPCS_CLKACCY_1000PPM
| SPCS_SAMPLERATE_48
|
157 SPCS_CHANNELNUM_LEFT
| SPCS_SOURCENUM_UNSPEC
|
158 SPCS_GENERATIONSTATUS
| 0x00001200 |
159 0x00000000 | SPCS_EMPHASIS_NONE
| SPCS_COPYRIGHT
);
160 snd_emu10k1_ptr_write(emu
, SPCS1
, 0,
162 SPCS_CLKACCY_1000PPM
| SPCS_SAMPLERATE_48
|
163 SPCS_CHANNELNUM_LEFT
| SPCS_SOURCENUM_UNSPEC
|
164 SPCS_GENERATIONSTATUS
| 0x00001200 |
165 0x00000000 | SPCS_EMPHASIS_NONE
| SPCS_COPYRIGHT
);
166 snd_emu10k1_ptr_write(emu
, SPCS2
, 0,
168 SPCS_CLKACCY_1000PPM
| SPCS_SAMPLERATE_48
|
169 SPCS_CHANNELNUM_LEFT
| SPCS_SOURCENUM_UNSPEC
|
170 SPCS_GENERATIONSTATUS
| 0x00001200 |
171 0x00000000 | SPCS_EMPHASIS_NONE
| SPCS_COPYRIGHT
);
173 if (emu
->card_capabilities
->ca0151_chip
) { /* audigy2 */
174 /* Hacks for Alice3 to work independent of haP16V driver */
177 //Setup SRCMulti_I2S SamplingRate
178 tmp
= snd_emu10k1_ptr_read(emu
, A_SPDIF_SAMPLERATE
, 0);
181 snd_emu10k1_ptr_write(emu
, A_SPDIF_SAMPLERATE
, 0, tmp
);
183 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
184 snd_emu10k1_ptr20_write(emu
, SRCSel
, 0, 0x14);
185 /* Setup SRCMulti Input Audio Enable */
186 /* Use 0xFFFFFFFF to enable P16V sounds. */
187 snd_emu10k1_ptr20_write(emu
, SRCMULTI_ENABLE
, 0, 0xFFFFFFFF);
189 /* Enabled Phased (8-channel) P16V playback */
190 outl(0x0201, emu
->port
+ HCFG2
);
191 /* Set playback routing. */
192 snd_emu10k1_ptr20_write(emu
, CAPTURE_P16V_SOURCE
, 0, 0x78e4);
194 if (emu
->card_capabilities
->ca0108_chip
) { /* audigy2 Value */
195 /* Hacks for Alice3 to work independent of haP16V driver */
198 snd_printk(KERN_ERR
"Audigy2 value:Special config.\n");
199 //Setup SRCMulti_I2S SamplingRate
200 tmp
= snd_emu10k1_ptr_read(emu
, A_SPDIF_SAMPLERATE
, 0);
203 snd_emu10k1_ptr_write(emu
, A_SPDIF_SAMPLERATE
, 0, tmp
);
205 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
206 outl(0x600000, emu
->port
+ 0x20);
207 outl(0x14, emu
->port
+ 0x24);
209 /* Setup SRCMulti Input Audio Enable */
210 outl(0x7b0000, emu
->port
+ 0x20);
211 outl(0xFF000000, emu
->port
+ 0x24);
213 /* Setup SPDIF Out Audio Enable */
214 /* The Audigy 2 Value has a separate SPDIF out,
215 * so no need for a mixer switch
217 outl(0x7a0000, emu
->port
+ 0x20);
218 outl(0xFF000000, emu
->port
+ 0x24);
219 tmp
= inl(emu
->port
+ A_IOCFG
) & ~0x8; /* Clear bit 3 */
220 outl(tmp
, emu
->port
+ A_IOCFG
);
225 * Clear page with silence & setup all pointers to this page
227 memset(emu
->silent_page
.area
, 0, PAGE_SIZE
);
228 silent_page
= emu
->silent_page
.addr
<< 1;
229 for (idx
= 0; idx
< MAXPAGES
; idx
++)
230 ((u32
*)emu
->ptb_pages
.area
)[idx
] = cpu_to_le32(silent_page
| idx
);
231 snd_emu10k1_ptr_write(emu
, PTB
, 0, emu
->ptb_pages
.addr
);
232 snd_emu10k1_ptr_write(emu
, TCB
, 0, 0); /* taken from original driver */
233 snd_emu10k1_ptr_write(emu
, TCBS
, 0, 4); /* taken from original driver */
235 silent_page
= (emu
->silent_page
.addr
<< 1) | MAP_PTI_MASK
;
236 for (ch
= 0; ch
< NUM_G
; ch
++) {
237 snd_emu10k1_ptr_write(emu
, MAPA
, ch
, silent_page
);
238 snd_emu10k1_ptr_write(emu
, MAPB
, ch
, silent_page
);
243 * Mute Disable Audio = 0
244 * Lock Tank Memory = 1
245 * Lock Sound Memory = 0
249 if (emu
->revision
== 4) /* audigy2 */
250 outl(HCFG_AUDIOENABLE
|
251 HCFG_AC3ENABLE_CDSPDIF
|
252 HCFG_AC3ENABLE_GPSPDIF
|
253 HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
255 outl(HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
256 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
257 * e.g. card_capabilities->joystick */
258 } else if (emu
->model
== 0x20 ||
259 emu
->model
== 0xc400 ||
260 (emu
->model
== 0x21 && emu
->revision
< 6))
261 outl(HCFG_LOCKTANKCACHE_MASK
| HCFG_AUTOMUTE
, emu
->port
+ HCFG
);
263 // With on-chip joystick
264 outl(HCFG_LOCKTANKCACHE_MASK
| HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
266 if (enable_ir
) { /* enable IR for SB Live */
268 unsigned int reg
= inl(emu
->port
+ A_IOCFG
);
269 outl(reg
| A_IOCFG_GPOUT2
, emu
->port
+ A_IOCFG
);
271 outl(reg
| A_IOCFG_GPOUT1
| A_IOCFG_GPOUT2
, emu
->port
+ A_IOCFG
);
273 outl(reg
, emu
->port
+ A_IOCFG
);
275 unsigned int reg
= inl(emu
->port
+ HCFG
);
276 outl(reg
| HCFG_GPOUT2
, emu
->port
+ HCFG
);
278 outl(reg
| HCFG_GPOUT1
| HCFG_GPOUT2
, emu
->port
+ HCFG
);
280 outl(reg
, emu
->port
+ HCFG
);
284 if (emu
->audigy
) { /* enable analog output */
285 unsigned int reg
= inl(emu
->port
+ A_IOCFG
);
286 outl(reg
| A_IOCFG_GPOUT0
, emu
->port
+ A_IOCFG
);
290 * Initialize the effect engine
292 if ((err
= snd_emu10k1_init_efx(emu
)) < 0)
296 * Enable the audio bit
298 outl(inl(emu
->port
+ HCFG
) | HCFG_AUDIOENABLE
, emu
->port
+ HCFG
);
300 /* Enable analog/digital outs on audigy */
302 outl(inl(emu
->port
+ A_IOCFG
) & ~0x44, emu
->port
+ A_IOCFG
);
304 if (emu
->card_capabilities
->ca0151_chip
) { /* audigy2 */
305 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
306 * This has to be done after init ALice3 I2SOut beyond 48KHz.
307 * So, sequence is important. */
308 outl(inl(emu
->port
+ A_IOCFG
) | 0x0040, emu
->port
+ A_IOCFG
);
309 } else if (emu
->card_capabilities
->ca0108_chip
) { /* audigy2 value */
310 /* Unmute Analog now. */
311 outl(inl(emu
->port
+ A_IOCFG
) | 0x0060, emu
->port
+ A_IOCFG
);
313 /* Disable routing from AC97 line out to Front speakers */
314 outl(inl(emu
->port
+ A_IOCFG
) | 0x0080, emu
->port
+ A_IOCFG
);
321 /* FIXME: the following routine disables LiveDrive-II !! */
324 tmp
= inl(emu
->port
+ HCFG
);
325 if (tmp
& (HCFG_GPINPUT0
| HCFG_GPINPUT1
)) {
326 outl(tmp
|0x800, emu
->port
+ HCFG
);
328 if (tmp
!= (inl(emu
->port
+ HCFG
) & ~0x800)) {
330 outl(tmp
, emu
->port
+ HCFG
);
336 snd_emu10k1_intr_enable(emu
, INTE_PCIERRORENABLE
);
338 emu
->reserved_page
= (emu10k1_memblk_t
*)snd_emu10k1_synth_alloc(emu
, 4096);
339 if (emu
->reserved_page
)
340 emu
->reserved_page
->map_locked
= 1;
345 static int snd_emu10k1_done(emu10k1_t
* emu
)
349 outl(0, emu
->port
+ INTE
);
354 for (ch
= 0; ch
< NUM_G
; ch
++)
355 snd_emu10k1_ptr_write(emu
, DCYSUSV
, ch
, 0);
356 for (ch
= 0; ch
< NUM_G
; ch
++) {
357 snd_emu10k1_ptr_write(emu
, VTFT
, ch
, 0);
358 snd_emu10k1_ptr_write(emu
, CVCF
, ch
, 0);
359 snd_emu10k1_ptr_write(emu
, PTRX
, ch
, 0);
360 snd_emu10k1_ptr_write(emu
, CPF
, ch
, 0);
363 /* reset recording buffers */
364 snd_emu10k1_ptr_write(emu
, MICBS
, 0, 0);
365 snd_emu10k1_ptr_write(emu
, MICBA
, 0, 0);
366 snd_emu10k1_ptr_write(emu
, FXBS
, 0, 0);
367 snd_emu10k1_ptr_write(emu
, FXBA
, 0, 0);
368 snd_emu10k1_ptr_write(emu
, FXWC
, 0, 0);
369 snd_emu10k1_ptr_write(emu
, ADCBS
, 0, ADCBS_BUFSIZE_NONE
);
370 snd_emu10k1_ptr_write(emu
, ADCBA
, 0, 0);
371 snd_emu10k1_ptr_write(emu
, TCBS
, 0, TCBS_BUFFSIZE_16K
);
372 snd_emu10k1_ptr_write(emu
, TCB
, 0, 0);
374 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, A_DBG_SINGLE_STEP
);
376 snd_emu10k1_ptr_write(emu
, DBG
, 0, EMU10K1_DBG_SINGLE_STEP
);
378 /* disable channel interrupt */
379 snd_emu10k1_ptr_write(emu
, CLIEL
, 0, 0);
380 snd_emu10k1_ptr_write(emu
, CLIEH
, 0, 0);
381 snd_emu10k1_ptr_write(emu
, SOLEL
, 0, 0);
382 snd_emu10k1_ptr_write(emu
, SOLEH
, 0, 0);
384 /* remove reserved page */
385 if (emu
->reserved_page
!= NULL
) {
386 snd_emu10k1_synth_free(emu
, (snd_util_memblk_t
*)emu
->reserved_page
);
387 emu
->reserved_page
= NULL
;
390 /* disable audio and lock cache */
391 outl(HCFG_LOCKSOUNDCACHE
| HCFG_LOCKTANKCACHE_MASK
| HCFG_MUTEBUTTONENABLE
, emu
->port
+ HCFG
);
392 snd_emu10k1_ptr_write(emu
, PTB
, 0, 0);
394 snd_emu10k1_free_efx(emu
);
399 /*************************************************************************
400 * ECARD functional implementation
401 *************************************************************************/
403 /* In A1 Silicon, these bits are in the HC register */
404 #define HOOKN_BIT (1L << 12)
405 #define HANDN_BIT (1L << 11)
406 #define PULSEN_BIT (1L << 10)
408 #define EC_GDI1 (1 << 13)
409 #define EC_GDI0 (1 << 14)
411 #define EC_NUM_CONTROL_BITS 20
413 #define EC_AC3_DATA_SELN 0x0001L
414 #define EC_EE_DATA_SEL 0x0002L
415 #define EC_EE_CNTRL_SELN 0x0004L
416 #define EC_EECLK 0x0008L
417 #define EC_EECS 0x0010L
418 #define EC_EESDO 0x0020L
419 #define EC_TRIM_CSN 0x0040L
420 #define EC_TRIM_SCLK 0x0080L
421 #define EC_TRIM_SDATA 0x0100L
422 #define EC_TRIM_MUTEN 0x0200L
423 #define EC_ADCCAL 0x0400L
424 #define EC_ADCRSTN 0x0800L
425 #define EC_DACCAL 0x1000L
426 #define EC_DACMUTEN 0x2000L
427 #define EC_LEDN 0x4000L
429 #define EC_SPDIF0_SEL_SHIFT 15
430 #define EC_SPDIF1_SEL_SHIFT 17
431 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
432 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
433 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
434 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
435 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
436 * be incremented any time the EEPROM's
437 * format is changed. */
439 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
441 /* Addresses for special values stored in to EEPROM */
442 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
443 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
444 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
446 #define EC_LAST_PROMFILE_ADDR 0x2f
448 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
449 * can be up to 30 characters in length
450 * and is stored as a NULL-terminated
451 * ASCII string. Any unused bytes must be
452 * filled with zeros */
453 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
456 /* Most of this stuff is pretty self-evident. According to the hardware
457 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
458 * offset problem. Weird.
460 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
464 #define EC_DEFAULT_ADC_GAIN 0xC4C4
465 #define EC_DEFAULT_SPDIF0_SEL 0x0
466 #define EC_DEFAULT_SPDIF1_SEL 0x4
468 /**************************************************************************
469 * @func Clock bits into the Ecard's control latch. The Ecard uses a
470 * control latch will is loaded bit-serially by toggling the Modem control
471 * lines from function 2 on the E8010. This function hides these details
472 * and presents the illusion that we are actually writing to a distinct
476 static void snd_emu10k1_ecard_write(emu10k1_t
* emu
, unsigned int value
)
478 unsigned short count
;
480 unsigned long hc_port
;
481 unsigned int hc_value
;
483 hc_port
= emu
->port
+ HCFG
;
484 hc_value
= inl(hc_port
) & ~(HOOKN_BIT
| HANDN_BIT
| PULSEN_BIT
);
485 outl(hc_value
, hc_port
);
487 for (count
= 0; count
< EC_NUM_CONTROL_BITS
; count
++) {
489 /* Set up the value */
490 data
= ((value
& 0x1) ? PULSEN_BIT
: 0);
493 outl(hc_value
| data
, hc_port
);
495 /* Clock the shift register */
496 outl(hc_value
| data
| HANDN_BIT
, hc_port
);
497 outl(hc_value
| data
, hc_port
);
501 outl(hc_value
| HOOKN_BIT
, hc_port
);
502 outl(hc_value
, hc_port
);
505 /**************************************************************************
506 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
507 * trim value consists of a 16bit value which is composed of two
508 * 8 bit gain/trim values, one for the left channel and one for the
509 * right channel. The following table maps from the Gain/Attenuation
510 * value in decibels into the corresponding bit pattern for a single
514 static void snd_emu10k1_ecard_setadcgain(emu10k1_t
* emu
,
519 /* Enable writing to the TRIM registers */
520 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
& ~EC_TRIM_CSN
);
522 /* Do it again to insure that we meet hold time requirements */
523 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
& ~EC_TRIM_CSN
);
525 for (bit
= (1 << 15); bit
; bit
>>= 1) {
528 value
= emu
->ecard_ctrl
& ~(EC_TRIM_CSN
| EC_TRIM_SDATA
);
531 value
|= EC_TRIM_SDATA
;
534 snd_emu10k1_ecard_write(emu
, value
);
535 snd_emu10k1_ecard_write(emu
, value
| EC_TRIM_SCLK
);
536 snd_emu10k1_ecard_write(emu
, value
);
539 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
);
542 static int __devinit
snd_emu10k1_ecard_init(emu10k1_t
* emu
)
544 unsigned int hc_value
;
546 /* Set up the initial settings */
547 emu
->ecard_ctrl
= EC_RAW_RUN_MODE
|
548 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL
) |
549 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL
);
551 /* Step 0: Set the codec type in the hardware control register
552 * and enable audio output */
553 hc_value
= inl(emu
->port
+ HCFG
);
554 outl(hc_value
| HCFG_AUDIOENABLE
| HCFG_CODECFORMAT_I2S
, emu
->port
+ HCFG
);
555 inl(emu
->port
+ HCFG
);
557 /* Step 1: Turn off the led and deassert TRIM_CS */
558 snd_emu10k1_ecard_write(emu
, EC_ADCCAL
| EC_LEDN
| EC_TRIM_CSN
);
560 /* Step 2: Calibrate the ADC and DAC */
561 snd_emu10k1_ecard_write(emu
, EC_DACCAL
| EC_LEDN
| EC_TRIM_CSN
);
563 /* Step 3: Wait for awhile; XXX We can't get away with this
564 * under a real operating system; we'll need to block and wait that
566 snd_emu10k1_wait(emu
, 48000);
568 /* Step 4: Switch off the DAC and ADC calibration. Note
569 * That ADC_CAL is actually an inverted signal, so we assert
570 * it here to stop calibration. */
571 snd_emu10k1_ecard_write(emu
, EC_ADCCAL
| EC_LEDN
| EC_TRIM_CSN
);
573 /* Step 4: Switch into run mode */
574 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
);
576 /* Step 5: Set the analog input gain */
577 snd_emu10k1_ecard_setadcgain(emu
, EC_DEFAULT_ADC_GAIN
);
582 static int __devinit
snd_emu10k1_cardbus_init(emu10k1_t
* emu
)
584 unsigned long special_port
;
587 /* Special initialisation routine
588 * before the rest of the IO-Ports become active.
590 special_port
= emu
->port
+ 0x38;
591 value
= inl(special_port
);
592 outl(0x00d00000, special_port
);
593 value
= inl(special_port
);
594 outl(0x00d00001, special_port
);
595 value
= inl(special_port
);
596 outl(0x00d0005f, special_port
);
597 value
= inl(special_port
);
598 outl(0x00d0007f, special_port
);
599 value
= inl(special_port
);
600 outl(0x0090007f, special_port
);
601 value
= inl(special_port
);
607 * Create the EMU10K1 instance
610 static int snd_emu10k1_free(emu10k1_t
*emu
)
612 if (emu
->port
) { /* avoid access to already used hardware */
613 snd_emu10k1_fx8010_tram_setup(emu
, 0);
614 snd_emu10k1_done(emu
);
617 snd_util_memhdr_free(emu
->memhdr
);
618 if (emu
->silent_page
.area
)
619 snd_dma_free_pages(&emu
->silent_page
);
620 if (emu
->ptb_pages
.area
)
621 snd_dma_free_pages(&emu
->ptb_pages
);
622 vfree(emu
->page_ptr_table
);
623 vfree(emu
->page_addr_table
);
625 free_irq(emu
->irq
, (void *)emu
);
627 pci_release_regions(emu
->pci
);
628 pci_disable_device(emu
->pci
);
629 if (emu
->card_capabilities
->ca0151_chip
) /* P16V */
635 static int snd_emu10k1_dev_free(snd_device_t
*device
)
637 emu10k1_t
*emu
= device
->device_data
;
638 return snd_emu10k1_free(emu
);
641 static emu_chip_details_t emu_chip_details
[] = {
642 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
643 /* Tested by James@superbug.co.uk 3rd July 2005 */
644 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x10011102,
645 .driver
= "Audigy2", .name
= "Audigy 2 Value [SB0400]",
651 /* Audigy 2 ZS Notebook Cardbus card.*/
652 /* Tested by James@superbug.co.uk 30th October 2005 */
653 /* Not working yet, but progressing. */
654 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x20011102,
655 .driver
= "Audigy2", .name
= "Audigy 2 ZS Notebook [SB0530]",
659 .ca_cardbus_chip
= 1,
661 {.vendor
= 0x1102, .device
= 0x0008,
662 .driver
= "Audigy2", .name
= "Audigy 2 Value [Unknown]",
667 /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
668 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x40011102,
669 .driver
= "Audigy2", .name
= "E-mu 1212m [4001]",
674 /* Tested by James@superbug.co.uk 3rd July 2005 */
675 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20071102,
676 .driver
= "Audigy2", .name
= "Audigy 4 PRO [SB0380]",
684 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20021102,
685 .driver
= "Audigy2", .name
= "Audigy 2 ZS [SB0350]",
693 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20011102,
694 .driver
= "Audigy2", .name
= "Audigy 2 ZS [2001]",
702 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10071102,
703 .driver
= "Audigy2", .name
= "Audigy 2 [SB0240]",
711 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10051102,
712 .driver
= "Audigy2", .name
= "Audigy 2 EX [1005]",
718 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10021102,
719 .driver
= "Audigy2", .name
= "Audigy 2 Platinum [SB0240P]",
727 {.vendor
= 0x1102, .device
= 0x0004, .revision
= 0x04,
728 .driver
= "Audigy2", .name
= "Audigy 2 [Unknown]",
735 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00531102,
736 .driver
= "Audigy", .name
= "Audigy 1 [SB0090]",
741 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00521102,
742 .driver
= "Audigy", .name
= "Audigy 1 ES [SB0160]",
748 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00511102,
749 .driver
= "Audigy", .name
= "Audigy 1 [SB0090]",
754 {.vendor
= 0x1102, .device
= 0x0004,
755 .driver
= "Audigy", .name
= "Audigy 1 [Unknown]",
760 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x806B1102,
761 .driver
= "EMU10K1", .name
= "SBLive! [SB0105]",
766 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x806A1102,
767 .driver
= "EMU10K1", .name
= "SBLive! Value [SB0103]",
772 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80691102,
773 .driver
= "EMU10K1", .name
= "SBLive! Value [SB0101]",
778 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
779 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80651102,
780 .driver
= "EMU10K1", .name
= "SB Live 5.1 [SB0220]",
785 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80641102,
786 .driver
= "EMU10K1", .name
= "SB Live 5.1",
791 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
792 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80611102,
793 .driver
= "EMU10K1", .name
= "SBLive 5.1 [SB0060]",
796 .ac97_chip
= 2, /* ac97 is optional; both SBLive 5.1 and platinum
797 * share the same IDs!
800 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80511102,
801 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4850]",
806 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80401102,
807 .driver
= "EMU10K1", .name
= "SBLive! Platinum [CT4760P]",
811 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80321102,
812 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4871]",
817 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80311102,
818 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4831]",
823 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80281102,
824 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4870]",
829 /* Tested by James@superbug.co.uk 3rd July 2005 */
830 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80271102,
831 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4832]",
836 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80261102,
837 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4830]",
842 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80231102,
843 .driver
= "EMU10K1", .name
= "SB PCI512 [CT4790]",
848 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80221102,
849 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4780]",
854 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x40011102,
855 .driver
= "EMU10K1", .name
= "E-mu APS [4001]",
859 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x00211102,
860 .driver
= "EMU10K1", .name
= "SBLive! [CT4620]",
865 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x00201102,
866 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4670]",
871 {.vendor
= 0x1102, .device
= 0x0002,
872 .driver
= "EMU10K1", .name
= "SB Live [Unknown]",
880 int __devinit
snd_emu10k1_create(snd_card_t
* card
,
881 struct pci_dev
* pci
,
882 unsigned short extin_mask
,
883 unsigned short extout_mask
,
884 long max_cache_bytes
,
892 unsigned char revision
;
893 const emu_chip_details_t
*c
;
894 static snd_device_ops_t ops
= {
895 .dev_free
= snd_emu10k1_dev_free
,
900 /* enable PCI device */
901 if ((err
= pci_enable_device(pci
)) < 0)
904 emu
= kzalloc(sizeof(*emu
), GFP_KERNEL
);
906 pci_disable_device(pci
);
910 spin_lock_init(&emu
->reg_lock
);
911 spin_lock_init(&emu
->emu_lock
);
912 spin_lock_init(&emu
->voice_lock
);
913 spin_lock_init(&emu
->synth_lock
);
914 spin_lock_init(&emu
->memblk_lock
);
915 init_MUTEX(&emu
->ptb_lock
);
916 init_MUTEX(&emu
->fx8010
.lock
);
917 INIT_LIST_HEAD(&emu
->mapped_link_head
);
918 INIT_LIST_HEAD(&emu
->mapped_order_link_head
);
922 emu
->get_synth_voice
= NULL
;
923 /* read revision & serial */
924 pci_read_config_byte(pci
, PCI_REVISION_ID
, &revision
);
925 emu
->revision
= revision
;
926 pci_read_config_dword(pci
, PCI_SUBSYSTEM_VENDOR_ID
, &emu
->serial
);
927 pci_read_config_word(pci
, PCI_SUBSYSTEM_ID
, &emu
->model
);
928 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci
->vendor
, pci
->device
, emu
->serial
, emu
->model
);
930 for (c
= emu_chip_details
; c
->vendor
; c
++) {
931 if (c
->vendor
== pci
->vendor
&& c
->device
== pci
->device
) {
933 if (c
->subsystem
&& (c
->subsystem
== subsystem
) ) {
937 if (c
->subsystem
&& (c
->subsystem
!= emu
->serial
) )
939 if (c
->revision
&& c
->revision
!= emu
->revision
)
945 if (c
->vendor
== 0) {
946 snd_printk(KERN_ERR
"emu10k1: Card not recognised\n");
948 pci_disable_device(pci
);
951 emu
->card_capabilities
= c
;
952 if (c
->subsystem
&& !subsystem
)
953 snd_printdd("Sound card name=%s\n", c
->name
);
955 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
956 c
->name
, pci
->vendor
, pci
->device
, emu
->serial
, c
->subsystem
);
958 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
959 c
->name
, pci
->vendor
, pci
->device
, emu
->serial
);
961 if (!*card
->id
&& c
->id
) {
963 strlcpy(card
->id
, c
->id
, sizeof(card
->id
));
965 for (i
= 0; i
< snd_ecards_limit
; i
++) {
966 if (snd_cards
[i
] && !strcmp(snd_cards
[i
]->id
, card
->id
))
969 if (i
>= snd_ecards_limit
)
972 if (n
>= SNDRV_CARDS
)
974 snprintf(card
->id
, sizeof(card
->id
), "%s_%d", c
->id
, n
);
978 is_audigy
= emu
->audigy
= c
->emu10k2_chip
;
980 /* set the DMA transfer mask */
981 emu
->dma_mask
= is_audigy
? AUDIGY_DMA_MASK
: EMU10K1_DMA_MASK
;
982 if (pci_set_dma_mask(pci
, emu
->dma_mask
) < 0 ||
983 pci_set_consistent_dma_mask(pci
, emu
->dma_mask
) < 0) {
984 snd_printk(KERN_ERR
"architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu
->dma_mask
);
986 pci_disable_device(pci
);
990 emu
->gpr_base
= A_FXGPREGBASE
;
992 emu
->gpr_base
= FXGPREGBASE
;
994 if ((err
= pci_request_regions(pci
, "EMU10K1")) < 0) {
996 pci_disable_device(pci
);
999 emu
->port
= pci_resource_start(pci
, 0);
1001 if (request_irq(pci
->irq
, snd_emu10k1_interrupt
, SA_INTERRUPT
|SA_SHIRQ
, "EMU10K1", (void *)emu
)) {
1002 snd_emu10k1_free(emu
);
1005 emu
->irq
= pci
->irq
;
1007 emu
->max_cache_pages
= max_cache_bytes
>> PAGE_SHIFT
;
1008 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
1009 32 * 1024, &emu
->ptb_pages
) < 0) {
1010 snd_emu10k1_free(emu
);
1014 emu
->page_ptr_table
= (void **)vmalloc(emu
->max_cache_pages
* sizeof(void*));
1015 emu
->page_addr_table
= (unsigned long*)vmalloc(emu
->max_cache_pages
* sizeof(unsigned long));
1016 if (emu
->page_ptr_table
== NULL
|| emu
->page_addr_table
== NULL
) {
1017 snd_emu10k1_free(emu
);
1021 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
1022 EMUPAGESIZE
, &emu
->silent_page
) < 0) {
1023 snd_emu10k1_free(emu
);
1026 emu
->memhdr
= snd_util_memhdr_new(emu
->max_cache_pages
* PAGE_SIZE
);
1027 if (emu
->memhdr
== NULL
) {
1028 snd_emu10k1_free(emu
);
1031 emu
->memhdr
->block_extra_size
= sizeof(emu10k1_memblk_t
) - sizeof(snd_util_memblk_t
);
1033 pci_set_master(pci
);
1035 emu
->fx8010
.fxbus_mask
= 0x303f;
1036 if (extin_mask
== 0)
1037 extin_mask
= 0x3fcf;
1038 if (extout_mask
== 0)
1039 extout_mask
= 0x7fff;
1040 emu
->fx8010
.extin_mask
= extin_mask
;
1041 emu
->fx8010
.extout_mask
= extout_mask
;
1043 if (emu
->card_capabilities
->ecard
) {
1044 if ((err
= snd_emu10k1_ecard_init(emu
)) < 0) {
1045 snd_emu10k1_free(emu
);
1048 } else if (emu
->card_capabilities
->ca_cardbus_chip
) {
1049 if ((err
= snd_emu10k1_cardbus_init(emu
)) < 0) {
1050 snd_emu10k1_free(emu
);
1054 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1055 does not support this, it shouldn't do any harm */
1056 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_CNTR
|AC97SLOT_LFE
);
1059 if ((err
= snd_emu10k1_init(emu
, enable_ir
)) < 0) {
1060 snd_emu10k1_free(emu
);
1064 if ((err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
, emu
, &ops
)) < 0) {
1065 snd_emu10k1_free(emu
);
1069 snd_emu10k1_proc_init(emu
);
1071 snd_card_set_dev(card
, &pci
->dev
);
1077 EXPORT_SYMBOL(snd_emu10k1_synth_alloc
);
1078 EXPORT_SYMBOL(snd_emu10k1_synth_free
);
1079 EXPORT_SYMBOL(snd_emu10k1_synth_bzero
);
1080 EXPORT_SYMBOL(snd_emu10k1_synth_copy_from_user
);
1081 EXPORT_SYMBOL(snd_emu10k1_memblk_map
);
1083 EXPORT_SYMBOL(snd_emu10k1_voice_alloc
);
1084 EXPORT_SYMBOL(snd_emu10k1_voice_free
);
1086 EXPORT_SYMBOL(snd_emu10k1_ptr_read
);
1087 EXPORT_SYMBOL(snd_emu10k1_ptr_write
);