2 * Core driver for the imx pin controller
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 * Copyright (C) 2012 Linaro Ltd.
7 * Author: Dong Aisheng <dong.aisheng@linaro.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
15 #include <linux/err.h>
16 #include <linux/init.h>
18 #include <linux/module.h>
20 #include <linux/of_device.h>
21 #include <linux/pinctrl/machine.h>
22 #include <linux/pinctrl/pinconf.h>
23 #include <linux/pinctrl/pinctrl.h>
24 #include <linux/pinctrl/pinmux.h>
25 #include <linux/slab.h>
28 #include "pinctrl-imx.h"
30 #define IMX_PMX_DUMP(info, p, m, c, n) \
33 printk(KERN_DEBUG "Format: Pin Mux Config\n"); \
34 for (i = 0; i < n; i++) { \
36 printk(KERN_DEBUG "%s %d 0x%lx\n", \
42 /* The bits in CONFIG cell defined in binding doc*/
43 #define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */
44 #define IMX_PAD_SION 0x40000000 /* set SION */
47 * @dev: a pointer back to containing device
48 * @base: the offset to the controller in virtual memory
52 struct pinctrl_dev
*pctl
;
54 const struct imx_pinctrl_soc_info
*info
;
57 static const inline struct imx_pin_group
*imx_pinctrl_find_group_by_name(
58 const struct imx_pinctrl_soc_info
*info
,
61 const struct imx_pin_group
*grp
= NULL
;
64 for (i
= 0; i
< info
->ngroups
; i
++) {
65 if (!strcmp(info
->groups
[i
].name
, name
)) {
66 grp
= &info
->groups
[i
];
74 static int imx_get_groups_count(struct pinctrl_dev
*pctldev
)
76 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
77 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
82 static const char *imx_get_group_name(struct pinctrl_dev
*pctldev
,
85 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
86 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
88 return info
->groups
[selector
].name
;
91 static int imx_get_group_pins(struct pinctrl_dev
*pctldev
, unsigned selector
,
92 const unsigned **pins
,
95 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
96 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
98 if (selector
>= info
->ngroups
)
101 *pins
= info
->groups
[selector
].pins
;
102 *npins
= info
->groups
[selector
].npins
;
107 static void imx_pin_dbg_show(struct pinctrl_dev
*pctldev
, struct seq_file
*s
,
110 seq_printf(s
, "%s", dev_name(pctldev
->dev
));
113 static int imx_dt_node_to_map(struct pinctrl_dev
*pctldev
,
114 struct device_node
*np
,
115 struct pinctrl_map
**map
, unsigned *num_maps
)
117 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
118 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
119 const struct imx_pin_group
*grp
;
120 struct pinctrl_map
*new_map
;
121 struct device_node
*parent
;
126 * first find the group of this node and check if we need create
127 * config maps for pins
129 grp
= imx_pinctrl_find_group_by_name(info
, np
->name
);
131 dev_err(info
->dev
, "unable to find group for node %s\n",
136 for (i
= 0; i
< grp
->npins
; i
++) {
137 if (!(grp
->configs
[i
] & IMX_NO_PAD_CTL
))
141 new_map
= kmalloc(sizeof(struct pinctrl_map
) * map_num
, GFP_KERNEL
);
149 parent
= of_get_parent(np
);
154 new_map
[0].type
= PIN_MAP_TYPE_MUX_GROUP
;
155 new_map
[0].data
.mux
.function
= parent
->name
;
156 new_map
[0].data
.mux
.group
= np
->name
;
159 /* create config map */
161 for (i
= j
= 0; i
< grp
->npins
; i
++) {
162 if (!(grp
->configs
[i
] & IMX_NO_PAD_CTL
)) {
163 new_map
[j
].type
= PIN_MAP_TYPE_CONFIGS_PIN
;
164 new_map
[j
].data
.configs
.group_or_pin
=
165 pin_get_name(pctldev
, grp
->pins
[i
]);
166 new_map
[j
].data
.configs
.configs
= &grp
->configs
[i
];
167 new_map
[j
].data
.configs
.num_configs
= 1;
172 dev_dbg(pctldev
->dev
, "maps: function %s group %s num %d\n",
173 (*map
)->data
.mux
.function
, (*map
)->data
.mux
.group
, map_num
);
178 static void imx_dt_free_map(struct pinctrl_dev
*pctldev
,
179 struct pinctrl_map
*map
, unsigned num_maps
)
184 static const struct pinctrl_ops imx_pctrl_ops
= {
185 .get_groups_count
= imx_get_groups_count
,
186 .get_group_name
= imx_get_group_name
,
187 .get_group_pins
= imx_get_group_pins
,
188 .pin_dbg_show
= imx_pin_dbg_show
,
189 .dt_node_to_map
= imx_dt_node_to_map
,
190 .dt_free_map
= imx_dt_free_map
,
194 static int imx_pmx_enable(struct pinctrl_dev
*pctldev
, unsigned selector
,
197 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
198 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
199 const struct imx_pin_reg
*pin_reg
;
200 const unsigned *pins
, *mux
, *input_val
;
202 unsigned int npins
, pin_id
;
206 * Configure the mux mode for each pin in the group for a specific
209 pins
= info
->groups
[group
].pins
;
210 npins
= info
->groups
[group
].npins
;
211 mux
= info
->groups
[group
].mux_mode
;
212 input_val
= info
->groups
[group
].input_val
;
213 input_reg
= info
->groups
[group
].input_reg
;
215 WARN_ON(!pins
|| !npins
|| !mux
|| !input_val
|| !input_reg
);
217 dev_dbg(ipctl
->dev
, "enable function %s group %s\n",
218 info
->functions
[selector
].name
, info
->groups
[group
].name
);
220 for (i
= 0; i
< npins
; i
++) {
222 pin_reg
= &info
->pin_regs
[pin_id
];
224 if (!(info
->flags
& ZERO_OFFSET_VALID
) && !pin_reg
->mux_reg
) {
225 dev_err(ipctl
->dev
, "Pin(%s) does not support mux function\n",
226 info
->pins
[pin_id
].name
);
230 if (info
->flags
& SHARE_MUX_CONF_REG
) {
232 reg
= readl(ipctl
->base
+ pin_reg
->mux_reg
);
234 reg
|= (mux
[i
] << 20);
235 writel(reg
, ipctl
->base
+ pin_reg
->mux_reg
);
237 writel(mux
[i
], ipctl
->base
+ pin_reg
->mux_reg
);
239 dev_dbg(ipctl
->dev
, "write: offset 0x%x val 0x%x\n",
240 pin_reg
->mux_reg
, mux
[i
]);
242 /* some pins also need select input setting, set it if found */
244 writel(input_val
[i
], ipctl
->base
+ input_reg
[i
]);
246 "==>select_input: offset 0x%x val 0x%x\n",
247 input_reg
[i
], input_val
[i
]);
254 static int imx_pmx_get_funcs_count(struct pinctrl_dev
*pctldev
)
256 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
257 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
259 return info
->nfunctions
;
262 static const char *imx_pmx_get_func_name(struct pinctrl_dev
*pctldev
,
265 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
266 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
268 return info
->functions
[selector
].name
;
271 static int imx_pmx_get_groups(struct pinctrl_dev
*pctldev
, unsigned selector
,
272 const char * const **groups
,
273 unsigned * const num_groups
)
275 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
276 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
278 *groups
= info
->functions
[selector
].groups
;
279 *num_groups
= info
->functions
[selector
].num_groups
;
284 static const struct pinmux_ops imx_pmx_ops
= {
285 .get_functions_count
= imx_pmx_get_funcs_count
,
286 .get_function_name
= imx_pmx_get_func_name
,
287 .get_function_groups
= imx_pmx_get_groups
,
288 .enable
= imx_pmx_enable
,
291 static int imx_pinconf_get(struct pinctrl_dev
*pctldev
,
292 unsigned pin_id
, unsigned long *config
)
294 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
295 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
296 const struct imx_pin_reg
*pin_reg
= &info
->pin_regs
[pin_id
];
298 if (!(info
->flags
& ZERO_OFFSET_VALID
) && !pin_reg
->conf_reg
) {
299 dev_err(info
->dev
, "Pin(%s) does not support config function\n",
300 info
->pins
[pin_id
].name
);
304 *config
= readl(ipctl
->base
+ pin_reg
->conf_reg
);
306 if (info
->flags
& SHARE_MUX_CONF_REG
)
312 static int imx_pinconf_set(struct pinctrl_dev
*pctldev
,
313 unsigned pin_id
, unsigned long config
)
315 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
316 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
317 const struct imx_pin_reg
*pin_reg
= &info
->pin_regs
[pin_id
];
319 if (!(info
->flags
& ZERO_OFFSET_VALID
) && !pin_reg
->conf_reg
) {
320 dev_err(info
->dev
, "Pin(%s) does not support config function\n",
321 info
->pins
[pin_id
].name
);
325 dev_dbg(ipctl
->dev
, "pinconf set pin %s\n",
326 info
->pins
[pin_id
].name
);
328 if (info
->flags
& SHARE_MUX_CONF_REG
) {
330 reg
= readl(ipctl
->base
+ pin_reg
->conf_reg
);
333 writel(reg
, ipctl
->base
+ pin_reg
->conf_reg
);
335 writel(config
, ipctl
->base
+ pin_reg
->conf_reg
);
337 dev_dbg(ipctl
->dev
, "write: offset 0x%x val 0x%lx\n",
338 pin_reg
->conf_reg
, config
);
343 static void imx_pinconf_dbg_show(struct pinctrl_dev
*pctldev
,
344 struct seq_file
*s
, unsigned pin_id
)
346 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
347 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
348 const struct imx_pin_reg
*pin_reg
= &info
->pin_regs
[pin_id
];
349 unsigned long config
;
351 if (!pin_reg
|| !pin_reg
->conf_reg
) {
352 seq_printf(s
, "N/A");
356 config
= readl(ipctl
->base
+ pin_reg
->conf_reg
);
357 seq_printf(s
, "0x%lx", config
);
360 static void imx_pinconf_group_dbg_show(struct pinctrl_dev
*pctldev
,
361 struct seq_file
*s
, unsigned group
)
363 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
364 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
365 struct imx_pin_group
*grp
;
366 unsigned long config
;
370 if (group
> info
->ngroups
)
374 grp
= &info
->groups
[group
];
375 for (i
= 0; i
< grp
->npins
; i
++) {
376 name
= pin_get_name(pctldev
, grp
->pins
[i
]);
377 ret
= imx_pinconf_get(pctldev
, grp
->pins
[i
], &config
);
380 seq_printf(s
, "%s: 0x%lx", name
, config
);
384 static const struct pinconf_ops imx_pinconf_ops
= {
385 .pin_config_get
= imx_pinconf_get
,
386 .pin_config_set
= imx_pinconf_set
,
387 .pin_config_dbg_show
= imx_pinconf_dbg_show
,
388 .pin_config_group_dbg_show
= imx_pinconf_group_dbg_show
,
391 static struct pinctrl_desc imx_pinctrl_desc
= {
392 .pctlops
= &imx_pctrl_ops
,
393 .pmxops
= &imx_pmx_ops
,
394 .confops
= &imx_pinconf_ops
,
395 .owner
= THIS_MODULE
,
399 * Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and
400 * 1 u32 CONFIG, so 24 types in total for each pin.
402 #define FSL_PIN_SIZE 24
403 #define SHARE_FSL_PIN_SIZE 20
405 static int imx_pinctrl_parse_groups(struct device_node
*np
,
406 struct imx_pin_group
*grp
,
407 struct imx_pinctrl_soc_info
*info
,
415 dev_dbg(info
->dev
, "group(%d): %s\n", index
, np
->name
);
417 if (info
->flags
& SHARE_MUX_CONF_REG
)
418 pin_size
= SHARE_FSL_PIN_SIZE
;
420 pin_size
= FSL_PIN_SIZE
;
421 /* Initialise group */
422 grp
->name
= np
->name
;
425 * the binding format is fsl,pins = <PIN_FUNC_ID CONFIG ...>,
426 * do sanity check and calculate pins number
428 list
= of_get_property(np
, "fsl,pins", &size
);
429 /* we do not check return since it's safe node passed down */
430 if (!size
|| size
% pin_size
) {
431 dev_err(info
->dev
, "Invalid fsl,pins property\n");
435 grp
->npins
= size
/ pin_size
;
436 grp
->pins
= devm_kzalloc(info
->dev
, grp
->npins
* sizeof(unsigned int),
438 grp
->mux_mode
= devm_kzalloc(info
->dev
, grp
->npins
* sizeof(unsigned int),
440 grp
->input_reg
= devm_kzalloc(info
->dev
, grp
->npins
* sizeof(u16
),
442 grp
->input_val
= devm_kzalloc(info
->dev
, grp
->npins
* sizeof(unsigned int),
444 grp
->configs
= devm_kzalloc(info
->dev
, grp
->npins
* sizeof(unsigned long),
446 for (i
= 0; i
< grp
->npins
; i
++) {
447 u32 mux_reg
= be32_to_cpu(*list
++);
450 struct imx_pin_reg
*pin_reg
;
452 if (info
->flags
& SHARE_MUX_CONF_REG
)
455 conf_reg
= be32_to_cpu(*list
++);
457 pin_id
= mux_reg
? mux_reg
/ 4 : conf_reg
/ 4;
458 pin_reg
= &info
->pin_regs
[pin_id
];
459 grp
->pins
[i
] = pin_id
;
460 pin_reg
->mux_reg
= mux_reg
;
461 pin_reg
->conf_reg
= conf_reg
;
462 grp
->input_reg
[i
] = be32_to_cpu(*list
++);
463 grp
->mux_mode
[i
] = be32_to_cpu(*list
++);
464 grp
->input_val
[i
] = be32_to_cpu(*list
++);
466 /* SION bit is in mux register */
467 config
= be32_to_cpu(*list
++);
468 if (config
& IMX_PAD_SION
)
469 grp
->mux_mode
[i
] |= IOMUXC_CONFIG_SION
;
470 grp
->configs
[i
] = config
& ~IMX_PAD_SION
;
474 IMX_PMX_DUMP(info
, grp
->pins
, grp
->mux_mode
, grp
->configs
, grp
->npins
);
480 static int imx_pinctrl_parse_functions(struct device_node
*np
,
481 struct imx_pinctrl_soc_info
*info
,
484 struct device_node
*child
;
485 struct imx_pmx_func
*func
;
486 struct imx_pin_group
*grp
;
488 static u32 grp_index
;
491 dev_dbg(info
->dev
, "parse function(%d): %s\n", index
, np
->name
);
493 func
= &info
->functions
[index
];
495 /* Initialise function */
496 func
->name
= np
->name
;
497 func
->num_groups
= of_get_child_count(np
);
498 if (func
->num_groups
<= 0) {
499 dev_err(info
->dev
, "no groups defined\n");
502 func
->groups
= devm_kzalloc(info
->dev
,
503 func
->num_groups
* sizeof(char *), GFP_KERNEL
);
505 for_each_child_of_node(np
, child
) {
506 func
->groups
[i
] = child
->name
;
507 grp
= &info
->groups
[grp_index
++];
508 ret
= imx_pinctrl_parse_groups(child
, grp
, info
, i
++);
516 static int imx_pinctrl_probe_dt(struct platform_device
*pdev
,
517 struct imx_pinctrl_soc_info
*info
)
519 struct device_node
*np
= pdev
->dev
.of_node
;
520 struct device_node
*child
;
528 nfuncs
= of_get_child_count(np
);
530 dev_err(&pdev
->dev
, "no functions defined\n");
534 info
->nfunctions
= nfuncs
;
535 info
->functions
= devm_kzalloc(&pdev
->dev
, nfuncs
* sizeof(struct imx_pmx_func
),
537 if (!info
->functions
)
541 for_each_child_of_node(np
, child
)
542 info
->ngroups
+= of_get_child_count(child
);
543 info
->groups
= devm_kzalloc(&pdev
->dev
, info
->ngroups
* sizeof(struct imx_pin_group
),
548 for_each_child_of_node(np
, child
) {
549 ret
= imx_pinctrl_parse_functions(child
, info
, i
++);
551 dev_err(&pdev
->dev
, "failed to parse function\n");
559 int imx_pinctrl_probe(struct platform_device
*pdev
,
560 struct imx_pinctrl_soc_info
*info
)
562 struct imx_pinctrl
*ipctl
;
563 struct resource
*res
;
566 if (!info
|| !info
->pins
|| !info
->npins
) {
567 dev_err(&pdev
->dev
, "wrong pinctrl info\n");
570 info
->dev
= &pdev
->dev
;
572 /* Create state holders etc for this driver */
573 ipctl
= devm_kzalloc(&pdev
->dev
, sizeof(*ipctl
), GFP_KERNEL
);
577 info
->pin_regs
= devm_kzalloc(&pdev
->dev
, sizeof(*info
->pin_regs
) *
578 info
->npins
, GFP_KERNEL
);
582 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
586 ipctl
->base
= devm_ioremap_resource(&pdev
->dev
, res
);
587 if (IS_ERR(ipctl
->base
))
588 return PTR_ERR(ipctl
->base
);
590 imx_pinctrl_desc
.name
= dev_name(&pdev
->dev
);
591 imx_pinctrl_desc
.pins
= info
->pins
;
592 imx_pinctrl_desc
.npins
= info
->npins
;
594 ret
= imx_pinctrl_probe_dt(pdev
, info
);
596 dev_err(&pdev
->dev
, "fail to probe dt properties\n");
601 ipctl
->dev
= info
->dev
;
602 platform_set_drvdata(pdev
, ipctl
);
603 ipctl
->pctl
= pinctrl_register(&imx_pinctrl_desc
, &pdev
->dev
, ipctl
);
605 dev_err(&pdev
->dev
, "could not register IMX pinctrl driver\n");
609 dev_info(&pdev
->dev
, "initialized IMX pinctrl driver\n");
614 int imx_pinctrl_remove(struct platform_device
*pdev
)
616 struct imx_pinctrl
*ipctl
= platform_get_drvdata(pdev
);
618 pinctrl_unregister(ipctl
->pctl
);