USB: DWC3: Correct DWC3_DSTS_SOFFN_MASK definition
[linux-2.6.git] / arch / powerpc / kernel / sysfs.c
blob3529446c2abd78a407f9b3a7fd9735ed49802656
1 #include <linux/device.h>
2 #include <linux/cpu.h>
3 #include <linux/smp.h>
4 #include <linux/percpu.h>
5 #include <linux/init.h>
6 #include <linux/sched.h>
7 #include <linux/export.h>
8 #include <linux/nodemask.h>
9 #include <linux/cpumask.h>
10 #include <linux/notifier.h>
12 #include <asm/current.h>
13 #include <asm/processor.h>
14 #include <asm/cputable.h>
15 #include <asm/hvcall.h>
16 #include <asm/prom.h>
17 #include <asm/machdep.h>
18 #include <asm/smp.h>
19 #include <asm/pmc.h>
21 #include "cacheinfo.h"
23 #ifdef CONFIG_PPC64
24 #include <asm/paca.h>
25 #include <asm/lppaca.h>
26 #endif
28 static DEFINE_PER_CPU(struct cpu, cpu_devices);
31 * SMT snooze delay stuff, 64-bit only for now
34 #ifdef CONFIG_PPC64
36 /* Time in microseconds we delay before sleeping in the idle loop */
37 DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
39 static ssize_t store_smt_snooze_delay(struct device *dev,
40 struct device_attribute *attr,
41 const char *buf,
42 size_t count)
44 struct cpu *cpu = container_of(dev, struct cpu, dev);
45 ssize_t ret;
46 long snooze;
48 ret = sscanf(buf, "%ld", &snooze);
49 if (ret != 1)
50 return -EINVAL;
52 per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
53 update_smt_snooze_delay(snooze);
55 return count;
58 static ssize_t show_smt_snooze_delay(struct device *dev,
59 struct device_attribute *attr,
60 char *buf)
62 struct cpu *cpu = container_of(dev, struct cpu, dev);
64 return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
67 static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
68 store_smt_snooze_delay);
70 static int __init setup_smt_snooze_delay(char *str)
72 unsigned int cpu;
73 long snooze;
75 if (!cpu_has_feature(CPU_FTR_SMT))
76 return 1;
78 snooze = simple_strtol(str, NULL, 10);
79 for_each_possible_cpu(cpu)
80 per_cpu(smt_snooze_delay, cpu) = snooze;
82 return 1;
84 __setup("smt-snooze-delay=", setup_smt_snooze_delay);
86 #endif /* CONFIG_PPC64 */
89 * Enabling PMCs will slow partition context switch times so we only do
90 * it the first time we write to the PMCs.
93 static DEFINE_PER_CPU(char, pmcs_enabled);
95 void ppc_enable_pmcs(void)
97 ppc_set_pmu_inuse(1);
99 /* Only need to enable them once */
100 if (__get_cpu_var(pmcs_enabled))
101 return;
103 __get_cpu_var(pmcs_enabled) = 1;
105 if (ppc_md.enable_pmcs)
106 ppc_md.enable_pmcs();
108 EXPORT_SYMBOL(ppc_enable_pmcs);
110 #define SYSFS_PMCSETUP(NAME, ADDRESS) \
111 static void read_##NAME(void *val) \
113 *(unsigned long *)val = mfspr(ADDRESS); \
115 static void write_##NAME(void *val) \
117 ppc_enable_pmcs(); \
118 mtspr(ADDRESS, *(unsigned long *)val); \
120 static ssize_t show_##NAME(struct device *dev, \
121 struct device_attribute *attr, \
122 char *buf) \
124 struct cpu *cpu = container_of(dev, struct cpu, dev); \
125 unsigned long val; \
126 smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1); \
127 return sprintf(buf, "%lx\n", val); \
129 static ssize_t __used \
130 store_##NAME(struct device *dev, struct device_attribute *attr, \
131 const char *buf, size_t count) \
133 struct cpu *cpu = container_of(dev, struct cpu, dev); \
134 unsigned long val; \
135 int ret = sscanf(buf, "%lx", &val); \
136 if (ret != 1) \
137 return -EINVAL; \
138 smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
139 return count; \
143 /* Let's define all possible registers, we'll only hook up the ones
144 * that are implemented on the current processor
147 #if defined(CONFIG_PPC64)
148 #define HAS_PPC_PMC_CLASSIC 1
149 #define HAS_PPC_PMC_IBM 1
150 #define HAS_PPC_PMC_PA6T 1
151 #elif defined(CONFIG_6xx)
152 #define HAS_PPC_PMC_CLASSIC 1
153 #define HAS_PPC_PMC_IBM 1
154 #define HAS_PPC_PMC_G4 1
155 #endif
158 #ifdef HAS_PPC_PMC_CLASSIC
159 SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
160 SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
161 SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
162 SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
163 SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
164 SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
165 SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
166 SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
168 #ifdef HAS_PPC_PMC_G4
169 SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
170 #endif
172 #ifdef CONFIG_PPC64
173 SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
174 SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
176 SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
177 SYSFS_PMCSETUP(purr, SPRN_PURR);
178 SYSFS_PMCSETUP(spurr, SPRN_SPURR);
179 SYSFS_PMCSETUP(dscr, SPRN_DSCR);
180 SYSFS_PMCSETUP(pir, SPRN_PIR);
182 static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
183 static DEVICE_ATTR(spurr, 0600, show_spurr, NULL);
184 static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
185 static DEVICE_ATTR(purr, 0600, show_purr, store_purr);
186 static DEVICE_ATTR(pir, 0400, show_pir, NULL);
188 unsigned long dscr_default = 0;
189 EXPORT_SYMBOL(dscr_default);
191 static ssize_t show_dscr_default(struct device *dev,
192 struct device_attribute *attr, char *buf)
194 return sprintf(buf, "%lx\n", dscr_default);
197 static ssize_t __used store_dscr_default(struct device *dev,
198 struct device_attribute *attr, const char *buf,
199 size_t count)
201 unsigned long val;
202 int ret = 0;
204 ret = sscanf(buf, "%lx", &val);
205 if (ret != 1)
206 return -EINVAL;
207 dscr_default = val;
209 return count;
212 static DEVICE_ATTR(dscr_default, 0600,
213 show_dscr_default, store_dscr_default);
215 static void sysfs_create_dscr_default(void)
217 int err = 0;
218 if (cpu_has_feature(CPU_FTR_DSCR))
219 err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
221 #endif /* CONFIG_PPC64 */
223 #ifdef HAS_PPC_PMC_PA6T
224 SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
225 SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
226 SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
227 SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
228 SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
229 SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
230 #ifdef CONFIG_DEBUG_KERNEL
231 SYSFS_PMCSETUP(hid0, SPRN_HID0);
232 SYSFS_PMCSETUP(hid1, SPRN_HID1);
233 SYSFS_PMCSETUP(hid4, SPRN_HID4);
234 SYSFS_PMCSETUP(hid5, SPRN_HID5);
235 SYSFS_PMCSETUP(ima0, SPRN_PA6T_IMA0);
236 SYSFS_PMCSETUP(ima1, SPRN_PA6T_IMA1);
237 SYSFS_PMCSETUP(ima2, SPRN_PA6T_IMA2);
238 SYSFS_PMCSETUP(ima3, SPRN_PA6T_IMA3);
239 SYSFS_PMCSETUP(ima4, SPRN_PA6T_IMA4);
240 SYSFS_PMCSETUP(ima5, SPRN_PA6T_IMA5);
241 SYSFS_PMCSETUP(ima6, SPRN_PA6T_IMA6);
242 SYSFS_PMCSETUP(ima7, SPRN_PA6T_IMA7);
243 SYSFS_PMCSETUP(ima8, SPRN_PA6T_IMA8);
244 SYSFS_PMCSETUP(ima9, SPRN_PA6T_IMA9);
245 SYSFS_PMCSETUP(imaat, SPRN_PA6T_IMAAT);
246 SYSFS_PMCSETUP(btcr, SPRN_PA6T_BTCR);
247 SYSFS_PMCSETUP(pccr, SPRN_PA6T_PCCR);
248 SYSFS_PMCSETUP(rpccr, SPRN_PA6T_RPCCR);
249 SYSFS_PMCSETUP(der, SPRN_PA6T_DER);
250 SYSFS_PMCSETUP(mer, SPRN_PA6T_MER);
251 SYSFS_PMCSETUP(ber, SPRN_PA6T_BER);
252 SYSFS_PMCSETUP(ier, SPRN_PA6T_IER);
253 SYSFS_PMCSETUP(sier, SPRN_PA6T_SIER);
254 SYSFS_PMCSETUP(siar, SPRN_PA6T_SIAR);
255 SYSFS_PMCSETUP(tsr0, SPRN_PA6T_TSR0);
256 SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
257 SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
258 SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
259 #endif /* CONFIG_DEBUG_KERNEL */
260 #endif /* HAS_PPC_PMC_PA6T */
262 #ifdef HAS_PPC_PMC_IBM
263 static struct device_attribute ibm_common_attrs[] = {
264 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
265 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
267 #endif /* HAS_PPC_PMC_G4 */
269 #ifdef HAS_PPC_PMC_G4
270 static struct device_attribute g4_common_attrs[] = {
271 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
272 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
273 __ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
275 #endif /* HAS_PPC_PMC_G4 */
277 static struct device_attribute classic_pmc_attrs[] = {
278 __ATTR(pmc1, 0600, show_pmc1, store_pmc1),
279 __ATTR(pmc2, 0600, show_pmc2, store_pmc2),
280 __ATTR(pmc3, 0600, show_pmc3, store_pmc3),
281 __ATTR(pmc4, 0600, show_pmc4, store_pmc4),
282 __ATTR(pmc5, 0600, show_pmc5, store_pmc5),
283 __ATTR(pmc6, 0600, show_pmc6, store_pmc6),
284 #ifdef CONFIG_PPC64
285 __ATTR(pmc7, 0600, show_pmc7, store_pmc7),
286 __ATTR(pmc8, 0600, show_pmc8, store_pmc8),
287 #endif
290 #ifdef HAS_PPC_PMC_PA6T
291 static struct device_attribute pa6t_attrs[] = {
292 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
293 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
294 __ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
295 __ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
296 __ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
297 __ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
298 __ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
299 __ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
300 #ifdef CONFIG_DEBUG_KERNEL
301 __ATTR(hid0, 0600, show_hid0, store_hid0),
302 __ATTR(hid1, 0600, show_hid1, store_hid1),
303 __ATTR(hid4, 0600, show_hid4, store_hid4),
304 __ATTR(hid5, 0600, show_hid5, store_hid5),
305 __ATTR(ima0, 0600, show_ima0, store_ima0),
306 __ATTR(ima1, 0600, show_ima1, store_ima1),
307 __ATTR(ima2, 0600, show_ima2, store_ima2),
308 __ATTR(ima3, 0600, show_ima3, store_ima3),
309 __ATTR(ima4, 0600, show_ima4, store_ima4),
310 __ATTR(ima5, 0600, show_ima5, store_ima5),
311 __ATTR(ima6, 0600, show_ima6, store_ima6),
312 __ATTR(ima7, 0600, show_ima7, store_ima7),
313 __ATTR(ima8, 0600, show_ima8, store_ima8),
314 __ATTR(ima9, 0600, show_ima9, store_ima9),
315 __ATTR(imaat, 0600, show_imaat, store_imaat),
316 __ATTR(btcr, 0600, show_btcr, store_btcr),
317 __ATTR(pccr, 0600, show_pccr, store_pccr),
318 __ATTR(rpccr, 0600, show_rpccr, store_rpccr),
319 __ATTR(der, 0600, show_der, store_der),
320 __ATTR(mer, 0600, show_mer, store_mer),
321 __ATTR(ber, 0600, show_ber, store_ber),
322 __ATTR(ier, 0600, show_ier, store_ier),
323 __ATTR(sier, 0600, show_sier, store_sier),
324 __ATTR(siar, 0600, show_siar, store_siar),
325 __ATTR(tsr0, 0600, show_tsr0, store_tsr0),
326 __ATTR(tsr1, 0600, show_tsr1, store_tsr1),
327 __ATTR(tsr2, 0600, show_tsr2, store_tsr2),
328 __ATTR(tsr3, 0600, show_tsr3, store_tsr3),
329 #endif /* CONFIG_DEBUG_KERNEL */
331 #endif /* HAS_PPC_PMC_PA6T */
332 #endif /* HAS_PPC_PMC_CLASSIC */
334 static void __cpuinit register_cpu_online(unsigned int cpu)
336 struct cpu *c = &per_cpu(cpu_devices, cpu);
337 struct device *s = &c->dev;
338 struct device_attribute *attrs, *pmc_attrs;
339 int i, nattrs;
341 #ifdef CONFIG_PPC64
342 if (cpu_has_feature(CPU_FTR_SMT))
343 device_create_file(s, &dev_attr_smt_snooze_delay);
344 #endif
346 /* PMC stuff */
347 switch (cur_cpu_spec->pmc_type) {
348 #ifdef HAS_PPC_PMC_IBM
349 case PPC_PMC_IBM:
350 attrs = ibm_common_attrs;
351 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
352 pmc_attrs = classic_pmc_attrs;
353 break;
354 #endif /* HAS_PPC_PMC_IBM */
355 #ifdef HAS_PPC_PMC_G4
356 case PPC_PMC_G4:
357 attrs = g4_common_attrs;
358 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
359 pmc_attrs = classic_pmc_attrs;
360 break;
361 #endif /* HAS_PPC_PMC_G4 */
362 #ifdef HAS_PPC_PMC_PA6T
363 case PPC_PMC_PA6T:
364 /* PA Semi starts counting at PMC0 */
365 attrs = pa6t_attrs;
366 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
367 pmc_attrs = NULL;
368 break;
369 #endif /* HAS_PPC_PMC_PA6T */
370 default:
371 attrs = NULL;
372 nattrs = 0;
373 pmc_attrs = NULL;
376 for (i = 0; i < nattrs; i++)
377 device_create_file(s, &attrs[i]);
379 if (pmc_attrs)
380 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
381 device_create_file(s, &pmc_attrs[i]);
383 #ifdef CONFIG_PPC64
384 if (cpu_has_feature(CPU_FTR_MMCRA))
385 device_create_file(s, &dev_attr_mmcra);
387 if (cpu_has_feature(CPU_FTR_PURR))
388 device_create_file(s, &dev_attr_purr);
390 if (cpu_has_feature(CPU_FTR_SPURR))
391 device_create_file(s, &dev_attr_spurr);
393 if (cpu_has_feature(CPU_FTR_DSCR))
394 device_create_file(s, &dev_attr_dscr);
396 if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
397 device_create_file(s, &dev_attr_pir);
398 #endif /* CONFIG_PPC64 */
400 cacheinfo_cpu_online(cpu);
403 #ifdef CONFIG_HOTPLUG_CPU
404 static void unregister_cpu_online(unsigned int cpu)
406 struct cpu *c = &per_cpu(cpu_devices, cpu);
407 struct device *s = &c->dev;
408 struct device_attribute *attrs, *pmc_attrs;
409 int i, nattrs;
411 BUG_ON(!c->hotpluggable);
413 #ifdef CONFIG_PPC64
414 if (cpu_has_feature(CPU_FTR_SMT))
415 device_remove_file(s, &dev_attr_smt_snooze_delay);
416 #endif
418 /* PMC stuff */
419 switch (cur_cpu_spec->pmc_type) {
420 #ifdef HAS_PPC_PMC_IBM
421 case PPC_PMC_IBM:
422 attrs = ibm_common_attrs;
423 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
424 pmc_attrs = classic_pmc_attrs;
425 break;
426 #endif /* HAS_PPC_PMC_IBM */
427 #ifdef HAS_PPC_PMC_G4
428 case PPC_PMC_G4:
429 attrs = g4_common_attrs;
430 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
431 pmc_attrs = classic_pmc_attrs;
432 break;
433 #endif /* HAS_PPC_PMC_G4 */
434 #ifdef HAS_PPC_PMC_PA6T
435 case PPC_PMC_PA6T:
436 /* PA Semi starts counting at PMC0 */
437 attrs = pa6t_attrs;
438 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
439 pmc_attrs = NULL;
440 break;
441 #endif /* HAS_PPC_PMC_PA6T */
442 default:
443 attrs = NULL;
444 nattrs = 0;
445 pmc_attrs = NULL;
448 for (i = 0; i < nattrs; i++)
449 device_remove_file(s, &attrs[i]);
451 if (pmc_attrs)
452 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
453 device_remove_file(s, &pmc_attrs[i]);
455 #ifdef CONFIG_PPC64
456 if (cpu_has_feature(CPU_FTR_MMCRA))
457 device_remove_file(s, &dev_attr_mmcra);
459 if (cpu_has_feature(CPU_FTR_PURR))
460 device_remove_file(s, &dev_attr_purr);
462 if (cpu_has_feature(CPU_FTR_SPURR))
463 device_remove_file(s, &dev_attr_spurr);
465 if (cpu_has_feature(CPU_FTR_DSCR))
466 device_remove_file(s, &dev_attr_dscr);
468 if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
469 device_remove_file(s, &dev_attr_pir);
470 #endif /* CONFIG_PPC64 */
472 cacheinfo_cpu_offline(cpu);
475 #ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
476 ssize_t arch_cpu_probe(const char *buf, size_t count)
478 if (ppc_md.cpu_probe)
479 return ppc_md.cpu_probe(buf, count);
481 return -EINVAL;
484 ssize_t arch_cpu_release(const char *buf, size_t count)
486 if (ppc_md.cpu_release)
487 return ppc_md.cpu_release(buf, count);
489 return -EINVAL;
491 #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
493 #endif /* CONFIG_HOTPLUG_CPU */
495 static int __cpuinit sysfs_cpu_notify(struct notifier_block *self,
496 unsigned long action, void *hcpu)
498 unsigned int cpu = (unsigned int)(long)hcpu;
500 switch (action) {
501 case CPU_ONLINE:
502 case CPU_ONLINE_FROZEN:
503 register_cpu_online(cpu);
504 break;
505 #ifdef CONFIG_HOTPLUG_CPU
506 case CPU_DEAD:
507 case CPU_DEAD_FROZEN:
508 unregister_cpu_online(cpu);
509 break;
510 #endif
512 return NOTIFY_OK;
515 static struct notifier_block __cpuinitdata sysfs_cpu_nb = {
516 .notifier_call = sysfs_cpu_notify,
519 static DEFINE_MUTEX(cpu_mutex);
521 int cpu_add_dev_attr(struct device_attribute *attr)
523 int cpu;
525 mutex_lock(&cpu_mutex);
527 for_each_possible_cpu(cpu) {
528 device_create_file(get_cpu_device(cpu), attr);
531 mutex_unlock(&cpu_mutex);
532 return 0;
534 EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
536 int cpu_add_dev_attr_group(struct attribute_group *attrs)
538 int cpu;
539 struct device *dev;
540 int ret;
542 mutex_lock(&cpu_mutex);
544 for_each_possible_cpu(cpu) {
545 dev = get_cpu_device(cpu);
546 ret = sysfs_create_group(&dev->kobj, attrs);
547 WARN_ON(ret != 0);
550 mutex_unlock(&cpu_mutex);
551 return 0;
553 EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
556 void cpu_remove_dev_attr(struct device_attribute *attr)
558 int cpu;
560 mutex_lock(&cpu_mutex);
562 for_each_possible_cpu(cpu) {
563 device_remove_file(get_cpu_device(cpu), attr);
566 mutex_unlock(&cpu_mutex);
568 EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
570 void cpu_remove_dev_attr_group(struct attribute_group *attrs)
572 int cpu;
573 struct device *dev;
575 mutex_lock(&cpu_mutex);
577 for_each_possible_cpu(cpu) {
578 dev = get_cpu_device(cpu);
579 sysfs_remove_group(&dev->kobj, attrs);
582 mutex_unlock(&cpu_mutex);
584 EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
587 /* NUMA stuff */
589 #ifdef CONFIG_NUMA
590 static void register_nodes(void)
592 int i;
594 for (i = 0; i < MAX_NUMNODES; i++)
595 register_one_node(i);
598 int sysfs_add_device_to_node(struct device *dev, int nid)
600 struct node *node = &node_devices[nid];
601 return sysfs_create_link(&node->dev.kobj, &dev->kobj,
602 kobject_name(&dev->kobj));
604 EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
606 void sysfs_remove_device_from_node(struct device *dev, int nid)
608 struct node *node = &node_devices[nid];
609 sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
611 EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
613 #else
614 static void register_nodes(void)
616 return;
619 #endif
621 /* Only valid if CPU is present. */
622 static ssize_t show_physical_id(struct device *dev,
623 struct device_attribute *attr, char *buf)
625 struct cpu *cpu = container_of(dev, struct cpu, dev);
627 return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
629 static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
631 static int __init topology_init(void)
633 int cpu;
635 register_nodes();
636 register_cpu_notifier(&sysfs_cpu_nb);
638 for_each_possible_cpu(cpu) {
639 struct cpu *c = &per_cpu(cpu_devices, cpu);
642 * For now, we just see if the system supports making
643 * the RTAS calls for CPU hotplug. But, there may be a
644 * more comprehensive way to do this for an individual
645 * CPU. For instance, the boot cpu might never be valid
646 * for hotplugging.
648 if (ppc_md.cpu_die)
649 c->hotpluggable = 1;
651 if (cpu_online(cpu) || c->hotpluggable) {
652 register_cpu(c, cpu);
654 device_create_file(&c->dev, &dev_attr_physical_id);
657 if (cpu_online(cpu))
658 register_cpu_online(cpu);
660 #ifdef CONFIG_PPC64
661 sysfs_create_dscr_default();
662 #endif /* CONFIG_PPC64 */
664 return 0;
666 subsys_initcall(topology_init);