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drm/exynos: fixed page flip bug.
[linux-2.6.git] / drivers / gpu / drm / exynos / exynos_drm_fimd.c
blob68446b3bd8f078e26097eee2e7006a8b0f806b95
1 /* exynos_drm_fimd.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Co.Ltd
4 * Authors:
5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Inki Dae <inki.dae@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14 #include "drmP.h"
15
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/platform_device.h>
19 #include <linux/clk.h>
20
21 #include <drm/exynos_drm.h>
22 #include <plat/regs-fb-v4.h>
23
24 #include "exynos_drm_drv.h"
25 #include "exynos_drm_fbdev.h"
26 #include "exynos_drm_crtc.h"
27
28 /*
29 * FIMD is stand for Fully Interactive Mobile Display and
30 * as a display controller, it transfers contents drawn on memory
31 * to a LCD Panel through Display Interfaces such as RGB or
32 * CPU Interface.
33 */
34
35 /* position control register for hardware window 0, 2 ~ 4.*/
36 #define VIDOSD_A(win) (VIDOSD_BASE + 0x00 + (win) * 16)
37 #define VIDOSD_B(win) (VIDOSD_BASE + 0x04 + (win) * 16)
38 /* size control register for hardware window 0. */
39 #define VIDOSD_C_SIZE_W0 (VIDOSD_BASE + 0x08)
40 /* alpha control register for hardware window 1 ~ 4. */
41 #define VIDOSD_C(win) (VIDOSD_BASE + 0x18 + (win) * 16)
42 /* size control register for hardware window 1 ~ 4. */
43 #define VIDOSD_D(win) (VIDOSD_BASE + 0x0C + (win) * 16)
44
45 #define VIDWx_BUF_START(win, buf) (VIDW_BUF_START(buf) + (win) * 8)
46 #define VIDWx_BUF_END(win, buf) (VIDW_BUF_END(buf) + (win) * 8)
47 #define VIDWx_BUF_SIZE(win, buf) (VIDW_BUF_SIZE(buf) + (win) * 4)
48
49 /* color key control register for hardware window 1 ~ 4. */
50 #define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + (x * 8))
51 /* color key value register for hardware window 1 ~ 4. */
52 #define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + (x * 8))
53
54 /* FIMD has totally five hardware windows. */
55 #define WINDOWS_NR 5
56
57 #define get_fimd_context(dev) platform_get_drvdata(to_platform_device(dev))
58
59 struct fimd_win_data {
60 unsigned int offset_x;
61 unsigned int offset_y;
62 unsigned int ovl_width;
63 unsigned int ovl_height;
64 unsigned int fb_width;
65 unsigned int fb_height;
66 unsigned int bpp;
67 dma_addr_t paddr;
68 void __iomem *vaddr;
69 unsigned int buf_offsize;
70 unsigned int line_size; /* bytes */
71 };
72
73 struct fimd_context {
74 struct exynos_drm_subdrv subdrv;
75 int irq;
76 struct drm_crtc *crtc;
77 struct clk *bus_clk;
78 struct clk *lcd_clk;
79 struct resource *regs_res;
80 void __iomem *regs;
81 struct fimd_win_data win_data[WINDOWS_NR];
82 unsigned int clkdiv;
83 unsigned int default_win;
84 unsigned long irq_flags;
85 u32 vidcon0;
86 u32 vidcon1;
87
88 struct fb_videomode *timing;
89 };
90
91 static bool fimd_display_is_connected(struct device *dev)
92 {
93 struct fimd_context *ctx = get_fimd_context(dev);
94
95 DRM_DEBUG_KMS("%s\n", __FILE__);
96
97 /* TODO. */
98
99 return true;
100 }
101
102 static void *fimd_get_timing(struct device *dev)
103 {
104 struct fimd_context *ctx = get_fimd_context(dev);
105
106 DRM_DEBUG_KMS("%s\n", __FILE__);
107
108 return ctx->timing;
109 }
110
111 static int fimd_check_timing(struct device *dev, void *timing)
112 {
113 struct fimd_context *ctx = get_fimd_context(dev);
114
115 DRM_DEBUG_KMS("%s\n", __FILE__);
116
117 /* TODO. */
118
119 return 0;
120 }
121
122 static int fimd_display_power_on(struct device *dev, int mode)
123 {
124 struct fimd_context *ctx = get_fimd_context(dev);
125
126 DRM_DEBUG_KMS("%s\n", __FILE__);
127
128 /* TODO. */
129
130 return 0;
131 }
132
133 static struct exynos_drm_display fimd_display = {
134 .type = EXYNOS_DISPLAY_TYPE_LCD,
135 .is_connected = fimd_display_is_connected,
136 .get_timing = fimd_get_timing,
137 .check_timing = fimd_check_timing,
138 .power_on = fimd_display_power_on,
139 };
140
141 static void fimd_commit(struct device *dev)
142 {
143 struct fimd_context *ctx = get_fimd_context(dev);
144 struct fb_videomode *timing = ctx->timing;
145 u32 val;
146
147 DRM_DEBUG_KMS("%s\n", __FILE__);
148
149 /* setup polarity values from machine code. */
150 writel(ctx->vidcon1, ctx->regs + VIDCON1);
151
152 /* setup vertical timing values. */
153 val = VIDTCON0_VBPD(timing->upper_margin - 1) |
154 VIDTCON0_VFPD(timing->lower_margin - 1) |
155 VIDTCON0_VSPW(timing->vsync_len - 1);
156 writel(val, ctx->regs + VIDTCON0);
157
158 /* setup horizontal timing values. */
159 val = VIDTCON1_HBPD(timing->left_margin - 1) |
160 VIDTCON1_HFPD(timing->right_margin - 1) |
161 VIDTCON1_HSPW(timing->hsync_len - 1);
162 writel(val, ctx->regs + VIDTCON1);
163
164 /* setup horizontal and vertical display size. */
165 val = VIDTCON2_LINEVAL(timing->yres - 1) |
166 VIDTCON2_HOZVAL(timing->xres - 1);
167 writel(val, ctx->regs + VIDTCON2);
168
169 /* setup clock source, clock divider, enable dma. */
170 val = ctx->vidcon0;
171 val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
172
173 if (ctx->clkdiv > 1)
174 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR;
175 else
176 val &= ~VIDCON0_CLKDIR; /* 1:1 clock */
177
178 /*
179 * fields of register with prefix '_F' would be updated
180 * at vsync(same as dma start)
181 */
182 val |= VIDCON0_ENVID | VIDCON0_ENVID_F;
183 writel(val, ctx->regs + VIDCON0);
184 }
185
186 static int fimd_enable_vblank(struct device *dev)
187 {
188 struct fimd_context *ctx = get_fimd_context(dev);
189 u32 val;
190
191 DRM_DEBUG_KMS("%s\n", __FILE__);
192
193 if (!test_and_set_bit(0, &ctx->irq_flags)) {
194 val = readl(ctx->regs + VIDINTCON0);
195
196 val |= VIDINTCON0_INT_ENABLE;
197 val |= VIDINTCON0_INT_FRAME;
198
199 val &= ~VIDINTCON0_FRAMESEL0_MASK;
200 val |= VIDINTCON0_FRAMESEL0_VSYNC;
201 val &= ~VIDINTCON0_FRAMESEL1_MASK;
202 val |= VIDINTCON0_FRAMESEL1_NONE;
203
204 writel(val, ctx->regs + VIDINTCON0);
205 }
206
207 return 0;
208 }
209
210 static void fimd_disable_vblank(struct device *dev)
211 {
212 struct fimd_context *ctx = get_fimd_context(dev);
213 u32 val;
214
215 DRM_DEBUG_KMS("%s\n", __FILE__);
216
217 if (test_and_clear_bit(0, &ctx->irq_flags)) {
218 val = readl(ctx->regs + VIDINTCON0);
219
220 val &= ~VIDINTCON0_INT_FRAME;
221 val &= ~VIDINTCON0_INT_ENABLE;
222
223 writel(val, ctx->regs + VIDINTCON0);
224 }
225 }
226
227 static struct exynos_drm_manager_ops fimd_manager_ops = {
228 .commit = fimd_commit,
229 .enable_vblank = fimd_enable_vblank,
230 .disable_vblank = fimd_disable_vblank,
231 };
232
233 static void fimd_win_mode_set(struct device *dev,
234 struct exynos_drm_overlay *overlay)
235 {
236 struct fimd_context *ctx = get_fimd_context(dev);
237 struct fimd_win_data *win_data;
238 unsigned long offset;
239
240 DRM_DEBUG_KMS("%s\n", __FILE__);
241
242 if (!overlay) {
243 dev_err(dev, "overlay is NULL\n");
244 return;
245 }
246
247 offset = overlay->fb_x * (overlay->bpp >> 3);
248 offset += overlay->fb_y * overlay->pitch;
249
250 DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch);
251
252 win_data = &ctx->win_data[ctx->default_win];
253
254 win_data->offset_x = overlay->crtc_x;
255 win_data->offset_y = overlay->crtc_y;
256 win_data->ovl_width = overlay->crtc_width;
257 win_data->ovl_height = overlay->crtc_height;
258 win_data->fb_width = overlay->fb_width;
259 win_data->fb_height = overlay->fb_height;
260 win_data->paddr = overlay->paddr + offset;
261 win_data->vaddr = overlay->vaddr + offset;
262 win_data->bpp = overlay->bpp;
263 win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) *
264 (overlay->bpp >> 3);
265 win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3);
266
267 DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n",
268 win_data->offset_x, win_data->offset_y);
269 DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
270 win_data->ovl_width, win_data->ovl_height);
271 DRM_DEBUG_KMS("paddr = 0x%lx, vaddr = 0x%lx\n",
272 (unsigned long)win_data->paddr,
273 (unsigned long)win_data->vaddr);
274 DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n",
275 overlay->fb_width, overlay->crtc_width);
276 }
277
278 static void fimd_win_set_pixfmt(struct device *dev, unsigned int win)
279 {
280 struct fimd_context *ctx = get_fimd_context(dev);
281 struct fimd_win_data *win_data = &ctx->win_data[win];
282 unsigned long val;
283
284 DRM_DEBUG_KMS("%s\n", __FILE__);
285
286 val = WINCONx_ENWIN;
287
288 switch (win_data->bpp) {
289 case 1:
290 val |= WINCON0_BPPMODE_1BPP;
291 val |= WINCONx_BITSWP;
292 val |= WINCONx_BURSTLEN_4WORD;
293 break;
294 case 2:
295 val |= WINCON0_BPPMODE_2BPP;
296 val |= WINCONx_BITSWP;
297 val |= WINCONx_BURSTLEN_8WORD;
298 break;
299 case 4:
300 val |= WINCON0_BPPMODE_4BPP;
301 val |= WINCONx_BITSWP;
302 val |= WINCONx_BURSTLEN_8WORD;
303 break;
304 case 8:
305 val |= WINCON0_BPPMODE_8BPP_PALETTE;
306 val |= WINCONx_BURSTLEN_8WORD;
307 val |= WINCONx_BYTSWP;
308 break;
309 case 16:
310 val |= WINCON0_BPPMODE_16BPP_565;
311 val |= WINCONx_HAWSWP;
312 val |= WINCONx_BURSTLEN_16WORD;
313 break;
314 case 24:
315 val |= WINCON0_BPPMODE_24BPP_888;
316 val |= WINCONx_WSWP;
317 val |= WINCONx_BURSTLEN_16WORD;
318 break;
319 case 32:
320 val |= WINCON1_BPPMODE_28BPP_A4888
321 | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
322 val |= WINCONx_WSWP;
323 val |= WINCONx_BURSTLEN_16WORD;
324 break;
325 default:
326 DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n");
327
328 val |= WINCON0_BPPMODE_24BPP_888;
329 val |= WINCONx_WSWP;
330 val |= WINCONx_BURSTLEN_16WORD;
331 break;
332 }
333
334 DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp);
335
336 writel(val, ctx->regs + WINCON(win));
337 }
338
339 static void fimd_win_set_colkey(struct device *dev, unsigned int win)
340 {
341 struct fimd_context *ctx = get_fimd_context(dev);
342 unsigned int keycon0 = 0, keycon1 = 0;
343
344 DRM_DEBUG_KMS("%s\n", __FILE__);
345
346 keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F |
347 WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
348
349 keycon1 = WxKEYCON1_COLVAL(0xffffffff);
350
351 writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
352 writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
353 }
354
355 static void fimd_win_commit(struct device *dev)
356 {
357 struct fimd_context *ctx = get_fimd_context(dev);
358 struct fimd_win_data *win_data;
359 int win = ctx->default_win;
360 unsigned long val, alpha, size;
361
362 DRM_DEBUG_KMS("%s\n", __FILE__);
363
364 if (win < 0 || win > WINDOWS_NR)
365 return;
366
367 win_data = &ctx->win_data[win];
368
369 /*
370 * SHADOWCON register is used for enabling timing.
371 *
372 * for example, once only width value of a register is set,
373 * if the dma is started then fimd hardware could malfunction so
374 * with protect window setting, the register fields with prefix '_F'
375 * wouldn't be updated at vsync also but updated once unprotect window
376 * is set.
377 */
378
379 /* protect windows */
380 val = readl(ctx->regs + SHADOWCON);
381 val |= SHADOWCON_WINx_PROTECT(win);
382 writel(val, ctx->regs + SHADOWCON);
383
384 /* buffer start address */
385 val = win_data->paddr;
386 writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
387
388 /* buffer end address */
389 size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3);
390 val = win_data->paddr + size;
391 writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
392
393 DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n",
394 (unsigned long)win_data->paddr, val, size);
395 DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
396 win_data->ovl_width, win_data->ovl_height);
397
398 /* buffer size */
399 val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) |
400 VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size);
401 writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
402
403 /* OSD position */
404 val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) |
405 VIDOSDxA_TOPLEFT_Y(win_data->offset_y);
406 writel(val, ctx->regs + VIDOSD_A(win));
407
408 val = VIDOSDxB_BOTRIGHT_X(win_data->offset_x +
409 win_data->ovl_width - 1) |
410 VIDOSDxB_BOTRIGHT_Y(win_data->offset_y +
411 win_data->ovl_height - 1);
412 writel(val, ctx->regs + VIDOSD_B(win));
413
414 DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
415 win_data->offset_x, win_data->offset_y,
416 win_data->offset_x + win_data->ovl_width - 1,
417 win_data->offset_y + win_data->ovl_height - 1);
418
419 /* hardware window 0 doesn't support alpha channel. */
420 if (win != 0) {
421 /* OSD alpha */
422 alpha = VIDISD14C_ALPHA1_R(0xf) |
423 VIDISD14C_ALPHA1_G(0xf) |
424 VIDISD14C_ALPHA1_B(0xf);
425
426 writel(alpha, ctx->regs + VIDOSD_C(win));
427 }
428
429 /* OSD size */
430 if (win != 3 && win != 4) {
431 u32 offset = VIDOSD_D(win);
432 if (win == 0)
433 offset = VIDOSD_C_SIZE_W0;
434 val = win_data->ovl_width * win_data->ovl_height;
435 writel(val, ctx->regs + offset);
436
437 DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
438 }
439
440 fimd_win_set_pixfmt(dev, win);
441
442 /* hardware window 0 doesn't support color key. */
443 if (win != 0)
444 fimd_win_set_colkey(dev, win);
445
446 /* Enable DMA channel and unprotect windows */
447 val = readl(ctx->regs + SHADOWCON);
448 val |= SHADOWCON_CHx_ENABLE(win);
449 val &= ~SHADOWCON_WINx_PROTECT(win);
450 writel(val, ctx->regs + SHADOWCON);
451 }
452
453 static void fimd_win_disable(struct device *dev)
454 {
455 struct fimd_context *ctx = get_fimd_context(dev);
456 struct fimd_win_data *win_data;
457 int win = ctx->default_win;
458 u32 val;
459
460 DRM_DEBUG_KMS("%s\n", __FILE__);
461
462 if (win < 0 || win > WINDOWS_NR)
463 return;
464
465 win_data = &ctx->win_data[win];
466
467 /* protect windows */
468 val = readl(ctx->regs + SHADOWCON);
469 val |= SHADOWCON_WINx_PROTECT(win);
470 writel(val, ctx->regs + SHADOWCON);
471
472 /* wincon */
473 val = readl(ctx->regs + WINCON(win));
474 val &= ~WINCONx_ENWIN;
475 writel(val, ctx->regs + WINCON(win));
476
477 /* unprotect windows */
478 val = readl(ctx->regs + SHADOWCON);
479 val &= ~SHADOWCON_CHx_ENABLE(win);
480 val &= ~SHADOWCON_WINx_PROTECT(win);
481 writel(val, ctx->regs + SHADOWCON);
482 }
483
484 static struct exynos_drm_overlay_ops fimd_overlay_ops = {
485 .mode_set = fimd_win_mode_set,
486 .commit = fimd_win_commit,
487 .disable = fimd_win_disable,
488 };
489
490 static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc)
491 {
492 struct exynos_drm_private *dev_priv = drm_dev->dev_private;
493 struct drm_pending_vblank_event *e, *t;
494 struct timeval now;
495 unsigned long flags;
496 bool is_checked = false;
497
498 spin_lock_irqsave(&drm_dev->event_lock, flags);
499
500 list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
501 base.link) {
502 /* if event's pipe isn't same as crtc then ignor it. */
503 if (crtc != e->pipe)
504 continue;
505
506 is_checked = true;
507
508 do_gettimeofday(&now);
509 e->event.sequence = 0;
510 e->event.tv_sec = now.tv_sec;
511 e->event.tv_usec = now.tv_usec;
512
513 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
514 wake_up_interruptible(&e->base.file_priv->event_wait);
515 }
516
517 if (is_checked)
518 drm_vblank_put(drm_dev, crtc);
519
520 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
521 }
522
523 static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
524 {
525 struct fimd_context *ctx = (struct fimd_context *)dev_id;
526 struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
527 struct drm_device *drm_dev = subdrv->drm_dev;
528 struct device *dev = subdrv->manager.dev;
529 struct exynos_drm_manager *manager = &subdrv->manager;
530 u32 val;
531
532 val = readl(ctx->regs + VIDINTCON1);
533
534 if (val & VIDINTCON1_INT_FRAME)
535 /* VSYNC interrupt */
536 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1);
537
538 drm_handle_vblank(drm_dev, manager->pipe);
539 fimd_finish_pageflip(drm_dev, manager->pipe);
540
541 return IRQ_HANDLED;
542 }
543
544 static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
545 {
546 struct drm_driver *drm_driver = drm_dev->driver;
547
548 DRM_DEBUG_KMS("%s\n", __FILE__);
549
550 /*
551 * enable drm irq mode.
552 * - with irq_enabled = 1, we can use the vblank feature.
553 *
554 * P.S. note that we wouldn't use drm irq handler but
555 * just specific driver own one instead because
556 * drm framework supports only one irq handler.
557 */
558 drm_dev->irq_enabled = 1;
559
560 /*
561 * with vblank_disable_allowed = 1, vblank interrupt will be disabled
562 * by drm timer once a current process gives up ownership of
563 * vblank event.(drm_vblank_put function was called)
564 */
565 drm_dev->vblank_disable_allowed = 1;
566
567 return 0;
568 }
569
570 static void fimd_subdrv_remove(struct drm_device *drm_dev)
571 {
572 struct drm_driver *drm_driver = drm_dev->driver;
573
574 DRM_DEBUG_KMS("%s\n", __FILE__);
575
576 /* TODO. */
577 }
578
579 static int fimd_calc_clkdiv(struct fimd_context *ctx,
580 struct fb_videomode *timing)
581 {
582 unsigned long clk = clk_get_rate(ctx->lcd_clk);
583 u32 retrace;
584 u32 clkdiv;
585 u32 best_framerate = 0;
586 u32 framerate;
587
588 DRM_DEBUG_KMS("%s\n", __FILE__);
589
590 retrace = timing->left_margin + timing->hsync_len +
591 timing->right_margin + timing->xres;
592 retrace *= timing->upper_margin + timing->vsync_len +
593 timing->lower_margin + timing->yres;
594
595 /* default framerate is 60Hz */
596 if (!timing->refresh)
597 timing->refresh = 60;
598
599 clk /= retrace;
600
601 for (clkdiv = 1; clkdiv < 0x100; clkdiv++) {
602 int tmp;
603
604 /* get best framerate */
605 framerate = clk / clkdiv;
606 tmp = timing->refresh - framerate;
607 if (tmp < 0) {
608 best_framerate = framerate;
609 continue;
610 } else {
611 if (!best_framerate)
612 best_framerate = framerate;
613 else if (tmp < (best_framerate - framerate))
614 best_framerate = framerate;
615 break;
616 }
617 }
618
619 return clkdiv;
620 }
621
622 static void fimd_clear_win(struct fimd_context *ctx, int win)
623 {
624 u32 val;
625
626 DRM_DEBUG_KMS("%s\n", __FILE__);
627
628 writel(0, ctx->regs + WINCON(win));
629 writel(0, ctx->regs + VIDOSD_A(win));
630 writel(0, ctx->regs + VIDOSD_B(win));
631 writel(0, ctx->regs + VIDOSD_C(win));
632
633 if (win == 1 || win == 2)
634 writel(0, ctx->regs + VIDOSD_D(win));
635
636 val = readl(ctx->regs + SHADOWCON);
637 val &= ~SHADOWCON_WINx_PROTECT(win);
638 writel(val, ctx->regs + SHADOWCON);
639 }
640
641 static int __devinit fimd_probe(struct platform_device *pdev)
642 {
643 struct device *dev = &pdev->dev;
644 struct fimd_context *ctx;
645 struct exynos_drm_subdrv *subdrv;
646 struct exynos_drm_fimd_pdata *pdata;
647 struct fb_videomode *timing;
648 struct resource *res;
649 int win;
650 int ret = -EINVAL;
651
652 DRM_DEBUG_KMS("%s\n", __FILE__);
653
654 pdata = pdev->dev.platform_data;
655 if (!pdata) {
656 dev_err(dev, "no platform data specified\n");
657 return -EINVAL;
658 }
659
660 timing = &pdata->timing;
661 if (!timing) {
662 dev_err(dev, "timing is null.\n");
663 return -EINVAL;
664 }
665
666 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
667 if (!ctx)
668 return -ENOMEM;
669
670 ctx->bus_clk = clk_get(dev, "fimd");
671 if (IS_ERR(ctx->bus_clk)) {
672 dev_err(dev, "failed to get bus clock\n");
673 ret = PTR_ERR(ctx->bus_clk);
674 goto err_clk_get;
675 }
676
677 clk_enable(ctx->bus_clk);
678
679 ctx->lcd_clk = clk_get(dev, "sclk_fimd");
680 if (IS_ERR(ctx->lcd_clk)) {
681 dev_err(dev, "failed to get lcd clock\n");
682 ret = PTR_ERR(ctx->lcd_clk);
683 goto err_bus_clk;
684 }
685
686 clk_enable(ctx->lcd_clk);
687
688 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
689 if (!res) {
690 dev_err(dev, "failed to find registers\n");
691 ret = -ENOENT;
692 goto err_clk;
693 }
694
695 ctx->regs_res = request_mem_region(res->start, resource_size(res),
696 dev_name(dev));
697 if (!ctx->regs_res) {
698 dev_err(dev, "failed to claim register region\n");
699 ret = -ENOENT;
700 goto err_clk;
701 }
702
703 ctx->regs = ioremap(res->start, resource_size(res));
704 if (!ctx->regs) {
705 dev_err(dev, "failed to map registers\n");
706 ret = -ENXIO;
707 goto err_req_region_io;
708 }
709
710 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
711 if (!res) {
712 dev_err(dev, "irq request failed.\n");
713 goto err_req_region_irq;
714 }
715
716 ctx->irq = res->start;
717
718 for (win = 0; win < WINDOWS_NR; win++)
719 fimd_clear_win(ctx, win);
720
721 ret = request_irq(ctx->irq, fimd_irq_handler, 0, "drm_fimd", ctx);
722 if (ret < 0) {
723 dev_err(dev, "irq request failed.\n");
724 goto err_req_irq;
725 }
726
727 ctx->clkdiv = fimd_calc_clkdiv(ctx, timing);
728 ctx->vidcon0 = pdata->vidcon0;
729 ctx->vidcon1 = pdata->vidcon1;
730 ctx->default_win = pdata->default_win;
731 ctx->timing = timing;
732
733 timing->pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
734
735 DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n",
736 timing->pixclock, ctx->clkdiv);
737
738 subdrv = &ctx->subdrv;
739
740 subdrv->probe = fimd_subdrv_probe;
741 subdrv->remove = fimd_subdrv_remove;
742 subdrv->manager.pipe = -1;
743 subdrv->manager.ops = &fimd_manager_ops;
744 subdrv->manager.overlay_ops = &fimd_overlay_ops;
745 subdrv->manager.display = &fimd_display;
746 subdrv->manager.dev = dev;
747
748 platform_set_drvdata(pdev, ctx);
749 exynos_drm_subdrv_register(subdrv);
750
751 return 0;
752
753 err_req_irq:
754 err_req_region_irq:
755 iounmap(ctx->regs);
756
757 err_req_region_io:
758 release_resource(ctx->regs_res);
759 kfree(ctx->regs_res);
760
761 err_clk:
762 clk_disable(ctx->lcd_clk);
763 clk_put(ctx->lcd_clk);
764
765 err_bus_clk:
766 clk_disable(ctx->bus_clk);
767 clk_put(ctx->bus_clk);
768
769 err_clk_get:
770 kfree(ctx);
771 return ret;
772 }
773
774 static int __devexit fimd_remove(struct platform_device *pdev)
775 {
776 struct fimd_context *ctx = platform_get_drvdata(pdev);
777
778 DRM_DEBUG_KMS("%s\n", __FILE__);
779
780 exynos_drm_subdrv_unregister(&ctx->subdrv);
781
782 clk_disable(ctx->lcd_clk);
783 clk_disable(ctx->bus_clk);
784 clk_put(ctx->lcd_clk);
785 clk_put(ctx->bus_clk);
786
787 iounmap(ctx->regs);
788 release_resource(ctx->regs_res);
789 kfree(ctx->regs_res);
790 free_irq(ctx->irq, ctx);
791
792 kfree(ctx);
793
794 return 0;
795 }
796
797 static struct platform_driver fimd_driver = {
798 .probe = fimd_probe,
799 .remove = __devexit_p(fimd_remove),
800 .driver = {
801 .name = "exynos4-fb",
802 .owner = THIS_MODULE,
803 },
804 };
805
806 static int __init fimd_init(void)
807 {
808 return platform_driver_register(&fimd_driver);
809 }
810
811 static void __exit fimd_exit(void)
812 {
813 platform_driver_unregister(&fimd_driver);
814 }
815
816 module_init(fimd_init);
817 module_exit(fimd_exit);
818
819 MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
820 MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
821 MODULE_DESCRIPTION("Samsung DRM FIMD Driver");
822 MODULE_LICENSE("GPL");
Linus' kernel tree