sound/soc/txx9/txx9aclc-ac97.c

   1 /*
   2  * TXx9 ACLC AC97 driver
   3  *
   4  * Copyright (C) 2009 Atsushi Nemoto
   5  *
   6  * Based on RBTX49xx patch from CELF patch archive.
   7  * (C) Copyright TOSHIBA CORPORATION 2004-2006
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/init.h>
  15 #include <linux/module.h>
  16 #include <linux/delay.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/io.h>
  19 #include <linux/gfp.h>
  20 #include <sound/core.h>
  21 #include <sound/pcm.h>
  22 #include <sound/soc.h>
  23 #include "txx9aclc.h"
  24
  25 #define AC97_DIR        \
  26         (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
  27
  28 #define AC97_RATES      \
  29         SNDRV_PCM_RATE_8000_48000
  30
  31 #ifdef __BIG_ENDIAN
  32 #define AC97_FMTS       SNDRV_PCM_FMTBIT_S16_BE
  33 #else
  34 #define AC97_FMTS       SNDRV_PCM_FMTBIT_S16_LE
  35 #endif
  36
  37 static DECLARE_WAIT_QUEUE_HEAD(ac97_waitq);
  38
  39 /* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
  40 static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
  41
  42 static int txx9aclc_regready(struct txx9aclc_plat_drvdata *drvdata)
  43 {
  44         return __raw_readl(drvdata->base + ACINTSTS) & ACINT_REGACCRDY;
  45 }
  46
  47 /* AC97 controller reads codec register */
  48 static unsigned short txx9aclc_ac97_read(struct snd_ac97 *ac97,
  49                                          unsigned short reg)
  50 {
  51         struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
  52         void __iomem *base = drvdata->base;
  53         u32 dat;
  54
  55         if (!(__raw_readl(base + ACINTSTS) & ACINT_CODECRDY(ac97->num)))
  56                 return 0xffff;
  57         reg |= ac97->num << 7;
  58         dat = (reg << ACREGACC_REG_SHIFT) | ACREGACC_READ;
  59         __raw_writel(dat, base + ACREGACC);
  60         __raw_writel(ACINT_REGACCRDY, base + ACINTEN);
  61         if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(txx9aclc_drvdata), HZ)) {
  62                 __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
  63                 printk(KERN_ERR "ac97 read timeout (reg %#x)\n", reg);
  64                 dat = 0xffff;
  65                 goto done;
  66         }
  67         dat = __raw_readl(base + ACREGACC);
  68         if (((dat >> ACREGACC_REG_SHIFT) & 0xff) != reg) {
  69                 printk(KERN_ERR "reg mismatch %x with %x\n",
  70                         dat, reg);
  71                 dat = 0xffff;
  72                 goto done;
  73         }
  74         dat = (dat >> ACREGACC_DAT_SHIFT) & 0xffff;
  75 done:
  76         __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
  77         return dat;
  78 }
  79
  80 /* AC97 controller writes to codec register */
  81 static void txx9aclc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  82                                 unsigned short val)
  83 {
  84         struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
  85         void __iomem *base = drvdata->base;
  86
  87         __raw_writel(((reg | (ac97->num << 7)) << ACREGACC_REG_SHIFT) |
  88                      (val << ACREGACC_DAT_SHIFT),
  89                      base + ACREGACC);
  90         __raw_writel(ACINT_REGACCRDY, base + ACINTEN);
  91         if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(txx9aclc_drvdata), HZ)) {
  92                 printk(KERN_ERR
  93                         "ac97 write timeout (reg %#x)\n", reg);
  94         }
  95         __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
  96 }
  97
  98 static void txx9aclc_ac97_cold_reset(struct snd_ac97 *ac97)
  99 {
 100         struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
 101         void __iomem *base = drvdata->base;
 102         u32 ready = ACINT_CODECRDY(ac97->num) | ACINT_REGACCRDY;
 103
 104         __raw_writel(ACCTL_ENLINK, base + ACCTLDIS);
 105         mmiowb();
 106         udelay(1);
 107         __raw_writel(ACCTL_ENLINK, base + ACCTLEN);
 108         /* wait for primary codec ready status */
 109         __raw_writel(ready, base + ACINTEN);
 110         if (!wait_event_timeout(ac97_waitq,
 111                                 (__raw_readl(base + ACINTSTS) & ready) == ready,
 112                                 HZ)) {
 113                 dev_err(&ac97->dev, "primary codec is not ready "
 114                         "(status %#x)\n",
 115                         __raw_readl(base + ACINTSTS));
 116         }
 117         __raw_writel(ACINT_REGACCRDY, base + ACINTSTS);
 118         __raw_writel(ready, base + ACINTDIS);
 119 }
 120
 121 /* AC97 controller operations */
 122 struct snd_ac97_bus_ops soc_ac97_ops = {
 123         .read           = txx9aclc_ac97_read,
 124         .write          = txx9aclc_ac97_write,
 125         .reset          = txx9aclc_ac97_cold_reset,
 126 };
 127 EXPORT_SYMBOL_GPL(soc_ac97_ops);
 128
 129 static irqreturn_t txx9aclc_ac97_irq(int irq, void *dev_id)
 130 {
 131         struct txx9aclc_plat_drvdata *drvdata = dev_id;
 132         void __iomem *base = drvdata->base;
 133
 134         __raw_writel(__raw_readl(base + ACINTMSTS), base + ACINTDIS);
 135         wake_up(&ac97_waitq);
 136         return IRQ_HANDLED;
 137 }
 138
 139 static int txx9aclc_ac97_probe(struct snd_soc_dai *dai)
 140 {
 141         txx9aclc_drvdata = snd_soc_dai_get_drvdata(dai);
 142         return 0;
 143 }
 144
 145 static int txx9aclc_ac97_remove(struct snd_soc_dai *dai)
 146 {
 147         struct txx9aclc_plat_drvdata *drvdata = snd_soc_dai_get_drvdata(dai);
 148
 149         /* disable AC-link */
 150         __raw_writel(ACCTL_ENLINK, drvdata->base + ACCTLDIS);
 151         txx9aclc_drvdata = NULL;
 152         return 0;
 153 }
 154
 155 static struct snd_soc_dai_driver txx9aclc_ac97_dai = {
 156         .ac97_control           = 1,
 157         .probe                  = txx9aclc_ac97_probe,
 158         .remove                 = txx9aclc_ac97_remove,
 159         .playback = {
 160                 .rates          = AC97_RATES,
 161                 .formats        = AC97_FMTS,
 162                 .channels_min   = 2,
 163                 .channels_max   = 2,
 164         },
 165         .capture = {
 166                 .rates          = AC97_RATES,
 167                 .formats        = AC97_FMTS,
 168                 .channels_min   = 2,
 169                 .channels_max   = 2,
 170         },
 171 };
 172
 173 static const struct snd_soc_component_driver txx9aclc_ac97_component = {
 174         .name           = "txx9aclc-ac97",
 175 };
 176
 177 static int txx9aclc_ac97_dev_probe(struct platform_device *pdev)
 178 {
 179         struct txx9aclc_plat_drvdata *drvdata;
 180         struct resource *r;
 181         int err;
 182         int irq;
 183
 184         irq = platform_get_irq(pdev, 0);
 185         if (irq < 0)
 186                 return irq;
 187         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 188         if (!r)
 189                 return -EBUSY;
 190
 191         if (!devm_request_mem_region(&pdev->dev, r->start, resource_size(r),
 192                                      dev_name(&pdev->dev)))
 193                 return -EBUSY;
 194
 195         drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
 196         if (!drvdata)
 197                 return -ENOMEM;
 198         platform_set_drvdata(pdev, drvdata);
 199         drvdata->physbase = r->start;
 200         if (sizeof(drvdata->physbase) > sizeof(r->start) &&
 201             r->start >= TXX9_DIRECTMAP_BASE &&
 202             r->start < TXX9_DIRECTMAP_BASE + 0x400000)
 203                 drvdata->physbase |= 0xf00000000ull;
 204         drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
 205         if (!drvdata->base)
 206                 return -EBUSY;
 207         err = devm_request_irq(&pdev->dev, irq, txx9aclc_ac97_irq,
 208                                0, dev_name(&pdev->dev), drvdata);
 209         if (err < 0)
 210                 return err;
 211
 212         return snd_soc_register_component(&pdev->dev, &txx9aclc_ac97_component,
 213                                           &txx9aclc_ac97_dai, 1);
 214 }
 215
 216 static int txx9aclc_ac97_dev_remove(struct platform_device *pdev)
 217 {
 218         snd_soc_unregister_component(&pdev->dev);
 219         return 0;
 220 }
 221
 222 static struct platform_driver txx9aclc_ac97_driver = {
 223         .probe          = txx9aclc_ac97_dev_probe,
 224         .remove         = txx9aclc_ac97_dev_remove,
 225         .driver         = {
 226                 .name   = "txx9aclc-ac97",
 227                 .owner  = THIS_MODULE,
 228         },
 229 };
 230
 231 module_platform_driver(txx9aclc_ac97_driver);
 232
 233 MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
 234 MODULE_DESCRIPTION("TXx9 ACLC AC97 driver");
 235 MODULE_LICENSE("GPL");
 236 MODULE_ALIAS("platform:txx9aclc-ac97");