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HWPOISON: Add simple debugfs interface to inject hwpoison on arbitary PFNs
[linux-2.6.git] / drivers / scsi / pmcraid.h
blob614b3a764fedea1d2442365a068719e9bcf1f7e9
1 /*
2 * pmcraid.h -- PMC Sierra MaxRAID controller driver header file
3 *
4 * Copyright (C) 2008, 2009 PMC Sierra Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #ifndef _PMCRAID_H
22 #define _PMCRAID_H
23
24 #include <linux/version.h>
25 #include <linux/types.h>
26 #include <linux/completion.h>
27 #include <linux/list.h>
28 #include <scsi/scsi.h>
29 #include <linux/kref.h>
30 #include <scsi/scsi_cmnd.h>
31 #include <linux/cdev.h>
32 #include <net/netlink.h>
33 #include <net/genetlink.h>
34 #include <linux/connector.h>
35 /*
36 * Driver name : string representing the driver name
37 * Device file : /dev file to be used for management interfaces
38 * Driver version: version string in major_version.minor_version.patch format
39 * Driver date : date information in "Mon dd yyyy" format
40 */
41 #define PMCRAID_DRIVER_NAME "PMC MaxRAID"
42 #define PMCRAID_DEVFILE "pmcsas"
43 #define PMCRAID_DRIVER_VERSION "1.0.2"
44 #define PMCRAID_DRIVER_DATE __DATE__
45
46 /* Maximum number of adapters supported by current version of the driver */
47 #define PMCRAID_MAX_ADAPTERS 1024
48
49 /* Bit definitions as per firmware, bit position [0][1][2].....[31] */
50 #define PMC_BIT8(n) (1 << (7-n))
51 #define PMC_BIT16(n) (1 << (15-n))
52 #define PMC_BIT32(n) (1 << (31-n))
53
54 /* PMC PCI vendor ID and device ID values */
55 #define PCI_VENDOR_ID_PMC 0x11F8
56 #define PCI_DEVICE_ID_PMC_MAXRAID 0x5220
57
58 /*
59 * MAX_CMD : maximum commands that can be outstanding with IOA
60 * MAX_IO_CMD : command blocks available for IO commands
61 * MAX_HCAM_CMD : command blocks avaibale for HCAMS
62 * MAX_INTERNAL_CMD : command blocks avaible for internal commands like reset
63 */
64 #define PMCRAID_MAX_CMD 1024
65 #define PMCRAID_MAX_IO_CMD 1020
66 #define PMCRAID_MAX_HCAM_CMD 2
67 #define PMCRAID_MAX_INTERNAL_CMD 2
68
69 /* MAX_IOADLS : max number of scatter-gather lists supported by IOA
70 * IOADLS_INTERNAL : number of ioadls included as part of IOARCB.
71 * IOADLS_EXTERNAL : number of ioadls allocated external to IOARCB
72 */
73 #define PMCRAID_IOADLS_INTERNAL 27
74 #define PMCRAID_IOADLS_EXTERNAL 37
75 #define PMCRAID_MAX_IOADLS PMCRAID_IOADLS_INTERNAL
76
77 /* HRRQ_ENTRY_SIZE : size of hrrq buffer
78 * IOARCB_ALIGNMENT : alignment required for IOARCB
79 * IOADL_ALIGNMENT : alignment requirement for IOADLs
80 * MSIX_VECTORS : number of MSIX vectors supported
81 */
82 #define HRRQ_ENTRY_SIZE sizeof(__le32)
83 #define PMCRAID_IOARCB_ALIGNMENT 32
84 #define PMCRAID_IOADL_ALIGNMENT 16
85 #define PMCRAID_IOASA_ALIGNMENT 4
86 #define PMCRAID_NUM_MSIX_VECTORS 1
87
88 /* various other limits */
89 #define PMCRAID_VENDOR_ID_LEN 8
90 #define PMCRAID_PRODUCT_ID_LEN 16
91 #define PMCRAID_SERIAL_NUM_LEN 8
92 #define PMCRAID_LUN_LEN 8
93 #define PMCRAID_MAX_CDB_LEN 16
94 #define PMCRAID_DEVICE_ID_LEN 8
95 #define PMCRAID_SENSE_DATA_LEN 256
96 #define PMCRAID_ADD_CMD_PARAM_LEN 48
97
98 #define PMCRAID_MAX_BUS_TO_SCAN 1
99 #define PMCRAID_MAX_NUM_TARGETS_PER_BUS 256
100 #define PMCRAID_MAX_NUM_LUNS_PER_TARGET 8
101
102 /* IOA bus/target/lun number of IOA resources */
103 #define PMCRAID_IOA_BUS_ID 0xfe
104 #define PMCRAID_IOA_TARGET_ID 0xff
105 #define PMCRAID_IOA_LUN_ID 0xff
106 #define PMCRAID_VSET_BUS_ID 0x1
107 #define PMCRAID_VSET_LUN_ID 0x0
108 #define PMCRAID_PHYS_BUS_ID 0x0
109 #define PMCRAID_VIRTUAL_ENCL_BUS_ID 0x8
110 #define PMCRAID_MAX_VSET_TARGETS 240
111 #define PMCRAID_MAX_VSET_LUNS_PER_TARGET 8
112
113 #define PMCRAID_IOA_MAX_SECTORS 32767
114 #define PMCRAID_VSET_MAX_SECTORS 512
115 #define PMCRAID_MAX_CMD_PER_LUN 254
116
117 /* Number of configuration table entries (resources) */
118 #define PMCRAID_MAX_NUM_OF_VSETS 240
119
120 /* Todo : Check max limit for Phase 1 */
121 #define PMCRAID_MAX_NUM_OF_PHY_DEVS 256
122
123 /* MAX_NUM_OF_DEVS includes 1 FP, 1 Dummy Enclosure device */
124 #define PMCRAID_MAX_NUM_OF_DEVS \
125 (PMCRAID_MAX_NUM_OF_VSETS + PMCRAID_MAX_NUM_OF_PHY_DEVS + 2)
126
127 #define PMCRAID_MAX_RESOURCES PMCRAID_MAX_NUM_OF_DEVS
128
129 /* Adapter Commands used by driver */
130 #define PMCRAID_QUERY_RESOURCE_STATE 0xC2
131 #define PMCRAID_RESET_DEVICE 0xC3
132 /* options to select reset target */
133 #define ENABLE_RESET_MODIFIER 0x80
134 #define RESET_DEVICE_LUN 0x40
135 #define RESET_DEVICE_TARGET 0x20
136 #define RESET_DEVICE_BUS 0x10
137
138 #define PMCRAID_IDENTIFY_HRRQ 0xC4
139 #define PMCRAID_QUERY_IOA_CONFIG 0xC5
140 #define PMCRAID_QUERY_CMD_STATUS 0xCB
141 #define PMCRAID_ABORT_CMD 0xC7
142
143 /* CANCEL ALL command, provides option for setting SYNC_COMPLETE
144 * on the target resources for which commands got cancelled
145 */
146 #define PMCRAID_CANCEL_ALL_REQUESTS 0xCE
147 #define PMCRAID_SYNC_COMPLETE_AFTER_CANCEL PMC_BIT8(0)
148
149 /* HCAM command and types of HCAM supported by IOA */
150 #define PMCRAID_HOST_CONTROLLED_ASYNC 0xCF
151 #define PMCRAID_HCAM_CODE_CONFIG_CHANGE 0x01
152 #define PMCRAID_HCAM_CODE_LOG_DATA 0x02
153
154 /* IOA shutdown command and various shutdown types */
155 #define PMCRAID_IOA_SHUTDOWN 0xF7
156 #define PMCRAID_SHUTDOWN_NORMAL 0x00
157 #define PMCRAID_SHUTDOWN_PREPARE_FOR_NORMAL 0x40
158 #define PMCRAID_SHUTDOWN_NONE 0x100
159 #define PMCRAID_SHUTDOWN_ABBREV 0x80
160
161 /* SET SUPPORTED DEVICES command and the option to select all the
162 * devices to be supported
163 */
164 #define PMCRAID_SET_SUPPORTED_DEVICES 0xFB
165 #define ALL_DEVICES_SUPPORTED PMC_BIT8(0)
166
167 /* This option is used with SCSI WRITE_BUFFER command */
168 #define PMCRAID_WR_BUF_DOWNLOAD_AND_SAVE 0x05
169
170 /* IOASC Codes used by driver */
171 #define PMCRAID_IOASC_SENSE_MASK 0xFFFFFF00
172 #define PMCRAID_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
173 #define PMCRAID_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
174 #define PMCRAID_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
175 #define PMCRAID_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
176
177 #define PMCRAID_IOASC_GOOD_COMPLETION 0x00000000
178 #define PMCRAID_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
179 #define PMCRAID_IOASC_NR_IOA_RESET_REQUIRED 0x02048000
180 #define PMCRAID_IOASC_NR_SYNC_REQUIRED 0x023F0000
181 #define PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC 0x03110C00
182 #define PMCRAID_IOASC_HW_CANNOT_COMMUNICATE 0x04050000
183 #define PMCRAID_IOASC_HW_DEVICE_TIMEOUT 0x04080100
184 #define PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR 0x04448500
185 #define PMCRAID_IOASC_HW_IOA_RESET_REQUIRED 0x04448600
186 #define PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE 0x05250000
187 #define PMCRAID_IOASC_AC_TERMINATED_BY_HOST 0x0B5A0000
188 #define PMCRAID_IOASC_UA_BUS_WAS_RESET 0x06290000
189 #define PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER 0x06298000
190
191 /* Driver defined IOASCs */
192 #define PMCRAID_IOASC_IOA_WAS_RESET 0x10000001
193 #define PMCRAID_IOASC_PCI_ACCESS_ERROR 0x10000002
194
195 /* Various timeout values (in milliseconds) used. If any of these are chip
196 * specific, move them to pmcraid_chip_details structure.
197 */
198 #define PMCRAID_PCI_DEASSERT_TIMEOUT 2000
199 #define PMCRAID_BIST_TIMEOUT 2000
200 #define PMCRAID_AENWAIT_TIMEOUT 5000
201 #define PMCRAID_TRANSOP_TIMEOUT 60000
202
203 #define PMCRAID_RESET_TIMEOUT (2 * HZ)
204 #define PMCRAID_CHECK_FOR_RESET_TIMEOUT ((HZ / 10))
205 #define PMCRAID_VSET_IO_TIMEOUT (60 * HZ)
206 #define PMCRAID_INTERNAL_TIMEOUT (60 * HZ)
207 #define PMCRAID_SHUTDOWN_TIMEOUT (150 * HZ)
208 #define PMCRAID_RESET_BUS_TIMEOUT (60 * HZ)
209 #define PMCRAID_RESET_HOST_TIMEOUT (150 * HZ)
210 #define PMCRAID_REQUEST_SENSE_TIMEOUT (30 * HZ)
211 #define PMCRAID_SET_SUP_DEV_TIMEOUT (2 * 60 * HZ)
212
213 /* structure to represent a scatter-gather element (IOADL descriptor) */
214 struct pmcraid_ioadl_desc {
215 __le64 address;
216 __le32 data_len;
217 __u8 reserved[3];
218 __u8 flags;
219 } __attribute__((packed, aligned(PMCRAID_IOADL_ALIGNMENT)));
220
221 /* pmcraid_ioadl_desc.flags values */
222 #define IOADL_FLAGS_CHAINED PMC_BIT8(0)
223 #define IOADL_FLAGS_LAST_DESC PMC_BIT8(1)
224 #define IOADL_FLAGS_READ_LAST PMC_BIT8(1)
225 #define IOADL_FLAGS_WRITE_LAST PMC_BIT8(1)
226
227
228 /* additional IOARCB data which can be CDB or additional request parameters
229 * or list of IOADLs. Firmware supports max of 512 bytes for IOARCB, hence then
230 * number of IOADLs are limted to 27. In case they are more than 27, they will
231 * be used in chained form
232 */
233 struct pmcraid_ioarcb_add_data {
234 union {
235 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_INTERNAL];
236 __u8 add_cmd_params[PMCRAID_ADD_CMD_PARAM_LEN];
237 } u;
238 };
239
240 /*
241 * IOA Request Control Block
242 */
243 struct pmcraid_ioarcb {
244 __le64 ioarcb_bus_addr;
245 __le32 resource_handle;
246 __le32 response_handle;
247 __le64 ioadl_bus_addr;
248 __le32 ioadl_length;
249 __le32 data_transfer_length;
250 __le64 ioasa_bus_addr;
251 __le16 ioasa_len;
252 __le16 cmd_timeout;
253 __le16 add_cmd_param_offset;
254 __le16 add_cmd_param_length;
255 __le32 reserved1[2];
256 __le32 reserved2;
257 __u8 request_type;
258 __u8 request_flags0;
259 __u8 request_flags1;
260 __u8 hrrq_id;
261 __u8 cdb[PMCRAID_MAX_CDB_LEN];
262 struct pmcraid_ioarcb_add_data add_data;
263 } __attribute__((packed, aligned(PMCRAID_IOARCB_ALIGNMENT)));
264
265 /* well known resource handle values */
266 #define PMCRAID_IOA_RES_HANDLE 0xffffffff
267 #define PMCRAID_INVALID_RES_HANDLE 0
268
269 /* pmcraid_ioarcb.request_type values */
270 #define REQ_TYPE_SCSI 0x00
271 #define REQ_TYPE_IOACMD 0x01
272 #define REQ_TYPE_HCAM 0x02
273
274 /* pmcraid_ioarcb.flags0 values */
275 #define TRANSFER_DIR_WRITE PMC_BIT8(0)
276 #define INHIBIT_UL_CHECK PMC_BIT8(2)
277 #define SYNC_OVERRIDE PMC_BIT8(3)
278 #define SYNC_COMPLETE PMC_BIT8(4)
279 #define NO_LINK_DESCS PMC_BIT8(5)
280
281 /* pmcraid_ioarcb.flags1 values */
282 #define DELAY_AFTER_RESET PMC_BIT8(0)
283 #define TASK_TAG_SIMPLE 0x10
284 #define TASK_TAG_ORDERED 0x20
285 #define TASK_TAG_QUEUE_HEAD 0x30
286
287 /* toggle bit offset in response handle */
288 #define HRRQ_TOGGLE_BIT 0x01
289 #define HRRQ_RESPONSE_BIT 0x02
290
291 /* IOA Status Area */
292 struct pmcraid_ioasa_vset {
293 __le32 failing_lba_hi;
294 __le32 failing_lba_lo;
295 __le32 reserved;
296 } __attribute__((packed, aligned(4)));
297
298 struct pmcraid_ioasa {
299 __le32 ioasc;
300 __le16 returned_status_length;
301 __le16 available_status_length;
302 __le32 residual_data_length;
303 __le32 ilid;
304 __le32 fd_ioasc;
305 __le32 fd_res_address;
306 __le32 fd_res_handle;
307 __le32 reserved;
308
309 /* resource specific sense information */
310 union {
311 struct pmcraid_ioasa_vset vset;
312 } u;
313
314 /* IOA autosense data */
315 __le16 auto_sense_length;
316 __le16 error_data_length;
317 __u8 sense_data[PMCRAID_SENSE_DATA_LEN];
318 } __attribute__((packed, aligned(4)));
319
320 #define PMCRAID_DRIVER_ILID 0xffffffff
321
322 /* Config Table Entry per Resource */
323 struct pmcraid_config_table_entry {
324 __u8 resource_type;
325 __u8 bus_protocol;
326 __le16 array_id;
327 __u8 common_flags0;
328 __u8 common_flags1;
329 __u8 unique_flags0;
330 __u8 unique_flags1; /*also used as vset target_id */
331 __le32 resource_handle;
332 __le32 resource_address;
333 __u8 device_id[PMCRAID_DEVICE_ID_LEN];
334 __u8 lun[PMCRAID_LUN_LEN];
335 } __attribute__((packed, aligned(4)));
336
337 /* resource types (config_table_entry.resource_type values) */
338 #define RES_TYPE_AF_DASD 0x00
339 #define RES_TYPE_GSCSI 0x01
340 #define RES_TYPE_VSET 0x02
341 #define RES_TYPE_IOA_FP 0xFF
342
343 #define RES_IS_IOA(res) ((res).resource_type == RES_TYPE_IOA_FP)
344 #define RES_IS_GSCSI(res) ((res).resource_type == RES_TYPE_GSCSI)
345 #define RES_IS_VSET(res) ((res).resource_type == RES_TYPE_VSET)
346 #define RES_IS_AFDASD(res) ((res).resource_type == RES_TYPE_AF_DASD)
347
348 /* bus_protocol values used by driver */
349 #define RES_TYPE_VENCLOSURE 0x8
350
351 /* config_table_entry.common_flags0 */
352 #define MULTIPATH_RESOURCE PMC_BIT32(0)
353
354 /* unique_flags1 */
355 #define IMPORT_MODE_MANUAL PMC_BIT8(0)
356
357 /* well known resource handle values */
358 #define RES_HANDLE_IOA 0xFFFFFFFF
359 #define RES_HANDLE_NONE 0x00000000
360
361 /* well known resource address values */
362 #define RES_ADDRESS_IOAFP 0xFEFFFFFF
363 #define RES_ADDRESS_INVALID 0xFFFFFFFF
364
365 /* BUS/TARGET/LUN values from resource_addrr */
366 #define RES_BUS(res_addr) (le32_to_cpu(res_addr) & 0xFF)
367 #define RES_TARGET(res_addr) ((le32_to_cpu(res_addr) >> 16) & 0xFF)
368 #define RES_LUN(res_addr) 0x0
369
370 /* configuration table structure */
371 struct pmcraid_config_table {
372 __le16 num_entries;
373 __u8 table_format;
374 __u8 reserved1;
375 __u8 flags;
376 __u8 reserved2[11];
377 struct pmcraid_config_table_entry entries[PMCRAID_MAX_RESOURCES];
378 } __attribute__((packed, aligned(4)));
379
380 /* config_table.flags value */
381 #define MICROCODE_UPDATE_REQUIRED PMC_BIT32(0)
382
383 /*
384 * HCAM format
385 */
386 #define PMCRAID_HOSTRCB_LDNSIZE 4056
387
388 /* Error log notification format */
389 struct pmcraid_hostrcb_error {
390 __le32 fd_ioasc;
391 __le32 fd_ra;
392 __le32 fd_rh;
393 __le32 prc;
394 union {
395 __u8 data[PMCRAID_HOSTRCB_LDNSIZE];
396 } u;
397 } __attribute__ ((packed, aligned(4)));
398
399 struct pmcraid_hcam_hdr {
400 __u8 op_code;
401 __u8 notification_type;
402 __u8 notification_lost;
403 __u8 flags;
404 __u8 overlay_id;
405 __u8 reserved1[3];
406 __le32 ilid;
407 __le32 timestamp1;
408 __le32 timestamp2;
409 __le32 data_len;
410 } __attribute__((packed, aligned(4)));
411
412 #define PMCRAID_AEN_GROUP 0x3
413
414 struct pmcraid_hcam_ccn {
415 struct pmcraid_hcam_hdr header;
416 struct pmcraid_config_table_entry cfg_entry;
417 } __attribute__((packed, aligned(4)));
418
419 struct pmcraid_hcam_ldn {
420 struct pmcraid_hcam_hdr header;
421 struct pmcraid_hostrcb_error error_log;
422 } __attribute__((packed, aligned(4)));
423
424 /* pmcraid_hcam.op_code values */
425 #define HOSTRCB_TYPE_CCN 0xE1
426 #define HOSTRCB_TYPE_LDN 0xE2
427
428 /* pmcraid_hcam.notification_type values */
429 #define NOTIFICATION_TYPE_ENTRY_CHANGED 0x0
430 #define NOTIFICATION_TYPE_ENTRY_NEW 0x1
431 #define NOTIFICATION_TYPE_ENTRY_DELETED 0x2
432 #define NOTIFICATION_TYPE_ERROR_LOG 0x10
433 #define NOTIFICATION_TYPE_INFORMATION_LOG 0x11
434
435 #define HOSTRCB_NOTIFICATIONS_LOST PMC_BIT8(0)
436
437 /* pmcraid_hcam.flags values */
438 #define HOSTRCB_INTERNAL_OP_ERROR PMC_BIT8(0)
439 #define HOSTRCB_ERROR_RESPONSE_SENT PMC_BIT8(1)
440
441 /* pmcraid_hcam.overlay_id values */
442 #define HOSTRCB_OVERLAY_ID_08 0x08
443 #define HOSTRCB_OVERLAY_ID_09 0x09
444 #define HOSTRCB_OVERLAY_ID_11 0x11
445 #define HOSTRCB_OVERLAY_ID_12 0x12
446 #define HOSTRCB_OVERLAY_ID_13 0x13
447 #define HOSTRCB_OVERLAY_ID_14 0x14
448 #define HOSTRCB_OVERLAY_ID_16 0x16
449 #define HOSTRCB_OVERLAY_ID_17 0x17
450 #define HOSTRCB_OVERLAY_ID_20 0x20
451 #define HOSTRCB_OVERLAY_ID_FF 0xFF
452
453 /* Implementation specific card details */
454 struct pmcraid_chip_details {
455 /* hardware register offsets */
456 unsigned long ioastatus;
457 unsigned long ioarrin;
458 unsigned long mailbox;
459 unsigned long global_intr_mask;
460 unsigned long ioa_host_intr;
461 unsigned long ioa_host_intr_clr;
462 unsigned long ioa_host_mask;
463 unsigned long ioa_host_mask_clr;
464 unsigned long host_ioa_intr;
465 unsigned long host_ioa_intr_clr;
466
467 /* timeout used during transitional to operational state */
468 unsigned long transop_timeout;
469 };
470
471 /* IOA to HOST doorbells (interrupts) */
472 #define INTRS_TRANSITION_TO_OPERATIONAL PMC_BIT32(0)
473 #define INTRS_IOARCB_TRANSFER_FAILED PMC_BIT32(3)
474 #define INTRS_IOA_UNIT_CHECK PMC_BIT32(4)
475 #define INTRS_NO_HRRQ_FOR_CMD_RESPONSE PMC_BIT32(5)
476 #define INTRS_CRITICAL_OP_IN_PROGRESS PMC_BIT32(6)
477 #define INTRS_IO_DEBUG_ACK PMC_BIT32(7)
478 #define INTRS_IOARRIN_LOST PMC_BIT32(27)
479 #define INTRS_SYSTEM_BUS_MMIO_ERROR PMC_BIT32(28)
480 #define INTRS_IOA_PROCESSOR_ERROR PMC_BIT32(29)
481 #define INTRS_HRRQ_VALID PMC_BIT32(30)
482 #define INTRS_OPERATIONAL_STATUS PMC_BIT32(0)
483
484 /* Host to IOA Doorbells */
485 #define DOORBELL_RUNTIME_RESET PMC_BIT32(1)
486 #define DOORBELL_IOA_RESET_ALERT PMC_BIT32(7)
487 #define DOORBELL_IOA_DEBUG_ALERT PMC_BIT32(9)
488 #define DOORBELL_ENABLE_DESTRUCTIVE_DIAGS PMC_BIT32(8)
489 #define DOORBELL_IOA_START_BIST PMC_BIT32(23)
490 #define DOORBELL_RESET_IOA PMC_BIT32(31)
491
492 /* Global interrupt mask register value */
493 #define GLOBAL_INTERRUPT_MASK 0x4ULL
494
495 #define PMCRAID_ERROR_INTERRUPTS (INTRS_IOARCB_TRANSFER_FAILED | \
496 INTRS_IOA_UNIT_CHECK | \
497 INTRS_NO_HRRQ_FOR_CMD_RESPONSE | \
498 INTRS_IOARRIN_LOST | \
499 INTRS_SYSTEM_BUS_MMIO_ERROR | \
500 INTRS_IOA_PROCESSOR_ERROR)
501
502 #define PMCRAID_PCI_INTERRUPTS (PMCRAID_ERROR_INTERRUPTS | \
503 INTRS_HRRQ_VALID | \
504 INTRS_CRITICAL_OP_IN_PROGRESS |\
505 INTRS_TRANSITION_TO_OPERATIONAL)
506
507 /* control_block, associated with each of the commands contains IOARCB, IOADLs
508 * memory for IOASA. Additional 3 * 16 bytes are allocated in order to support
509 * additional request parameters (of max size 48) any command.
510 */
511 struct pmcraid_control_block {
512 struct pmcraid_ioarcb ioarcb;
513 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_EXTERNAL + 3];
514 struct pmcraid_ioasa ioasa;
515 } __attribute__ ((packed, aligned(PMCRAID_IOARCB_ALIGNMENT)));
516
517 /* pmcraid_sglist - Scatter-gather list allocated for passthrough ioctls
518 */
519 struct pmcraid_sglist {
520 u32 order;
521 u32 num_sg;
522 u32 num_dma_sg;
523 u32 buffer_len;
524 struct scatterlist scatterlist[1];
525 };
526
527 /* pmcraid_cmd - LLD representation of SCSI command */
528 struct pmcraid_cmd {
529
530 /* Ptr and bus address of DMA.able control block for this command */
531 struct pmcraid_control_block *ioa_cb;
532 dma_addr_t ioa_cb_bus_addr;
533
534 /* sense buffer for REQUEST SENSE command if firmware is not sending
535 * auto sense data
536 */
537 dma_addr_t sense_buffer_dma;
538 dma_addr_t dma_handle;
539 u8 *sense_buffer;
540
541 /* pointer to mid layer structure of SCSI commands */
542 struct scsi_cmnd *scsi_cmd;
543
544 struct list_head free_list;
545 struct completion wait_for_completion;
546 struct timer_list timer; /* needed for internal commands */
547 u32 timeout; /* current timeout value */
548 u32 index; /* index into the command list */
549 u8 completion_req; /* for handling internal commands */
550 u8 release; /* for handling completions */
551
552 void (*cmd_done) (struct pmcraid_cmd *);
553 struct pmcraid_instance *drv_inst;
554
555 struct pmcraid_sglist *sglist; /* used for passthrough IOCTLs */
556
557 /* scratch used during reset sequence */
558 union {
559 unsigned long time_left;
560 struct pmcraid_resource_entry *res;
561 } u;
562 };
563
564 /*
565 * Interrupt registers of IOA
566 */
567 struct pmcraid_interrupts {
568 void __iomem *ioa_host_interrupt_reg;
569 void __iomem *ioa_host_interrupt_clr_reg;
570 void __iomem *ioa_host_interrupt_mask_reg;
571 void __iomem *ioa_host_interrupt_mask_clr_reg;
572 void __iomem *global_interrupt_mask_reg;
573 void __iomem *host_ioa_interrupt_reg;
574 void __iomem *host_ioa_interrupt_clr_reg;
575 };
576
577 /* ISR parameters LLD allocates (one for each MSI-X if enabled) vectors */
578 struct pmcraid_isr_param {
579 u8 hrrq_id; /* hrrq entry index */
580 u16 vector; /* allocated msi-x vector */
581 struct pmcraid_instance *drv_inst;
582 };
583
584 /* AEN message header sent as part of event data to applications */
585 struct pmcraid_aen_msg {
586 u32 hostno;
587 u32 length;
588 u8 reserved[8];
589 u8 data[0];
590 };
591
592 struct pmcraid_hostrcb {
593 struct pmcraid_instance *drv_inst;
594 struct pmcraid_aen_msg *msg;
595 struct pmcraid_hcam_hdr *hcam; /* pointer to hcam buffer */
596 struct pmcraid_cmd *cmd; /* pointer to command block used */
597 dma_addr_t baddr; /* system address of hcam buffer */
598 atomic_t ignore; /* process HCAM response ? */
599 };
600
601 #define PMCRAID_AEN_HDR_SIZE sizeof(struct pmcraid_aen_msg)
602
603
604
605 /*
606 * Per adapter structure maintained by LLD
607 */
608 struct pmcraid_instance {
609 /* Array of allowed-to-be-exposed resources, initialized from
610 * Configutation Table, later updated with CCNs
611 */
612 struct pmcraid_resource_entry *res_entries;
613
614 struct list_head free_res_q; /* res_entries lists for easy lookup */
615 struct list_head used_res_q; /* List of to be exposed resources */
616 spinlock_t resource_lock; /* spinlock to protect resource list */
617
618 void __iomem *mapped_dma_addr;
619 void __iomem *ioa_status; /* Iomapped IOA status register */
620 void __iomem *mailbox; /* Iomapped mailbox register */
621 void __iomem *ioarrin; /* IOmapped IOARR IN register */
622
623 struct pmcraid_interrupts int_regs;
624 struct pmcraid_chip_details *chip_cfg;
625
626 /* HostRCBs needed for HCAM */
627 struct pmcraid_hostrcb ldn;
628 struct pmcraid_hostrcb ccn;
629
630
631 /* Bus address of start of HRRQ */
632 dma_addr_t hrrq_start_bus_addr[PMCRAID_NUM_MSIX_VECTORS];
633
634 /* Pointer to 1st entry of HRRQ */
635 __be32 *hrrq_start[PMCRAID_NUM_MSIX_VECTORS];
636
637 /* Pointer to last entry of HRRQ */
638 __be32 *hrrq_end[PMCRAID_NUM_MSIX_VECTORS];
639
640 /* Pointer to current pointer of hrrq */
641 __be32 *hrrq_curr[PMCRAID_NUM_MSIX_VECTORS];
642
643 /* Lock for HRRQ access */
644 spinlock_t hrrq_lock[PMCRAID_NUM_MSIX_VECTORS];
645
646 /* Expected toggle bit at host */
647 u8 host_toggle_bit[PMCRAID_NUM_MSIX_VECTORS];
648
649 /* No of Reset IOA retries . IOA marked dead if threshold exceeds */
650 u8 ioa_reset_attempts;
651 #define PMCRAID_RESET_ATTEMPTS 3
652
653 /* Wait Q for threads to wait for Reset IOA completion */
654 wait_queue_head_t reset_wait_q;
655 struct pmcraid_cmd *reset_cmd;
656
657 /* structures for supporting SIGIO based AEN. */
658 struct fasync_struct *aen_queue;
659 struct mutex aen_queue_lock; /* lock for aen subscribers list */
660 struct cdev cdev;
661
662 struct Scsi_Host *host; /* mid layer interface structure handle */
663 struct pci_dev *pdev; /* PCI device structure handle */
664
665 u8 current_log_level; /* default level for logging IOASC errors */
666
667 u8 num_hrrq; /* Number of interrupt vectors allocated */
668 dev_t dev; /* Major-Minor numbers for Char device */
669
670 /* Used as ISR handler argument */
671 struct pmcraid_isr_param hrrq_vector[PMCRAID_NUM_MSIX_VECTORS];
672
673 /* configuration table */
674 struct pmcraid_config_table *cfg_table;
675 dma_addr_t cfg_table_bus_addr;
676
677 /* structures related to command blocks */
678 struct kmem_cache *cmd_cachep; /* cache for cmd blocks */
679 struct pci_pool *control_pool; /* pool for control blocks */
680 char cmd_pool_name[64]; /* name of cmd cache */
681 char ctl_pool_name[64]; /* name of control cache */
682
683 struct pmcraid_cmd *cmd_list[PMCRAID_MAX_CMD];
684
685 struct list_head free_cmd_pool;
686 struct list_head pending_cmd_pool;
687 spinlock_t free_pool_lock; /* free pool lock */
688 spinlock_t pending_pool_lock; /* pending pool lock */
689
690 /* No of IO commands pending with FW */
691 atomic_t outstanding_cmds;
692
693 /* should add/delete resources to mid-layer now ?*/
694 atomic_t expose_resources;
695
696 /* Tasklet to handle deferred processing */
697 struct tasklet_struct isr_tasklet[PMCRAID_NUM_MSIX_VECTORS];
698
699 /* Work-queue (Shared) for deferred reset processing */
700 struct work_struct worker_q;
701
702
703 u32 ioa_state:4; /* For IOA Reset sequence FSM */
704 #define IOA_STATE_OPERATIONAL 0x0
705 #define IOA_STATE_UNKNOWN 0x1
706 #define IOA_STATE_DEAD 0x2
707 #define IOA_STATE_IN_SOFT_RESET 0x3
708 #define IOA_STATE_IN_HARD_RESET 0x4
709 #define IOA_STATE_IN_RESET_ALERT 0x5
710 #define IOA_STATE_IN_BRINGDOWN 0x6
711 #define IOA_STATE_IN_BRINGUP 0x7
712
713 u32 ioa_reset_in_progress:1; /* true if IOA reset is in progress */
714 u32 ioa_hard_reset:1; /* TRUE if Hard Reset is needed */
715 u32 ioa_unit_check:1; /* Indicates Unit Check condition */
716 u32 ioa_bringdown:1; /* whether IOA needs to be brought down */
717 u32 force_ioa_reset:1; /* force adapter reset ? */
718 u32 reinit_cfg_table:1; /* reinit config table due to lost CCN */
719 u32 ioa_shutdown_type:2;/* shutdown type used during reset */
720 #define SHUTDOWN_NONE 0x0
721 #define SHUTDOWN_NORMAL 0x1
722 #define SHUTDOWN_ABBREV 0x2
723
724 };
725
726 /* LLD maintained resource entry structure */
727 struct pmcraid_resource_entry {
728 struct list_head queue; /* link to "to be exposed" resources */
729 struct pmcraid_config_table_entry cfg_entry;
730 struct scsi_device *scsi_dev; /* Link scsi_device structure */
731 atomic_t read_failures; /* count of failed READ commands */
732 atomic_t write_failures; /* count of failed WRITE commands */
733
734 /* To indicate add/delete/modify during CCN */
735 u8 change_detected;
736 #define RES_CHANGE_ADD 0x1 /* add this to mid-layer */
737 #define RES_CHANGE_DEL 0x2 /* remove this from mid-layer */
738
739 u8 reset_progress; /* Device is resetting */
740
741 /*
742 * When IOA asks for sync (i.e. IOASC = Not Ready, Sync Required), this
743 * flag will be set, mid layer will be asked to retry. In the next
744 * attempt, this flag will be checked in queuecommand() to set
745 * SYNC_COMPLETE flag in IOARCB (flag_0).
746 */
747 u8 sync_reqd;
748
749 /* target indicates the mapped target_id assigned to this resource if
750 * this is VSET resource. For non-VSET resources this will be un-used
751 * or zero
752 */
753 u8 target;
754 };
755
756 /* Data structures used in IOASC error code logging */
757 struct pmcraid_ioasc_error {
758 u32 ioasc_code; /* IOASC code */
759 u8 log_level; /* default log level assignment. */
760 char *error_string;
761 };
762
763 /* Initial log_level assignments for various IOASCs */
764 #define IOASC_LOG_LEVEL_NONE 0x0 /* no logging */
765 #define IOASC_LOG_LEVEL_MUST 0x1 /* must log: all high-severity errors */
766 #define IOASC_LOG_LEVEL_HARD 0x2 /* optional – low severity errors */
767
768 /* Error information maintained by LLD. LLD initializes the pmcraid_error_table
769 * statically.
770 */
771 static struct pmcraid_ioasc_error pmcraid_ioasc_error_table[] = {
772 {0x01180600, IOASC_LOG_LEVEL_MUST,
773 "Recovered Error, soft media error, sector reassignment suggested"},
774 {0x015D0000, IOASC_LOG_LEVEL_MUST,
775 "Recovered Error, failure prediction thresold exceeded"},
776 {0x015D9200, IOASC_LOG_LEVEL_MUST,
777 "Recovered Error, soft Cache Card Battery error thresold"},
778 {0x015D9200, IOASC_LOG_LEVEL_MUST,
779 "Recovered Error, soft Cache Card Battery error thresold"},
780 {0x02048000, IOASC_LOG_LEVEL_MUST,
781 "Not Ready, IOA Reset Required"},
782 {0x02408500, IOASC_LOG_LEVEL_MUST,
783 "Not Ready, IOA microcode download required"},
784 {0x03110B00, IOASC_LOG_LEVEL_MUST,
785 "Medium Error, data unreadable, reassignment suggested"},
786 {0x03110C00, IOASC_LOG_LEVEL_MUST,
787 "Medium Error, data unreadable do not reassign"},
788 {0x03310000, IOASC_LOG_LEVEL_MUST,
789 "Medium Error, media corrupted"},
790 {0x04050000, IOASC_LOG_LEVEL_MUST,
791 "Hardware Error, IOA can't communicate with device"},
792 {0x04080000, IOASC_LOG_LEVEL_MUST,
793 "Hardware Error, device bus error"},
794 {0x04080000, IOASC_LOG_LEVEL_MUST,
795 "Hardware Error, device bus is not functioning"},
796 {0x04118000, IOASC_LOG_LEVEL_MUST,
797 "Hardware Error, IOA reserved area data check"},
798 {0x04118100, IOASC_LOG_LEVEL_MUST,
799 "Hardware Error, IOA reserved area invalid data pattern"},
800 {0x04118200, IOASC_LOG_LEVEL_MUST,
801 "Hardware Error, IOA reserved area LRC error"},
802 {0x04320000, IOASC_LOG_LEVEL_MUST,
803 "Hardware Error, reassignment space exhausted"},
804 {0x04330000, IOASC_LOG_LEVEL_MUST,
805 "Hardware Error, data transfer underlength error"},
806 {0x04330000, IOASC_LOG_LEVEL_MUST,
807 "Hardware Error, data transfer overlength error"},
808 {0x04418000, IOASC_LOG_LEVEL_MUST,
809 "Hardware Error, PCI bus error"},
810 {0x04440000, IOASC_LOG_LEVEL_MUST,
811 "Hardware Error, device error"},
812 {0x04448300, IOASC_LOG_LEVEL_MUST,
813 "Hardware Error, undefined device response"},
814 {0x04448400, IOASC_LOG_LEVEL_MUST,
815 "Hardware Error, IOA microcode error"},
816 {0x04448600, IOASC_LOG_LEVEL_MUST,
817 "Hardware Error, IOA reset required"},
818 {0x04449200, IOASC_LOG_LEVEL_MUST,
819 "Hardware Error, hard Cache Fearuee Card Battery error"},
820 {0x0444A000, IOASC_LOG_LEVEL_MUST,
821 "Hardware Error, failed device altered"},
822 {0x0444A200, IOASC_LOG_LEVEL_MUST,
823 "Hardware Error, data check after reassignment"},
824 {0x0444A300, IOASC_LOG_LEVEL_MUST,
825 "Hardware Error, LRC error after reassignment"},
826 {0x044A0000, IOASC_LOG_LEVEL_MUST,
827 "Hardware Error, device bus error (msg/cmd phase)"},
828 {0x04670400, IOASC_LOG_LEVEL_MUST,
829 "Hardware Error, new device can't be used"},
830 {0x04678000, IOASC_LOG_LEVEL_MUST,
831 "Hardware Error, invalid multiadapter configuration"},
832 {0x04678100, IOASC_LOG_LEVEL_MUST,
833 "Hardware Error, incorrect connection between enclosures"},
834 {0x04678200, IOASC_LOG_LEVEL_MUST,
835 "Hardware Error, connections exceed IOA design limits"},
836 {0x04678300, IOASC_LOG_LEVEL_MUST,
837 "Hardware Error, incorrect multipath connection"},
838 {0x04679000, IOASC_LOG_LEVEL_MUST,
839 "Hardware Error, command to LUN failed"},
840 {0x064C8000, IOASC_LOG_LEVEL_HARD,
841 "Unit Attention, cache exists for missing/failed device"},
842 {0x06670100, IOASC_LOG_LEVEL_HARD,
843 "Unit Attention, incompatible exposed mode device"},
844 {0x06670600, IOASC_LOG_LEVEL_HARD,
845 "Unit Attention, attachment of logical unit failed"},
846 {0x06678000, IOASC_LOG_LEVEL_MUST,
847 "Unit Attention, cables exceed connective design limit"},
848 {0x06678300, IOASC_LOG_LEVEL_MUST,
849 "Unit Attention, incomplete multipath connection between" \
850 "IOA and enclosure"},
851 {0x06678400, IOASC_LOG_LEVEL_MUST,
852 "Unit Attention, incomplete multipath connection between" \
853 "device and enclosure"},
854 {0x06678500, IOASC_LOG_LEVEL_MUST,
855 "Unit Attention, incomplete multipath connection between" \
856 "IOA and remote IOA"},
857 {0x06678600, IOASC_LOG_LEVEL_HARD,
858 "Unit Attention, missing remote IOA"},
859 {0x06679100, IOASC_LOG_LEVEL_HARD,
860 "Unit Attention, enclosure doesn't support required multipath" \
861 "function"},
862 {0x06698200, IOASC_LOG_LEVEL_HARD,
863 "Unit Attention, corrupt array parity detected on device"},
864 {0x066B0200, IOASC_LOG_LEVEL_MUST,
865 "Unit Attention, array exposed"},
866 {0x066B8200, IOASC_LOG_LEVEL_HARD,
867 "Unit Attention, exposed array is still protected"},
868 {0x066B9200, IOASC_LOG_LEVEL_MUST,
869 "Unit Attention, Multipath redundancy level got worse"},
870 {0x07270000, IOASC_LOG_LEVEL_HARD,
871 "Data Protect, device is read/write protected by IOA"},
872 {0x07278000, IOASC_LOG_LEVEL_HARD,
873 "Data Protect, IOA doesn't support device attribute"},
874 {0x07278100, IOASC_LOG_LEVEL_HARD,
875 "Data Protect, NVRAM mirroring prohibited"},
876 {0x07278400, IOASC_LOG_LEVEL_MUST,
877 "Data Protect, array is short 2 or more devices"},
878 {0x07278600, IOASC_LOG_LEVEL_MUST,
879 "Data Protect, exposed array is short a required device"},
880 {0x07278700, IOASC_LOG_LEVEL_MUST,
881 "Data Protect, array members not at required addresses"},
882 {0x07278800, IOASC_LOG_LEVEL_MUST,
883 "Data Protect, exposed mode device resource address conflict"},
884 {0x07278900, IOASC_LOG_LEVEL_MUST,
885 "Data Protect, incorrect resource address of exposed mode device"},
886 {0x07278A00, IOASC_LOG_LEVEL_MUST,
887 "Data Protect, Array is missing a device and parity is out of sync"},
888 {0x07278B00, IOASC_LOG_LEVEL_MUST,
889 "Data Protect, maximum number of arrays already exist"},
890 {0x07278C00, IOASC_LOG_LEVEL_HARD,
891 "Data Protect, cannot locate cache data for device"},
892 {0x07278D00, IOASC_LOG_LEVEL_HARD,
893 "Data Protect, cache data exits for a changed device"},
894 {0x07279100, IOASC_LOG_LEVEL_MUST,
895 "Data Protect, detection of a device requiring format"},
896 {0x07279200, IOASC_LOG_LEVEL_MUST,
897 "Data Protect, IOA exceeds maximum number of devices"},
898 {0x07279600, IOASC_LOG_LEVEL_MUST,
899 "Data Protect, missing array, volume set is not functional"},
900 {0x07279700, IOASC_LOG_LEVEL_MUST,
901 "Data Protect, single device for a volume set"},
902 {0x07279800, IOASC_LOG_LEVEL_MUST,
903 "Data Protect, missing multiple devices for a volume set"},
904 {0x07279900, IOASC_LOG_LEVEL_HARD,
905 "Data Protect, maximum number of volument sets already exists"},
906 {0x07279A00, IOASC_LOG_LEVEL_MUST,
907 "Data Protect, other volume set problem"},
908 };
909
910 /* macros to help in debugging */
911 #define pmcraid_err(...) \
912 printk(KERN_ERR "MaxRAID: "__VA_ARGS__)
913
914 #define pmcraid_info(...) \
915 if (pmcraid_debug_log) \
916 printk(KERN_INFO "MaxRAID: "__VA_ARGS__)
917
918 /* check if given command is a SCSI READ or SCSI WRITE command */
919 #define SCSI_READ_CMD 0x1 /* any of SCSI READ commands */
920 #define SCSI_WRITE_CMD 0x2 /* any of SCSI WRITE commands */
921 #define SCSI_CMD_TYPE(opcode) \
922 ({ u8 op = opcode; u8 __type = 0;\
923 if (op == READ_6 || op == READ_10 || op == READ_12 || op == READ_16)\
924 __type = SCSI_READ_CMD;\
925 else if (op == WRITE_6 || op == WRITE_10 || op == WRITE_12 || \
926 op == WRITE_16)\
927 __type = SCSI_WRITE_CMD;\
928 __type;\
929 })
930
931 #define IS_SCSI_READ_WRITE(opcode) \
932 ({ u8 __type = SCSI_CMD_TYPE(opcode); \
933 (__type == SCSI_READ_CMD || __type == SCSI_WRITE_CMD) ? 1 : 0;\
934 })
935
936
937 /*
938 * pmcraid_ioctl_header - definition of header structure that preceeds all the
939 * buffers given as ioctl arguements.
940 *
941 * .signature : always ASCII string, "PMCRAID"
942 * .reserved : not used
943 * .buffer_length : length of the buffer following the header
944 */
945 struct pmcraid_ioctl_header {
946 u8 signature[8];
947 u32 reserved;
948 u32 buffer_length;
949 };
950
951 #define PMCRAID_IOCTL_SIGNATURE "PMCRAID"
952
953
954 /*
955 * pmcraid_event_details - defines AEN details that apps can retrieve from LLD
956 *
957 * .rcb_ccn - complete RCB of CCN
958 * .rcb_ldn - complete RCB of CCN
959 */
960 struct pmcraid_event_details {
961 struct pmcraid_hcam_ccn rcb_ccn;
962 struct pmcraid_hcam_ldn rcb_ldn;
963 };
964
965 /*
966 * pmcraid_driver_ioctl_buffer - structure passed as argument to most of the
967 * PMC driver handled ioctls.
968 */
969 struct pmcraid_driver_ioctl_buffer {
970 struct pmcraid_ioctl_header ioctl_header;
971 struct pmcraid_event_details event_details;
972 };
973
974 /*
975 * pmcraid_passthrough_ioctl_buffer - structure given as argument to
976 * passthrough(or firmware handled) IOCTL commands. Note that ioarcb requires
977 * 32-byte alignment so, it is necessary to pack this structure to avoid any
978 * holes between ioctl_header and passthrough buffer
979 *
980 * .ioactl_header : ioctl header
981 * .ioarcb : filled-up ioarcb buffer, driver always reads this buffer
982 * .ioasa : buffer for ioasa, driver fills this with IOASA from firmware
983 * .request_buffer: The I/O buffer (flat), driver reads/writes to this based on
984 * the transfer directions passed in ioarcb.flags0. Contents
985 * of this buffer are valid only when ioarcb.data_transfer_len
986 * is not zero.
987 */
988 struct pmcraid_passthrough_ioctl_buffer {
989 struct pmcraid_ioctl_header ioctl_header;
990 struct pmcraid_ioarcb ioarcb;
991 struct pmcraid_ioasa ioasa;
992 u8 request_buffer[1];
993 } __attribute__ ((packed));
994
995 /*
996 * keys to differentiate between driver handled IOCTLs and passthrough
997 * IOCTLs passed to IOA. driver determines the ioctl type using macro
998 * _IOC_TYPE
999 */
1000 #define PMCRAID_DRIVER_IOCTL 'D'
1001 #define PMCRAID_PASSTHROUGH_IOCTL 'F'
1002
1003 #define DRV_IOCTL(n, size) \
1004 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_DRIVER_IOCTL, (n), (size))
1005
1006 #define FMW_IOCTL(n, size) \
1007 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_PASSTHROUGH_IOCTL, (n), (size))
1008
1009 /*
1010 * _ARGSIZE: macro that gives size of the argument type passed to an IOCTL cmd.
1011 * This is to facilitate applications avoiding un-necessary memory allocations.
1012 * For example, most of driver handled ioctls do not require ioarcb, ioasa.
1013 */
1014 #define _ARGSIZE(arg) (sizeof(struct pmcraid_ioctl_header) + sizeof(arg))
1015
1016 /* Driver handled IOCTL command definitions */
1017
1018 #define PMCRAID_IOCTL_RESET_ADAPTER \
1019 DRV_IOCTL(5, sizeof(struct pmcraid_ioctl_header))
1020
1021 /* passthrough/firmware handled commands */
1022 #define PMCRAID_IOCTL_PASSTHROUGH_COMMAND \
1023 FMW_IOCTL(1, sizeof(struct pmcraid_passthrough_ioctl_buffer))
1024
1025 #define PMCRAID_IOCTL_DOWNLOAD_MICROCODE \
1026 FMW_IOCTL(2, sizeof(struct pmcraid_passthrough_ioctl_buffer))
1027
1028
1029 #endif /* _PMCRAID_H */
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