| blob | a14aa3d1f015d08c6d114d761e73fbb31d4bd635 |
1 /*
2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2 only.
7 */
9 /include/ "skeleton.dtsi"
11 / {
12 model = "Atmel AT91SAM9263 family SoC";
13 compatible = "atmel,at91sam9263";
14 interrupt-parent = <&aic>;
16 aliases {
17 serial0 = &dbgu;
18 serial1 = &usart0;
19 serial2 = &usart1;
20 serial3 = &usart2;
21 gpio0 = &pioA;
22 gpio1 = &pioB;
23 gpio2 = &pioC;
24 gpio3 = &pioD;
25 gpio4 = &pioE;
26 tcb0 = &tcb0;
27 i2c0 = &i2c0;
28 };
29 cpus {
30 cpu@0 {
31 compatible = "arm,arm926ejs";
32 };
33 };
35 memory {
36 reg = <0x20000000 0x08000000>;
37 };
39 ahb {
40 compatible = "simple-bus";
41 #address-cells = <1>;
42 #size-cells = <1>;
43 ranges;
45 apb {
46 compatible = "simple-bus";
47 #address-cells = <1>;
48 #size-cells = <1>;
49 ranges;
51 aic: interrupt-controller@fffff000 {
52 #interrupt-cells = <3>;
53 compatible = "atmel,at91rm9200-aic";
54 interrupt-controller;
55 reg = <0xfffff000 0x200>;
56 atmel,external-irqs = <30 31>;
57 };
59 pmc: pmc@fffffc00 {
60 compatible = "atmel,at91rm9200-pmc";
61 reg = <0xfffffc00 0x100>;
62 };
64 ramc: ramc@ffffe200 {
65 compatible = "atmel,at91sam9260-sdramc";
66 reg = <0xffffe200 0x200
67 0xffffe800 0x200>;
68 };
70 pit: timer@fffffd30 {
71 compatible = "atmel,at91sam9260-pit";
72 reg = <0xfffffd30 0xf>;
73 interrupts = <1 4 7>;
74 };
76 tcb0: timer@fff7c000 {
77 compatible = "atmel,at91rm9200-tcb";
78 reg = <0xfff7c000 0x100>;
79 interrupts = <19 4 0>;
80 };
82 rstc@fffffd00 {
83 compatible = "atmel,at91sam9260-rstc";
84 reg = <0xfffffd00 0x10>;
85 };
87 shdwc@fffffd10 {
88 compatible = "atmel,at91sam9260-shdwc";
89 reg = <0xfffffd10 0x10>;
90 };
92 pinctrl@fffff200 {
93 #address-cells = <1>;
94 #size-cells = <1>;
95 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
96 ranges = <0xfffff200 0xfffff200 0xa00>;
98 atmel,mux-mask = <
99 /* A B */
100 0xfffffffb 0xffffe07f /* pioA */
101 0x0007ffff 0x39072fff /* pioB */
102 0xffffffff 0x3ffffff8 /* pioC */
103 0xfffffbff 0xffffffff /* pioD */
104 0xffe00fff 0xfbfcff00 /* pioE */
105 >;
107 /* shared pinctrl settings */
108 dbgu {
109 pinctrl_dbgu: dbgu-0 {
110 atmel,pins =
111 <2 30 0x1 0x0 /* PC30 periph A */
112 2 31 0x1 0x1>; /* PC31 periph with pullup */
113 };
114 };
116 usart0 {
117 pinctrl_usart0: usart0-0 {
118 atmel,pins =
119 <0 26 0x1 0x1 /* PA26 periph A with pullup */
120 0 27 0x1 0x0>; /* PA27 periph A */
121 };
123 pinctrl_usart0_rts: usart0_rts-0 {
124 atmel,pins =
125 <0 28 0x1 0x0>; /* PA28 periph A */
126 };
128 pinctrl_usart0_cts: usart0_cts-0 {
129 atmel,pins =
130 <0 29 0x1 0x0>; /* PA29 periph A */
131 };
132 };
134 usart1 {
135 pinctrl_usart1: usart1-0 {
136 atmel,pins =
137 <3 0 0x1 0x1 /* PD0 periph A with pullup */
138 3 1 0x1 0x0>; /* PD1 periph A */
139 };
141 pinctrl_usart1_rts: usart1_rts-0 {
142 atmel,pins =
143 <3 7 0x2 0x0>; /* PD7 periph B */
144 };
146 pinctrl_usart1_cts: usart1_cts-0 {
147 atmel,pins =
148 <3 8 0x2 0x0>; /* PD8 periph B */
149 };
150 };
152 usart2 {
153 pinctrl_usart2: usart2-0 {
154 atmel,pins =
155 <3 2 0x1 0x1 /* PD2 periph A with pullup */
156 3 3 0x1 0x0>; /* PD3 periph A */
157 };
159 pinctrl_usart2_rts: usart2_rts-0 {
160 atmel,pins =
161 <3 5 0x2 0x0>; /* PD5 periph B */
162 };
164 pinctrl_usart2_cts: usart2_cts-0 {
165 atmel,pins =
166 <4 6 0x2 0x0>; /* PD6 periph B */
167 };
168 };
170 nand {
171 pinctrl_nand: nand-0 {
172 atmel,pins =
173 <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/
174 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
175 };
176 };
178 macb {
179 pinctrl_macb_rmii: macb_rmii-0 {
180 atmel,pins =
181 <2 25 0x2 0x0 /* PC25 periph B */
182 4 21 0x1 0x0 /* PE21 periph A */
183 4 23 0x1 0x0 /* PE23 periph A */
184 4 24 0x1 0x0 /* PE24 periph A */
185 4 25 0x1 0x0 /* PE25 periph A */
186 4 26 0x1 0x0 /* PE26 periph A */
187 4 27 0x1 0x0 /* PE27 periph A */
188 4 28 0x1 0x0 /* PE28 periph A */
189 4 29 0x1 0x0 /* PE29 periph A */
190 4 30 0x1 0x0>; /* PE30 periph A */
191 };
193 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
194 atmel,pins =
195 <2 20 0x2 0x0 /* PC20 periph B */
196 2 21 0x2 0x0 /* PC21 periph B */
197 2 22 0x2 0x0 /* PC22 periph B */
198 2 23 0x2 0x0 /* PC23 periph B */
199 2 24 0x2 0x0 /* PC24 periph B */
200 2 25 0x2 0x0 /* PC25 periph B */
201 2 27 0x2 0x0 /* PC27 periph B */
202 4 22 0x2 0x0>; /* PE22 periph B */
203 };
204 };
206 pioA: gpio@fffff200 {
207 compatible = "atmel,at91rm9200-gpio";
208 reg = <0xfffff200 0x200>;
209 interrupts = <2 4 1>;
210 #gpio-cells = <2>;
211 gpio-controller;
212 interrupt-controller;
213 #interrupt-cells = <2>;
214 };
216 pioB: gpio@fffff400 {
217 compatible = "atmel,at91rm9200-gpio";
218 reg = <0xfffff400 0x200>;
219 interrupts = <3 4 1>;
220 #gpio-cells = <2>;
221 gpio-controller;
222 interrupt-controller;
223 #interrupt-cells = <2>;
224 };
226 pioC: gpio@fffff600 {
227 compatible = "atmel,at91rm9200-gpio";
228 reg = <0xfffff600 0x200>;
229 interrupts = <4 4 1>;
230 #gpio-cells = <2>;
231 gpio-controller;
232 interrupt-controller;
233 #interrupt-cells = <2>;
234 };
236 pioD: gpio@fffff800 {
237 compatible = "atmel,at91rm9200-gpio";
238 reg = <0xfffff800 0x200>;
239 interrupts = <4 4 1>;
240 #gpio-cells = <2>;
241 gpio-controller;
242 interrupt-controller;
243 #interrupt-cells = <2>;
244 };
246 pioE: gpio@fffffa00 {
247 compatible = "atmel,at91rm9200-gpio";
248 reg = <0xfffffa00 0x200>;
249 interrupts = <4 4 1>;
250 #gpio-cells = <2>;
251 gpio-controller;
252 interrupt-controller;
253 #interrupt-cells = <2>;
254 };
255 };
257 dbgu: serial@ffffee00 {
258 compatible = "atmel,at91sam9260-usart";
259 reg = <0xffffee00 0x200>;
260 interrupts = <1 4 7>;
261 pinctrl-names = "default";
262 pinctrl-0 = <&pinctrl_dbgu>;
263 status = "disabled";
264 };
266 usart0: serial@fff8c000 {
267 compatible = "atmel,at91sam9260-usart";
268 reg = <0xfff8c000 0x200>;
269 interrupts = <7 4 5>;
270 atmel,use-dma-rx;
271 atmel,use-dma-tx;
272 pinctrl-names = "default";
273 pinctrl-0 = <&pinctrl_usart0>;
274 status = "disabled";
275 };
277 usart1: serial@fff90000 {
278 compatible = "atmel,at91sam9260-usart";
279 reg = <0xfff90000 0x200>;
280 interrupts = <8 4 5>;
281 atmel,use-dma-rx;
282 atmel,use-dma-tx;
283 pinctrl-names = "default";
284 pinctrl-0 = <&pinctrl_usart1>;
285 status = "disabled";
286 };
288 usart2: serial@fff94000 {
289 compatible = "atmel,at91sam9260-usart";
290 reg = <0xfff94000 0x200>;
291 interrupts = <9 4 5>;
292 atmel,use-dma-rx;
293 atmel,use-dma-tx;
294 pinctrl-names = "default";
295 pinctrl-0 = <&pinctrl_usart2>;
296 status = "disabled";
297 };
299 macb0: ethernet@fffbc000 {
300 compatible = "cdns,at32ap7000-macb", "cdns,macb";
301 reg = <0xfffbc000 0x100>;
302 interrupts = <21 4 3>;
303 pinctrl-names = "default";
304 pinctrl-0 = <&pinctrl_macb_rmii>;
305 status = "disabled";
306 };
308 usb1: gadget@fff78000 {
309 compatible = "atmel,at91rm9200-udc";
310 reg = <0xfff78000 0x4000>;
311 interrupts = <24 4 2>;
312 status = "disabled";
313 };
315 i2c0: i2c@fff88000 {
316 compatible = "atmel,at91sam9263-i2c";
317 reg = <0xfff88000 0x100>;
318 interrupts = <13 4 6>;
319 #address-cells = <1>;
320 #size-cells = <0>;
321 status = "disabled";
322 };
323 };
325 nand0: nand@40000000 {
326 compatible = "atmel,at91rm9200-nand";
327 #address-cells = <1>;
328 #size-cells = <1>;
329 reg = <0x40000000 0x10000000
330 0xffffe000 0x200
331 >;
332 atmel,nand-addr-offset = <21>;
333 atmel,nand-cmd-offset = <22>;
334 pinctrl-names = "default";
335 pinctrl-0 = <&pinctrl_nand>;
336 gpios = <&pioA 22 0
337 &pioD 15 0
338 0
339 >;
340 status = "disabled";
341 };
343 usb0: ohci@00a00000 {
344 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
345 reg = <0x00a00000 0x100000>;
346 interrupts = <29 4 2>;
347 status = "disabled";
348 };
349 };
351 i2c@0 {
352 compatible = "i2c-gpio";
353 gpios = <&pioB 4 0 /* sda */
354 &pioB 5 0 /* scl */
355 >;
356 i2c-gpio,sda-open-drain;
357 i2c-gpio,scl-open-drain;
358 i2c-gpio,delay-us = <2>; /* ~100 kHz */
359 #address-cells = <1>;
360 #size-cells = <0>;
361 status = "disabled";
362 };
363 };