2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 * Licensed under GPLv2 or later.
11 /include/ "skeleton.dtsi"
14 model = "Atmel AT91SAM9260 family SoC";
15 compatible = "atmel,at91sam9260";
16 interrupt-parent = <&aic>;
35 compatible = "arm,arm926ejs";
40 reg = <0x20000000 0x04000000>;
44 compatible = "simple-bus";
50 compatible = "simple-bus";
55 aic: interrupt-controller@fffff000 {
56 #interrupt-cells = <3>;
57 compatible = "atmel,at91rm9200-aic";
59 reg = <0xfffff000 0x200>;
60 atmel,external-irqs = <29 30 31>;
63 ramc0: ramc@ffffea00 {
64 compatible = "atmel,at91sam9260-sdramc";
65 reg = <0xffffea00 0x200>;
69 compatible = "atmel,at91rm9200-pmc";
70 reg = <0xfffffc00 0x100>;
74 compatible = "atmel,at91sam9260-rstc";
75 reg = <0xfffffd00 0x10>;
79 compatible = "atmel,at91sam9260-shdwc";
80 reg = <0xfffffd10 0x10>;
84 compatible = "atmel,at91sam9260-pit";
85 reg = <0xfffffd30 0xf>;
89 tcb0: timer@fffa0000 {
90 compatible = "atmel,at91rm9200-tcb";
91 reg = <0xfffa0000 0x100>;
92 interrupts = <17 4 0 18 4 0 19 4 0>;
95 tcb1: timer@fffdc000 {
96 compatible = "atmel,at91rm9200-tcb";
97 reg = <0xfffdc000 0x100>;
98 interrupts = <26 4 0 27 4 0 28 4 0>;
102 #address-cells = <1>;
104 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
105 ranges = <0xfffff400 0xfffff400 0x600>;
109 0xffffffff 0xffc00c3b /* pioA */
110 0xffffffff 0x7fff3ccf /* pioB */
111 0xffffffff 0x007fffff /* pioC */
114 /* shared pinctrl settings */
116 pinctrl_dbgu: dbgu-0 {
118 <1 14 0x1 0x0 /* PB14 periph A */
119 1 15 0x1 0x1>; /* PB15 periph with pullup */
124 pinctrl_usart0: usart0-0 {
126 <1 4 0x1 0x0 /* PB4 periph A */
127 1 5 0x1 0x0>; /* PB5 periph A */
130 pinctrl_usart0_rts: usart0_rts-0 {
132 <1 26 0x1 0x0>; /* PB26 periph A */
135 pinctrl_usart0_cts: usart0_cts-0 {
137 <1 27 0x1 0x0>; /* PB27 periph A */
140 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
142 <1 24 0x1 0x0 /* PB24 periph A */
143 1 22 0x1 0x0>; /* PB22 periph A */
146 pinctrl_usart0_dcd: usart0_dcd-0 {
148 <1 23 0x1 0x0>; /* PB23 periph A */
151 pinctrl_usart0_ri: usart0_ri-0 {
153 <1 25 0x1 0x0>; /* PB25 periph A */
158 pinctrl_usart1: usart1-0 {
160 <2 6 0x1 0x1 /* PB6 periph A with pullup */
161 2 7 0x1 0x0>; /* PB7 periph A */
164 pinctrl_usart1_rts: usart1_rts-0 {
166 <1 28 0x1 0x0>; /* PB28 periph A */
169 pinctrl_usart1_cts: usart1_cts-0 {
171 <1 29 0x1 0x0>; /* PB29 periph A */
176 pinctrl_usart2: usart2-0 {
178 <1 8 0x1 0x1 /* PB8 periph A with pullup */
179 1 9 0x1 0x0>; /* PB9 periph A */
182 pinctrl_usart2_rts: usart2_rts-0 {
184 <0 4 0x1 0x0>; /* PA4 periph A */
187 pinctrl_usart2_cts: usart2_cts-0 {
189 <0 5 0x1 0x0>; /* PA5 periph A */
194 pinctrl_usart3: usart3-0 {
196 <2 10 0x1 0x1 /* PB10 periph A with pullup */
197 2 11 0x1 0x0>; /* PB11 periph A */
200 pinctrl_usart3_rts: usart3_rts-0 {
202 <3 8 0x2 0x0>; /* PB8 periph B */
205 pinctrl_usart3_cts: usart3_cts-0 {
207 <3 10 0x2 0x0>; /* PB10 periph B */
212 pinctrl_uart0: uart0-0 {
214 <0 31 0x2 0x1 /* PA31 periph B with pullup */
215 0 30 0x2 0x0>; /* PA30 periph B */
220 pinctrl_uart1: uart1-0 {
222 <2 12 0x1 0x1 /* PB12 periph A with pullup */
223 2 13 0x1 0x0>; /* PB13 periph A */
228 pinctrl_nand: nand-0 {
230 <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */
231 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
236 pinctrl_macb_rmii: macb_rmii-0 {
238 <0 12 0x1 0x0 /* PA12 periph A */
239 0 13 0x1 0x0 /* PA13 periph A */
240 0 14 0x1 0x0 /* PA14 periph A */
241 0 15 0x1 0x0 /* PA15 periph A */
242 0 16 0x1 0x0 /* PA16 periph A */
243 0 17 0x1 0x0 /* PA17 periph A */
244 0 18 0x1 0x0 /* PA18 periph A */
245 0 19 0x1 0x0 /* PA19 periph A */
246 0 20 0x1 0x0 /* PA20 periph A */
247 0 21 0x1 0x0>; /* PA21 periph A */
250 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
252 <0 22 0x2 0x0 /* PA22 periph B */
253 0 23 0x2 0x0 /* PA23 periph B */
254 0 24 0x2 0x0 /* PA24 periph B */
255 0 25 0x2 0x0 /* PA25 periph B */
256 0 26 0x2 0x0 /* PA26 periph B */
257 0 27 0x2 0x0 /* PA27 periph B */
258 0 28 0x2 0x0 /* PA28 periph B */
259 0 29 0x2 0x0>; /* PA29 periph B */
262 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
264 <0 10 0x2 0x0 /* PA10 periph B */
265 0 11 0x2 0x0 /* PA11 periph B */
266 0 24 0x2 0x0 /* PA24 periph B */
267 0 25 0x2 0x0 /* PA25 periph B */
268 0 26 0x2 0x0 /* PA26 periph B */
269 0 27 0x2 0x0 /* PA27 periph B */
270 0 28 0x2 0x0 /* PA28 periph B */
271 0 29 0x2 0x0>; /* PA29 periph B */
275 pioA: gpio@fffff400 {
276 compatible = "atmel,at91rm9200-gpio";
277 reg = <0xfffff400 0x200>;
278 interrupts = <2 4 1>;
281 interrupt-controller;
282 #interrupt-cells = <2>;
285 pioB: gpio@fffff600 {
286 compatible = "atmel,at91rm9200-gpio";
287 reg = <0xfffff600 0x200>;
288 interrupts = <3 4 1>;
291 interrupt-controller;
292 #interrupt-cells = <2>;
295 pioC: gpio@fffff800 {
296 compatible = "atmel,at91rm9200-gpio";
297 reg = <0xfffff800 0x200>;
298 interrupts = <4 4 1>;
301 interrupt-controller;
302 #interrupt-cells = <2>;
306 dbgu: serial@fffff200 {
307 compatible = "atmel,at91sam9260-usart";
308 reg = <0xfffff200 0x200>;
309 interrupts = <1 4 7>;
310 pinctrl-names = "default";
311 pinctrl-0 = <&pinctrl_dbgu>;
315 usart0: serial@fffb0000 {
316 compatible = "atmel,at91sam9260-usart";
317 reg = <0xfffb0000 0x200>;
318 interrupts = <6 4 5>;
321 pinctrl-names = "default";
322 pinctrl-0 = <&pinctrl_usart0>;
326 usart1: serial@fffb4000 {
327 compatible = "atmel,at91sam9260-usart";
328 reg = <0xfffb4000 0x200>;
329 interrupts = <7 4 5>;
332 pinctrl-names = "default";
333 pinctrl-0 = <&pinctrl_usart1>;
337 usart2: serial@fffb8000 {
338 compatible = "atmel,at91sam9260-usart";
339 reg = <0xfffb8000 0x200>;
340 interrupts = <8 4 5>;
343 pinctrl-names = "default";
344 pinctrl-0 = <&pinctrl_usart2>;
348 usart3: serial@fffd0000 {
349 compatible = "atmel,at91sam9260-usart";
350 reg = <0xfffd0000 0x200>;
351 interrupts = <23 4 5>;
354 pinctrl-names = "default";
355 pinctrl-0 = <&pinctrl_usart3>;
359 uart0: serial@fffd4000 {
360 compatible = "atmel,at91sam9260-usart";
361 reg = <0xfffd4000 0x200>;
362 interrupts = <24 4 5>;
365 pinctrl-names = "default";
366 pinctrl-0 = <&pinctrl_uart0>;
370 uart1: serial@fffd8000 {
371 compatible = "atmel,at91sam9260-usart";
372 reg = <0xfffd8000 0x200>;
373 interrupts = <25 4 5>;
376 pinctrl-names = "default";
377 pinctrl-0 = <&pinctrl_uart1>;
381 macb0: ethernet@fffc4000 {
382 compatible = "cdns,at32ap7000-macb", "cdns,macb";
383 reg = <0xfffc4000 0x100>;
384 interrupts = <21 4 3>;
385 pinctrl-names = "default";
386 pinctrl-0 = <&pinctrl_macb_rmii>;
390 usb1: gadget@fffa4000 {
391 compatible = "atmel,at91rm9200-udc";
392 reg = <0xfffa4000 0x4000>;
393 interrupts = <10 4 2>;
398 compatible = "atmel,at91sam9260-i2c";
399 reg = <0xfffac000 0x100>;
400 interrupts = <11 4 6>;
401 #address-cells = <1>;
407 compatible = "atmel,at91sam9260-adc";
408 reg = <0xfffe0000 0x100>;
409 interrupts = <5 4 0>;
410 atmel,adc-use-external-triggers;
411 atmel,adc-channels-used = <0xf>;
412 atmel,adc-vref = <3300>;
413 atmel,adc-num-channels = <4>;
414 atmel,adc-startup-time = <15>;
415 atmel,adc-channel-base = <0x30>;
416 atmel,adc-drdy-mask = <0x10000>;
417 atmel,adc-status-register = <0x1c>;
418 atmel,adc-trigger-register = <0x04>;
421 trigger-name = "timer-counter-0";
422 trigger-value = <0x1>;
425 trigger-name = "timer-counter-1";
426 trigger-value = <0x3>;
430 trigger-name = "timer-counter-2";
431 trigger-value = <0x5>;
435 trigger-name = "external";
436 trigger-value = <0x13>;
442 nand0: nand@40000000 {
443 compatible = "atmel,at91rm9200-nand";
444 #address-cells = <1>;
446 reg = <0x40000000 0x10000000
449 atmel,nand-addr-offset = <21>;
450 atmel,nand-cmd-offset = <22>;
451 pinctrl-names = "default";
452 pinctrl-0 = <&pinctrl_nand>;
460 usb0: ohci@00500000 {
461 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
462 reg = <0x00500000 0x100000>;
463 interrupts = <20 4 2>;
469 compatible = "i2c-gpio";
470 gpios = <&pioA 23 0 /* sda */
473 i2c-gpio,sda-open-drain;
474 i2c-gpio,scl-open-drain;
475 i2c-gpio,delay-us = <2>; /* ~100 kHz */
476 #address-cells = <1>;