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powerpc/476: define specific cpu table entry DD2 core
[linux-2.6.git] / arch / powerpc / kernel / cputable.c
blobbf7cf86e04dda7e5e8e2f9e09074a0be7e0ba738
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23
24 struct cpu_spec* cur_cpu_spec = NULL;
25 EXPORT_SYMBOL(cur_cpu_spec);
26
27 /* The platform string corresponding to the real PVR */
28 const char *powerpc_base_platform;
29
30 /* NOTE:
31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
32 * the responsibility of the appropriate CPU save/restore functions to
33 * eventually copy these settings over. Those save/restore aren't yet
34 * part of the cputable though. That has to be fixed for both ppc32
35 * and ppc64
36 */
37 #ifdef CONFIG_PPC32
38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
51 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
52 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
53 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
60 #endif /* CONFIG_PPC32 */
61 #ifdef CONFIG_PPC64
62 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
63 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
64 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
65 extern void __restore_cpu_pa6t(void);
66 extern void __restore_cpu_ppc970(void);
67 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
68 extern void __restore_cpu_power7(void);
69 #endif /* CONFIG_PPC64 */
70 #if defined(CONFIG_E500)
71 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_e5500(void);
73 #endif /* CONFIG_E500 */
74
75 /* This table only contains "desktop" CPUs, it need to be filled with embedded
76 * ones as well...
77 */
78 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
79 PPC_FEATURE_HAS_MMU)
80 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
81 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
82 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
83 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
84 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
85 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
86 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
87 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
88 PPC_FEATURE_TRUE_LE | \
89 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
90 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
91 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
92 PPC_FEATURE_TRUE_LE | \
93 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
94 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
95 PPC_FEATURE_TRUE_LE | \
96 PPC_FEATURE_HAS_ALTIVEC_COMP)
97 #ifdef CONFIG_PPC_BOOK3E_64
98 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
99 #else
100 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
101 PPC_FEATURE_BOOKE)
102 #endif
103
104 static struct cpu_spec __initdata cpu_specs[] = {
105 #ifdef CONFIG_PPC_BOOK3S_64
106 { /* Power3 */
107 .pvr_mask = 0xffff0000,
108 .pvr_value = 0x00400000,
109 .cpu_name = "POWER3 (630)",
110 .cpu_features = CPU_FTRS_POWER3,
111 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
112 .mmu_features = MMU_FTR_HPTE_TABLE,
113 .icache_bsize = 128,
114 .dcache_bsize = 128,
115 .num_pmcs = 8,
116 .pmc_type = PPC_PMC_IBM,
117 .oprofile_cpu_type = "ppc64/power3",
118 .oprofile_type = PPC_OPROFILE_RS64,
119 .machine_check = machine_check_generic,
120 .platform = "power3",
121 },
122 { /* Power3+ */
123 .pvr_mask = 0xffff0000,
124 .pvr_value = 0x00410000,
125 .cpu_name = "POWER3 (630+)",
126 .cpu_features = CPU_FTRS_POWER3,
127 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
128 .mmu_features = MMU_FTR_HPTE_TABLE,
129 .icache_bsize = 128,
130 .dcache_bsize = 128,
131 .num_pmcs = 8,
132 .pmc_type = PPC_PMC_IBM,
133 .oprofile_cpu_type = "ppc64/power3",
134 .oprofile_type = PPC_OPROFILE_RS64,
135 .machine_check = machine_check_generic,
136 .platform = "power3",
137 },
138 { /* Northstar */
139 .pvr_mask = 0xffff0000,
140 .pvr_value = 0x00330000,
141 .cpu_name = "RS64-II (northstar)",
142 .cpu_features = CPU_FTRS_RS64,
143 .cpu_user_features = COMMON_USER_PPC64,
144 .mmu_features = MMU_FTR_HPTE_TABLE,
145 .icache_bsize = 128,
146 .dcache_bsize = 128,
147 .num_pmcs = 8,
148 .pmc_type = PPC_PMC_IBM,
149 .oprofile_cpu_type = "ppc64/rs64",
150 .oprofile_type = PPC_OPROFILE_RS64,
151 .machine_check = machine_check_generic,
152 .platform = "rs64",
153 },
154 { /* Pulsar */
155 .pvr_mask = 0xffff0000,
156 .pvr_value = 0x00340000,
157 .cpu_name = "RS64-III (pulsar)",
158 .cpu_features = CPU_FTRS_RS64,
159 .cpu_user_features = COMMON_USER_PPC64,
160 .mmu_features = MMU_FTR_HPTE_TABLE,
161 .icache_bsize = 128,
162 .dcache_bsize = 128,
163 .num_pmcs = 8,
164 .pmc_type = PPC_PMC_IBM,
165 .oprofile_cpu_type = "ppc64/rs64",
166 .oprofile_type = PPC_OPROFILE_RS64,
167 .machine_check = machine_check_generic,
168 .platform = "rs64",
169 },
170 { /* I-star */
171 .pvr_mask = 0xffff0000,
172 .pvr_value = 0x00360000,
173 .cpu_name = "RS64-III (icestar)",
174 .cpu_features = CPU_FTRS_RS64,
175 .cpu_user_features = COMMON_USER_PPC64,
176 .mmu_features = MMU_FTR_HPTE_TABLE,
177 .icache_bsize = 128,
178 .dcache_bsize = 128,
179 .num_pmcs = 8,
180 .pmc_type = PPC_PMC_IBM,
181 .oprofile_cpu_type = "ppc64/rs64",
182 .oprofile_type = PPC_OPROFILE_RS64,
183 .machine_check = machine_check_generic,
184 .platform = "rs64",
185 },
186 { /* S-star */
187 .pvr_mask = 0xffff0000,
188 .pvr_value = 0x00370000,
189 .cpu_name = "RS64-IV (sstar)",
190 .cpu_features = CPU_FTRS_RS64,
191 .cpu_user_features = COMMON_USER_PPC64,
192 .mmu_features = MMU_FTR_HPTE_TABLE,
193 .icache_bsize = 128,
194 .dcache_bsize = 128,
195 .num_pmcs = 8,
196 .pmc_type = PPC_PMC_IBM,
197 .oprofile_cpu_type = "ppc64/rs64",
198 .oprofile_type = PPC_OPROFILE_RS64,
199 .machine_check = machine_check_generic,
200 .platform = "rs64",
201 },
202 { /* Power4 */
203 .pvr_mask = 0xffff0000,
204 .pvr_value = 0x00350000,
205 .cpu_name = "POWER4 (gp)",
206 .cpu_features = CPU_FTRS_POWER4,
207 .cpu_user_features = COMMON_USER_POWER4,
208 .mmu_features = MMU_FTR_HPTE_TABLE,
209 .icache_bsize = 128,
210 .dcache_bsize = 128,
211 .num_pmcs = 8,
212 .pmc_type = PPC_PMC_IBM,
213 .oprofile_cpu_type = "ppc64/power4",
214 .oprofile_type = PPC_OPROFILE_POWER4,
215 .machine_check = machine_check_generic,
216 .platform = "power4",
217 },
218 { /* Power4+ */
219 .pvr_mask = 0xffff0000,
220 .pvr_value = 0x00380000,
221 .cpu_name = "POWER4+ (gq)",
222 .cpu_features = CPU_FTRS_POWER4,
223 .cpu_user_features = COMMON_USER_POWER4,
224 .mmu_features = MMU_FTR_HPTE_TABLE,
225 .icache_bsize = 128,
226 .dcache_bsize = 128,
227 .num_pmcs = 8,
228 .pmc_type = PPC_PMC_IBM,
229 .oprofile_cpu_type = "ppc64/power4",
230 .oprofile_type = PPC_OPROFILE_POWER4,
231 .machine_check = machine_check_generic,
232 .platform = "power4",
233 },
234 { /* PPC970 */
235 .pvr_mask = 0xffff0000,
236 .pvr_value = 0x00390000,
237 .cpu_name = "PPC970",
238 .cpu_features = CPU_FTRS_PPC970,
239 .cpu_user_features = COMMON_USER_POWER4 |
240 PPC_FEATURE_HAS_ALTIVEC_COMP,
241 .mmu_features = MMU_FTR_HPTE_TABLE,
242 .icache_bsize = 128,
243 .dcache_bsize = 128,
244 .num_pmcs = 8,
245 .pmc_type = PPC_PMC_IBM,
246 .cpu_setup = __setup_cpu_ppc970,
247 .cpu_restore = __restore_cpu_ppc970,
248 .oprofile_cpu_type = "ppc64/970",
249 .oprofile_type = PPC_OPROFILE_POWER4,
250 .machine_check = machine_check_generic,
251 .platform = "ppc970",
252 },
253 { /* PPC970FX */
254 .pvr_mask = 0xffff0000,
255 .pvr_value = 0x003c0000,
256 .cpu_name = "PPC970FX",
257 .cpu_features = CPU_FTRS_PPC970,
258 .cpu_user_features = COMMON_USER_POWER4 |
259 PPC_FEATURE_HAS_ALTIVEC_COMP,
260 .mmu_features = MMU_FTR_HPTE_TABLE,
261 .icache_bsize = 128,
262 .dcache_bsize = 128,
263 .num_pmcs = 8,
264 .pmc_type = PPC_PMC_IBM,
265 .cpu_setup = __setup_cpu_ppc970,
266 .cpu_restore = __restore_cpu_ppc970,
267 .oprofile_cpu_type = "ppc64/970",
268 .oprofile_type = PPC_OPROFILE_POWER4,
269 .machine_check = machine_check_generic,
270 .platform = "ppc970",
271 },
272 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
273 .pvr_mask = 0xffffffff,
274 .pvr_value = 0x00440100,
275 .cpu_name = "PPC970MP",
276 .cpu_features = CPU_FTRS_PPC970,
277 .cpu_user_features = COMMON_USER_POWER4 |
278 PPC_FEATURE_HAS_ALTIVEC_COMP,
279 .mmu_features = MMU_FTR_HPTE_TABLE,
280 .icache_bsize = 128,
281 .dcache_bsize = 128,
282 .num_pmcs = 8,
283 .pmc_type = PPC_PMC_IBM,
284 .cpu_setup = __setup_cpu_ppc970,
285 .cpu_restore = __restore_cpu_ppc970,
286 .oprofile_cpu_type = "ppc64/970MP",
287 .oprofile_type = PPC_OPROFILE_POWER4,
288 .machine_check = machine_check_generic,
289 .platform = "ppc970",
290 },
291 { /* PPC970MP */
292 .pvr_mask = 0xffff0000,
293 .pvr_value = 0x00440000,
294 .cpu_name = "PPC970MP",
295 .cpu_features = CPU_FTRS_PPC970,
296 .cpu_user_features = COMMON_USER_POWER4 |
297 PPC_FEATURE_HAS_ALTIVEC_COMP,
298 .mmu_features = MMU_FTR_HPTE_TABLE,
299 .icache_bsize = 128,
300 .dcache_bsize = 128,
301 .num_pmcs = 8,
302 .pmc_type = PPC_PMC_IBM,
303 .cpu_setup = __setup_cpu_ppc970MP,
304 .cpu_restore = __restore_cpu_ppc970,
305 .oprofile_cpu_type = "ppc64/970MP",
306 .oprofile_type = PPC_OPROFILE_POWER4,
307 .machine_check = machine_check_generic,
308 .platform = "ppc970",
309 },
310 { /* PPC970GX */
311 .pvr_mask = 0xffff0000,
312 .pvr_value = 0x00450000,
313 .cpu_name = "PPC970GX",
314 .cpu_features = CPU_FTRS_PPC970,
315 .cpu_user_features = COMMON_USER_POWER4 |
316 PPC_FEATURE_HAS_ALTIVEC_COMP,
317 .mmu_features = MMU_FTR_HPTE_TABLE,
318 .icache_bsize = 128,
319 .dcache_bsize = 128,
320 .num_pmcs = 8,
321 .pmc_type = PPC_PMC_IBM,
322 .cpu_setup = __setup_cpu_ppc970,
323 .oprofile_cpu_type = "ppc64/970",
324 .oprofile_type = PPC_OPROFILE_POWER4,
325 .machine_check = machine_check_generic,
326 .platform = "ppc970",
327 },
328 { /* Power5 GR */
329 .pvr_mask = 0xffff0000,
330 .pvr_value = 0x003a0000,
331 .cpu_name = "POWER5 (gr)",
332 .cpu_features = CPU_FTRS_POWER5,
333 .cpu_user_features = COMMON_USER_POWER5,
334 .mmu_features = MMU_FTR_HPTE_TABLE,
335 .icache_bsize = 128,
336 .dcache_bsize = 128,
337 .num_pmcs = 6,
338 .pmc_type = PPC_PMC_IBM,
339 .oprofile_cpu_type = "ppc64/power5",
340 .oprofile_type = PPC_OPROFILE_POWER4,
341 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
342 * and above but only works on POWER5 and above
343 */
344 .oprofile_mmcra_sihv = MMCRA_SIHV,
345 .oprofile_mmcra_sipr = MMCRA_SIPR,
346 .machine_check = machine_check_generic,
347 .platform = "power5",
348 },
349 { /* Power5++ */
350 .pvr_mask = 0xffffff00,
351 .pvr_value = 0x003b0300,
352 .cpu_name = "POWER5+ (gs)",
353 .cpu_features = CPU_FTRS_POWER5,
354 .cpu_user_features = COMMON_USER_POWER5_PLUS,
355 .mmu_features = MMU_FTR_HPTE_TABLE,
356 .icache_bsize = 128,
357 .dcache_bsize = 128,
358 .num_pmcs = 6,
359 .oprofile_cpu_type = "ppc64/power5++",
360 .oprofile_type = PPC_OPROFILE_POWER4,
361 .oprofile_mmcra_sihv = MMCRA_SIHV,
362 .oprofile_mmcra_sipr = MMCRA_SIPR,
363 .machine_check = machine_check_generic,
364 .platform = "power5+",
365 },
366 { /* Power5 GS */
367 .pvr_mask = 0xffff0000,
368 .pvr_value = 0x003b0000,
369 .cpu_name = "POWER5+ (gs)",
370 .cpu_features = CPU_FTRS_POWER5,
371 .cpu_user_features = COMMON_USER_POWER5_PLUS,
372 .mmu_features = MMU_FTR_HPTE_TABLE,
373 .icache_bsize = 128,
374 .dcache_bsize = 128,
375 .num_pmcs = 6,
376 .pmc_type = PPC_PMC_IBM,
377 .oprofile_cpu_type = "ppc64/power5+",
378 .oprofile_type = PPC_OPROFILE_POWER4,
379 .oprofile_mmcra_sihv = MMCRA_SIHV,
380 .oprofile_mmcra_sipr = MMCRA_SIPR,
381 .machine_check = machine_check_generic,
382 .platform = "power5+",
383 },
384 { /* POWER6 in P5+ mode; 2.04-compliant processor */
385 .pvr_mask = 0xffffffff,
386 .pvr_value = 0x0f000001,
387 .cpu_name = "POWER5+",
388 .cpu_features = CPU_FTRS_POWER5,
389 .cpu_user_features = COMMON_USER_POWER5_PLUS,
390 .mmu_features = MMU_FTR_HPTE_TABLE,
391 .icache_bsize = 128,
392 .dcache_bsize = 128,
393 .machine_check = machine_check_generic,
394 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
395 .oprofile_type = PPC_OPROFILE_POWER4,
396 .platform = "power5+",
397 },
398 { /* Power6 */
399 .pvr_mask = 0xffff0000,
400 .pvr_value = 0x003e0000,
401 .cpu_name = "POWER6 (raw)",
402 .cpu_features = CPU_FTRS_POWER6,
403 .cpu_user_features = COMMON_USER_POWER6 |
404 PPC_FEATURE_POWER6_EXT,
405 .mmu_features = MMU_FTR_HPTE_TABLE,
406 .icache_bsize = 128,
407 .dcache_bsize = 128,
408 .num_pmcs = 6,
409 .pmc_type = PPC_PMC_IBM,
410 .oprofile_cpu_type = "ppc64/power6",
411 .oprofile_type = PPC_OPROFILE_POWER4,
412 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
413 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
414 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
415 POWER6_MMCRA_OTHER,
416 .machine_check = machine_check_generic,
417 .platform = "power6x",
418 },
419 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
420 .pvr_mask = 0xffffffff,
421 .pvr_value = 0x0f000002,
422 .cpu_name = "POWER6 (architected)",
423 .cpu_features = CPU_FTRS_POWER6,
424 .cpu_user_features = COMMON_USER_POWER6,
425 .mmu_features = MMU_FTR_HPTE_TABLE,
426 .icache_bsize = 128,
427 .dcache_bsize = 128,
428 .machine_check = machine_check_generic,
429 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
430 .oprofile_type = PPC_OPROFILE_POWER4,
431 .platform = "power6",
432 },
433 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
434 .pvr_mask = 0xffffffff,
435 .pvr_value = 0x0f000003,
436 .cpu_name = "POWER7 (architected)",
437 .cpu_features = CPU_FTRS_POWER7,
438 .cpu_user_features = COMMON_USER_POWER7,
439 .mmu_features = MMU_FTR_HPTE_TABLE |
440 MMU_FTR_TLBIE_206,
441 .icache_bsize = 128,
442 .dcache_bsize = 128,
443 .machine_check = machine_check_generic,
444 .oprofile_type = PPC_OPROFILE_POWER4,
445 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
446 .platform = "power7",
447 },
448 { /* Power7 */
449 .pvr_mask = 0xffff0000,
450 .pvr_value = 0x003f0000,
451 .cpu_name = "POWER7 (raw)",
452 .cpu_features = CPU_FTRS_POWER7,
453 .cpu_user_features = COMMON_USER_POWER7,
454 .mmu_features = MMU_FTR_HPTE_TABLE |
455 MMU_FTR_TLBIE_206,
456 .icache_bsize = 128,
457 .dcache_bsize = 128,
458 .num_pmcs = 6,
459 .pmc_type = PPC_PMC_IBM,
460 .oprofile_cpu_type = "ppc64/power7",
461 .oprofile_type = PPC_OPROFILE_POWER4,
462 .platform = "power7",
463 },
464 { /* Power7+ */
465 .pvr_mask = 0xffff0000,
466 .pvr_value = 0x004A0000,
467 .cpu_name = "POWER7+ (raw)",
468 .cpu_features = CPU_FTRS_POWER7,
469 .cpu_user_features = COMMON_USER_POWER7,
470 .mmu_features = MMU_FTR_HPTE_TABLE |
471 MMU_FTR_TLBIE_206,
472 .icache_bsize = 128,
473 .dcache_bsize = 128,
474 .num_pmcs = 6,
475 .pmc_type = PPC_PMC_IBM,
476 .oprofile_cpu_type = "ppc64/power7",
477 .oprofile_type = PPC_OPROFILE_POWER4,
478 .platform = "power7+",
479 },
480 { /* Cell Broadband Engine */
481 .pvr_mask = 0xffff0000,
482 .pvr_value = 0x00700000,
483 .cpu_name = "Cell Broadband Engine",
484 .cpu_features = CPU_FTRS_CELL,
485 .cpu_user_features = COMMON_USER_PPC64 |
486 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
487 PPC_FEATURE_SMT,
488 .mmu_features = MMU_FTR_HPTE_TABLE,
489 .icache_bsize = 128,
490 .dcache_bsize = 128,
491 .num_pmcs = 4,
492 .pmc_type = PPC_PMC_IBM,
493 .oprofile_cpu_type = "ppc64/cell-be",
494 .oprofile_type = PPC_OPROFILE_CELL,
495 .machine_check = machine_check_generic,
496 .platform = "ppc-cell-be",
497 },
498 { /* PA Semi PA6T */
499 .pvr_mask = 0x7fff0000,
500 .pvr_value = 0x00900000,
501 .cpu_name = "PA6T",
502 .cpu_features = CPU_FTRS_PA6T,
503 .cpu_user_features = COMMON_USER_PA6T,
504 .mmu_features = MMU_FTR_HPTE_TABLE,
505 .icache_bsize = 64,
506 .dcache_bsize = 64,
507 .num_pmcs = 6,
508 .pmc_type = PPC_PMC_PA6T,
509 .cpu_setup = __setup_cpu_pa6t,
510 .cpu_restore = __restore_cpu_pa6t,
511 .oprofile_cpu_type = "ppc64/pa6t",
512 .oprofile_type = PPC_OPROFILE_PA6T,
513 .machine_check = machine_check_generic,
514 .platform = "pa6t",
515 },
516 { /* default match */
517 .pvr_mask = 0x00000000,
518 .pvr_value = 0x00000000,
519 .cpu_name = "POWER4 (compatible)",
520 .cpu_features = CPU_FTRS_COMPATIBLE,
521 .cpu_user_features = COMMON_USER_PPC64,
522 .mmu_features = MMU_FTR_HPTE_TABLE,
523 .icache_bsize = 128,
524 .dcache_bsize = 128,
525 .num_pmcs = 6,
526 .pmc_type = PPC_PMC_IBM,
527 .machine_check = machine_check_generic,
528 .platform = "power4",
529 }
530 #endif /* CONFIG_PPC_BOOK3S_64 */
531
532 #ifdef CONFIG_PPC32
533 #if CLASSIC_PPC
534 { /* 601 */
535 .pvr_mask = 0xffff0000,
536 .pvr_value = 0x00010000,
537 .cpu_name = "601",
538 .cpu_features = CPU_FTRS_PPC601,
539 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
540 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
541 .mmu_features = MMU_FTR_HPTE_TABLE,
542 .icache_bsize = 32,
543 .dcache_bsize = 32,
544 .machine_check = machine_check_generic,
545 .platform = "ppc601",
546 },
547 { /* 603 */
548 .pvr_mask = 0xffff0000,
549 .pvr_value = 0x00030000,
550 .cpu_name = "603",
551 .cpu_features = CPU_FTRS_603,
552 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
553 .mmu_features = 0,
554 .icache_bsize = 32,
555 .dcache_bsize = 32,
556 .cpu_setup = __setup_cpu_603,
557 .machine_check = machine_check_generic,
558 .platform = "ppc603",
559 },
560 { /* 603e */
561 .pvr_mask = 0xffff0000,
562 .pvr_value = 0x00060000,
563 .cpu_name = "603e",
564 .cpu_features = CPU_FTRS_603,
565 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
566 .mmu_features = 0,
567 .icache_bsize = 32,
568 .dcache_bsize = 32,
569 .cpu_setup = __setup_cpu_603,
570 .machine_check = machine_check_generic,
571 .platform = "ppc603",
572 },
573 { /* 603ev */
574 .pvr_mask = 0xffff0000,
575 .pvr_value = 0x00070000,
576 .cpu_name = "603ev",
577 .cpu_features = CPU_FTRS_603,
578 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
579 .mmu_features = 0,
580 .icache_bsize = 32,
581 .dcache_bsize = 32,
582 .cpu_setup = __setup_cpu_603,
583 .machine_check = machine_check_generic,
584 .platform = "ppc603",
585 },
586 { /* 604 */
587 .pvr_mask = 0xffff0000,
588 .pvr_value = 0x00040000,
589 .cpu_name = "604",
590 .cpu_features = CPU_FTRS_604,
591 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
592 .mmu_features = MMU_FTR_HPTE_TABLE,
593 .icache_bsize = 32,
594 .dcache_bsize = 32,
595 .num_pmcs = 2,
596 .cpu_setup = __setup_cpu_604,
597 .machine_check = machine_check_generic,
598 .platform = "ppc604",
599 },
600 { /* 604e */
601 .pvr_mask = 0xfffff000,
602 .pvr_value = 0x00090000,
603 .cpu_name = "604e",
604 .cpu_features = CPU_FTRS_604,
605 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
606 .mmu_features = MMU_FTR_HPTE_TABLE,
607 .icache_bsize = 32,
608 .dcache_bsize = 32,
609 .num_pmcs = 4,
610 .cpu_setup = __setup_cpu_604,
611 .machine_check = machine_check_generic,
612 .platform = "ppc604",
613 },
614 { /* 604r */
615 .pvr_mask = 0xffff0000,
616 .pvr_value = 0x00090000,
617 .cpu_name = "604r",
618 .cpu_features = CPU_FTRS_604,
619 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
620 .mmu_features = MMU_FTR_HPTE_TABLE,
621 .icache_bsize = 32,
622 .dcache_bsize = 32,
623 .num_pmcs = 4,
624 .cpu_setup = __setup_cpu_604,
625 .machine_check = machine_check_generic,
626 .platform = "ppc604",
627 },
628 { /* 604ev */
629 .pvr_mask = 0xffff0000,
630 .pvr_value = 0x000a0000,
631 .cpu_name = "604ev",
632 .cpu_features = CPU_FTRS_604,
633 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
634 .mmu_features = MMU_FTR_HPTE_TABLE,
635 .icache_bsize = 32,
636 .dcache_bsize = 32,
637 .num_pmcs = 4,
638 .cpu_setup = __setup_cpu_604,
639 .machine_check = machine_check_generic,
640 .platform = "ppc604",
641 },
642 { /* 740/750 (0x4202, don't support TAU ?) */
643 .pvr_mask = 0xffffffff,
644 .pvr_value = 0x00084202,
645 .cpu_name = "740/750",
646 .cpu_features = CPU_FTRS_740_NOTAU,
647 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
648 .mmu_features = MMU_FTR_HPTE_TABLE,
649 .icache_bsize = 32,
650 .dcache_bsize = 32,
651 .num_pmcs = 4,
652 .cpu_setup = __setup_cpu_750,
653 .machine_check = machine_check_generic,
654 .platform = "ppc750",
655 },
656 { /* 750CX (80100 and 8010x?) */
657 .pvr_mask = 0xfffffff0,
658 .pvr_value = 0x00080100,
659 .cpu_name = "750CX",
660 .cpu_features = CPU_FTRS_750,
661 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
662 .mmu_features = MMU_FTR_HPTE_TABLE,
663 .icache_bsize = 32,
664 .dcache_bsize = 32,
665 .num_pmcs = 4,
666 .cpu_setup = __setup_cpu_750cx,
667 .machine_check = machine_check_generic,
668 .platform = "ppc750",
669 },
670 { /* 750CX (82201 and 82202) */
671 .pvr_mask = 0xfffffff0,
672 .pvr_value = 0x00082200,
673 .cpu_name = "750CX",
674 .cpu_features = CPU_FTRS_750,
675 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
676 .mmu_features = MMU_FTR_HPTE_TABLE,
677 .icache_bsize = 32,
678 .dcache_bsize = 32,
679 .num_pmcs = 4,
680 .pmc_type = PPC_PMC_IBM,
681 .cpu_setup = __setup_cpu_750cx,
682 .machine_check = machine_check_generic,
683 .platform = "ppc750",
684 },
685 { /* 750CXe (82214) */
686 .pvr_mask = 0xfffffff0,
687 .pvr_value = 0x00082210,
688 .cpu_name = "750CXe",
689 .cpu_features = CPU_FTRS_750,
690 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
691 .mmu_features = MMU_FTR_HPTE_TABLE,
692 .icache_bsize = 32,
693 .dcache_bsize = 32,
694 .num_pmcs = 4,
695 .pmc_type = PPC_PMC_IBM,
696 .cpu_setup = __setup_cpu_750cx,
697 .machine_check = machine_check_generic,
698 .platform = "ppc750",
699 },
700 { /* 750CXe "Gekko" (83214) */
701 .pvr_mask = 0xffffffff,
702 .pvr_value = 0x00083214,
703 .cpu_name = "750CXe",
704 .cpu_features = CPU_FTRS_750,
705 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
706 .mmu_features = MMU_FTR_HPTE_TABLE,
707 .icache_bsize = 32,
708 .dcache_bsize = 32,
709 .num_pmcs = 4,
710 .pmc_type = PPC_PMC_IBM,
711 .cpu_setup = __setup_cpu_750cx,
712 .machine_check = machine_check_generic,
713 .platform = "ppc750",
714 },
715 { /* 750CL (and "Broadway") */
716 .pvr_mask = 0xfffff0e0,
717 .pvr_value = 0x00087000,
718 .cpu_name = "750CL",
719 .cpu_features = CPU_FTRS_750CL,
720 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
721 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
722 .icache_bsize = 32,
723 .dcache_bsize = 32,
724 .num_pmcs = 4,
725 .pmc_type = PPC_PMC_IBM,
726 .cpu_setup = __setup_cpu_750,
727 .machine_check = machine_check_generic,
728 .platform = "ppc750",
729 .oprofile_cpu_type = "ppc/750",
730 .oprofile_type = PPC_OPROFILE_G4,
731 },
732 { /* 745/755 */
733 .pvr_mask = 0xfffff000,
734 .pvr_value = 0x00083000,
735 .cpu_name = "745/755",
736 .cpu_features = CPU_FTRS_750,
737 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
738 .mmu_features = MMU_FTR_HPTE_TABLE,
739 .icache_bsize = 32,
740 .dcache_bsize = 32,
741 .num_pmcs = 4,
742 .pmc_type = PPC_PMC_IBM,
743 .cpu_setup = __setup_cpu_750,
744 .machine_check = machine_check_generic,
745 .platform = "ppc750",
746 },
747 { /* 750FX rev 1.x */
748 .pvr_mask = 0xffffff00,
749 .pvr_value = 0x70000100,
750 .cpu_name = "750FX",
751 .cpu_features = CPU_FTRS_750FX1,
752 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
753 .mmu_features = MMU_FTR_HPTE_TABLE,
754 .icache_bsize = 32,
755 .dcache_bsize = 32,
756 .num_pmcs = 4,
757 .pmc_type = PPC_PMC_IBM,
758 .cpu_setup = __setup_cpu_750,
759 .machine_check = machine_check_generic,
760 .platform = "ppc750",
761 .oprofile_cpu_type = "ppc/750",
762 .oprofile_type = PPC_OPROFILE_G4,
763 },
764 { /* 750FX rev 2.0 must disable HID0[DPM] */
765 .pvr_mask = 0xffffffff,
766 .pvr_value = 0x70000200,
767 .cpu_name = "750FX",
768 .cpu_features = CPU_FTRS_750FX2,
769 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
770 .mmu_features = MMU_FTR_HPTE_TABLE,
771 .icache_bsize = 32,
772 .dcache_bsize = 32,
773 .num_pmcs = 4,
774 .pmc_type = PPC_PMC_IBM,
775 .cpu_setup = __setup_cpu_750,
776 .machine_check = machine_check_generic,
777 .platform = "ppc750",
778 .oprofile_cpu_type = "ppc/750",
779 .oprofile_type = PPC_OPROFILE_G4,
780 },
781 { /* 750FX (All revs except 2.0) */
782 .pvr_mask = 0xffff0000,
783 .pvr_value = 0x70000000,
784 .cpu_name = "750FX",
785 .cpu_features = CPU_FTRS_750FX,
786 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
787 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
788 .icache_bsize = 32,
789 .dcache_bsize = 32,
790 .num_pmcs = 4,
791 .pmc_type = PPC_PMC_IBM,
792 .cpu_setup = __setup_cpu_750fx,
793 .machine_check = machine_check_generic,
794 .platform = "ppc750",
795 .oprofile_cpu_type = "ppc/750",
796 .oprofile_type = PPC_OPROFILE_G4,
797 },
798 { /* 750GX */
799 .pvr_mask = 0xffff0000,
800 .pvr_value = 0x70020000,
801 .cpu_name = "750GX",
802 .cpu_features = CPU_FTRS_750GX,
803 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
804 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
805 .icache_bsize = 32,
806 .dcache_bsize = 32,
807 .num_pmcs = 4,
808 .pmc_type = PPC_PMC_IBM,
809 .cpu_setup = __setup_cpu_750fx,
810 .machine_check = machine_check_generic,
811 .platform = "ppc750",
812 .oprofile_cpu_type = "ppc/750",
813 .oprofile_type = PPC_OPROFILE_G4,
814 },
815 { /* 740/750 (L2CR bit need fixup for 740) */
816 .pvr_mask = 0xffff0000,
817 .pvr_value = 0x00080000,
818 .cpu_name = "740/750",
819 .cpu_features = CPU_FTRS_740,
820 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
821 .mmu_features = MMU_FTR_HPTE_TABLE,
822 .icache_bsize = 32,
823 .dcache_bsize = 32,
824 .num_pmcs = 4,
825 .pmc_type = PPC_PMC_IBM,
826 .cpu_setup = __setup_cpu_750,
827 .machine_check = machine_check_generic,
828 .platform = "ppc750",
829 },
830 { /* 7400 rev 1.1 ? (no TAU) */
831 .pvr_mask = 0xffffffff,
832 .pvr_value = 0x000c1101,
833 .cpu_name = "7400 (1.1)",
834 .cpu_features = CPU_FTRS_7400_NOTAU,
835 .cpu_user_features = COMMON_USER |
836 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
837 .mmu_features = MMU_FTR_HPTE_TABLE,
838 .icache_bsize = 32,
839 .dcache_bsize = 32,
840 .num_pmcs = 4,
841 .pmc_type = PPC_PMC_G4,
842 .cpu_setup = __setup_cpu_7400,
843 .machine_check = machine_check_generic,
844 .platform = "ppc7400",
845 },
846 { /* 7400 */
847 .pvr_mask = 0xffff0000,
848 .pvr_value = 0x000c0000,
849 .cpu_name = "7400",
850 .cpu_features = CPU_FTRS_7400,
851 .cpu_user_features = COMMON_USER |
852 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
853 .mmu_features = MMU_FTR_HPTE_TABLE,
854 .icache_bsize = 32,
855 .dcache_bsize = 32,
856 .num_pmcs = 4,
857 .pmc_type = PPC_PMC_G4,
858 .cpu_setup = __setup_cpu_7400,
859 .machine_check = machine_check_generic,
860 .platform = "ppc7400",
861 },
862 { /* 7410 */
863 .pvr_mask = 0xffff0000,
864 .pvr_value = 0x800c0000,
865 .cpu_name = "7410",
866 .cpu_features = CPU_FTRS_7400,
867 .cpu_user_features = COMMON_USER |
868 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
869 .mmu_features = MMU_FTR_HPTE_TABLE,
870 .icache_bsize = 32,
871 .dcache_bsize = 32,
872 .num_pmcs = 4,
873 .pmc_type = PPC_PMC_G4,
874 .cpu_setup = __setup_cpu_7410,
875 .machine_check = machine_check_generic,
876 .platform = "ppc7400",
877 },
878 { /* 7450 2.0 - no doze/nap */
879 .pvr_mask = 0xffffffff,
880 .pvr_value = 0x80000200,
881 .cpu_name = "7450",
882 .cpu_features = CPU_FTRS_7450_20,
883 .cpu_user_features = COMMON_USER |
884 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
885 .mmu_features = MMU_FTR_HPTE_TABLE,
886 .icache_bsize = 32,
887 .dcache_bsize = 32,
888 .num_pmcs = 6,
889 .pmc_type = PPC_PMC_G4,
890 .cpu_setup = __setup_cpu_745x,
891 .oprofile_cpu_type = "ppc/7450",
892 .oprofile_type = PPC_OPROFILE_G4,
893 .machine_check = machine_check_generic,
894 .platform = "ppc7450",
895 },
896 { /* 7450 2.1 */
897 .pvr_mask = 0xffffffff,
898 .pvr_value = 0x80000201,
899 .cpu_name = "7450",
900 .cpu_features = CPU_FTRS_7450_21,
901 .cpu_user_features = COMMON_USER |
902 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
903 .mmu_features = MMU_FTR_HPTE_TABLE,
904 .icache_bsize = 32,
905 .dcache_bsize = 32,
906 .num_pmcs = 6,
907 .pmc_type = PPC_PMC_G4,
908 .cpu_setup = __setup_cpu_745x,
909 .oprofile_cpu_type = "ppc/7450",
910 .oprofile_type = PPC_OPROFILE_G4,
911 .machine_check = machine_check_generic,
912 .platform = "ppc7450",
913 },
914 { /* 7450 2.3 and newer */
915 .pvr_mask = 0xffff0000,
916 .pvr_value = 0x80000000,
917 .cpu_name = "7450",
918 .cpu_features = CPU_FTRS_7450_23,
919 .cpu_user_features = COMMON_USER |
920 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
921 .mmu_features = MMU_FTR_HPTE_TABLE,
922 .icache_bsize = 32,
923 .dcache_bsize = 32,
924 .num_pmcs = 6,
925 .pmc_type = PPC_PMC_G4,
926 .cpu_setup = __setup_cpu_745x,
927 .oprofile_cpu_type = "ppc/7450",
928 .oprofile_type = PPC_OPROFILE_G4,
929 .machine_check = machine_check_generic,
930 .platform = "ppc7450",
931 },
932 { /* 7455 rev 1.x */
933 .pvr_mask = 0xffffff00,
934 .pvr_value = 0x80010100,
935 .cpu_name = "7455",
936 .cpu_features = CPU_FTRS_7455_1,
937 .cpu_user_features = COMMON_USER |
938 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
939 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
940 .icache_bsize = 32,
941 .dcache_bsize = 32,
942 .num_pmcs = 6,
943 .pmc_type = PPC_PMC_G4,
944 .cpu_setup = __setup_cpu_745x,
945 .oprofile_cpu_type = "ppc/7450",
946 .oprofile_type = PPC_OPROFILE_G4,
947 .machine_check = machine_check_generic,
948 .platform = "ppc7450",
949 },
950 { /* 7455 rev 2.0 */
951 .pvr_mask = 0xffffffff,
952 .pvr_value = 0x80010200,
953 .cpu_name = "7455",
954 .cpu_features = CPU_FTRS_7455_20,
955 .cpu_user_features = COMMON_USER |
956 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
957 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
958 .icache_bsize = 32,
959 .dcache_bsize = 32,
960 .num_pmcs = 6,
961 .pmc_type = PPC_PMC_G4,
962 .cpu_setup = __setup_cpu_745x,
963 .oprofile_cpu_type = "ppc/7450",
964 .oprofile_type = PPC_OPROFILE_G4,
965 .machine_check = machine_check_generic,
966 .platform = "ppc7450",
967 },
968 { /* 7455 others */
969 .pvr_mask = 0xffff0000,
970 .pvr_value = 0x80010000,
971 .cpu_name = "7455",
972 .cpu_features = CPU_FTRS_7455,
973 .cpu_user_features = COMMON_USER |
974 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
975 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
976 .icache_bsize = 32,
977 .dcache_bsize = 32,
978 .num_pmcs = 6,
979 .pmc_type = PPC_PMC_G4,
980 .cpu_setup = __setup_cpu_745x,
981 .oprofile_cpu_type = "ppc/7450",
982 .oprofile_type = PPC_OPROFILE_G4,
983 .machine_check = machine_check_generic,
984 .platform = "ppc7450",
985 },
986 { /* 7447/7457 Rev 1.0 */
987 .pvr_mask = 0xffffffff,
988 .pvr_value = 0x80020100,
989 .cpu_name = "7447/7457",
990 .cpu_features = CPU_FTRS_7447_10,
991 .cpu_user_features = COMMON_USER |
992 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
993 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
994 .icache_bsize = 32,
995 .dcache_bsize = 32,
996 .num_pmcs = 6,
997 .pmc_type = PPC_PMC_G4,
998 .cpu_setup = __setup_cpu_745x,
999 .oprofile_cpu_type = "ppc/7450",
1000 .oprofile_type = PPC_OPROFILE_G4,
1001 .machine_check = machine_check_generic,
1002 .platform = "ppc7450",
1003 },
1004 { /* 7447/7457 Rev 1.1 */
1005 .pvr_mask = 0xffffffff,
1006 .pvr_value = 0x80020101,
1007 .cpu_name = "7447/7457",
1008 .cpu_features = CPU_FTRS_7447_10,
1009 .cpu_user_features = COMMON_USER |
1010 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1011 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1012 .icache_bsize = 32,
1013 .dcache_bsize = 32,
1014 .num_pmcs = 6,
1015 .pmc_type = PPC_PMC_G4,
1016 .cpu_setup = __setup_cpu_745x,
1017 .oprofile_cpu_type = "ppc/7450",
1018 .oprofile_type = PPC_OPROFILE_G4,
1019 .machine_check = machine_check_generic,
1020 .platform = "ppc7450",
1021 },
1022 { /* 7447/7457 Rev 1.2 and later */
1023 .pvr_mask = 0xffff0000,
1024 .pvr_value = 0x80020000,
1025 .cpu_name = "7447/7457",
1026 .cpu_features = CPU_FTRS_7447,
1027 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1028 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1029 .icache_bsize = 32,
1030 .dcache_bsize = 32,
1031 .num_pmcs = 6,
1032 .pmc_type = PPC_PMC_G4,
1033 .cpu_setup = __setup_cpu_745x,
1034 .oprofile_cpu_type = "ppc/7450",
1035 .oprofile_type = PPC_OPROFILE_G4,
1036 .machine_check = machine_check_generic,
1037 .platform = "ppc7450",
1038 },
1039 { /* 7447A */
1040 .pvr_mask = 0xffff0000,
1041 .pvr_value = 0x80030000,
1042 .cpu_name = "7447A",
1043 .cpu_features = CPU_FTRS_7447A,
1044 .cpu_user_features = COMMON_USER |
1045 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1046 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1047 .icache_bsize = 32,
1048 .dcache_bsize = 32,
1049 .num_pmcs = 6,
1050 .pmc_type = PPC_PMC_G4,
1051 .cpu_setup = __setup_cpu_745x,
1052 .oprofile_cpu_type = "ppc/7450",
1053 .oprofile_type = PPC_OPROFILE_G4,
1054 .machine_check = machine_check_generic,
1055 .platform = "ppc7450",
1056 },
1057 { /* 7448 */
1058 .pvr_mask = 0xffff0000,
1059 .pvr_value = 0x80040000,
1060 .cpu_name = "7448",
1061 .cpu_features = CPU_FTRS_7448,
1062 .cpu_user_features = COMMON_USER |
1063 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1064 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1065 .icache_bsize = 32,
1066 .dcache_bsize = 32,
1067 .num_pmcs = 6,
1068 .pmc_type = PPC_PMC_G4,
1069 .cpu_setup = __setup_cpu_745x,
1070 .oprofile_cpu_type = "ppc/7450",
1071 .oprofile_type = PPC_OPROFILE_G4,
1072 .machine_check = machine_check_generic,
1073 .platform = "ppc7450",
1074 },
1075 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1076 .pvr_mask = 0x7fff0000,
1077 .pvr_value = 0x00810000,
1078 .cpu_name = "82xx",
1079 .cpu_features = CPU_FTRS_82XX,
1080 .cpu_user_features = COMMON_USER,
1081 .mmu_features = 0,
1082 .icache_bsize = 32,
1083 .dcache_bsize = 32,
1084 .cpu_setup = __setup_cpu_603,
1085 .machine_check = machine_check_generic,
1086 .platform = "ppc603",
1087 },
1088 { /* All G2_LE (603e core, plus some) have the same pvr */
1089 .pvr_mask = 0x7fff0000,
1090 .pvr_value = 0x00820000,
1091 .cpu_name = "G2_LE",
1092 .cpu_features = CPU_FTRS_G2_LE,
1093 .cpu_user_features = COMMON_USER,
1094 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1095 .icache_bsize = 32,
1096 .dcache_bsize = 32,
1097 .cpu_setup = __setup_cpu_603,
1098 .machine_check = machine_check_generic,
1099 .platform = "ppc603",
1100 },
1101 { /* e300c1 (a 603e core, plus some) on 83xx */
1102 .pvr_mask = 0x7fff0000,
1103 .pvr_value = 0x00830000,
1104 .cpu_name = "e300c1",
1105 .cpu_features = CPU_FTRS_E300,
1106 .cpu_user_features = COMMON_USER,
1107 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1108 .icache_bsize = 32,
1109 .dcache_bsize = 32,
1110 .cpu_setup = __setup_cpu_603,
1111 .machine_check = machine_check_generic,
1112 .platform = "ppc603",
1113 },
1114 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1115 .pvr_mask = 0x7fff0000,
1116 .pvr_value = 0x00840000,
1117 .cpu_name = "e300c2",
1118 .cpu_features = CPU_FTRS_E300C2,
1119 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1120 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1121 MMU_FTR_NEED_DTLB_SW_LRU,
1122 .icache_bsize = 32,
1123 .dcache_bsize = 32,
1124 .cpu_setup = __setup_cpu_603,
1125 .machine_check = machine_check_generic,
1126 .platform = "ppc603",
1127 },
1128 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1129 .pvr_mask = 0x7fff0000,
1130 .pvr_value = 0x00850000,
1131 .cpu_name = "e300c3",
1132 .cpu_features = CPU_FTRS_E300,
1133 .cpu_user_features = COMMON_USER,
1134 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1135 MMU_FTR_NEED_DTLB_SW_LRU,
1136 .icache_bsize = 32,
1137 .dcache_bsize = 32,
1138 .cpu_setup = __setup_cpu_603,
1139 .num_pmcs = 4,
1140 .oprofile_cpu_type = "ppc/e300",
1141 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1142 .platform = "ppc603",
1143 },
1144 { /* e300c4 (e300c1, plus one IU) */
1145 .pvr_mask = 0x7fff0000,
1146 .pvr_value = 0x00860000,
1147 .cpu_name = "e300c4",
1148 .cpu_features = CPU_FTRS_E300,
1149 .cpu_user_features = COMMON_USER,
1150 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1151 MMU_FTR_NEED_DTLB_SW_LRU,
1152 .icache_bsize = 32,
1153 .dcache_bsize = 32,
1154 .cpu_setup = __setup_cpu_603,
1155 .machine_check = machine_check_generic,
1156 .num_pmcs = 4,
1157 .oprofile_cpu_type = "ppc/e300",
1158 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1159 .platform = "ppc603",
1160 },
1161 { /* default match, we assume split I/D cache & TB (non-601)... */
1162 .pvr_mask = 0x00000000,
1163 .pvr_value = 0x00000000,
1164 .cpu_name = "(generic PPC)",
1165 .cpu_features = CPU_FTRS_CLASSIC32,
1166 .cpu_user_features = COMMON_USER,
1167 .mmu_features = MMU_FTR_HPTE_TABLE,
1168 .icache_bsize = 32,
1169 .dcache_bsize = 32,
1170 .machine_check = machine_check_generic,
1171 .platform = "ppc603",
1172 },
1173 #endif /* CLASSIC_PPC */
1174 #ifdef CONFIG_8xx
1175 { /* 8xx */
1176 .pvr_mask = 0xffff0000,
1177 .pvr_value = 0x00500000,
1178 .cpu_name = "8xx",
1179 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1180 * if the 8xx code is there.... */
1181 .cpu_features = CPU_FTRS_8XX,
1182 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1183 .mmu_features = MMU_FTR_TYPE_8xx,
1184 .icache_bsize = 16,
1185 .dcache_bsize = 16,
1186 .platform = "ppc823",
1187 },
1188 #endif /* CONFIG_8xx */
1189 #ifdef CONFIG_40x
1190 { /* 403GC */
1191 .pvr_mask = 0xffffff00,
1192 .pvr_value = 0x00200200,
1193 .cpu_name = "403GC",
1194 .cpu_features = CPU_FTRS_40X,
1195 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1196 .mmu_features = MMU_FTR_TYPE_40x,
1197 .icache_bsize = 16,
1198 .dcache_bsize = 16,
1199 .machine_check = machine_check_4xx,
1200 .platform = "ppc403",
1201 },
1202 { /* 403GCX */
1203 .pvr_mask = 0xffffff00,
1204 .pvr_value = 0x00201400,
1205 .cpu_name = "403GCX",
1206 .cpu_features = CPU_FTRS_40X,
1207 .cpu_user_features = PPC_FEATURE_32 |
1208 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1209 .mmu_features = MMU_FTR_TYPE_40x,
1210 .icache_bsize = 16,
1211 .dcache_bsize = 16,
1212 .machine_check = machine_check_4xx,
1213 .platform = "ppc403",
1214 },
1215 { /* 403G ?? */
1216 .pvr_mask = 0xffff0000,
1217 .pvr_value = 0x00200000,
1218 .cpu_name = "403G ??",
1219 .cpu_features = CPU_FTRS_40X,
1220 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1221 .mmu_features = MMU_FTR_TYPE_40x,
1222 .icache_bsize = 16,
1223 .dcache_bsize = 16,
1224 .machine_check = machine_check_4xx,
1225 .platform = "ppc403",
1226 },
1227 { /* 405GP */
1228 .pvr_mask = 0xffff0000,
1229 .pvr_value = 0x40110000,
1230 .cpu_name = "405GP",
1231 .cpu_features = CPU_FTRS_40X,
1232 .cpu_user_features = PPC_FEATURE_32 |
1233 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1234 .mmu_features = MMU_FTR_TYPE_40x,
1235 .icache_bsize = 32,
1236 .dcache_bsize = 32,
1237 .machine_check = machine_check_4xx,
1238 .platform = "ppc405",
1239 },
1240 { /* STB 03xxx */
1241 .pvr_mask = 0xffff0000,
1242 .pvr_value = 0x40130000,
1243 .cpu_name = "STB03xxx",
1244 .cpu_features = CPU_FTRS_40X,
1245 .cpu_user_features = PPC_FEATURE_32 |
1246 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1247 .mmu_features = MMU_FTR_TYPE_40x,
1248 .icache_bsize = 32,
1249 .dcache_bsize = 32,
1250 .machine_check = machine_check_4xx,
1251 .platform = "ppc405",
1252 },
1253 { /* STB 04xxx */
1254 .pvr_mask = 0xffff0000,
1255 .pvr_value = 0x41810000,
1256 .cpu_name = "STB04xxx",
1257 .cpu_features = CPU_FTRS_40X,
1258 .cpu_user_features = PPC_FEATURE_32 |
1259 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1260 .mmu_features = MMU_FTR_TYPE_40x,
1261 .icache_bsize = 32,
1262 .dcache_bsize = 32,
1263 .machine_check = machine_check_4xx,
1264 .platform = "ppc405",
1265 },
1266 { /* NP405L */
1267 .pvr_mask = 0xffff0000,
1268 .pvr_value = 0x41610000,
1269 .cpu_name = "NP405L",
1270 .cpu_features = CPU_FTRS_40X,
1271 .cpu_user_features = PPC_FEATURE_32 |
1272 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1273 .mmu_features = MMU_FTR_TYPE_40x,
1274 .icache_bsize = 32,
1275 .dcache_bsize = 32,
1276 .machine_check = machine_check_4xx,
1277 .platform = "ppc405",
1278 },
1279 { /* NP4GS3 */
1280 .pvr_mask = 0xffff0000,
1281 .pvr_value = 0x40B10000,
1282 .cpu_name = "NP4GS3",
1283 .cpu_features = CPU_FTRS_40X,
1284 .cpu_user_features = PPC_FEATURE_32 |
1285 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1286 .mmu_features = MMU_FTR_TYPE_40x,
1287 .icache_bsize = 32,
1288 .dcache_bsize = 32,
1289 .machine_check = machine_check_4xx,
1290 .platform = "ppc405",
1291 },
1292 { /* NP405H */
1293 .pvr_mask = 0xffff0000,
1294 .pvr_value = 0x41410000,
1295 .cpu_name = "NP405H",
1296 .cpu_features = CPU_FTRS_40X,
1297 .cpu_user_features = PPC_FEATURE_32 |
1298 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1299 .mmu_features = MMU_FTR_TYPE_40x,
1300 .icache_bsize = 32,
1301 .dcache_bsize = 32,
1302 .machine_check = machine_check_4xx,
1303 .platform = "ppc405",
1304 },
1305 { /* 405GPr */
1306 .pvr_mask = 0xffff0000,
1307 .pvr_value = 0x50910000,
1308 .cpu_name = "405GPr",
1309 .cpu_features = CPU_FTRS_40X,
1310 .cpu_user_features = PPC_FEATURE_32 |
1311 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1312 .mmu_features = MMU_FTR_TYPE_40x,
1313 .icache_bsize = 32,
1314 .dcache_bsize = 32,
1315 .machine_check = machine_check_4xx,
1316 .platform = "ppc405",
1317 },
1318 { /* STBx25xx */
1319 .pvr_mask = 0xffff0000,
1320 .pvr_value = 0x51510000,
1321 .cpu_name = "STBx25xx",
1322 .cpu_features = CPU_FTRS_40X,
1323 .cpu_user_features = PPC_FEATURE_32 |
1324 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1325 .mmu_features = MMU_FTR_TYPE_40x,
1326 .icache_bsize = 32,
1327 .dcache_bsize = 32,
1328 .machine_check = machine_check_4xx,
1329 .platform = "ppc405",
1330 },
1331 { /* 405LP */
1332 .pvr_mask = 0xffff0000,
1333 .pvr_value = 0x41F10000,
1334 .cpu_name = "405LP",
1335 .cpu_features = CPU_FTRS_40X,
1336 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1337 .mmu_features = MMU_FTR_TYPE_40x,
1338 .icache_bsize = 32,
1339 .dcache_bsize = 32,
1340 .machine_check = machine_check_4xx,
1341 .platform = "ppc405",
1342 },
1343 { /* Xilinx Virtex-II Pro */
1344 .pvr_mask = 0xfffff000,
1345 .pvr_value = 0x20010000,
1346 .cpu_name = "Virtex-II Pro",
1347 .cpu_features = CPU_FTRS_40X,
1348 .cpu_user_features = PPC_FEATURE_32 |
1349 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1350 .mmu_features = MMU_FTR_TYPE_40x,
1351 .icache_bsize = 32,
1352 .dcache_bsize = 32,
1353 .machine_check = machine_check_4xx,
1354 .platform = "ppc405",
1355 },
1356 { /* Xilinx Virtex-4 FX */
1357 .pvr_mask = 0xfffff000,
1358 .pvr_value = 0x20011000,
1359 .cpu_name = "Virtex-4 FX",
1360 .cpu_features = CPU_FTRS_40X,
1361 .cpu_user_features = PPC_FEATURE_32 |
1362 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1363 .mmu_features = MMU_FTR_TYPE_40x,
1364 .icache_bsize = 32,
1365 .dcache_bsize = 32,
1366 .machine_check = machine_check_4xx,
1367 .platform = "ppc405",
1368 },
1369 { /* 405EP */
1370 .pvr_mask = 0xffff0000,
1371 .pvr_value = 0x51210000,
1372 .cpu_name = "405EP",
1373 .cpu_features = CPU_FTRS_40X,
1374 .cpu_user_features = PPC_FEATURE_32 |
1375 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1376 .mmu_features = MMU_FTR_TYPE_40x,
1377 .icache_bsize = 32,
1378 .dcache_bsize = 32,
1379 .machine_check = machine_check_4xx,
1380 .platform = "ppc405",
1381 },
1382 { /* 405EX Rev. A/B with Security */
1383 .pvr_mask = 0xffff000f,
1384 .pvr_value = 0x12910007,
1385 .cpu_name = "405EX Rev. A/B",
1386 .cpu_features = CPU_FTRS_40X,
1387 .cpu_user_features = PPC_FEATURE_32 |
1388 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1389 .mmu_features = MMU_FTR_TYPE_40x,
1390 .icache_bsize = 32,
1391 .dcache_bsize = 32,
1392 .machine_check = machine_check_4xx,
1393 .platform = "ppc405",
1394 },
1395 { /* 405EX Rev. C without Security */
1396 .pvr_mask = 0xffff000f,
1397 .pvr_value = 0x1291000d,
1398 .cpu_name = "405EX Rev. C",
1399 .cpu_features = CPU_FTRS_40X,
1400 .cpu_user_features = PPC_FEATURE_32 |
1401 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1402 .mmu_features = MMU_FTR_TYPE_40x,
1403 .icache_bsize = 32,
1404 .dcache_bsize = 32,
1405 .machine_check = machine_check_4xx,
1406 .platform = "ppc405",
1407 },
1408 { /* 405EX Rev. C with Security */
1409 .pvr_mask = 0xffff000f,
1410 .pvr_value = 0x1291000f,
1411 .cpu_name = "405EX Rev. C",
1412 .cpu_features = CPU_FTRS_40X,
1413 .cpu_user_features = PPC_FEATURE_32 |
1414 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1415 .mmu_features = MMU_FTR_TYPE_40x,
1416 .icache_bsize = 32,
1417 .dcache_bsize = 32,
1418 .machine_check = machine_check_4xx,
1419 .platform = "ppc405",
1420 },
1421 { /* 405EX Rev. D without Security */
1422 .pvr_mask = 0xffff000f,
1423 .pvr_value = 0x12910003,
1424 .cpu_name = "405EX Rev. D",
1425 .cpu_features = CPU_FTRS_40X,
1426 .cpu_user_features = PPC_FEATURE_32 |
1427 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1428 .mmu_features = MMU_FTR_TYPE_40x,
1429 .icache_bsize = 32,
1430 .dcache_bsize = 32,
1431 .machine_check = machine_check_4xx,
1432 .platform = "ppc405",
1433 },
1434 { /* 405EX Rev. D with Security */
1435 .pvr_mask = 0xffff000f,
1436 .pvr_value = 0x12910005,
1437 .cpu_name = "405EX Rev. D",
1438 .cpu_features = CPU_FTRS_40X,
1439 .cpu_user_features = PPC_FEATURE_32 |
1440 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1441 .mmu_features = MMU_FTR_TYPE_40x,
1442 .icache_bsize = 32,
1443 .dcache_bsize = 32,
1444 .machine_check = machine_check_4xx,
1445 .platform = "ppc405",
1446 },
1447 { /* 405EXr Rev. A/B without Security */
1448 .pvr_mask = 0xffff000f,
1449 .pvr_value = 0x12910001,
1450 .cpu_name = "405EXr Rev. A/B",
1451 .cpu_features = CPU_FTRS_40X,
1452 .cpu_user_features = PPC_FEATURE_32 |
1453 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1454 .mmu_features = MMU_FTR_TYPE_40x,
1455 .icache_bsize = 32,
1456 .dcache_bsize = 32,
1457 .machine_check = machine_check_4xx,
1458 .platform = "ppc405",
1459 },
1460 { /* 405EXr Rev. C without Security */
1461 .pvr_mask = 0xffff000f,
1462 .pvr_value = 0x12910009,
1463 .cpu_name = "405EXr Rev. C",
1464 .cpu_features = CPU_FTRS_40X,
1465 .cpu_user_features = PPC_FEATURE_32 |
1466 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1467 .mmu_features = MMU_FTR_TYPE_40x,
1468 .icache_bsize = 32,
1469 .dcache_bsize = 32,
1470 .machine_check = machine_check_4xx,
1471 .platform = "ppc405",
1472 },
1473 { /* 405EXr Rev. C with Security */
1474 .pvr_mask = 0xffff000f,
1475 .pvr_value = 0x1291000b,
1476 .cpu_name = "405EXr Rev. C",
1477 .cpu_features = CPU_FTRS_40X,
1478 .cpu_user_features = PPC_FEATURE_32 |
1479 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1480 .mmu_features = MMU_FTR_TYPE_40x,
1481 .icache_bsize = 32,
1482 .dcache_bsize = 32,
1483 .machine_check = machine_check_4xx,
1484 .platform = "ppc405",
1485 },
1486 { /* 405EXr Rev. D without Security */
1487 .pvr_mask = 0xffff000f,
1488 .pvr_value = 0x12910000,
1489 .cpu_name = "405EXr Rev. D",
1490 .cpu_features = CPU_FTRS_40X,
1491 .cpu_user_features = PPC_FEATURE_32 |
1492 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1493 .mmu_features = MMU_FTR_TYPE_40x,
1494 .icache_bsize = 32,
1495 .dcache_bsize = 32,
1496 .machine_check = machine_check_4xx,
1497 .platform = "ppc405",
1498 },
1499 { /* 405EXr Rev. D with Security */
1500 .pvr_mask = 0xffff000f,
1501 .pvr_value = 0x12910002,
1502 .cpu_name = "405EXr Rev. D",
1503 .cpu_features = CPU_FTRS_40X,
1504 .cpu_user_features = PPC_FEATURE_32 |
1505 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1506 .mmu_features = MMU_FTR_TYPE_40x,
1507 .icache_bsize = 32,
1508 .dcache_bsize = 32,
1509 .machine_check = machine_check_4xx,
1510 .platform = "ppc405",
1511 },
1512 {
1513 /* 405EZ */
1514 .pvr_mask = 0xffff0000,
1515 .pvr_value = 0x41510000,
1516 .cpu_name = "405EZ",
1517 .cpu_features = CPU_FTRS_40X,
1518 .cpu_user_features = PPC_FEATURE_32 |
1519 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1520 .mmu_features = MMU_FTR_TYPE_40x,
1521 .icache_bsize = 32,
1522 .dcache_bsize = 32,
1523 .machine_check = machine_check_4xx,
1524 .platform = "ppc405",
1525 },
1526 { /* default match */
1527 .pvr_mask = 0x00000000,
1528 .pvr_value = 0x00000000,
1529 .cpu_name = "(generic 40x PPC)",
1530 .cpu_features = CPU_FTRS_40X,
1531 .cpu_user_features = PPC_FEATURE_32 |
1532 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1533 .mmu_features = MMU_FTR_TYPE_40x,
1534 .icache_bsize = 32,
1535 .dcache_bsize = 32,
1536 .machine_check = machine_check_4xx,
1537 .platform = "ppc405",
1538 }
1539
1540 #endif /* CONFIG_40x */
1541 #ifdef CONFIG_44x
1542 {
1543 .pvr_mask = 0xf0000fff,
1544 .pvr_value = 0x40000850,
1545 .cpu_name = "440GR Rev. A",
1546 .cpu_features = CPU_FTRS_44X,
1547 .cpu_user_features = COMMON_USER_BOOKE,
1548 .mmu_features = MMU_FTR_TYPE_44x,
1549 .icache_bsize = 32,
1550 .dcache_bsize = 32,
1551 .machine_check = machine_check_4xx,
1552 .platform = "ppc440",
1553 },
1554 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1555 .pvr_mask = 0xf0000fff,
1556 .pvr_value = 0x40000858,
1557 .cpu_name = "440EP Rev. A",
1558 .cpu_features = CPU_FTRS_44X,
1559 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1560 .mmu_features = MMU_FTR_TYPE_44x,
1561 .icache_bsize = 32,
1562 .dcache_bsize = 32,
1563 .cpu_setup = __setup_cpu_440ep,
1564 .machine_check = machine_check_4xx,
1565 .platform = "ppc440",
1566 },
1567 {
1568 .pvr_mask = 0xf0000fff,
1569 .pvr_value = 0x400008d3,
1570 .cpu_name = "440GR Rev. B",
1571 .cpu_features = CPU_FTRS_44X,
1572 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1573 .mmu_features = MMU_FTR_TYPE_44x,
1574 .icache_bsize = 32,
1575 .dcache_bsize = 32,
1576 .machine_check = machine_check_4xx,
1577 .platform = "ppc440",
1578 },
1579 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1580 .pvr_mask = 0xf0000ff7,
1581 .pvr_value = 0x400008d4,
1582 .cpu_name = "440EP Rev. C",
1583 .cpu_features = CPU_FTRS_44X,
1584 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1585 .mmu_features = MMU_FTR_TYPE_44x,
1586 .icache_bsize = 32,
1587 .dcache_bsize = 32,
1588 .cpu_setup = __setup_cpu_440ep,
1589 .machine_check = machine_check_4xx,
1590 .platform = "ppc440",
1591 },
1592 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1593 .pvr_mask = 0xf0000fff,
1594 .pvr_value = 0x400008db,
1595 .cpu_name = "440EP Rev. B",
1596 .cpu_features = CPU_FTRS_44X,
1597 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1598 .mmu_features = MMU_FTR_TYPE_44x,
1599 .icache_bsize = 32,
1600 .dcache_bsize = 32,
1601 .cpu_setup = __setup_cpu_440ep,
1602 .machine_check = machine_check_4xx,
1603 .platform = "ppc440",
1604 },
1605 { /* 440GRX */
1606 .pvr_mask = 0xf0000ffb,
1607 .pvr_value = 0x200008D0,
1608 .cpu_name = "440GRX",
1609 .cpu_features = CPU_FTRS_44X,
1610 .cpu_user_features = COMMON_USER_BOOKE,
1611 .mmu_features = MMU_FTR_TYPE_44x,
1612 .icache_bsize = 32,
1613 .dcache_bsize = 32,
1614 .cpu_setup = __setup_cpu_440grx,
1615 .machine_check = machine_check_440A,
1616 .platform = "ppc440",
1617 },
1618 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1619 .pvr_mask = 0xf0000ffb,
1620 .pvr_value = 0x200008D8,
1621 .cpu_name = "440EPX",
1622 .cpu_features = CPU_FTRS_44X,
1623 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1624 .mmu_features = MMU_FTR_TYPE_44x,
1625 .icache_bsize = 32,
1626 .dcache_bsize = 32,
1627 .cpu_setup = __setup_cpu_440epx,
1628 .machine_check = machine_check_440A,
1629 .platform = "ppc440",
1630 },
1631 { /* 440GP Rev. B */
1632 .pvr_mask = 0xf0000fff,
1633 .pvr_value = 0x40000440,
1634 .cpu_name = "440GP Rev. B",
1635 .cpu_features = CPU_FTRS_44X,
1636 .cpu_user_features = COMMON_USER_BOOKE,
1637 .mmu_features = MMU_FTR_TYPE_44x,
1638 .icache_bsize = 32,
1639 .dcache_bsize = 32,
1640 .machine_check = machine_check_4xx,
1641 .platform = "ppc440gp",
1642 },
1643 { /* 440GP Rev. C */
1644 .pvr_mask = 0xf0000fff,
1645 .pvr_value = 0x40000481,
1646 .cpu_name = "440GP Rev. C",
1647 .cpu_features = CPU_FTRS_44X,
1648 .cpu_user_features = COMMON_USER_BOOKE,
1649 .mmu_features = MMU_FTR_TYPE_44x,
1650 .icache_bsize = 32,
1651 .dcache_bsize = 32,
1652 .machine_check = machine_check_4xx,
1653 .platform = "ppc440gp",
1654 },
1655 { /* 440GX Rev. A */
1656 .pvr_mask = 0xf0000fff,
1657 .pvr_value = 0x50000850,
1658 .cpu_name = "440GX Rev. A",
1659 .cpu_features = CPU_FTRS_44X,
1660 .cpu_user_features = COMMON_USER_BOOKE,
1661 .mmu_features = MMU_FTR_TYPE_44x,
1662 .icache_bsize = 32,
1663 .dcache_bsize = 32,
1664 .cpu_setup = __setup_cpu_440gx,
1665 .machine_check = machine_check_440A,
1666 .platform = "ppc440",
1667 },
1668 { /* 440GX Rev. B */
1669 .pvr_mask = 0xf0000fff,
1670 .pvr_value = 0x50000851,
1671 .cpu_name = "440GX Rev. B",
1672 .cpu_features = CPU_FTRS_44X,
1673 .cpu_user_features = COMMON_USER_BOOKE,
1674 .mmu_features = MMU_FTR_TYPE_44x,
1675 .icache_bsize = 32,
1676 .dcache_bsize = 32,
1677 .cpu_setup = __setup_cpu_440gx,
1678 .machine_check = machine_check_440A,
1679 .platform = "ppc440",
1680 },
1681 { /* 440GX Rev. C */
1682 .pvr_mask = 0xf0000fff,
1683 .pvr_value = 0x50000892,
1684 .cpu_name = "440GX Rev. C",
1685 .cpu_features = CPU_FTRS_44X,
1686 .cpu_user_features = COMMON_USER_BOOKE,
1687 .mmu_features = MMU_FTR_TYPE_44x,
1688 .icache_bsize = 32,
1689 .dcache_bsize = 32,
1690 .cpu_setup = __setup_cpu_440gx,
1691 .machine_check = machine_check_440A,
1692 .platform = "ppc440",
1693 },
1694 { /* 440GX Rev. F */
1695 .pvr_mask = 0xf0000fff,
1696 .pvr_value = 0x50000894,
1697 .cpu_name = "440GX Rev. F",
1698 .cpu_features = CPU_FTRS_44X,
1699 .cpu_user_features = COMMON_USER_BOOKE,
1700 .mmu_features = MMU_FTR_TYPE_44x,
1701 .icache_bsize = 32,
1702 .dcache_bsize = 32,
1703 .cpu_setup = __setup_cpu_440gx,
1704 .machine_check = machine_check_440A,
1705 .platform = "ppc440",
1706 },
1707 { /* 440SP Rev. A */
1708 .pvr_mask = 0xfff00fff,
1709 .pvr_value = 0x53200891,
1710 .cpu_name = "440SP Rev. A",
1711 .cpu_features = CPU_FTRS_44X,
1712 .cpu_user_features = COMMON_USER_BOOKE,
1713 .mmu_features = MMU_FTR_TYPE_44x,
1714 .icache_bsize = 32,
1715 .dcache_bsize = 32,
1716 .machine_check = machine_check_4xx,
1717 .platform = "ppc440",
1718 },
1719 { /* 440SPe Rev. A */
1720 .pvr_mask = 0xfff00fff,
1721 .pvr_value = 0x53400890,
1722 .cpu_name = "440SPe Rev. A",
1723 .cpu_features = CPU_FTRS_44X,
1724 .cpu_user_features = COMMON_USER_BOOKE,
1725 .mmu_features = MMU_FTR_TYPE_44x,
1726 .icache_bsize = 32,
1727 .dcache_bsize = 32,
1728 .cpu_setup = __setup_cpu_440spe,
1729 .machine_check = machine_check_440A,
1730 .platform = "ppc440",
1731 },
1732 { /* 440SPe Rev. B */
1733 .pvr_mask = 0xfff00fff,
1734 .pvr_value = 0x53400891,
1735 .cpu_name = "440SPe Rev. B",
1736 .cpu_features = CPU_FTRS_44X,
1737 .cpu_user_features = COMMON_USER_BOOKE,
1738 .mmu_features = MMU_FTR_TYPE_44x,
1739 .icache_bsize = 32,
1740 .dcache_bsize = 32,
1741 .cpu_setup = __setup_cpu_440spe,
1742 .machine_check = machine_check_440A,
1743 .platform = "ppc440",
1744 },
1745 { /* 440 in Xilinx Virtex-5 FXT */
1746 .pvr_mask = 0xfffffff0,
1747 .pvr_value = 0x7ff21910,
1748 .cpu_name = "440 in Virtex-5 FXT",
1749 .cpu_features = CPU_FTRS_44X,
1750 .cpu_user_features = COMMON_USER_BOOKE,
1751 .mmu_features = MMU_FTR_TYPE_44x,
1752 .icache_bsize = 32,
1753 .dcache_bsize = 32,
1754 .cpu_setup = __setup_cpu_440x5,
1755 .machine_check = machine_check_440A,
1756 .platform = "ppc440",
1757 },
1758 { /* 460EX */
1759 .pvr_mask = 0xffff0006,
1760 .pvr_value = 0x13020002,
1761 .cpu_name = "460EX",
1762 .cpu_features = CPU_FTRS_440x6,
1763 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1764 .mmu_features = MMU_FTR_TYPE_44x,
1765 .icache_bsize = 32,
1766 .dcache_bsize = 32,
1767 .cpu_setup = __setup_cpu_460ex,
1768 .machine_check = machine_check_440A,
1769 .platform = "ppc440",
1770 },
1771 { /* 460EX Rev B */
1772 .pvr_mask = 0xffff0007,
1773 .pvr_value = 0x13020004,
1774 .cpu_name = "460EX Rev. B",
1775 .cpu_features = CPU_FTRS_440x6,
1776 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1777 .mmu_features = MMU_FTR_TYPE_44x,
1778 .icache_bsize = 32,
1779 .dcache_bsize = 32,
1780 .cpu_setup = __setup_cpu_460ex,
1781 .machine_check = machine_check_440A,
1782 .platform = "ppc440",
1783 },
1784 { /* 460GT */
1785 .pvr_mask = 0xffff0006,
1786 .pvr_value = 0x13020000,
1787 .cpu_name = "460GT",
1788 .cpu_features = CPU_FTRS_440x6,
1789 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1790 .mmu_features = MMU_FTR_TYPE_44x,
1791 .icache_bsize = 32,
1792 .dcache_bsize = 32,
1793 .cpu_setup = __setup_cpu_460gt,
1794 .machine_check = machine_check_440A,
1795 .platform = "ppc440",
1796 },
1797 { /* 460GT Rev B */
1798 .pvr_mask = 0xffff0007,
1799 .pvr_value = 0x13020005,
1800 .cpu_name = "460GT Rev. B",
1801 .cpu_features = CPU_FTRS_440x6,
1802 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1803 .mmu_features = MMU_FTR_TYPE_44x,
1804 .icache_bsize = 32,
1805 .dcache_bsize = 32,
1806 .cpu_setup = __setup_cpu_460gt,
1807 .machine_check = machine_check_440A,
1808 .platform = "ppc440",
1809 },
1810 { /* 460SX */
1811 .pvr_mask = 0xffffff00,
1812 .pvr_value = 0x13541800,
1813 .cpu_name = "460SX",
1814 .cpu_features = CPU_FTRS_44X,
1815 .cpu_user_features = COMMON_USER_BOOKE,
1816 .mmu_features = MMU_FTR_TYPE_44x,
1817 .icache_bsize = 32,
1818 .dcache_bsize = 32,
1819 .cpu_setup = __setup_cpu_460sx,
1820 .machine_check = machine_check_440A,
1821 .platform = "ppc440",
1822 },
1823 { /* 464 in APM821xx */
1824 .pvr_mask = 0xffffff00,
1825 .pvr_value = 0x12C41C80,
1826 .cpu_name = "APM821XX",
1827 .cpu_features = CPU_FTRS_44X,
1828 .cpu_user_features = COMMON_USER_BOOKE |
1829 PPC_FEATURE_HAS_FPU,
1830 .mmu_features = MMU_FTR_TYPE_44x,
1831 .icache_bsize = 32,
1832 .dcache_bsize = 32,
1833 .cpu_setup = __setup_cpu_apm821xx,
1834 .machine_check = machine_check_440A,
1835 .platform = "ppc440",
1836 },
1837 { /* 476 DD2 core */
1838 .pvr_mask = 0xffffffff,
1839 .pvr_value = 0x11a52080,
1840 .cpu_name = "476",
1841 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1842 .cpu_user_features = COMMON_USER_BOOKE |
1843 PPC_FEATURE_HAS_FPU,
1844 .mmu_features = MMU_FTR_TYPE_47x |
1845 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1846 .icache_bsize = 32,
1847 .dcache_bsize = 128,
1848 .machine_check = machine_check_47x,
1849 .platform = "ppc470",
1850 },
1851 { /* 476 iss */
1852 .pvr_mask = 0xffff0000,
1853 .pvr_value = 0x00050000,
1854 .cpu_name = "476",
1855 .cpu_features = CPU_FTRS_47X,
1856 .cpu_user_features = COMMON_USER_BOOKE |
1857 PPC_FEATURE_HAS_FPU,
1858 .mmu_features = MMU_FTR_TYPE_47x |
1859 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1860 .icache_bsize = 32,
1861 .dcache_bsize = 128,
1862 .machine_check = machine_check_47x,
1863 .platform = "ppc470",
1864 },
1865 { /* 476 others */
1866 .pvr_mask = 0xffff0000,
1867 .pvr_value = 0x11a50000,
1868 .cpu_name = "476",
1869 .cpu_features = CPU_FTRS_47X,
1870 .cpu_user_features = COMMON_USER_BOOKE |
1871 PPC_FEATURE_HAS_FPU,
1872 .mmu_features = MMU_FTR_TYPE_47x |
1873 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1874 .icache_bsize = 32,
1875 .dcache_bsize = 128,
1876 .machine_check = machine_check_47x,
1877 .platform = "ppc470",
1878 },
1879 { /* default match */
1880 .pvr_mask = 0x00000000,
1881 .pvr_value = 0x00000000,
1882 .cpu_name = "(generic 44x PPC)",
1883 .cpu_features = CPU_FTRS_44X,
1884 .cpu_user_features = COMMON_USER_BOOKE,
1885 .mmu_features = MMU_FTR_TYPE_44x,
1886 .icache_bsize = 32,
1887 .dcache_bsize = 32,
1888 .machine_check = machine_check_4xx,
1889 .platform = "ppc440",
1890 }
1891 #endif /* CONFIG_44x */
1892 #ifdef CONFIG_E200
1893 { /* e200z5 */
1894 .pvr_mask = 0xfff00000,
1895 .pvr_value = 0x81000000,
1896 .cpu_name = "e200z5",
1897 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1898 .cpu_features = CPU_FTRS_E200,
1899 .cpu_user_features = COMMON_USER_BOOKE |
1900 PPC_FEATURE_HAS_EFP_SINGLE |
1901 PPC_FEATURE_UNIFIED_CACHE,
1902 .mmu_features = MMU_FTR_TYPE_FSL_E,
1903 .dcache_bsize = 32,
1904 .machine_check = machine_check_e200,
1905 .platform = "ppc5554",
1906 },
1907 { /* e200z6 */
1908 .pvr_mask = 0xfff00000,
1909 .pvr_value = 0x81100000,
1910 .cpu_name = "e200z6",
1911 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1912 .cpu_features = CPU_FTRS_E200,
1913 .cpu_user_features = COMMON_USER_BOOKE |
1914 PPC_FEATURE_HAS_SPE_COMP |
1915 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1916 PPC_FEATURE_UNIFIED_CACHE,
1917 .mmu_features = MMU_FTR_TYPE_FSL_E,
1918 .dcache_bsize = 32,
1919 .machine_check = machine_check_e200,
1920 .platform = "ppc5554",
1921 },
1922 { /* default match */
1923 .pvr_mask = 0x00000000,
1924 .pvr_value = 0x00000000,
1925 .cpu_name = "(generic E200 PPC)",
1926 .cpu_features = CPU_FTRS_E200,
1927 .cpu_user_features = COMMON_USER_BOOKE |
1928 PPC_FEATURE_HAS_EFP_SINGLE |
1929 PPC_FEATURE_UNIFIED_CACHE,
1930 .mmu_features = MMU_FTR_TYPE_FSL_E,
1931 .dcache_bsize = 32,
1932 .cpu_setup = __setup_cpu_e200,
1933 .machine_check = machine_check_e200,
1934 .platform = "ppc5554",
1935 }
1936 #endif /* CONFIG_E200 */
1937 #endif /* CONFIG_PPC32 */
1938 #ifdef CONFIG_E500
1939 #ifdef CONFIG_PPC32
1940 { /* e500 */
1941 .pvr_mask = 0xffff0000,
1942 .pvr_value = 0x80200000,
1943 .cpu_name = "e500",
1944 .cpu_features = CPU_FTRS_E500,
1945 .cpu_user_features = COMMON_USER_BOOKE |
1946 PPC_FEATURE_HAS_SPE_COMP |
1947 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1948 .mmu_features = MMU_FTR_TYPE_FSL_E,
1949 .icache_bsize = 32,
1950 .dcache_bsize = 32,
1951 .num_pmcs = 4,
1952 .oprofile_cpu_type = "ppc/e500",
1953 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1954 .cpu_setup = __setup_cpu_e500v1,
1955 .machine_check = machine_check_e500,
1956 .platform = "ppc8540",
1957 },
1958 { /* e500v2 */
1959 .pvr_mask = 0xffff0000,
1960 .pvr_value = 0x80210000,
1961 .cpu_name = "e500v2",
1962 .cpu_features = CPU_FTRS_E500_2,
1963 .cpu_user_features = COMMON_USER_BOOKE |
1964 PPC_FEATURE_HAS_SPE_COMP |
1965 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1966 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1967 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1968 .icache_bsize = 32,
1969 .dcache_bsize = 32,
1970 .num_pmcs = 4,
1971 .oprofile_cpu_type = "ppc/e500",
1972 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1973 .cpu_setup = __setup_cpu_e500v2,
1974 .machine_check = machine_check_e500,
1975 .platform = "ppc8548",
1976 },
1977 { /* e500mc */
1978 .pvr_mask = 0xffff0000,
1979 .pvr_value = 0x80230000,
1980 .cpu_name = "e500mc",
1981 .cpu_features = CPU_FTRS_E500MC,
1982 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1983 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1984 MMU_FTR_USE_TLBILX,
1985 .icache_bsize = 64,
1986 .dcache_bsize = 64,
1987 .num_pmcs = 4,
1988 .oprofile_cpu_type = "ppc/e500mc",
1989 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1990 .cpu_setup = __setup_cpu_e500mc,
1991 .machine_check = machine_check_e500mc,
1992 .platform = "ppce500mc",
1993 },
1994 #endif /* CONFIG_PPC32 */
1995 { /* e5500 */
1996 .pvr_mask = 0xffff0000,
1997 .pvr_value = 0x80240000,
1998 .cpu_name = "e5500",
1999 .cpu_features = CPU_FTRS_E500MC,
2000 .cpu_user_features = COMMON_USER_BOOKE,
2001 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2002 MMU_FTR_USE_TLBILX,
2003 .icache_bsize = 64,
2004 .dcache_bsize = 64,
2005 .num_pmcs = 4,
2006 .oprofile_cpu_type = "ppc/e500mc",
2007 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2008 .cpu_setup = __setup_cpu_e5500,
2009 .cpu_restore = __restore_cpu_e5500,
2010 .machine_check = machine_check_e500mc,
2011 .platform = "ppce5500",
2012 },
2013 #ifdef CONFIG_PPC32
2014 { /* default match */
2015 .pvr_mask = 0x00000000,
2016 .pvr_value = 0x00000000,
2017 .cpu_name = "(generic E500 PPC)",
2018 .cpu_features = CPU_FTRS_E500,
2019 .cpu_user_features = COMMON_USER_BOOKE |
2020 PPC_FEATURE_HAS_SPE_COMP |
2021 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2022 .mmu_features = MMU_FTR_TYPE_FSL_E,
2023 .icache_bsize = 32,
2024 .dcache_bsize = 32,
2025 .machine_check = machine_check_e500,
2026 .platform = "powerpc",
2027 }
2028 #endif /* CONFIG_PPC32 */
2029 #endif /* CONFIG_E500 */
2030
2031 #ifdef CONFIG_PPC_BOOK3E_64
2032 { /* This is a default entry to get going, to be replaced by
2033 * a real one at some stage
2034 */
2035 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
2036 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
2037 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
2038 .pvr_mask = 0x00000000,
2039 .pvr_value = 0x00000000,
2040 .cpu_name = "Book3E",
2041 .cpu_features = CPU_FTRS_BASE_BOOK3E,
2042 .cpu_user_features = COMMON_USER_PPC64,
2043 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
2044 MMU_FTR_USE_TLBIVAX_BCAST |
2045 MMU_FTR_LOCK_BCAST_INVAL,
2046 .icache_bsize = 64,
2047 .dcache_bsize = 64,
2048 .num_pmcs = 0,
2049 .machine_check = machine_check_generic,
2050 .platform = "power6",
2051 },
2052 #endif
2053 };
2054
2055 static struct cpu_spec the_cpu_spec;
2056
2057 static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
2058 {
2059 struct cpu_spec *t = &the_cpu_spec;
2060 struct cpu_spec old;
2061
2062 t = PTRRELOC(t);
2063 old = *t;
2064
2065 /* Copy everything, then do fixups */
2066 *t = *s;
2067
2068 /*
2069 * If we are overriding a previous value derived from the real
2070 * PVR with a new value obtained using a logical PVR value,
2071 * don't modify the performance monitor fields.
2072 */
2073 if (old.num_pmcs && !s->num_pmcs) {
2074 t->num_pmcs = old.num_pmcs;
2075 t->pmc_type = old.pmc_type;
2076 t->oprofile_type = old.oprofile_type;
2077 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2078 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2079 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2080
2081 /*
2082 * If we have passed through this logic once before and
2083 * have pulled the default case because the real PVR was
2084 * not found inside cpu_specs[], then we are possibly
2085 * running in compatibility mode. In that case, let the
2086 * oprofiler know which set of compatibility counters to
2087 * pull from by making sure the oprofile_cpu_type string
2088 * is set to that of compatibility mode. If the
2089 * oprofile_cpu_type already has a value, then we are
2090 * possibly overriding a real PVR with a logical one,
2091 * and, in that case, keep the current value for
2092 * oprofile_cpu_type.
2093 */
2094 if (old.oprofile_cpu_type != NULL) {
2095 t->oprofile_cpu_type = old.oprofile_cpu_type;
2096 t->oprofile_type = old.oprofile_type;
2097 }
2098 }
2099
2100 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2101
2102 /*
2103 * Set the base platform string once; assumes
2104 * we're called with real pvr first.
2105 */
2106 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2107 *PTRRELOC(&powerpc_base_platform) = t->platform;
2108
2109 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2110 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2111 * that processor. I will consolidate that at a later time, for now,
2112 * just use #ifdef. We also don't need to PTRRELOC the function
2113 * pointer on ppc64 and booke as we are running at 0 in real mode
2114 * on ppc64 and reloc_offset is always 0 on booke.
2115 */
2116 if (s->cpu_setup) {
2117 s->cpu_setup(offset, s);
2118 }
2119 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2120 }
2121
2122 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2123 {
2124 struct cpu_spec *s = cpu_specs;
2125 int i;
2126
2127 s = PTRRELOC(s);
2128
2129 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2130 if ((pvr & s->pvr_mask) == s->pvr_value) {
2131 setup_cpu_spec(offset, s);
2132 return s;
2133 }
2134 }
2135
2136 BUG();
2137
2138 return NULL;
2139 }
Linus' kernel tree