ARM: tegra: dts: cardhu: enable SLINK4
[linux-2.6.git] / arch / arm / boot / dts / tegra30-cardhu.dtsi
blobbdb2a660f37643deb8ea6501d51e14b8754fd608
1 /include/ "tegra30.dtsi"
3 /**
4  * This file contains common DT entry for all fab version of Cardhu.
5  * There is multiple fab version of Cardhu starting from A01 to A07.
6  * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
7  * A02 will have different sets of GPIOs for fixed regulator compare to
8  * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
9  * compatible with fab version A04. Based on Cardhu fab version, the
10  * related dts file need to be chosen like for Cardhu fab version A02,
11  * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
12  * tegra30-cardhu-a04.dts.
13  * The identification of board is done in two ways, by looking the sticker
14  * on PCB and by reading board id eeprom.
15  * The stciker will have number like 600-81291-1000-002 C.3. In this 4th
16  * number is the fab version like here it is 002 and hence fab version A02.
17  * The (downstream internal) U-Boot of Cardhu display the board-id as
18  * follows:
19  * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
20  * In this Fab version is 02 i.e. A02.
21  * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
22  * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
23  * wide.
24  */
26 / {
27         model = "NVIDIA Tegra30 Cardhu evaluation board";
28         compatible = "nvidia,cardhu", "nvidia,tegra30";
30         memory {
31                 reg = <0x80000000 0x40000000>;
32         };
34         pinmux {
35                 pinctrl-names = "default";
36                 pinctrl-0 = <&state_default>;
38                 state_default: pinmux {
39                         sdmmc1_clk_pz0 {
40                                 nvidia,pins = "sdmmc1_clk_pz0";
41                                 nvidia,function = "sdmmc1";
42                                 nvidia,pull = <0>;
43                                 nvidia,tristate = <0>;
44                         };
45                         sdmmc1_cmd_pz1 {
46                                 nvidia,pins =   "sdmmc1_cmd_pz1",
47                                                 "sdmmc1_dat0_py7",
48                                                 "sdmmc1_dat1_py6",
49                                                 "sdmmc1_dat2_py5",
50                                                 "sdmmc1_dat3_py4";
51                                 nvidia,function = "sdmmc1";
52                                 nvidia,pull = <2>;
53                                 nvidia,tristate = <0>;
54                         };
55                         sdmmc3_clk_pa6 {
56                                 nvidia,pins = "sdmmc3_clk_pa6";
57                                 nvidia,function = "sdmmc3";
58                                 nvidia,pull = <0>;
59                                 nvidia,tristate = <0>;
60                         };
61                         sdmmc3_cmd_pa7 {
62                                 nvidia,pins =   "sdmmc3_cmd_pa7",
63                                                 "sdmmc3_dat0_pb7",
64                                                 "sdmmc3_dat1_pb6",
65                                                 "sdmmc3_dat2_pb5",
66                                                 "sdmmc3_dat3_pb4";
67                                 nvidia,function = "sdmmc3";
68                                 nvidia,pull = <2>;
69                                 nvidia,tristate = <0>;
70                         };
71                         sdmmc4_clk_pcc4 {
72                                 nvidia,pins =   "sdmmc4_clk_pcc4",
73                                                 "sdmmc4_rst_n_pcc3";
74                                 nvidia,function = "sdmmc4";
75                                 nvidia,pull = <0>;
76                                 nvidia,tristate = <0>;
77                         };
78                         sdmmc4_dat0_paa0 {
79                                 nvidia,pins =   "sdmmc4_dat0_paa0",
80                                                 "sdmmc4_dat1_paa1",
81                                                 "sdmmc4_dat2_paa2",
82                                                 "sdmmc4_dat3_paa3",
83                                                 "sdmmc4_dat4_paa4",
84                                                 "sdmmc4_dat5_paa5",
85                                                 "sdmmc4_dat6_paa6",
86                                                 "sdmmc4_dat7_paa7";
87                                 nvidia,function = "sdmmc4";
88                                 nvidia,pull = <2>;
89                                 nvidia,tristate = <0>;
90                         };
91                         dap2_fs_pa2 {
92                                 nvidia,pins =   "dap2_fs_pa2",
93                                                 "dap2_sclk_pa3",
94                                                 "dap2_din_pa4",
95                                                 "dap2_dout_pa5";
96                                 nvidia,function = "i2s1";
97                                 nvidia,pull = <0>;
98                                 nvidia,tristate = <0>;
99                         };
100                         sdio3 {
101                                 nvidia,pins = "drive_sdio3";
102                                 nvidia,high-speed-mode = <0>;
103                                 nvidia,schmitt = <0>;
104                                 nvidia,pull-down-strength = <46>;
105                                 nvidia,pull-up-strength = <42>;
106                                 nvidia,slew-rate-rising = <1>;
107                                 nvidia,slew-rate-falling = <1>;
108                         };
109                 };
110         };
112         serial@70006000 {
113                 status = "okay";
114                 clock-frequency = <408000000>;
115         };
117         i2c@7000c000 {
118                 status = "okay";
119                 clock-frequency = <100000>;
120         };
122         i2c@7000c400 {
123                 status = "okay";
124                 clock-frequency = <100000>;
125         };
127         i2c@7000c500 {
128                 status = "okay";
129                 clock-frequency = <100000>;
131                 /* ALS and Proximity sensor */
132                 isl29028@44 {
133                         compatible = "isil,isl29028";
134                         reg = <0x44>;
135                         interrupt-parent = <&gpio>;
136                         interrupts = <88 0x04>; /*gpio PL0 */
137                 };
138         };
140         i2c@7000c700 {
141                 status = "okay";
142                 clock-frequency = <100000>;
143         };
145         i2c@7000d000 {
146                 status = "okay";
147                 clock-frequency = <100000>;
149                 wm8903: wm8903@1a {
150                         compatible = "wlf,wm8903";
151                         reg = <0x1a>;
152                         interrupt-parent = <&gpio>;
153                         interrupts = <179 0x04>; /* gpio PW3 */
155                         gpio-controller;
156                         #gpio-cells = <2>;
158                         micdet-cfg = <0>;
159                         micdet-delay = <100>;
160                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
161                 };
163                 tps62361 {
164                         compatible = "ti,tps62361";
165                         reg = <0x60>;
167                         regulator-name = "tps62361-vout";
168                         regulator-min-microvolt = <500000>;
169                         regulator-max-microvolt = <1500000>;
170                         regulator-boot-on;
171                         regulator-always-on;
172                         ti,vsel0-state-high;
173                         ti,vsel1-state-high;
174                 };
176                 pmic: tps65911@2d {
177                         compatible = "ti,tps65911";
178                         reg = <0x2d>;
180                         interrupts = <0 86 0x4>;
181                         #interrupt-cells = <2>;
182                         interrupt-controller;
184                         ti,system-power-controller;
186                         #gpio-cells = <2>;
187                         gpio-controller;
189                         vcc1-supply = <&vdd_ac_bat_reg>;
190                         vcc2-supply = <&vdd_ac_bat_reg>;
191                         vcc3-supply = <&vio_reg>;
192                         vcc4-supply = <&vdd_5v0_reg>;
193                         vcc5-supply = <&vdd_ac_bat_reg>;
194                         vcc6-supply = <&vdd2_reg>;
195                         vcc7-supply = <&vdd_ac_bat_reg>;
196                         vccio-supply = <&vdd_ac_bat_reg>;
198                         regulators {
199                                 vdd1_reg: vdd1 {
200                                         regulator-name = "vddio_ddr_1v2";
201                                         regulator-min-microvolt = <1200000>;
202                                         regulator-max-microvolt = <1200000>;
203                                         regulator-always-on;
204                                 };
206                                 vdd2_reg: vdd2 {
207                                         regulator-name = "vdd_1v5_gen";
208                                         regulator-min-microvolt = <1500000>;
209                                         regulator-max-microvolt = <1500000>;
210                                         regulator-always-on;
211                                 };
213                                 vddctrl_reg: vddctrl {
214                                         regulator-name = "vdd_cpu,vdd_sys";
215                                         regulator-min-microvolt = <1000000>;
216                                         regulator-max-microvolt = <1000000>;
217                                         regulator-always-on;
218                                 };
220                                 vio_reg: vio {
221                                         regulator-name = "vdd_1v8_gen";
222                                         regulator-min-microvolt = <1800000>;
223                                         regulator-max-microvolt = <1800000>;
224                                         regulator-always-on;
225                                 };
227                                 ldo1_reg: ldo1 {
228                                         regulator-name = "vdd_pexa,vdd_pexb";
229                                         regulator-min-microvolt = <1050000>;
230                                         regulator-max-microvolt = <1050000>;
231                                 };
233                                 ldo2_reg: ldo2 {
234                                         regulator-name = "vdd_sata,avdd_plle";
235                                         regulator-min-microvolt = <1050000>;
236                                         regulator-max-microvolt = <1050000>;
237                                 };
239                                 /* LDO3 is not connected to anything */
241                                 ldo4_reg: ldo4 {
242                                         regulator-name = "vdd_rtc";
243                                         regulator-min-microvolt = <1200000>;
244                                         regulator-max-microvolt = <1200000>;
245                                         regulator-always-on;
246                                 };
248                                 ldo5_reg: ldo5 {
249                                         regulator-name = "vddio_sdmmc,avdd_vdac";
250                                         regulator-min-microvolt = <3300000>;
251                                         regulator-max-microvolt = <3300000>;
252                                         regulator-always-on;
253                                 };
255                                 ldo6_reg: ldo6 {
256                                         regulator-name = "avdd_dsi_csi,pwrdet_mipi";
257                                         regulator-min-microvolt = <1200000>;
258                                         regulator-max-microvolt = <1200000>;
259                                 };
261                                 ldo7_reg: ldo7 {
262                                         regulator-name = "vdd_pllm,x,u,a_p_c_s";
263                                         regulator-min-microvolt = <1200000>;
264                                         regulator-max-microvolt = <1200000>;
265                                         regulator-always-on;
266                                 };
268                                 ldo8_reg: ldo8 {
269                                         regulator-name = "vdd_ddr_hs";
270                                         regulator-min-microvolt = <1000000>;
271                                         regulator-max-microvolt = <1000000>;
272                                         regulator-always-on;
273                                 };
274                         };
275                 };
276         };
278         spi@7000da00 {
279                 status = "okay";
280                 spi-max-frequency = <25000000>;
281                 spi-flash@1 {
282                         compatible = "winbond,w25q32";
283                         reg = <1>;
284                         spi-max-frequency = <20000000>;
285                 };
286         };
288         ahub {
289                 i2s@70080400 {
290                         status = "okay";
291                 };
292         };
294         pmc {
295                 status = "okay";
296                 nvidia,invert-interrupt;
297         };
299         sdhci@78000000 {
300                 status = "okay";
301                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
302                 wp-gpios = <&gpio 155 0>; /* gpio PT3 */
303                 power-gpios = <&gpio 31 0>; /* gpio PD7 */
304                 bus-width = <4>;
305         };
307         sdhci@78000600 {
308                 status = "okay";
309                 bus-width = <8>;
310         };
312         regulators {
313                 compatible = "simple-bus";
314                 #address-cells = <1>;
315                 #size-cells = <0>;
317                 vdd_ac_bat_reg: regulator@0 {
318                         compatible = "regulator-fixed";
319                         reg = <0>;
320                         regulator-name = "vdd_ac_bat";
321                         regulator-min-microvolt = <5000000>;
322                         regulator-max-microvolt = <5000000>;
323                         regulator-always-on;
324                 };
326                 cam_1v8_reg: regulator@1 {
327                         compatible = "regulator-fixed";
328                         reg = <1>;
329                         regulator-name = "cam_1v8";
330                         regulator-min-microvolt = <1800000>;
331                         regulator-max-microvolt = <1800000>;
332                         enable-active-high;
333                         gpio = <&gpio 220 0>; /* gpio PBB4 */
334                         vin-supply = <&vio_reg>;
335                 };
337                 cp_5v_reg: regulator@2 {
338                         compatible = "regulator-fixed";
339                         reg = <2>;
340                         regulator-name = "cp_5v";
341                         regulator-min-microvolt = <5000000>;
342                         regulator-max-microvolt = <5000000>;
343                         regulator-boot-on;
344                         regulator-always-on;
345                         enable-active-high;
346                         gpio = <&pmic 0 0>; /* PMIC TPS65911 GPIO0 */
347                 };
349                 emmc_3v3_reg: regulator@3 {
350                         compatible = "regulator-fixed";
351                         reg = <3>;
352                         regulator-name = "emmc_3v3";
353                         regulator-min-microvolt = <3300000>;
354                         regulator-max-microvolt = <3300000>;
355                         regulator-always-on;
356                         regulator-boot-on;
357                         enable-active-high;
358                         gpio = <&gpio 25 0>; /* gpio PD1 */
359                         vin-supply = <&sys_3v3_reg>;
360                 };
362                 modem_3v3_reg: regulator@4 {
363                         compatible = "regulator-fixed";
364                         reg = <4>;
365                         regulator-name = "modem_3v3";
366                         regulator-min-microvolt = <3300000>;
367                         regulator-max-microvolt = <3300000>;
368                         enable-active-high;
369                         gpio = <&gpio 30 0>; /* gpio PD6 */
370                 };
372                 pex_hvdd_3v3_reg: regulator@5 {
373                         compatible = "regulator-fixed";
374                         reg = <5>;
375                         regulator-name = "pex_hvdd_3v3";
376                         regulator-min-microvolt = <3300000>;
377                         regulator-max-microvolt = <3300000>;
378                         enable-active-high;
379                         gpio = <&gpio 95 0>; /* gpio PL7 */
380                         vin-supply = <&sys_3v3_reg>;
381                 };
383                 vdd_cam1_ldo_reg: regulator@6 {
384                         compatible = "regulator-fixed";
385                         reg = <6>;
386                         regulator-name = "vdd_cam1_ldo";
387                         regulator-min-microvolt = <2800000>;
388                         regulator-max-microvolt = <2800000>;
389                         enable-active-high;
390                         gpio = <&gpio 142 0>; /* gpio PR6 */
391                         vin-supply = <&sys_3v3_reg>;
392                 };
394                 vdd_cam2_ldo_reg: regulator@7 {
395                         compatible = "regulator-fixed";
396                         reg = <7>;
397                         regulator-name = "vdd_cam2_ldo";
398                         regulator-min-microvolt = <2800000>;
399                         regulator-max-microvolt = <2800000>;
400                         enable-active-high;
401                         gpio = <&gpio 143 0>; /* gpio PR7 */
402                         vin-supply = <&sys_3v3_reg>;
403                 };
405                 vdd_cam3_ldo_reg: regulator@8 {
406                         compatible = "regulator-fixed";
407                         reg = <8>;
408                         regulator-name = "vdd_cam3_ldo";
409                         regulator-min-microvolt = <3300000>;
410                         regulator-max-microvolt = <3300000>;
411                         enable-active-high;
412                         gpio = <&gpio 144 0>; /* gpio PS0 */
413                         vin-supply = <&sys_3v3_reg>;
414                 };
416                 vdd_com_reg: regulator@9 {
417                         compatible = "regulator-fixed";
418                         reg = <9>;
419                         regulator-name = "vdd_com";
420                         regulator-min-microvolt = <3300000>;
421                         regulator-max-microvolt = <3300000>;
422                         regulator-always-on;
423                         regulator-boot-on;
424                         enable-active-high;
425                         gpio = <&gpio 24 0>; /* gpio PD0 */
426                         vin-supply = <&sys_3v3_reg>;
427                 };
429                 vdd_fuse_3v3_reg: regulator@10 {
430                         compatible = "regulator-fixed";
431                         reg = <10>;
432                         regulator-name = "vdd_fuse_3v3";
433                         regulator-min-microvolt = <3300000>;
434                         regulator-max-microvolt = <3300000>;
435                         enable-active-high;
436                         gpio = <&gpio 94 0>; /* gpio PL6 */
437                         vin-supply = <&sys_3v3_reg>;
438                 };
440                 vdd_pnl1_reg: regulator@11 {
441                         compatible = "regulator-fixed";
442                         reg = <11>;
443                         regulator-name = "vdd_pnl1";
444                         regulator-min-microvolt = <3300000>;
445                         regulator-max-microvolt = <3300000>;
446                         regulator-always-on;
447                         regulator-boot-on;
448                         enable-active-high;
449                         gpio = <&gpio 92 0>; /* gpio PL4 */
450                         vin-supply = <&sys_3v3_reg>;
451                 };
453                 vdd_vid_reg: regulator@12 {
454                         compatible = "regulator-fixed";
455                         reg = <12>;
456                         regulator-name = "vddio_vid";
457                         regulator-min-microvolt = <5000000>;
458                         regulator-max-microvolt = <5000000>;
459                         enable-active-high;
460                         gpio = <&gpio 152 0>; /* GPIO PT0 */
461                         gpio-open-drain;
462                         vin-supply = <&vdd_5v0_reg>;
463                 };
464         };
466         sound {
467                 compatible = "nvidia,tegra-audio-wm8903-cardhu",
468                              "nvidia,tegra-audio-wm8903";
469                 nvidia,model = "NVIDIA Tegra Cardhu";
471                 nvidia,audio-routing =
472                         "Headphone Jack", "HPOUTR",
473                         "Headphone Jack", "HPOUTL",
474                         "Int Spk", "ROP",
475                         "Int Spk", "RON",
476                         "Int Spk", "LOP",
477                         "Int Spk", "LON",
478                         "Mic Jack", "MICBIAS",
479                         "IN1L", "Mic Jack";
481                 nvidia,i2s-controller = <&tegra_i2s1>;
482                 nvidia,audio-codec = <&wm8903>;
484                 nvidia,spkr-en-gpios = <&wm8903 2 0>;
485                 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
486         };