sfc: Allow for additional checksum offload features
[linux-2.6.git] / drivers / net / sfc / efx.c
blobc49d364ebdbd475d09ccc8b6867c0b48654566c9
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
24 #include "efx.h"
25 #include "mdio_10g.h"
26 #include "falcon.h"
28 /**************************************************************************
30 * Type name strings
32 **************************************************************************
35 /* Loopback mode names (see LOOPBACK_MODE()) */
36 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
37 const char *efx_loopback_mode_names[] = {
38 [LOOPBACK_NONE] = "NONE",
39 [LOOPBACK_DATA] = "DATAPATH",
40 [LOOPBACK_GMAC] = "GMAC",
41 [LOOPBACK_XGMII] = "XGMII",
42 [LOOPBACK_XGXS] = "XGXS",
43 [LOOPBACK_XAUI] = "XAUI",
44 [LOOPBACK_GMII] = "GMII",
45 [LOOPBACK_SGMII] = "SGMII",
46 [LOOPBACK_XGBR] = "XGBR",
47 [LOOPBACK_XFI] = "XFI",
48 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
49 [LOOPBACK_GMII_FAR] = "GMII_FAR",
50 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
51 [LOOPBACK_XFI_FAR] = "XFI_FAR",
52 [LOOPBACK_GPHY] = "GPHY",
53 [LOOPBACK_PHYXS] = "PHYXS",
54 [LOOPBACK_PCS] = "PCS",
55 [LOOPBACK_PMAPMD] = "PMA/PMD",
56 [LOOPBACK_XPORT] = "XPORT",
57 [LOOPBACK_XGMII_WS] = "XGMII_WS",
58 [LOOPBACK_XAUI_WS] = "XAUI_WS",
59 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
60 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
61 [LOOPBACK_GMII_WS] = "GMII_WS",
62 [LOOPBACK_XFI_WS] = "XFI_WS",
63 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
64 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
67 /* Interrupt mode names (see INT_MODE())) */
68 const unsigned int efx_interrupt_mode_max = EFX_INT_MODE_MAX;
69 const char *efx_interrupt_mode_names[] = {
70 [EFX_INT_MODE_MSIX] = "MSI-X",
71 [EFX_INT_MODE_MSI] = "MSI",
72 [EFX_INT_MODE_LEGACY] = "legacy",
75 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
76 const char *efx_reset_type_names[] = {
77 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
78 [RESET_TYPE_ALL] = "ALL",
79 [RESET_TYPE_WORLD] = "WORLD",
80 [RESET_TYPE_DISABLE] = "DISABLE",
81 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
82 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
83 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
84 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
85 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
86 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
89 #define EFX_MAX_MTU (9 * 1024)
91 /* RX slow fill workqueue. If memory allocation fails in the fast path,
92 * a work item is pushed onto this work queue to retry the allocation later,
93 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
94 * workqueue, there is nothing to be gained in making it per NIC
96 static struct workqueue_struct *refill_workqueue;
98 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
99 * queued onto this work queue. This is not a per-nic work queue, because
100 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
102 static struct workqueue_struct *reset_workqueue;
104 /**************************************************************************
106 * Configurable values
108 *************************************************************************/
111 * Use separate channels for TX and RX events
113 * Set this to 1 to use separate channels for TX and RX. It allows us
114 * to control interrupt affinity separately for TX and RX.
116 * This is only used in MSI-X interrupt mode
118 static unsigned int separate_tx_channels;
119 module_param(separate_tx_channels, uint, 0644);
120 MODULE_PARM_DESC(separate_tx_channels,
121 "Use separate channels for TX and RX");
123 /* This is the weight assigned to each of the (per-channel) virtual
124 * NAPI devices.
126 static int napi_weight = 64;
128 /* This is the time (in jiffies) between invocations of the hardware
129 * monitor, which checks for known hardware bugs and resets the
130 * hardware and driver as necessary.
132 unsigned int efx_monitor_interval = 1 * HZ;
134 /* This controls whether or not the driver will initialise devices
135 * with invalid MAC addresses stored in the EEPROM or flash. If true,
136 * such devices will be initialised with a random locally-generated
137 * MAC address. This allows for loading the sfc_mtd driver to
138 * reprogram the flash, even if the flash contents (including the MAC
139 * address) have previously been erased.
141 static unsigned int allow_bad_hwaddr;
143 /* Initial interrupt moderation settings. They can be modified after
144 * module load with ethtool.
146 * The default for RX should strike a balance between increasing the
147 * round-trip latency and reducing overhead.
149 static unsigned int rx_irq_mod_usec = 60;
151 /* Initial interrupt moderation settings. They can be modified after
152 * module load with ethtool.
154 * This default is chosen to ensure that a 10G link does not go idle
155 * while a TX queue is stopped after it has become full. A queue is
156 * restarted when it drops below half full. The time this takes (assuming
157 * worst case 3 descriptors per packet and 1024 descriptors) is
158 * 512 / 3 * 1.2 = 205 usec.
160 static unsigned int tx_irq_mod_usec = 150;
162 /* This is the first interrupt mode to try out of:
163 * 0 => MSI-X
164 * 1 => MSI
165 * 2 => legacy
167 static unsigned int interrupt_mode;
169 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
170 * i.e. the number of CPUs among which we may distribute simultaneous
171 * interrupt handling.
173 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
174 * The default (0) means to assign an interrupt to each package (level II cache)
176 static unsigned int rss_cpus;
177 module_param(rss_cpus, uint, 0444);
178 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
180 static int phy_flash_cfg;
181 module_param(phy_flash_cfg, int, 0644);
182 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
184 static unsigned irq_adapt_low_thresh = 10000;
185 module_param(irq_adapt_low_thresh, uint, 0644);
186 MODULE_PARM_DESC(irq_adapt_low_thresh,
187 "Threshold score for reducing IRQ moderation");
189 static unsigned irq_adapt_high_thresh = 20000;
190 module_param(irq_adapt_high_thresh, uint, 0644);
191 MODULE_PARM_DESC(irq_adapt_high_thresh,
192 "Threshold score for increasing IRQ moderation");
194 /**************************************************************************
196 * Utility functions and prototypes
198 *************************************************************************/
199 static void efx_remove_channel(struct efx_channel *channel);
200 static void efx_remove_port(struct efx_nic *efx);
201 static void efx_fini_napi(struct efx_nic *efx);
202 static void efx_fini_channels(struct efx_nic *efx);
204 #define EFX_ASSERT_RESET_SERIALISED(efx) \
205 do { \
206 if ((efx->state == STATE_RUNNING) || \
207 (efx->state == STATE_DISABLED)) \
208 ASSERT_RTNL(); \
209 } while (0)
211 /**************************************************************************
213 * Event queue processing
215 *************************************************************************/
217 /* Process channel's event queue
219 * This function is responsible for processing the event queue of a
220 * single channel. The caller must guarantee that this function will
221 * never be concurrently called more than once on the same channel,
222 * though different channels may be being processed concurrently.
224 static int efx_process_channel(struct efx_channel *channel, int rx_quota)
226 struct efx_nic *efx = channel->efx;
227 int rx_packets;
229 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
230 !channel->enabled))
231 return 0;
233 rx_packets = efx_nic_process_eventq(channel, rx_quota);
234 if (rx_packets == 0)
235 return 0;
237 /* Deliver last RX packet. */
238 if (channel->rx_pkt) {
239 __efx_rx_packet(channel, channel->rx_pkt,
240 channel->rx_pkt_csummed);
241 channel->rx_pkt = NULL;
244 efx_rx_strategy(channel);
246 efx_fast_push_rx_descriptors(&efx->rx_queue[channel->channel]);
248 return rx_packets;
251 /* Mark channel as finished processing
253 * Note that since we will not receive further interrupts for this
254 * channel before we finish processing and call the eventq_read_ack()
255 * method, there is no need to use the interrupt hold-off timers.
257 static inline void efx_channel_processed(struct efx_channel *channel)
259 /* The interrupt handler for this channel may set work_pending
260 * as soon as we acknowledge the events we've seen. Make sure
261 * it's cleared before then. */
262 channel->work_pending = false;
263 smp_wmb();
265 efx_nic_eventq_read_ack(channel);
268 /* NAPI poll handler
270 * NAPI guarantees serialisation of polls of the same device, which
271 * provides the guarantee required by efx_process_channel().
273 static int efx_poll(struct napi_struct *napi, int budget)
275 struct efx_channel *channel =
276 container_of(napi, struct efx_channel, napi_str);
277 int rx_packets;
279 EFX_TRACE(channel->efx, "channel %d NAPI poll executing on CPU %d\n",
280 channel->channel, raw_smp_processor_id());
282 rx_packets = efx_process_channel(channel, budget);
284 if (rx_packets < budget) {
285 struct efx_nic *efx = channel->efx;
287 if (channel->used_flags & EFX_USED_BY_RX &&
288 efx->irq_rx_adaptive &&
289 unlikely(++channel->irq_count == 1000)) {
290 if (unlikely(channel->irq_mod_score <
291 irq_adapt_low_thresh)) {
292 if (channel->irq_moderation > 1) {
293 channel->irq_moderation -= 1;
294 efx->type->push_irq_moderation(channel);
296 } else if (unlikely(channel->irq_mod_score >
297 irq_adapt_high_thresh)) {
298 if (channel->irq_moderation <
299 efx->irq_rx_moderation) {
300 channel->irq_moderation += 1;
301 efx->type->push_irq_moderation(channel);
304 channel->irq_count = 0;
305 channel->irq_mod_score = 0;
308 /* There is no race here; although napi_disable() will
309 * only wait for napi_complete(), this isn't a problem
310 * since efx_channel_processed() will have no effect if
311 * interrupts have already been disabled.
313 napi_complete(napi);
314 efx_channel_processed(channel);
317 return rx_packets;
320 /* Process the eventq of the specified channel immediately on this CPU
322 * Disable hardware generated interrupts, wait for any existing
323 * processing to finish, then directly poll (and ack ) the eventq.
324 * Finally reenable NAPI and interrupts.
326 * Since we are touching interrupts the caller should hold the suspend lock
328 void efx_process_channel_now(struct efx_channel *channel)
330 struct efx_nic *efx = channel->efx;
332 BUG_ON(!channel->used_flags);
333 BUG_ON(!channel->enabled);
335 /* Disable interrupts and wait for ISRs to complete */
336 efx_nic_disable_interrupts(efx);
337 if (efx->legacy_irq)
338 synchronize_irq(efx->legacy_irq);
339 if (channel->irq)
340 synchronize_irq(channel->irq);
342 /* Wait for any NAPI processing to complete */
343 napi_disable(&channel->napi_str);
345 /* Poll the channel */
346 efx_process_channel(channel, EFX_EVQ_SIZE);
348 /* Ack the eventq. This may cause an interrupt to be generated
349 * when they are reenabled */
350 efx_channel_processed(channel);
352 napi_enable(&channel->napi_str);
353 efx_nic_enable_interrupts(efx);
356 /* Create event queue
357 * Event queue memory allocations are done only once. If the channel
358 * is reset, the memory buffer will be reused; this guards against
359 * errors during channel reset and also simplifies interrupt handling.
361 static int efx_probe_eventq(struct efx_channel *channel)
363 EFX_LOG(channel->efx, "chan %d create event queue\n", channel->channel);
365 return efx_nic_probe_eventq(channel);
368 /* Prepare channel's event queue */
369 static void efx_init_eventq(struct efx_channel *channel)
371 EFX_LOG(channel->efx, "chan %d init event queue\n", channel->channel);
373 channel->eventq_read_ptr = 0;
375 efx_nic_init_eventq(channel);
378 static void efx_fini_eventq(struct efx_channel *channel)
380 EFX_LOG(channel->efx, "chan %d fini event queue\n", channel->channel);
382 efx_nic_fini_eventq(channel);
385 static void efx_remove_eventq(struct efx_channel *channel)
387 EFX_LOG(channel->efx, "chan %d remove event queue\n", channel->channel);
389 efx_nic_remove_eventq(channel);
392 /**************************************************************************
394 * Channel handling
396 *************************************************************************/
398 static int efx_probe_channel(struct efx_channel *channel)
400 struct efx_tx_queue *tx_queue;
401 struct efx_rx_queue *rx_queue;
402 int rc;
404 EFX_LOG(channel->efx, "creating channel %d\n", channel->channel);
406 rc = efx_probe_eventq(channel);
407 if (rc)
408 goto fail1;
410 efx_for_each_channel_tx_queue(tx_queue, channel) {
411 rc = efx_probe_tx_queue(tx_queue);
412 if (rc)
413 goto fail2;
416 efx_for_each_channel_rx_queue(rx_queue, channel) {
417 rc = efx_probe_rx_queue(rx_queue);
418 if (rc)
419 goto fail3;
422 channel->n_rx_frm_trunc = 0;
424 return 0;
426 fail3:
427 efx_for_each_channel_rx_queue(rx_queue, channel)
428 efx_remove_rx_queue(rx_queue);
429 fail2:
430 efx_for_each_channel_tx_queue(tx_queue, channel)
431 efx_remove_tx_queue(tx_queue);
432 fail1:
433 return rc;
437 static void efx_set_channel_names(struct efx_nic *efx)
439 struct efx_channel *channel;
440 const char *type = "";
441 int number;
443 efx_for_each_channel(channel, efx) {
444 number = channel->channel;
445 if (efx->n_channels > efx->n_rx_queues) {
446 if (channel->channel < efx->n_rx_queues) {
447 type = "-rx";
448 } else {
449 type = "-tx";
450 number -= efx->n_rx_queues;
453 snprintf(channel->name, sizeof(channel->name),
454 "%s%s-%d", efx->name, type, number);
458 /* Channels are shutdown and reinitialised whilst the NIC is running
459 * to propagate configuration changes (mtu, checksum offload), or
460 * to clear hardware error conditions
462 static void efx_init_channels(struct efx_nic *efx)
464 struct efx_tx_queue *tx_queue;
465 struct efx_rx_queue *rx_queue;
466 struct efx_channel *channel;
468 /* Calculate the rx buffer allocation parameters required to
469 * support the current MTU, including padding for header
470 * alignment and overruns.
472 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
473 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
474 efx->type->rx_buffer_padding);
475 efx->rx_buffer_order = get_order(efx->rx_buffer_len);
477 /* Initialise the channels */
478 efx_for_each_channel(channel, efx) {
479 EFX_LOG(channel->efx, "init chan %d\n", channel->channel);
481 efx_init_eventq(channel);
483 efx_for_each_channel_tx_queue(tx_queue, channel)
484 efx_init_tx_queue(tx_queue);
486 /* The rx buffer allocation strategy is MTU dependent */
487 efx_rx_strategy(channel);
489 efx_for_each_channel_rx_queue(rx_queue, channel)
490 efx_init_rx_queue(rx_queue);
492 WARN_ON(channel->rx_pkt != NULL);
493 efx_rx_strategy(channel);
497 /* This enables event queue processing and packet transmission.
499 * Note that this function is not allowed to fail, since that would
500 * introduce too much complexity into the suspend/resume path.
502 static void efx_start_channel(struct efx_channel *channel)
504 struct efx_rx_queue *rx_queue;
506 EFX_LOG(channel->efx, "starting chan %d\n", channel->channel);
508 /* The interrupt handler for this channel may set work_pending
509 * as soon as we enable it. Make sure it's cleared before
510 * then. Similarly, make sure it sees the enabled flag set. */
511 channel->work_pending = false;
512 channel->enabled = true;
513 smp_wmb();
515 napi_enable(&channel->napi_str);
517 /* Load up RX descriptors */
518 efx_for_each_channel_rx_queue(rx_queue, channel)
519 efx_fast_push_rx_descriptors(rx_queue);
522 /* This disables event queue processing and packet transmission.
523 * This function does not guarantee that all queue processing
524 * (e.g. RX refill) is complete.
526 static void efx_stop_channel(struct efx_channel *channel)
528 struct efx_rx_queue *rx_queue;
530 if (!channel->enabled)
531 return;
533 EFX_LOG(channel->efx, "stop chan %d\n", channel->channel);
535 channel->enabled = false;
536 napi_disable(&channel->napi_str);
538 /* Ensure that any worker threads have exited or will be no-ops */
539 efx_for_each_channel_rx_queue(rx_queue, channel) {
540 spin_lock_bh(&rx_queue->add_lock);
541 spin_unlock_bh(&rx_queue->add_lock);
545 static void efx_fini_channels(struct efx_nic *efx)
547 struct efx_channel *channel;
548 struct efx_tx_queue *tx_queue;
549 struct efx_rx_queue *rx_queue;
550 int rc;
552 EFX_ASSERT_RESET_SERIALISED(efx);
553 BUG_ON(efx->port_enabled);
555 rc = efx_nic_flush_queues(efx);
556 if (rc)
557 EFX_ERR(efx, "failed to flush queues\n");
558 else
559 EFX_LOG(efx, "successfully flushed all queues\n");
561 efx_for_each_channel(channel, efx) {
562 EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
564 efx_for_each_channel_rx_queue(rx_queue, channel)
565 efx_fini_rx_queue(rx_queue);
566 efx_for_each_channel_tx_queue(tx_queue, channel)
567 efx_fini_tx_queue(tx_queue);
568 efx_fini_eventq(channel);
572 static void efx_remove_channel(struct efx_channel *channel)
574 struct efx_tx_queue *tx_queue;
575 struct efx_rx_queue *rx_queue;
577 EFX_LOG(channel->efx, "destroy chan %d\n", channel->channel);
579 efx_for_each_channel_rx_queue(rx_queue, channel)
580 efx_remove_rx_queue(rx_queue);
581 efx_for_each_channel_tx_queue(tx_queue, channel)
582 efx_remove_tx_queue(tx_queue);
583 efx_remove_eventq(channel);
585 channel->used_flags = 0;
588 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay)
590 queue_delayed_work(refill_workqueue, &rx_queue->work, delay);
593 /**************************************************************************
595 * Port handling
597 **************************************************************************/
599 /* This ensures that the kernel is kept informed (via
600 * netif_carrier_on/off) of the link status, and also maintains the
601 * link status's stop on the port's TX queue.
603 void efx_link_status_changed(struct efx_nic *efx)
605 struct efx_link_state *link_state = &efx->link_state;
607 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
608 * that no events are triggered between unregister_netdev() and the
609 * driver unloading. A more general condition is that NETDEV_CHANGE
610 * can only be generated between NETDEV_UP and NETDEV_DOWN */
611 if (!netif_running(efx->net_dev))
612 return;
614 if (efx->port_inhibited) {
615 netif_carrier_off(efx->net_dev);
616 return;
619 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
620 efx->n_link_state_changes++;
622 if (link_state->up)
623 netif_carrier_on(efx->net_dev);
624 else
625 netif_carrier_off(efx->net_dev);
628 /* Status message for kernel log */
629 if (link_state->up) {
630 EFX_INFO(efx, "link up at %uMbps %s-duplex (MTU %d)%s\n",
631 link_state->speed, link_state->fd ? "full" : "half",
632 efx->net_dev->mtu,
633 (efx->promiscuous ? " [PROMISC]" : ""));
634 } else {
635 EFX_INFO(efx, "link down\n");
640 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
642 efx->link_advertising = advertising;
643 if (advertising) {
644 if (advertising & ADVERTISED_Pause)
645 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
646 else
647 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
648 if (advertising & ADVERTISED_Asym_Pause)
649 efx->wanted_fc ^= EFX_FC_TX;
653 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
655 efx->wanted_fc = wanted_fc;
656 if (efx->link_advertising) {
657 if (wanted_fc & EFX_FC_RX)
658 efx->link_advertising |= (ADVERTISED_Pause |
659 ADVERTISED_Asym_Pause);
660 else
661 efx->link_advertising &= ~(ADVERTISED_Pause |
662 ADVERTISED_Asym_Pause);
663 if (wanted_fc & EFX_FC_TX)
664 efx->link_advertising ^= ADVERTISED_Asym_Pause;
668 static void efx_fini_port(struct efx_nic *efx);
670 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
671 * the MAC appropriately. All other PHY configuration changes are pushed
672 * through phy_op->set_settings(), and pushed asynchronously to the MAC
673 * through efx_monitor().
675 * Callers must hold the mac_lock
677 int __efx_reconfigure_port(struct efx_nic *efx)
679 enum efx_phy_mode phy_mode;
680 int rc;
682 WARN_ON(!mutex_is_locked(&efx->mac_lock));
684 /* Serialise the promiscuous flag with efx_set_multicast_list. */
685 if (efx_dev_registered(efx)) {
686 netif_addr_lock_bh(efx->net_dev);
687 netif_addr_unlock_bh(efx->net_dev);
690 /* Disable PHY transmit in mac level loopbacks */
691 phy_mode = efx->phy_mode;
692 if (LOOPBACK_INTERNAL(efx))
693 efx->phy_mode |= PHY_MODE_TX_DISABLED;
694 else
695 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
697 rc = efx->type->reconfigure_port(efx);
699 if (rc)
700 efx->phy_mode = phy_mode;
702 return rc;
705 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
706 * disabled. */
707 int efx_reconfigure_port(struct efx_nic *efx)
709 int rc;
711 EFX_ASSERT_RESET_SERIALISED(efx);
713 mutex_lock(&efx->mac_lock);
714 rc = __efx_reconfigure_port(efx);
715 mutex_unlock(&efx->mac_lock);
717 return rc;
720 /* Asynchronous work item for changing MAC promiscuity and multicast
721 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
722 * MAC directly. */
723 static void efx_mac_work(struct work_struct *data)
725 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
727 mutex_lock(&efx->mac_lock);
728 if (efx->port_enabled) {
729 efx->type->push_multicast_hash(efx);
730 efx->mac_op->reconfigure(efx);
732 mutex_unlock(&efx->mac_lock);
735 static int efx_probe_port(struct efx_nic *efx)
737 int rc;
739 EFX_LOG(efx, "create port\n");
741 /* Connect up MAC/PHY operations table */
742 rc = efx->type->probe_port(efx);
743 if (rc)
744 goto err;
746 if (phy_flash_cfg)
747 efx->phy_mode = PHY_MODE_SPECIAL;
749 /* Sanity check MAC address */
750 if (is_valid_ether_addr(efx->mac_address)) {
751 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
752 } else {
753 EFX_ERR(efx, "invalid MAC address %pM\n",
754 efx->mac_address);
755 if (!allow_bad_hwaddr) {
756 rc = -EINVAL;
757 goto err;
759 random_ether_addr(efx->net_dev->dev_addr);
760 EFX_INFO(efx, "using locally-generated MAC %pM\n",
761 efx->net_dev->dev_addr);
764 return 0;
766 err:
767 efx_remove_port(efx);
768 return rc;
771 static int efx_init_port(struct efx_nic *efx)
773 int rc;
775 EFX_LOG(efx, "init port\n");
777 mutex_lock(&efx->mac_lock);
779 rc = efx->phy_op->init(efx);
780 if (rc)
781 goto fail1;
783 efx->port_initialized = true;
785 /* Reconfigure the MAC before creating dma queues (required for
786 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
787 efx->mac_op->reconfigure(efx);
789 /* Ensure the PHY advertises the correct flow control settings */
790 rc = efx->phy_op->reconfigure(efx);
791 if (rc)
792 goto fail2;
794 mutex_unlock(&efx->mac_lock);
795 return 0;
797 fail2:
798 efx->phy_op->fini(efx);
799 fail1:
800 mutex_unlock(&efx->mac_lock);
801 return rc;
804 static void efx_start_port(struct efx_nic *efx)
806 EFX_LOG(efx, "start port\n");
807 BUG_ON(efx->port_enabled);
809 mutex_lock(&efx->mac_lock);
810 efx->port_enabled = true;
812 /* efx_mac_work() might have been scheduled after efx_stop_port(),
813 * and then cancelled by efx_flush_all() */
814 efx->type->push_multicast_hash(efx);
815 efx->mac_op->reconfigure(efx);
817 mutex_unlock(&efx->mac_lock);
820 /* Prevent efx_mac_work() and efx_monitor() from working */
821 static void efx_stop_port(struct efx_nic *efx)
823 EFX_LOG(efx, "stop port\n");
825 mutex_lock(&efx->mac_lock);
826 efx->port_enabled = false;
827 mutex_unlock(&efx->mac_lock);
829 /* Serialise against efx_set_multicast_list() */
830 if (efx_dev_registered(efx)) {
831 netif_addr_lock_bh(efx->net_dev);
832 netif_addr_unlock_bh(efx->net_dev);
836 static void efx_fini_port(struct efx_nic *efx)
838 EFX_LOG(efx, "shut down port\n");
840 if (!efx->port_initialized)
841 return;
843 efx->phy_op->fini(efx);
844 efx->port_initialized = false;
846 efx->link_state.up = false;
847 efx_link_status_changed(efx);
850 static void efx_remove_port(struct efx_nic *efx)
852 EFX_LOG(efx, "destroying port\n");
854 efx->type->remove_port(efx);
857 /**************************************************************************
859 * NIC handling
861 **************************************************************************/
863 /* This configures the PCI device to enable I/O and DMA. */
864 static int efx_init_io(struct efx_nic *efx)
866 struct pci_dev *pci_dev = efx->pci_dev;
867 dma_addr_t dma_mask = efx->type->max_dma_mask;
868 int rc;
870 EFX_LOG(efx, "initialising I/O\n");
872 rc = pci_enable_device(pci_dev);
873 if (rc) {
874 EFX_ERR(efx, "failed to enable PCI device\n");
875 goto fail1;
878 pci_set_master(pci_dev);
880 /* Set the PCI DMA mask. Try all possibilities from our
881 * genuine mask down to 32 bits, because some architectures
882 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
883 * masks event though they reject 46 bit masks.
885 while (dma_mask > 0x7fffffffUL) {
886 if (pci_dma_supported(pci_dev, dma_mask) &&
887 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
888 break;
889 dma_mask >>= 1;
891 if (rc) {
892 EFX_ERR(efx, "could not find a suitable DMA mask\n");
893 goto fail2;
895 EFX_LOG(efx, "using DMA mask %llx\n", (unsigned long long) dma_mask);
896 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
897 if (rc) {
898 /* pci_set_consistent_dma_mask() is not *allowed* to
899 * fail with a mask that pci_set_dma_mask() accepted,
900 * but just in case...
902 EFX_ERR(efx, "failed to set consistent DMA mask\n");
903 goto fail2;
906 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
907 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
908 if (rc) {
909 EFX_ERR(efx, "request for memory BAR failed\n");
910 rc = -EIO;
911 goto fail3;
913 efx->membase = ioremap_nocache(efx->membase_phys,
914 efx->type->mem_map_size);
915 if (!efx->membase) {
916 EFX_ERR(efx, "could not map memory BAR at %llx+%x\n",
917 (unsigned long long)efx->membase_phys,
918 efx->type->mem_map_size);
919 rc = -ENOMEM;
920 goto fail4;
922 EFX_LOG(efx, "memory BAR at %llx+%x (virtual %p)\n",
923 (unsigned long long)efx->membase_phys,
924 efx->type->mem_map_size, efx->membase);
926 return 0;
928 fail4:
929 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
930 fail3:
931 efx->membase_phys = 0;
932 fail2:
933 pci_disable_device(efx->pci_dev);
934 fail1:
935 return rc;
938 static void efx_fini_io(struct efx_nic *efx)
940 EFX_LOG(efx, "shutting down I/O\n");
942 if (efx->membase) {
943 iounmap(efx->membase);
944 efx->membase = NULL;
947 if (efx->membase_phys) {
948 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
949 efx->membase_phys = 0;
952 pci_disable_device(efx->pci_dev);
955 /* Get number of RX queues wanted. Return number of online CPU
956 * packages in the expectation that an IRQ balancer will spread
957 * interrupts across them. */
958 static int efx_wanted_rx_queues(void)
960 cpumask_var_t core_mask;
961 int count;
962 int cpu;
964 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
965 printk(KERN_WARNING
966 "sfc: RSS disabled due to allocation failure\n");
967 return 1;
970 count = 0;
971 for_each_online_cpu(cpu) {
972 if (!cpumask_test_cpu(cpu, core_mask)) {
973 ++count;
974 cpumask_or(core_mask, core_mask,
975 topology_core_cpumask(cpu));
979 free_cpumask_var(core_mask);
980 return count;
983 /* Probe the number and type of interrupts we are able to obtain, and
984 * the resulting numbers of channels and RX queues.
986 static void efx_probe_interrupts(struct efx_nic *efx)
988 int max_channels =
989 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
990 int rc, i;
992 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
993 struct msix_entry xentries[EFX_MAX_CHANNELS];
994 int wanted_ints;
995 int rx_queues;
997 /* We want one RX queue and interrupt per CPU package
998 * (or as specified by the rss_cpus module parameter).
999 * We will need one channel per interrupt.
1001 rx_queues = rss_cpus ? rss_cpus : efx_wanted_rx_queues();
1002 wanted_ints = rx_queues + (separate_tx_channels ? 1 : 0);
1003 wanted_ints = min(wanted_ints, max_channels);
1005 for (i = 0; i < wanted_ints; i++)
1006 xentries[i].entry = i;
1007 rc = pci_enable_msix(efx->pci_dev, xentries, wanted_ints);
1008 if (rc > 0) {
1009 EFX_ERR(efx, "WARNING: Insufficient MSI-X vectors"
1010 " available (%d < %d).\n", rc, wanted_ints);
1011 EFX_ERR(efx, "WARNING: Performance may be reduced.\n");
1012 EFX_BUG_ON_PARANOID(rc >= wanted_ints);
1013 wanted_ints = rc;
1014 rc = pci_enable_msix(efx->pci_dev, xentries,
1015 wanted_ints);
1018 if (rc == 0) {
1019 efx->n_rx_queues = min(rx_queues, wanted_ints);
1020 efx->n_channels = wanted_ints;
1021 for (i = 0; i < wanted_ints; i++)
1022 efx->channel[i].irq = xentries[i].vector;
1023 } else {
1024 /* Fall back to single channel MSI */
1025 efx->interrupt_mode = EFX_INT_MODE_MSI;
1026 EFX_ERR(efx, "could not enable MSI-X\n");
1030 /* Try single interrupt MSI */
1031 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1032 efx->n_rx_queues = 1;
1033 efx->n_channels = 1;
1034 rc = pci_enable_msi(efx->pci_dev);
1035 if (rc == 0) {
1036 efx->channel[0].irq = efx->pci_dev->irq;
1037 } else {
1038 EFX_ERR(efx, "could not enable MSI\n");
1039 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1043 /* Assume legacy interrupts */
1044 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1045 efx->n_rx_queues = 1;
1046 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1047 efx->legacy_irq = efx->pci_dev->irq;
1051 static void efx_remove_interrupts(struct efx_nic *efx)
1053 struct efx_channel *channel;
1055 /* Remove MSI/MSI-X interrupts */
1056 efx_for_each_channel(channel, efx)
1057 channel->irq = 0;
1058 pci_disable_msi(efx->pci_dev);
1059 pci_disable_msix(efx->pci_dev);
1061 /* Remove legacy interrupt */
1062 efx->legacy_irq = 0;
1065 static void efx_set_channels(struct efx_nic *efx)
1067 struct efx_tx_queue *tx_queue;
1068 struct efx_rx_queue *rx_queue;
1070 efx_for_each_tx_queue(tx_queue, efx) {
1071 if (separate_tx_channels)
1072 tx_queue->channel = &efx->channel[efx->n_channels-1];
1073 else
1074 tx_queue->channel = &efx->channel[0];
1075 tx_queue->channel->used_flags |= EFX_USED_BY_TX;
1078 efx_for_each_rx_queue(rx_queue, efx) {
1079 rx_queue->channel = &efx->channel[rx_queue->queue];
1080 rx_queue->channel->used_flags |= EFX_USED_BY_RX;
1084 static int efx_probe_nic(struct efx_nic *efx)
1086 int rc;
1088 EFX_LOG(efx, "creating NIC\n");
1090 /* Carry out hardware-type specific initialisation */
1091 rc = efx->type->probe(efx);
1092 if (rc)
1093 return rc;
1095 /* Determine the number of channels and RX queues by trying to hook
1096 * in MSI-X interrupts. */
1097 efx_probe_interrupts(efx);
1099 efx_set_channels(efx);
1101 /* Initialise the interrupt moderation settings */
1102 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1104 return 0;
1107 static void efx_remove_nic(struct efx_nic *efx)
1109 EFX_LOG(efx, "destroying NIC\n");
1111 efx_remove_interrupts(efx);
1112 efx->type->remove(efx);
1115 /**************************************************************************
1117 * NIC startup/shutdown
1119 *************************************************************************/
1121 static int efx_probe_all(struct efx_nic *efx)
1123 struct efx_channel *channel;
1124 int rc;
1126 /* Create NIC */
1127 rc = efx_probe_nic(efx);
1128 if (rc) {
1129 EFX_ERR(efx, "failed to create NIC\n");
1130 goto fail1;
1133 /* Create port */
1134 rc = efx_probe_port(efx);
1135 if (rc) {
1136 EFX_ERR(efx, "failed to create port\n");
1137 goto fail2;
1140 /* Create channels */
1141 efx_for_each_channel(channel, efx) {
1142 rc = efx_probe_channel(channel);
1143 if (rc) {
1144 EFX_ERR(efx, "failed to create channel %d\n",
1145 channel->channel);
1146 goto fail3;
1149 efx_set_channel_names(efx);
1151 return 0;
1153 fail3:
1154 efx_for_each_channel(channel, efx)
1155 efx_remove_channel(channel);
1156 efx_remove_port(efx);
1157 fail2:
1158 efx_remove_nic(efx);
1159 fail1:
1160 return rc;
1163 /* Called after previous invocation(s) of efx_stop_all, restarts the
1164 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1165 * and ensures that the port is scheduled to be reconfigured.
1166 * This function is safe to call multiple times when the NIC is in any
1167 * state. */
1168 static void efx_start_all(struct efx_nic *efx)
1170 struct efx_channel *channel;
1172 EFX_ASSERT_RESET_SERIALISED(efx);
1174 /* Check that it is appropriate to restart the interface. All
1175 * of these flags are safe to read under just the rtnl lock */
1176 if (efx->port_enabled)
1177 return;
1178 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1179 return;
1180 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1181 return;
1183 /* Mark the port as enabled so port reconfigurations can start, then
1184 * restart the transmit interface early so the watchdog timer stops */
1185 efx_start_port(efx);
1186 if (efx_dev_registered(efx))
1187 efx_wake_queue(efx);
1189 efx_for_each_channel(channel, efx)
1190 efx_start_channel(channel);
1192 efx_nic_enable_interrupts(efx);
1194 /* Start the hardware monitor if there is one. Otherwise (we're link
1195 * event driven), we have to poll the PHY because after an event queue
1196 * flush, we could have a missed a link state change */
1197 if (efx->type->monitor != NULL) {
1198 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1199 efx_monitor_interval);
1200 } else {
1201 mutex_lock(&efx->mac_lock);
1202 if (efx->phy_op->poll(efx))
1203 efx_link_status_changed(efx);
1204 mutex_unlock(&efx->mac_lock);
1207 efx->type->start_stats(efx);
1210 /* Flush all delayed work. Should only be called when no more delayed work
1211 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1212 * since we're holding the rtnl_lock at this point. */
1213 static void efx_flush_all(struct efx_nic *efx)
1215 struct efx_rx_queue *rx_queue;
1217 /* Make sure the hardware monitor is stopped */
1218 cancel_delayed_work_sync(&efx->monitor_work);
1220 /* Ensure that all RX slow refills are complete. */
1221 efx_for_each_rx_queue(rx_queue, efx)
1222 cancel_delayed_work_sync(&rx_queue->work);
1224 /* Stop scheduled port reconfigurations */
1225 cancel_work_sync(&efx->mac_work);
1228 /* Quiesce hardware and software without bringing the link down.
1229 * Safe to call multiple times, when the nic and interface is in any
1230 * state. The caller is guaranteed to subsequently be in a position
1231 * to modify any hardware and software state they see fit without
1232 * taking locks. */
1233 static void efx_stop_all(struct efx_nic *efx)
1235 struct efx_channel *channel;
1237 EFX_ASSERT_RESET_SERIALISED(efx);
1239 /* port_enabled can be read safely under the rtnl lock */
1240 if (!efx->port_enabled)
1241 return;
1243 efx->type->stop_stats(efx);
1245 /* Disable interrupts and wait for ISR to complete */
1246 efx_nic_disable_interrupts(efx);
1247 if (efx->legacy_irq)
1248 synchronize_irq(efx->legacy_irq);
1249 efx_for_each_channel(channel, efx) {
1250 if (channel->irq)
1251 synchronize_irq(channel->irq);
1254 /* Stop all NAPI processing and synchronous rx refills */
1255 efx_for_each_channel(channel, efx)
1256 efx_stop_channel(channel);
1258 /* Stop all asynchronous port reconfigurations. Since all
1259 * event processing has already been stopped, there is no
1260 * window to loose phy events */
1261 efx_stop_port(efx);
1263 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1264 efx_flush_all(efx);
1266 /* Stop the kernel transmit interface late, so the watchdog
1267 * timer isn't ticking over the flush */
1268 if (efx_dev_registered(efx)) {
1269 efx_stop_queue(efx);
1270 netif_tx_lock_bh(efx->net_dev);
1271 netif_tx_unlock_bh(efx->net_dev);
1275 static void efx_remove_all(struct efx_nic *efx)
1277 struct efx_channel *channel;
1279 efx_for_each_channel(channel, efx)
1280 efx_remove_channel(channel);
1281 efx_remove_port(efx);
1282 efx_remove_nic(efx);
1285 /**************************************************************************
1287 * Interrupt moderation
1289 **************************************************************************/
1291 static unsigned irq_mod_ticks(int usecs, int resolution)
1293 if (usecs <= 0)
1294 return 0; /* cannot receive interrupts ahead of time :-) */
1295 if (usecs < resolution)
1296 return 1; /* never round down to 0 */
1297 return usecs / resolution;
1300 /* Set interrupt moderation parameters */
1301 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1302 bool rx_adaptive)
1304 struct efx_tx_queue *tx_queue;
1305 struct efx_rx_queue *rx_queue;
1306 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1307 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1309 EFX_ASSERT_RESET_SERIALISED(efx);
1311 efx_for_each_tx_queue(tx_queue, efx)
1312 tx_queue->channel->irq_moderation = tx_ticks;
1314 efx->irq_rx_adaptive = rx_adaptive;
1315 efx->irq_rx_moderation = rx_ticks;
1316 efx_for_each_rx_queue(rx_queue, efx)
1317 rx_queue->channel->irq_moderation = rx_ticks;
1320 /**************************************************************************
1322 * Hardware monitor
1324 **************************************************************************/
1326 /* Run periodically off the general workqueue. Serialised against
1327 * efx_reconfigure_port via the mac_lock */
1328 static void efx_monitor(struct work_struct *data)
1330 struct efx_nic *efx = container_of(data, struct efx_nic,
1331 monitor_work.work);
1333 EFX_TRACE(efx, "hardware monitor executing on CPU %d\n",
1334 raw_smp_processor_id());
1335 BUG_ON(efx->type->monitor == NULL);
1337 /* If the mac_lock is already held then it is likely a port
1338 * reconfiguration is already in place, which will likely do
1339 * most of the work of check_hw() anyway. */
1340 if (!mutex_trylock(&efx->mac_lock))
1341 goto out_requeue;
1342 if (!efx->port_enabled)
1343 goto out_unlock;
1344 efx->type->monitor(efx);
1346 out_unlock:
1347 mutex_unlock(&efx->mac_lock);
1348 out_requeue:
1349 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1350 efx_monitor_interval);
1353 /**************************************************************************
1355 * ioctls
1357 *************************************************************************/
1359 /* Net device ioctl
1360 * Context: process, rtnl_lock() held.
1362 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1364 struct efx_nic *efx = netdev_priv(net_dev);
1365 struct mii_ioctl_data *data = if_mii(ifr);
1367 EFX_ASSERT_RESET_SERIALISED(efx);
1369 /* Convert phy_id from older PRTAD/DEVAD format */
1370 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1371 (data->phy_id & 0xfc00) == 0x0400)
1372 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1374 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1377 /**************************************************************************
1379 * NAPI interface
1381 **************************************************************************/
1383 static int efx_init_napi(struct efx_nic *efx)
1385 struct efx_channel *channel;
1387 efx_for_each_channel(channel, efx) {
1388 channel->napi_dev = efx->net_dev;
1389 netif_napi_add(channel->napi_dev, &channel->napi_str,
1390 efx_poll, napi_weight);
1392 return 0;
1395 static void efx_fini_napi(struct efx_nic *efx)
1397 struct efx_channel *channel;
1399 efx_for_each_channel(channel, efx) {
1400 if (channel->napi_dev)
1401 netif_napi_del(&channel->napi_str);
1402 channel->napi_dev = NULL;
1406 /**************************************************************************
1408 * Kernel netpoll interface
1410 *************************************************************************/
1412 #ifdef CONFIG_NET_POLL_CONTROLLER
1414 /* Although in the common case interrupts will be disabled, this is not
1415 * guaranteed. However, all our work happens inside the NAPI callback,
1416 * so no locking is required.
1418 static void efx_netpoll(struct net_device *net_dev)
1420 struct efx_nic *efx = netdev_priv(net_dev);
1421 struct efx_channel *channel;
1423 efx_for_each_channel(channel, efx)
1424 efx_schedule_channel(channel);
1427 #endif
1429 /**************************************************************************
1431 * Kernel net device interface
1433 *************************************************************************/
1435 /* Context: process, rtnl_lock() held. */
1436 static int efx_net_open(struct net_device *net_dev)
1438 struct efx_nic *efx = netdev_priv(net_dev);
1439 EFX_ASSERT_RESET_SERIALISED(efx);
1441 EFX_LOG(efx, "opening device %s on CPU %d\n", net_dev->name,
1442 raw_smp_processor_id());
1444 if (efx->state == STATE_DISABLED)
1445 return -EIO;
1446 if (efx->phy_mode & PHY_MODE_SPECIAL)
1447 return -EBUSY;
1449 /* Notify the kernel of the link state polled during driver load,
1450 * before the monitor starts running */
1451 efx_link_status_changed(efx);
1453 efx_start_all(efx);
1454 return 0;
1457 /* Context: process, rtnl_lock() held.
1458 * Note that the kernel will ignore our return code; this method
1459 * should really be a void.
1461 static int efx_net_stop(struct net_device *net_dev)
1463 struct efx_nic *efx = netdev_priv(net_dev);
1465 EFX_LOG(efx, "closing %s on CPU %d\n", net_dev->name,
1466 raw_smp_processor_id());
1468 if (efx->state != STATE_DISABLED) {
1469 /* Stop the device and flush all the channels */
1470 efx_stop_all(efx);
1471 efx_fini_channels(efx);
1472 efx_init_channels(efx);
1475 return 0;
1478 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1479 static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
1481 struct efx_nic *efx = netdev_priv(net_dev);
1482 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1483 struct net_device_stats *stats = &net_dev->stats;
1485 spin_lock_bh(&efx->stats_lock);
1486 efx->type->update_stats(efx);
1487 spin_unlock_bh(&efx->stats_lock);
1489 stats->rx_packets = mac_stats->rx_packets;
1490 stats->tx_packets = mac_stats->tx_packets;
1491 stats->rx_bytes = mac_stats->rx_bytes;
1492 stats->tx_bytes = mac_stats->tx_bytes;
1493 stats->multicast = mac_stats->rx_multicast;
1494 stats->collisions = mac_stats->tx_collision;
1495 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1496 mac_stats->rx_length_error);
1497 stats->rx_over_errors = efx->n_rx_nodesc_drop_cnt;
1498 stats->rx_crc_errors = mac_stats->rx_bad;
1499 stats->rx_frame_errors = mac_stats->rx_align_error;
1500 stats->rx_fifo_errors = mac_stats->rx_overflow;
1501 stats->rx_missed_errors = mac_stats->rx_missed;
1502 stats->tx_window_errors = mac_stats->tx_late_collision;
1504 stats->rx_errors = (stats->rx_length_errors +
1505 stats->rx_over_errors +
1506 stats->rx_crc_errors +
1507 stats->rx_frame_errors +
1508 stats->rx_fifo_errors +
1509 stats->rx_missed_errors +
1510 mac_stats->rx_symbol_error);
1511 stats->tx_errors = (stats->tx_window_errors +
1512 mac_stats->tx_bad);
1514 return stats;
1517 /* Context: netif_tx_lock held, BHs disabled. */
1518 static void efx_watchdog(struct net_device *net_dev)
1520 struct efx_nic *efx = netdev_priv(net_dev);
1522 EFX_ERR(efx, "TX stuck with stop_count=%d port_enabled=%d:"
1523 " resetting channels\n",
1524 atomic_read(&efx->netif_stop_count), efx->port_enabled);
1526 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1530 /* Context: process, rtnl_lock() held. */
1531 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1533 struct efx_nic *efx = netdev_priv(net_dev);
1534 int rc = 0;
1536 EFX_ASSERT_RESET_SERIALISED(efx);
1538 if (new_mtu > EFX_MAX_MTU)
1539 return -EINVAL;
1541 efx_stop_all(efx);
1543 EFX_LOG(efx, "changing MTU to %d\n", new_mtu);
1545 efx_fini_channels(efx);
1547 mutex_lock(&efx->mac_lock);
1548 /* Reconfigure the MAC before enabling the dma queues so that
1549 * the RX buffers don't overflow */
1550 net_dev->mtu = new_mtu;
1551 efx->mac_op->reconfigure(efx);
1552 mutex_unlock(&efx->mac_lock);
1554 efx_init_channels(efx);
1556 efx_start_all(efx);
1557 return rc;
1560 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1562 struct efx_nic *efx = netdev_priv(net_dev);
1563 struct sockaddr *addr = data;
1564 char *new_addr = addr->sa_data;
1566 EFX_ASSERT_RESET_SERIALISED(efx);
1568 if (!is_valid_ether_addr(new_addr)) {
1569 EFX_ERR(efx, "invalid ethernet MAC address requested: %pM\n",
1570 new_addr);
1571 return -EINVAL;
1574 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1576 /* Reconfigure the MAC */
1577 mutex_lock(&efx->mac_lock);
1578 efx->mac_op->reconfigure(efx);
1579 mutex_unlock(&efx->mac_lock);
1581 return 0;
1584 /* Context: netif_addr_lock held, BHs disabled. */
1585 static void efx_set_multicast_list(struct net_device *net_dev)
1587 struct efx_nic *efx = netdev_priv(net_dev);
1588 struct dev_mc_list *mc_list = net_dev->mc_list;
1589 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1590 u32 crc;
1591 int bit;
1592 int i;
1594 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1596 /* Build multicast hash table */
1597 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1598 memset(mc_hash, 0xff, sizeof(*mc_hash));
1599 } else {
1600 memset(mc_hash, 0x00, sizeof(*mc_hash));
1601 for (i = 0; i < net_dev->mc_count; i++) {
1602 crc = ether_crc_le(ETH_ALEN, mc_list->dmi_addr);
1603 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1604 set_bit_le(bit, mc_hash->byte);
1605 mc_list = mc_list->next;
1608 /* Broadcast packets go through the multicast hash filter.
1609 * ether_crc_le() of the broadcast address is 0xbe2612ff
1610 * so we always add bit 0xff to the mask.
1612 set_bit_le(0xff, mc_hash->byte);
1615 if (efx->port_enabled)
1616 queue_work(efx->workqueue, &efx->mac_work);
1617 /* Otherwise efx_start_port() will do this */
1620 static const struct net_device_ops efx_netdev_ops = {
1621 .ndo_open = efx_net_open,
1622 .ndo_stop = efx_net_stop,
1623 .ndo_get_stats = efx_net_stats,
1624 .ndo_tx_timeout = efx_watchdog,
1625 .ndo_start_xmit = efx_hard_start_xmit,
1626 .ndo_validate_addr = eth_validate_addr,
1627 .ndo_do_ioctl = efx_ioctl,
1628 .ndo_change_mtu = efx_change_mtu,
1629 .ndo_set_mac_address = efx_set_mac_address,
1630 .ndo_set_multicast_list = efx_set_multicast_list,
1631 #ifdef CONFIG_NET_POLL_CONTROLLER
1632 .ndo_poll_controller = efx_netpoll,
1633 #endif
1636 static void efx_update_name(struct efx_nic *efx)
1638 strcpy(efx->name, efx->net_dev->name);
1639 efx_mtd_rename(efx);
1640 efx_set_channel_names(efx);
1643 static int efx_netdev_event(struct notifier_block *this,
1644 unsigned long event, void *ptr)
1646 struct net_device *net_dev = ptr;
1648 if (net_dev->netdev_ops == &efx_netdev_ops &&
1649 event == NETDEV_CHANGENAME)
1650 efx_update_name(netdev_priv(net_dev));
1652 return NOTIFY_DONE;
1655 static struct notifier_block efx_netdev_notifier = {
1656 .notifier_call = efx_netdev_event,
1659 static ssize_t
1660 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1662 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1663 return sprintf(buf, "%d\n", efx->phy_type);
1665 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1667 static int efx_register_netdev(struct efx_nic *efx)
1669 struct net_device *net_dev = efx->net_dev;
1670 int rc;
1672 net_dev->watchdog_timeo = 5 * HZ;
1673 net_dev->irq = efx->pci_dev->irq;
1674 net_dev->netdev_ops = &efx_netdev_ops;
1675 SET_NETDEV_DEV(net_dev, &efx->pci_dev->dev);
1676 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1678 /* Clear MAC statistics */
1679 efx->mac_op->update_stats(efx);
1680 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1682 rtnl_lock();
1684 rc = dev_alloc_name(net_dev, net_dev->name);
1685 if (rc < 0)
1686 goto fail_locked;
1687 efx_update_name(efx);
1689 rc = register_netdevice(net_dev);
1690 if (rc)
1691 goto fail_locked;
1693 /* Always start with carrier off; PHY events will detect the link */
1694 netif_carrier_off(efx->net_dev);
1696 rtnl_unlock();
1698 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1699 if (rc) {
1700 EFX_ERR(efx, "failed to init net dev attributes\n");
1701 goto fail_registered;
1704 return 0;
1706 fail_locked:
1707 rtnl_unlock();
1708 EFX_ERR(efx, "could not register net dev\n");
1709 return rc;
1711 fail_registered:
1712 unregister_netdev(net_dev);
1713 return rc;
1716 static void efx_unregister_netdev(struct efx_nic *efx)
1718 struct efx_tx_queue *tx_queue;
1720 if (!efx->net_dev)
1721 return;
1723 BUG_ON(netdev_priv(efx->net_dev) != efx);
1725 /* Free up any skbs still remaining. This has to happen before
1726 * we try to unregister the netdev as running their destructors
1727 * may be needed to get the device ref. count to 0. */
1728 efx_for_each_tx_queue(tx_queue, efx)
1729 efx_release_tx_buffers(tx_queue);
1731 if (efx_dev_registered(efx)) {
1732 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1733 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1734 unregister_netdev(efx->net_dev);
1738 /**************************************************************************
1740 * Device reset and suspend
1742 **************************************************************************/
1744 /* Tears down the entire software state and most of the hardware state
1745 * before reset. */
1746 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
1748 EFX_ASSERT_RESET_SERIALISED(efx);
1750 efx_stop_all(efx);
1751 mutex_lock(&efx->mac_lock);
1752 mutex_lock(&efx->spi_lock);
1754 efx_fini_channels(efx);
1755 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1756 efx->phy_op->fini(efx);
1757 efx->type->fini(efx);
1760 /* This function will always ensure that the locks acquired in
1761 * efx_reset_down() are released. A failure return code indicates
1762 * that we were unable to reinitialise the hardware, and the
1763 * driver should be disabled. If ok is false, then the rx and tx
1764 * engines are not restarted, pending a RESET_DISABLE. */
1765 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
1767 int rc;
1769 EFX_ASSERT_RESET_SERIALISED(efx);
1771 rc = efx->type->init(efx);
1772 if (rc) {
1773 EFX_ERR(efx, "failed to initialise NIC\n");
1774 goto fail;
1777 if (!ok)
1778 goto fail;
1780 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1781 rc = efx->phy_op->init(efx);
1782 if (rc)
1783 goto fail;
1784 if (efx->phy_op->reconfigure(efx))
1785 EFX_ERR(efx, "could not restore PHY settings\n");
1788 efx->mac_op->reconfigure(efx);
1790 efx_init_channels(efx);
1792 mutex_unlock(&efx->spi_lock);
1793 mutex_unlock(&efx->mac_lock);
1795 efx_start_all(efx);
1797 return 0;
1799 fail:
1800 efx->port_initialized = false;
1802 mutex_unlock(&efx->spi_lock);
1803 mutex_unlock(&efx->mac_lock);
1805 return rc;
1808 /* Reset the NIC using the specified method. Note that the reset may
1809 * fail, in which case the card will be left in an unusable state.
1811 * Caller must hold the rtnl_lock.
1813 int efx_reset(struct efx_nic *efx, enum reset_type method)
1815 int rc, rc2;
1816 bool disabled;
1818 EFX_INFO(efx, "resetting (%s)\n", RESET_TYPE(method));
1820 efx_reset_down(efx, method);
1822 rc = efx->type->reset(efx, method);
1823 if (rc) {
1824 EFX_ERR(efx, "failed to reset hardware\n");
1825 goto out;
1828 /* Allow resets to be rescheduled. */
1829 efx->reset_pending = RESET_TYPE_NONE;
1831 /* Reinitialise bus-mastering, which may have been turned off before
1832 * the reset was scheduled. This is still appropriate, even in the
1833 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1834 * can respond to requests. */
1835 pci_set_master(efx->pci_dev);
1837 out:
1838 /* Leave device stopped if necessary */
1839 disabled = rc || method == RESET_TYPE_DISABLE;
1840 rc2 = efx_reset_up(efx, method, !disabled);
1841 if (rc2) {
1842 disabled = true;
1843 if (!rc)
1844 rc = rc2;
1847 if (disabled) {
1848 EFX_ERR(efx, "has been disabled\n");
1849 efx->state = STATE_DISABLED;
1850 } else {
1851 EFX_LOG(efx, "reset complete\n");
1853 return rc;
1856 /* The worker thread exists so that code that cannot sleep can
1857 * schedule a reset for later.
1859 static void efx_reset_work(struct work_struct *data)
1861 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
1863 /* If we're not RUNNING then don't reset. Leave the reset_pending
1864 * flag set so that efx_pci_probe_main will be retried */
1865 if (efx->state != STATE_RUNNING) {
1866 EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
1867 return;
1870 rtnl_lock();
1871 if (efx_reset(efx, efx->reset_pending))
1872 dev_close(efx->net_dev);
1873 rtnl_unlock();
1876 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1878 enum reset_type method;
1880 if (efx->reset_pending != RESET_TYPE_NONE) {
1881 EFX_INFO(efx, "quenching already scheduled reset\n");
1882 return;
1885 switch (type) {
1886 case RESET_TYPE_INVISIBLE:
1887 case RESET_TYPE_ALL:
1888 case RESET_TYPE_WORLD:
1889 case RESET_TYPE_DISABLE:
1890 method = type;
1891 break;
1892 case RESET_TYPE_RX_RECOVERY:
1893 case RESET_TYPE_RX_DESC_FETCH:
1894 case RESET_TYPE_TX_DESC_FETCH:
1895 case RESET_TYPE_TX_SKIP:
1896 method = RESET_TYPE_INVISIBLE;
1897 break;
1898 default:
1899 method = RESET_TYPE_ALL;
1900 break;
1903 if (method != type)
1904 EFX_LOG(efx, "scheduling %s reset for %s\n",
1905 RESET_TYPE(method), RESET_TYPE(type));
1906 else
1907 EFX_LOG(efx, "scheduling %s reset\n", RESET_TYPE(method));
1909 efx->reset_pending = method;
1911 queue_work(reset_workqueue, &efx->reset_work);
1914 /**************************************************************************
1916 * List of NICs we support
1918 **************************************************************************/
1920 /* PCI device ID table */
1921 static struct pci_device_id efx_pci_table[] __devinitdata = {
1922 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
1923 .driver_data = (unsigned long) &falcon_a1_nic_type},
1924 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
1925 .driver_data = (unsigned long) &falcon_b0_nic_type},
1926 {0} /* end of list */
1929 /**************************************************************************
1931 * Dummy PHY/MAC operations
1933 * Can be used for some unimplemented operations
1934 * Needed so all function pointers are valid and do not have to be tested
1935 * before use
1937 **************************************************************************/
1938 int efx_port_dummy_op_int(struct efx_nic *efx)
1940 return 0;
1942 void efx_port_dummy_op_void(struct efx_nic *efx) {}
1943 void efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1946 bool efx_port_dummy_op_poll(struct efx_nic *efx)
1948 return false;
1951 static struct efx_phy_operations efx_dummy_phy_operations = {
1952 .init = efx_port_dummy_op_int,
1953 .reconfigure = efx_port_dummy_op_int,
1954 .poll = efx_port_dummy_op_poll,
1955 .fini = efx_port_dummy_op_void,
1958 /**************************************************************************
1960 * Data housekeeping
1962 **************************************************************************/
1964 /* This zeroes out and then fills in the invariants in a struct
1965 * efx_nic (including all sub-structures).
1967 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1968 struct pci_dev *pci_dev, struct net_device *net_dev)
1970 struct efx_channel *channel;
1971 struct efx_tx_queue *tx_queue;
1972 struct efx_rx_queue *rx_queue;
1973 int i;
1975 /* Initialise common structures */
1976 memset(efx, 0, sizeof(*efx));
1977 spin_lock_init(&efx->biu_lock);
1978 mutex_init(&efx->mdio_lock);
1979 mutex_init(&efx->spi_lock);
1980 #ifdef CONFIG_SFC_MTD
1981 INIT_LIST_HEAD(&efx->mtd_list);
1982 #endif
1983 INIT_WORK(&efx->reset_work, efx_reset_work);
1984 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1985 efx->pci_dev = pci_dev;
1986 efx->state = STATE_INIT;
1987 efx->reset_pending = RESET_TYPE_NONE;
1988 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1990 efx->net_dev = net_dev;
1991 efx->rx_checksum_enabled = true;
1992 spin_lock_init(&efx->netif_stop_lock);
1993 spin_lock_init(&efx->stats_lock);
1994 mutex_init(&efx->mac_lock);
1995 efx->mac_op = type->default_mac_ops;
1996 efx->phy_op = &efx_dummy_phy_operations;
1997 efx->mdio.dev = net_dev;
1998 INIT_WORK(&efx->mac_work, efx_mac_work);
1999 atomic_set(&efx->netif_stop_count, 1);
2001 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2002 channel = &efx->channel[i];
2003 channel->efx = efx;
2004 channel->channel = i;
2005 channel->work_pending = false;
2007 for (i = 0; i < EFX_TX_QUEUE_COUNT; i++) {
2008 tx_queue = &efx->tx_queue[i];
2009 tx_queue->efx = efx;
2010 tx_queue->queue = i;
2011 tx_queue->buffer = NULL;
2012 tx_queue->channel = &efx->channel[0]; /* for safety */
2013 tx_queue->tso_headers_free = NULL;
2015 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
2016 rx_queue = &efx->rx_queue[i];
2017 rx_queue->efx = efx;
2018 rx_queue->queue = i;
2019 rx_queue->channel = &efx->channel[0]; /* for safety */
2020 rx_queue->buffer = NULL;
2021 spin_lock_init(&rx_queue->add_lock);
2022 INIT_DELAYED_WORK(&rx_queue->work, efx_rx_work);
2025 efx->type = type;
2027 /* As close as we can get to guaranteeing that we don't overflow */
2028 BUILD_BUG_ON(EFX_EVQ_SIZE < EFX_TXQ_SIZE + EFX_RXQ_SIZE);
2030 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2032 /* Higher numbered interrupt modes are less capable! */
2033 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2034 interrupt_mode);
2036 /* Would be good to use the net_dev name, but we're too early */
2037 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2038 pci_name(pci_dev));
2039 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2040 if (!efx->workqueue)
2041 return -ENOMEM;
2043 return 0;
2046 static void efx_fini_struct(struct efx_nic *efx)
2048 if (efx->workqueue) {
2049 destroy_workqueue(efx->workqueue);
2050 efx->workqueue = NULL;
2054 /**************************************************************************
2056 * PCI interface
2058 **************************************************************************/
2060 /* Main body of final NIC shutdown code
2061 * This is called only at module unload (or hotplug removal).
2063 static void efx_pci_remove_main(struct efx_nic *efx)
2065 efx_nic_fini_interrupt(efx);
2066 efx_fini_channels(efx);
2067 efx_fini_port(efx);
2068 efx->type->fini(efx);
2069 efx_fini_napi(efx);
2070 efx_remove_all(efx);
2073 /* Final NIC shutdown
2074 * This is called only at module unload (or hotplug removal).
2076 static void efx_pci_remove(struct pci_dev *pci_dev)
2078 struct efx_nic *efx;
2080 efx = pci_get_drvdata(pci_dev);
2081 if (!efx)
2082 return;
2084 /* Mark the NIC as fini, then stop the interface */
2085 rtnl_lock();
2086 efx->state = STATE_FINI;
2087 dev_close(efx->net_dev);
2089 /* Allow any queued efx_resets() to complete */
2090 rtnl_unlock();
2092 efx_unregister_netdev(efx);
2094 efx_mtd_remove(efx);
2096 /* Wait for any scheduled resets to complete. No more will be
2097 * scheduled from this point because efx_stop_all() has been
2098 * called, we are no longer registered with driverlink, and
2099 * the net_device's have been removed. */
2100 cancel_work_sync(&efx->reset_work);
2102 efx_pci_remove_main(efx);
2104 efx_fini_io(efx);
2105 EFX_LOG(efx, "shutdown successful\n");
2107 pci_set_drvdata(pci_dev, NULL);
2108 efx_fini_struct(efx);
2109 free_netdev(efx->net_dev);
2112 /* Main body of NIC initialisation
2113 * This is called at module load (or hotplug insertion, theoretically).
2115 static int efx_pci_probe_main(struct efx_nic *efx)
2117 int rc;
2119 /* Do start-of-day initialisation */
2120 rc = efx_probe_all(efx);
2121 if (rc)
2122 goto fail1;
2124 rc = efx_init_napi(efx);
2125 if (rc)
2126 goto fail2;
2128 rc = efx->type->init(efx);
2129 if (rc) {
2130 EFX_ERR(efx, "failed to initialise NIC\n");
2131 goto fail3;
2134 rc = efx_init_port(efx);
2135 if (rc) {
2136 EFX_ERR(efx, "failed to initialise port\n");
2137 goto fail4;
2140 efx_init_channels(efx);
2142 rc = efx_nic_init_interrupt(efx);
2143 if (rc)
2144 goto fail5;
2146 return 0;
2148 fail5:
2149 efx_fini_channels(efx);
2150 efx_fini_port(efx);
2151 fail4:
2152 efx->type->fini(efx);
2153 fail3:
2154 efx_fini_napi(efx);
2155 fail2:
2156 efx_remove_all(efx);
2157 fail1:
2158 return rc;
2161 /* NIC initialisation
2163 * This is called at module load (or hotplug insertion,
2164 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2165 * sets up and registers the network devices with the kernel and hooks
2166 * the interrupt service routine. It does not prepare the device for
2167 * transmission; this is left to the first time one of the network
2168 * interfaces is brought up (i.e. efx_net_open).
2170 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2171 const struct pci_device_id *entry)
2173 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2174 struct net_device *net_dev;
2175 struct efx_nic *efx;
2176 int i, rc;
2178 /* Allocate and initialise a struct net_device and struct efx_nic */
2179 net_dev = alloc_etherdev(sizeof(*efx));
2180 if (!net_dev)
2181 return -ENOMEM;
2182 net_dev->features |= (type->offload_features | NETIF_F_SG |
2183 NETIF_F_HIGHDMA | NETIF_F_TSO |
2184 NETIF_F_GRO);
2185 /* Mask for features that also apply to VLAN devices */
2186 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2187 NETIF_F_HIGHDMA | NETIF_F_TSO);
2188 efx = netdev_priv(net_dev);
2189 pci_set_drvdata(pci_dev, efx);
2190 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2191 if (rc)
2192 goto fail1;
2194 EFX_INFO(efx, "Solarflare Communications NIC detected\n");
2196 /* Set up basic I/O (BAR mappings etc) */
2197 rc = efx_init_io(efx);
2198 if (rc)
2199 goto fail2;
2201 /* No serialisation is required with the reset path because
2202 * we're in STATE_INIT. */
2203 for (i = 0; i < 5; i++) {
2204 rc = efx_pci_probe_main(efx);
2206 /* Serialise against efx_reset(). No more resets will be
2207 * scheduled since efx_stop_all() has been called, and we
2208 * have not and never have been registered with either
2209 * the rtnetlink or driverlink layers. */
2210 cancel_work_sync(&efx->reset_work);
2212 if (rc == 0) {
2213 if (efx->reset_pending != RESET_TYPE_NONE) {
2214 /* If there was a scheduled reset during
2215 * probe, the NIC is probably hosed anyway */
2216 efx_pci_remove_main(efx);
2217 rc = -EIO;
2218 } else {
2219 break;
2223 /* Retry if a recoverably reset event has been scheduled */
2224 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2225 (efx->reset_pending != RESET_TYPE_ALL))
2226 goto fail3;
2228 efx->reset_pending = RESET_TYPE_NONE;
2231 if (rc) {
2232 EFX_ERR(efx, "Could not reset NIC\n");
2233 goto fail4;
2236 /* Switch to the running state before we expose the device to the OS,
2237 * so that dev_open()|efx_start_all() will actually start the device */
2238 efx->state = STATE_RUNNING;
2240 rc = efx_register_netdev(efx);
2241 if (rc)
2242 goto fail5;
2244 EFX_LOG(efx, "initialisation successful\n");
2246 rtnl_lock();
2247 efx_mtd_probe(efx); /* allowed to fail */
2248 rtnl_unlock();
2249 return 0;
2251 fail5:
2252 efx_pci_remove_main(efx);
2253 fail4:
2254 fail3:
2255 efx_fini_io(efx);
2256 fail2:
2257 efx_fini_struct(efx);
2258 fail1:
2259 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
2260 free_netdev(net_dev);
2261 return rc;
2264 static int efx_pm_freeze(struct device *dev)
2266 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2268 efx->state = STATE_FINI;
2270 netif_device_detach(efx->net_dev);
2272 efx_stop_all(efx);
2273 efx_fini_channels(efx);
2275 return 0;
2278 static int efx_pm_thaw(struct device *dev)
2280 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2282 efx->state = STATE_INIT;
2284 efx_init_channels(efx);
2286 mutex_lock(&efx->mac_lock);
2287 efx->phy_op->reconfigure(efx);
2288 mutex_unlock(&efx->mac_lock);
2290 efx_start_all(efx);
2292 netif_device_attach(efx->net_dev);
2294 efx->state = STATE_RUNNING;
2296 efx->type->resume_wol(efx);
2298 return 0;
2301 static int efx_pm_poweroff(struct device *dev)
2303 struct pci_dev *pci_dev = to_pci_dev(dev);
2304 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2306 efx->type->fini(efx);
2308 efx->reset_pending = RESET_TYPE_NONE;
2310 pci_save_state(pci_dev);
2311 return pci_set_power_state(pci_dev, PCI_D3hot);
2314 /* Used for both resume and restore */
2315 static int efx_pm_resume(struct device *dev)
2317 struct pci_dev *pci_dev = to_pci_dev(dev);
2318 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2319 int rc;
2321 rc = pci_set_power_state(pci_dev, PCI_D0);
2322 if (rc)
2323 return rc;
2324 pci_restore_state(pci_dev);
2325 rc = pci_enable_device(pci_dev);
2326 if (rc)
2327 return rc;
2328 pci_set_master(efx->pci_dev);
2329 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2330 if (rc)
2331 return rc;
2332 rc = efx->type->init(efx);
2333 if (rc)
2334 return rc;
2335 efx_pm_thaw(dev);
2336 return 0;
2339 static int efx_pm_suspend(struct device *dev)
2341 int rc;
2343 efx_pm_freeze(dev);
2344 rc = efx_pm_poweroff(dev);
2345 if (rc)
2346 efx_pm_resume(dev);
2347 return rc;
2350 static struct dev_pm_ops efx_pm_ops = {
2351 .suspend = efx_pm_suspend,
2352 .resume = efx_pm_resume,
2353 .freeze = efx_pm_freeze,
2354 .thaw = efx_pm_thaw,
2355 .poweroff = efx_pm_poweroff,
2356 .restore = efx_pm_resume,
2359 static struct pci_driver efx_pci_driver = {
2360 .name = EFX_DRIVER_NAME,
2361 .id_table = efx_pci_table,
2362 .probe = efx_pci_probe,
2363 .remove = efx_pci_remove,
2364 .driver.pm = &efx_pm_ops,
2367 /**************************************************************************
2369 * Kernel module interface
2371 *************************************************************************/
2373 module_param(interrupt_mode, uint, 0444);
2374 MODULE_PARM_DESC(interrupt_mode,
2375 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2377 static int __init efx_init_module(void)
2379 int rc;
2381 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2383 rc = register_netdevice_notifier(&efx_netdev_notifier);
2384 if (rc)
2385 goto err_notifier;
2387 refill_workqueue = create_workqueue("sfc_refill");
2388 if (!refill_workqueue) {
2389 rc = -ENOMEM;
2390 goto err_refill;
2392 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2393 if (!reset_workqueue) {
2394 rc = -ENOMEM;
2395 goto err_reset;
2398 rc = pci_register_driver(&efx_pci_driver);
2399 if (rc < 0)
2400 goto err_pci;
2402 return 0;
2404 err_pci:
2405 destroy_workqueue(reset_workqueue);
2406 err_reset:
2407 destroy_workqueue(refill_workqueue);
2408 err_refill:
2409 unregister_netdevice_notifier(&efx_netdev_notifier);
2410 err_notifier:
2411 return rc;
2414 static void __exit efx_exit_module(void)
2416 printk(KERN_INFO "Solarflare NET driver unloading\n");
2418 pci_unregister_driver(&efx_pci_driver);
2419 destroy_workqueue(reset_workqueue);
2420 destroy_workqueue(refill_workqueue);
2421 unregister_netdevice_notifier(&efx_netdev_notifier);
2425 module_init(efx_init_module);
2426 module_exit(efx_exit_module);
2428 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2429 "Solarflare Communications");
2430 MODULE_DESCRIPTION("Solarflare Communications network driver");
2431 MODULE_LICENSE("GPL");
2432 MODULE_DEVICE_TABLE(pci, efx_pci_table);