2 * Copyright (C) ST-Ericsson SA 2013
4 * Author: Patrice Chotard <patrice.chotard@st.com>
5 * License terms: GNU General Public License (GPL) version 2
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/slab.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/err.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/gpio.h>
21 #include <linux/irq.h>
22 #include <linux/irqdomain.h>
23 #include <linux/interrupt.h>
24 #include <linux/bitops.h>
25 #include <linux/mfd/abx500.h>
26 #include <linux/mfd/abx500/ab8500.h>
27 #include <linux/mfd/abx500/ab8500-gpio.h>
28 #include <linux/pinctrl/pinctrl.h>
29 #include <linux/pinctrl/consumer.h>
30 #include <linux/pinctrl/pinmux.h>
31 #include <linux/pinctrl/pinconf.h>
32 #include <linux/pinctrl/pinconf-generic.h>
34 #include "pinctrl-abx500.h"
37 * The AB9540 and AB8540 GPIO support are extended versions
38 * of the AB8500 GPIO support.
39 * The AB9540 supports an additional (7th) register so that
40 * more GPIO may be configured and used.
41 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have
42 * internal pull-up and pull-down capabilities.
46 * GPIO registers offset
49 #define AB8500_GPIO_SEL1_REG 0x00
50 #define AB8500_GPIO_SEL2_REG 0x01
51 #define AB8500_GPIO_SEL3_REG 0x02
52 #define AB8500_GPIO_SEL4_REG 0x03
53 #define AB8500_GPIO_SEL5_REG 0x04
54 #define AB8500_GPIO_SEL6_REG 0x05
55 #define AB9540_GPIO_SEL7_REG 0x06
57 #define AB8500_GPIO_DIR1_REG 0x10
58 #define AB8500_GPIO_DIR2_REG 0x11
59 #define AB8500_GPIO_DIR3_REG 0x12
60 #define AB8500_GPIO_DIR4_REG 0x13
61 #define AB8500_GPIO_DIR5_REG 0x14
62 #define AB8500_GPIO_DIR6_REG 0x15
63 #define AB9540_GPIO_DIR7_REG 0x16
65 #define AB8500_GPIO_OUT1_REG 0x20
66 #define AB8500_GPIO_OUT2_REG 0x21
67 #define AB8500_GPIO_OUT3_REG 0x22
68 #define AB8500_GPIO_OUT4_REG 0x23
69 #define AB8500_GPIO_OUT5_REG 0x24
70 #define AB8500_GPIO_OUT6_REG 0x25
71 #define AB9540_GPIO_OUT7_REG 0x26
73 #define AB8500_GPIO_PUD1_REG 0x30
74 #define AB8500_GPIO_PUD2_REG 0x31
75 #define AB8500_GPIO_PUD3_REG 0x32
76 #define AB8500_GPIO_PUD4_REG 0x33
77 #define AB8500_GPIO_PUD5_REG 0x34
78 #define AB8500_GPIO_PUD6_REG 0x35
79 #define AB9540_GPIO_PUD7_REG 0x36
81 #define AB8500_GPIO_IN1_REG 0x40
82 #define AB8500_GPIO_IN2_REG 0x41
83 #define AB8500_GPIO_IN3_REG 0x42
84 #define AB8500_GPIO_IN4_REG 0x43
85 #define AB8500_GPIO_IN5_REG 0x44
86 #define AB8500_GPIO_IN6_REG 0x45
87 #define AB9540_GPIO_IN7_REG 0x46
88 #define AB8540_GPIO_VINSEL_REG 0x47
89 #define AB8540_GPIO_PULL_UPDOWN_REG 0x48
90 #define AB8500_GPIO_ALTFUN_REG 0x50
91 #define AB8540_GPIO_PULL_UPDOWN_MASK 0x03
92 #define AB8540_GPIO_VINSEL_MASK 0x03
93 #define AB8540_GPIOX_VBAT_START 51
94 #define AB8540_GPIOX_VBAT_END 54
96 struct abx500_pinctrl
{
98 struct pinctrl_dev
*pctldev
;
99 struct abx500_pinctrl_soc_data
*soc
;
100 struct gpio_chip chip
;
101 struct ab8500
*parent
;
103 struct abx500_gpio_irq_cluster
*irq_cluster
;
104 int irq_cluster_size
;
108 * to_abx500_pinctrl() - get the pointer to abx500_pinctrl
109 * @chip: Member of the structure abx500_pinctrl
111 static inline struct abx500_pinctrl
*to_abx500_pinctrl(struct gpio_chip
*chip
)
113 return container_of(chip
, struct abx500_pinctrl
, chip
);
116 static int abx500_gpio_get_bit(struct gpio_chip
*chip
, u8 reg
,
117 unsigned offset
, bool *bit
)
119 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
125 ret
= abx500_get_register_interruptible(pct
->dev
,
126 AB8500_MISC
, reg
, &val
);
128 *bit
= !!(val
& BIT(pos
));
132 "%s read reg =%x, offset=%x failed\n",
133 __func__
, reg
, offset
);
138 static int abx500_gpio_set_bits(struct gpio_chip
*chip
, u8 reg
,
139 unsigned offset
, int val
)
141 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
146 ret
= abx500_mask_and_set_register_interruptible(pct
->dev
,
147 AB8500_MISC
, reg
, BIT(pos
), val
<< pos
);
149 dev_err(pct
->dev
, "%s write failed\n", __func__
);
155 * abx500_gpio_get() - Get the particular GPIO value
157 * @offset: GPIO number to read
159 static int abx500_gpio_get(struct gpio_chip
*chip
, unsigned offset
)
161 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
165 ret
= abx500_gpio_get_bit(chip
, AB8500_GPIO_IN1_REG
,
168 dev_err(pct
->dev
, "%s failed\n", __func__
);
175 static void abx500_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int val
)
177 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
180 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_OUT1_REG
, offset
, val
);
182 dev_err(pct
->dev
, "%s write failed\n", __func__
);
185 static int abx500_config_pull_updown(struct abx500_pinctrl
*pct
,
186 int offset
, enum abx500_gpio_pull_updown val
)
190 struct pullud
*pullud
;
192 if (!pct
->soc
->pullud
) {
193 dev_err(pct
->dev
, "%s AB chip doesn't support pull up/down feature",
199 pullud
= pct
->soc
->pullud
;
201 if ((offset
< pullud
->first_pin
)
202 || (offset
> pullud
->last_pin
)) {
209 ret
= abx500_mask_and_set_register_interruptible(pct
->dev
,
210 AB8500_MISC
, AB8540_GPIO_PULL_UPDOWN_REG
,
211 AB8540_GPIO_PULL_UPDOWN_MASK
<< pos
, val
<< pos
);
215 dev_err(pct
->dev
, "%s failed (%d)\n", __func__
, ret
);
220 static int abx500_gpio_direction_output(struct gpio_chip
*chip
,
224 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
225 struct pullud
*pullud
= pct
->soc
->pullud
;
229 /* set direction as output */
230 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_DIR1_REG
, offset
, 1);
234 /* disable pull down */
235 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_PUD1_REG
, offset
, 1);
239 /* if supported, disable both pull down and pull up */
241 if (pullud
&& gpio
>= pullud
->first_pin
&& gpio
<= pullud
->last_pin
) {
242 ret
= abx500_config_pull_updown(pct
,
244 ABX500_GPIO_PULL_NONE
);
249 /* set the output as 1 or 0 */
250 return abx500_gpio_set_bits(chip
, AB8500_GPIO_OUT1_REG
, offset
, val
);
253 static int abx500_gpio_direction_input(struct gpio_chip
*chip
, unsigned offset
)
255 /* set the register as input */
256 return abx500_gpio_set_bits(chip
, AB8500_GPIO_DIR1_REG
, offset
, 0);
259 static int abx500_gpio_to_irq(struct gpio_chip
*chip
, unsigned offset
)
261 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
262 /* The AB8500 GPIO numbers are off by one */
263 int gpio
= offset
+ 1;
267 for (i
= 0; i
< pct
->irq_cluster_size
; i
++) {
268 struct abx500_gpio_irq_cluster
*cluster
=
269 &pct
->irq_cluster
[i
];
271 if (gpio
>= cluster
->start
&& gpio
<= cluster
->end
) {
273 * The ABx500 GPIO's associated IRQs are clustered together
274 * throughout the interrupt numbers at irregular intervals.
275 * To solve this quandry, we have placed the read-in values
276 * into the cluster information table.
278 hwirq
= gpio
- cluster
->start
+ cluster
->to_irq
;
279 return irq_create_mapping(pct
->parent
->domain
, hwirq
);
286 static int abx500_set_mode(struct pinctrl_dev
*pctldev
, struct gpio_chip
*chip
,
287 unsigned gpio
, int alt_setting
)
289 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
290 struct alternate_functions af
= pct
->soc
->alternate_functions
[gpio
];
295 const char *modes
[] = {
296 [ABX500_DEFAULT
] = "default",
297 [ABX500_ALT_A
] = "altA",
298 [ABX500_ALT_B
] = "altB",
299 [ABX500_ALT_C
] = "altC",
303 if (((alt_setting
== ABX500_ALT_A
) && (af
.gpiosel_bit
== UNUSED
)) ||
304 ((alt_setting
== ABX500_ALT_B
) && (af
.alt_bit1
== UNUSED
)) ||
305 ((alt_setting
== ABX500_ALT_C
) && (af
.alt_bit2
== UNUSED
))) {
306 dev_dbg(pct
->dev
, "pin %d doesn't support %s mode\n", gpio
,
311 /* on ABx5xx, there is no GPIO0, so adjust the offset */
314 switch (alt_setting
) {
317 * for ABx5xx family, default mode is always selected by
318 * writing 0 to GPIOSELx register, except for pins which
319 * support at least ALT_B mode, default mode is selected
320 * by writing 1 to GPIOSELx register
323 if (af
.alt_bit1
!= UNUSED
)
326 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
332 * for ABx5xx family, alt_a mode is always selected by
333 * writing 1 to GPIOSELx register, except for pins which
334 * support at least ALT_B mode, alt_a mode is selected
335 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
338 if (af
.alt_bit1
!= UNUSED
) {
339 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
341 ret
= abx500_gpio_set_bits(chip
,
342 AB8500_GPIO_ALTFUN_REG
,
344 !!(af
.alta_val
&& BIT(0)));
345 if (af
.alt_bit2
!= UNUSED
)
346 ret
= abx500_gpio_set_bits(chip
,
347 AB8500_GPIO_ALTFUN_REG
,
349 !!(af
.alta_val
&& BIT(1)));
351 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
356 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
358 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_ALTFUN_REG
,
359 af
.alt_bit1
, !!(af
.altb_val
&& BIT(0)));
360 if (af
.alt_bit2
!= UNUSED
)
361 ret
= abx500_gpio_set_bits(chip
,
362 AB8500_GPIO_ALTFUN_REG
,
364 !!(af
.altb_val
&& BIT(1)));
368 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_SEL1_REG
,
370 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_ALTFUN_REG
,
371 af
.alt_bit2
, !!(af
.altc_val
&& BIT(0)));
372 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_ALTFUN_REG
,
373 af
.alt_bit2
, !!(af
.altc_val
&& BIT(1)));
377 dev_dbg(pct
->dev
, "unknow alt_setting %d\n", alt_setting
);
385 static u8
abx500_get_mode(struct pinctrl_dev
*pctldev
, struct gpio_chip
*chip
,
392 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
393 struct alternate_functions af
= pct
->soc
->alternate_functions
[gpio
];
394 /* on ABx5xx, there is no GPIO0, so adjust the offset */
395 unsigned offset
= gpio
- 1;
398 * if gpiosel_bit is set to unused,
399 * it means no GPIO or special case
401 if (af
.gpiosel_bit
== UNUSED
)
402 return ABX500_DEFAULT
;
404 /* read GpioSelx register */
405 abx500_gpio_get_bit(chip
, AB8500_GPIO_SEL1_REG
+ (offset
/ 8),
406 af
.gpiosel_bit
, &bit_mode
);
410 if ((af
.alt_bit1
< UNUSED
) || (af
.alt_bit1
> 7) ||
411 (af
.alt_bit2
< UNUSED
) || (af
.alt_bit2
> 7)) {
413 "alt_bitX value not in correct range (-1 to 7)\n");
417 /* if alt_bit2 is used, alt_bit1 must be used too */
418 if ((af
.alt_bit2
!= UNUSED
) && (af
.alt_bit1
== UNUSED
)) {
420 "if alt_bit2 is used, alt_bit1 can't be unused\n");
424 /* check if pin use AlternateFunction register */
425 if ((af
.alt_bit1
== UNUSED
) && (af
.alt_bit2
== UNUSED
))
428 * if pin GPIOSEL bit is set and pin supports alternate function,
429 * it means DEFAULT mode
432 return ABX500_DEFAULT
;
435 * pin use the AlternatFunction register
436 * read alt_bit1 value
438 abx500_gpio_get_bit(chip
, AB8500_GPIO_ALTFUN_REG
,
439 af
.alt_bit1
, &alt_bit1
);
441 if (af
.alt_bit2
!= UNUSED
)
442 /* read alt_bit2 value */
443 abx500_gpio_get_bit(chip
, AB8500_GPIO_ALTFUN_REG
, af
.alt_bit2
,
448 mode
= (alt_bit2
<< 1) + alt_bit1
;
449 if (mode
== af
.alta_val
)
451 else if (mode
== af
.altb_val
)
457 #ifdef CONFIG_DEBUG_FS
459 #include <linux/seq_file.h>
461 static void abx500_gpio_dbg_show_one(struct seq_file
*s
,
462 struct pinctrl_dev
*pctldev
,
463 struct gpio_chip
*chip
,
464 unsigned offset
, unsigned gpio
)
466 const char *label
= gpiochip_is_requested(chip
, offset
- 1);
467 u8 gpio_offset
= offset
- 1;
472 const char *modes
[] = {
473 [ABX500_DEFAULT
] = "default",
474 [ABX500_ALT_A
] = "altA",
475 [ABX500_ALT_B
] = "altB",
476 [ABX500_ALT_C
] = "altC",
479 abx500_gpio_get_bit(chip
, AB8500_GPIO_DIR1_REG
, gpio_offset
, &is_out
);
480 abx500_gpio_get_bit(chip
, AB8500_GPIO_PUD1_REG
, gpio_offset
, &pull
);
483 mode
= abx500_get_mode(pctldev
, chip
, offset
);
485 seq_printf(s
, " gpio-%-3d (%-20.20s) %-3s %-9s %s",
486 gpio
, label
?: "(none)",
487 is_out
? "out" : "in ",
490 ? (chip
->get(chip
, offset
) ? "hi" : "lo")
492 : (pull
? "pull up" : "pull down"),
493 (mode
< 0) ? "unknown" : modes
[mode
]);
496 static void abx500_gpio_dbg_show(struct seq_file
*s
, struct gpio_chip
*chip
)
499 unsigned gpio
= chip
->base
;
500 struct abx500_pinctrl
*pct
= to_abx500_pinctrl(chip
);
501 struct pinctrl_dev
*pctldev
= pct
->pctldev
;
503 for (i
= 0; i
< chip
->ngpio
; i
++, gpio
++) {
504 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
505 abx500_gpio_dbg_show_one(s
, pctldev
, chip
, i
+ 1, gpio
);
511 static inline void abx500_gpio_dbg_show_one(struct seq_file
*s
,
512 struct pinctrl_dev
*pctldev
,
513 struct gpio_chip
*chip
,
514 unsigned offset
, unsigned gpio
)
517 #define abx500_gpio_dbg_show NULL
520 static int abx500_gpio_request(struct gpio_chip
*chip
, unsigned offset
)
522 int gpio
= chip
->base
+ offset
;
524 return pinctrl_request_gpio(gpio
);
527 static void abx500_gpio_free(struct gpio_chip
*chip
, unsigned offset
)
529 int gpio
= chip
->base
+ offset
;
531 pinctrl_free_gpio(gpio
);
534 static struct gpio_chip abx500gpio_chip
= {
535 .label
= "abx500-gpio",
536 .owner
= THIS_MODULE
,
537 .request
= abx500_gpio_request
,
538 .free
= abx500_gpio_free
,
539 .direction_input
= abx500_gpio_direction_input
,
540 .get
= abx500_gpio_get
,
541 .direction_output
= abx500_gpio_direction_output
,
542 .set
= abx500_gpio_set
,
543 .to_irq
= abx500_gpio_to_irq
,
544 .dbg_show
= abx500_gpio_dbg_show
,
547 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev
*pctldev
)
549 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
551 return pct
->soc
->nfunctions
;
554 static const char *abx500_pmx_get_func_name(struct pinctrl_dev
*pctldev
,
557 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
559 return pct
->soc
->functions
[function
].name
;
562 static int abx500_pmx_get_func_groups(struct pinctrl_dev
*pctldev
,
564 const char * const **groups
,
565 unsigned * const num_groups
)
567 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
569 *groups
= pct
->soc
->functions
[function
].groups
;
570 *num_groups
= pct
->soc
->functions
[function
].ngroups
;
575 static int abx500_pmx_enable(struct pinctrl_dev
*pctldev
, unsigned function
,
578 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
579 struct gpio_chip
*chip
= &pct
->chip
;
580 const struct abx500_pingroup
*g
;
584 g
= &pct
->soc
->groups
[group
];
585 if (g
->altsetting
< 0)
588 dev_dbg(pct
->dev
, "enable group %s, %u pins\n", g
->name
, g
->npins
);
590 for (i
= 0; i
< g
->npins
; i
++) {
591 dev_dbg(pct
->dev
, "setting pin %d to altsetting %d\n",
592 g
->pins
[i
], g
->altsetting
);
594 ret
= abx500_set_mode(pctldev
, chip
, g
->pins
[i
], g
->altsetting
);
600 static void abx500_pmx_disable(struct pinctrl_dev
*pctldev
,
601 unsigned function
, unsigned group
)
603 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
604 const struct abx500_pingroup
*g
;
606 g
= &pct
->soc
->groups
[group
];
607 if (g
->altsetting
< 0)
610 /* FIXME: poke out the mux, set the pin to some default state? */
611 dev_dbg(pct
->dev
, "disable group %s, %u pins\n", g
->name
, g
->npins
);
614 static int abx500_gpio_request_enable(struct pinctrl_dev
*pctldev
,
615 struct pinctrl_gpio_range
*range
,
618 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
619 const struct abx500_pinrange
*p
;
624 * Different ranges have different ways to enable GPIO function on a
625 * pin, so refer back to our local range type, where we handily define
626 * what altfunc enables GPIO for a certain pin.
628 for (i
= 0; i
< pct
->soc
->gpio_num_ranges
; i
++) {
629 p
= &pct
->soc
->gpio_ranges
[i
];
630 if ((offset
>= p
->offset
) &&
631 (offset
< (p
->offset
+ p
->npins
)))
635 if (i
== pct
->soc
->gpio_num_ranges
) {
636 dev_err(pct
->dev
, "%s failed to locate range\n", __func__
);
640 dev_dbg(pct
->dev
, "enable GPIO by altfunc %d at gpio %d\n",
643 ret
= abx500_set_mode(pct
->pctldev
, &pct
->chip
,
646 dev_err(pct
->dev
, "%s setting altfunc failed\n", __func__
);
653 static void abx500_gpio_disable_free(struct pinctrl_dev
*pctldev
,
654 struct pinctrl_gpio_range
*range
,
659 static const struct pinmux_ops abx500_pinmux_ops
= {
660 .get_functions_count
= abx500_pmx_get_funcs_cnt
,
661 .get_function_name
= abx500_pmx_get_func_name
,
662 .get_function_groups
= abx500_pmx_get_func_groups
,
663 .enable
= abx500_pmx_enable
,
664 .disable
= abx500_pmx_disable
,
665 .gpio_request_enable
= abx500_gpio_request_enable
,
666 .gpio_disable_free
= abx500_gpio_disable_free
,
669 static int abx500_get_groups_cnt(struct pinctrl_dev
*pctldev
)
671 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
673 return pct
->soc
->ngroups
;
676 static const char *abx500_get_group_name(struct pinctrl_dev
*pctldev
,
679 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
681 return pct
->soc
->groups
[selector
].name
;
684 static int abx500_get_group_pins(struct pinctrl_dev
*pctldev
,
686 const unsigned **pins
,
689 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
691 *pins
= pct
->soc
->groups
[selector
].pins
;
692 *num_pins
= pct
->soc
->groups
[selector
].npins
;
697 static void abx500_pin_dbg_show(struct pinctrl_dev
*pctldev
,
698 struct seq_file
*s
, unsigned offset
)
700 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
701 struct gpio_chip
*chip
= &pct
->chip
;
703 abx500_gpio_dbg_show_one(s
, pctldev
, chip
, offset
,
704 chip
->base
+ offset
- 1);
707 static const struct pinctrl_ops abx500_pinctrl_ops
= {
708 .get_groups_count
= abx500_get_groups_cnt
,
709 .get_group_name
= abx500_get_group_name
,
710 .get_group_pins
= abx500_get_group_pins
,
711 .pin_dbg_show
= abx500_pin_dbg_show
,
714 static int abx500_pin_config_get(struct pinctrl_dev
*pctldev
,
716 unsigned long *config
)
721 static int abx500_pin_config_set(struct pinctrl_dev
*pctldev
,
723 unsigned long config
)
725 struct abx500_pinctrl
*pct
= pinctrl_dev_get_drvdata(pctldev
);
726 struct pullud
*pullud
= pct
->soc
->pullud
;
727 struct gpio_chip
*chip
= &pct
->chip
;
730 enum pin_config_param param
= pinconf_to_config_param(config
);
731 enum pin_config_param argument
= pinconf_to_config_argument(config
);
733 dev_dbg(chip
->dev
, "pin %d [%#lx]: %s %s\n",
734 pin
, config
, (param
== PIN_CONFIG_OUTPUT
) ? "output " : "input",
735 (param
== PIN_CONFIG_OUTPUT
) ? (argument
? "high" : "low") :
736 (argument
? "pull up" : "pull down"));
738 /* on ABx500, there is no GPIO0, so adjust the offset */
742 case PIN_CONFIG_BIAS_PULL_DOWN
:
744 * if argument = 1 set the pull down
745 * else clear the pull down
747 ret
= abx500_gpio_direction_input(chip
, offset
);
749 * Some chips only support pull down, while some actually
750 * support both pull up and pull down. Such chips have
751 * a "pullud" range specified for the pins that support
752 * both features. If the pin is not within that range, we
753 * fall back to the old bit set that only support pull down.
756 pin
>= pullud
->first_pin
&&
757 pin
<= pullud
->last_pin
)
758 ret
= abx500_config_pull_updown(pct
,
760 argument
? ABX500_GPIO_PULL_DOWN
: ABX500_GPIO_PULL_NONE
);
762 /* Chip only supports pull down */
763 ret
= abx500_gpio_set_bits(chip
, AB8500_GPIO_PUD1_REG
,
764 offset
, argument
? 0 : 1);
767 case PIN_CONFIG_OUTPUT
:
768 ret
= abx500_gpio_direction_output(chip
, offset
, argument
);
773 dev_err(chip
->dev
, "illegal configuration requested\n");
781 static const struct pinconf_ops abx500_pinconf_ops
= {
782 .pin_config_get
= abx500_pin_config_get
,
783 .pin_config_set
= abx500_pin_config_set
,
786 static struct pinctrl_desc abx500_pinctrl_desc
= {
787 .name
= "pinctrl-abx500",
788 .pctlops
= &abx500_pinctrl_ops
,
789 .pmxops
= &abx500_pinmux_ops
,
790 .confops
= &abx500_pinconf_ops
,
791 .owner
= THIS_MODULE
,
794 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data
*soc
)
796 unsigned int lowest
= 0;
797 unsigned int highest
= 0;
798 unsigned int npins
= 0;
802 * Compute number of GPIOs from the last SoC gpio range descriptors
803 * These ranges may include "holes" but the GPIO number space shall
804 * still be homogeneous, so we need to detect and account for any
805 * such holes so that these are included in the number of GPIO pins.
807 for (i
= 0; i
< soc
->gpio_num_ranges
; i
++) {
810 const struct abx500_pinrange
*p
;
812 p
= &soc
->gpio_ranges
[i
];
814 gend
= p
->offset
+ p
->npins
- 1;
817 /* First iteration, set start values */
827 /* this gives the absolute number of pins */
828 npins
= highest
- lowest
+ 1;
832 static const struct of_device_id abx500_gpio_match
[] = {
833 { .compatible
= "stericsson,ab8500-gpio", .data
= (void *)PINCTRL_AB8500
, },
834 { .compatible
= "stericsson,ab8505-gpio", .data
= (void *)PINCTRL_AB8505
, },
835 { .compatible
= "stericsson,ab8540-gpio", .data
= (void *)PINCTRL_AB8540
, },
836 { .compatible
= "stericsson,ab9540-gpio", .data
= (void *)PINCTRL_AB9540
, },
840 static int abx500_gpio_probe(struct platform_device
*pdev
)
842 struct ab8500_platform_data
*abx500_pdata
=
843 dev_get_platdata(pdev
->dev
.parent
);
844 struct abx500_gpio_platform_data
*pdata
= NULL
;
845 struct device_node
*np
= pdev
->dev
.of_node
;
846 struct abx500_pinctrl
*pct
;
847 const struct platform_device_id
*platid
= platform_get_device_id(pdev
);
848 unsigned int id
= -1;
853 pdata
= abx500_pdata
->gpio
;
856 const struct of_device_id
*match
;
858 match
= of_match_device(abx500_gpio_match
, &pdev
->dev
);
861 id
= (unsigned long)match
->data
;
863 dev_err(&pdev
->dev
, "gpio dt and platform data missing\n");
869 id
= platid
->driver_data
;
871 pct
= devm_kzalloc(&pdev
->dev
, sizeof(struct abx500_pinctrl
),
875 "failed to allocate memory for pct\n");
879 pct
->dev
= &pdev
->dev
;
880 pct
->parent
= dev_get_drvdata(pdev
->dev
.parent
);
881 pct
->chip
= abx500gpio_chip
;
882 pct
->chip
.dev
= &pdev
->dev
;
883 pct
->chip
.base
= (np
) ? -1 : pdata
->gpio_base
;
885 /* initialize the lock */
886 mutex_init(&pct
->lock
);
888 /* Poke in other ASIC variants here */
891 abx500_pinctrl_ab8500_init(&pct
->soc
);
894 abx500_pinctrl_ab8540_init(&pct
->soc
);
897 abx500_pinctrl_ab9540_init(&pct
->soc
);
900 abx500_pinctrl_ab8505_init(&pct
->soc
);
903 dev_err(&pdev
->dev
, "Unsupported pinctrl sub driver (%d)\n",
904 (int) platid
->driver_data
);
905 mutex_destroy(&pct
->lock
);
910 dev_err(&pdev
->dev
, "Invalid SOC data\n");
911 mutex_destroy(&pct
->lock
);
915 pct
->chip
.ngpio
= abx500_get_gpio_num(pct
->soc
);
916 pct
->irq_cluster
= pct
->soc
->gpio_irq_cluster
;
917 pct
->irq_cluster_size
= pct
->soc
->ngpio_irq_cluster
;
919 ret
= gpiochip_add(&pct
->chip
);
921 dev_err(&pdev
->dev
, "unable to add gpiochip: %d\n", ret
);
922 mutex_destroy(&pct
->lock
);
925 dev_info(&pdev
->dev
, "added gpiochip\n");
927 abx500_pinctrl_desc
.pins
= pct
->soc
->pins
;
928 abx500_pinctrl_desc
.npins
= pct
->soc
->npins
;
929 pct
->pctldev
= pinctrl_register(&abx500_pinctrl_desc
, &pdev
->dev
, pct
);
932 "could not register abx500 pinctrl driver\n");
936 dev_info(&pdev
->dev
, "registered pin controller\n");
938 /* We will handle a range of GPIO pins */
939 for (i
= 0; i
< pct
->soc
->gpio_num_ranges
; i
++) {
940 const struct abx500_pinrange
*p
= &pct
->soc
->gpio_ranges
[i
];
942 ret
= gpiochip_add_pin_range(&pct
->chip
,
943 dev_name(&pdev
->dev
),
944 p
->offset
- 1, p
->offset
, p
->npins
);
949 platform_set_drvdata(pdev
, pct
);
950 dev_info(&pdev
->dev
, "initialized abx500 pinctrl driver\n");
955 err
= gpiochip_remove(&pct
->chip
);
957 dev_info(&pdev
->dev
, "failed to remove gpiochip\n");
959 mutex_destroy(&pct
->lock
);
964 * abx500_gpio_remove() - remove Ab8500-gpio driver
965 * @pdev: Platform device registered
967 static int abx500_gpio_remove(struct platform_device
*pdev
)
969 struct abx500_pinctrl
*pct
= platform_get_drvdata(pdev
);
972 ret
= gpiochip_remove(&pct
->chip
);
974 dev_err(pct
->dev
, "unable to remove gpiochip: %d\n",
979 mutex_destroy(&pct
->lock
);
984 static const struct platform_device_id abx500_pinctrl_id
[] = {
985 { "pinctrl-ab8500", PINCTRL_AB8500
},
986 { "pinctrl-ab8540", PINCTRL_AB8540
},
987 { "pinctrl-ab9540", PINCTRL_AB9540
},
988 { "pinctrl-ab8505", PINCTRL_AB8505
},
992 static struct platform_driver abx500_gpio_driver
= {
994 .name
= "abx500-gpio",
995 .owner
= THIS_MODULE
,
996 .of_match_table
= abx500_gpio_match
,
998 .probe
= abx500_gpio_probe
,
999 .remove
= abx500_gpio_remove
,
1000 .id_table
= abx500_pinctrl_id
,
1003 static int __init
abx500_gpio_init(void)
1005 return platform_driver_register(&abx500_gpio_driver
);
1007 core_initcall(abx500_gpio_init
);
1009 MODULE_AUTHOR("Patrice Chotard <patrice.chotard@st.com>");
1010 MODULE_DESCRIPTION("Driver allows to use AxB5xx unused pins to be used as GPIO");
1011 MODULE_ALIAS("platform:abx500-gpio");
1012 MODULE_LICENSE("GPL v2");