2 * Common pmac/prep/chrp pci routines. -- Cort
5 #include <linux/kernel.h>
7 #include <linux/delay.h>
8 #include <linux/string.h>
9 #include <linux/init.h>
10 #include <linux/capability.h>
11 #include <linux/sched.h>
12 #include <linux/errno.h>
13 #include <linux/bootmem.h>
14 #include <linux/irq.h>
15 #include <linux/list.h>
17 #include <asm/processor.h>
20 #include <asm/sections.h>
21 #include <asm/pci-bridge.h>
22 #include <asm/byteorder.h>
23 #include <asm/uaccess.h>
24 #include <asm/machdep.h>
29 #define DBG(x...) printk(x)
34 unsigned long isa_io_base
= 0;
35 unsigned long pci_dram_offset
= 0;
36 int pcibios_assign_bus_offset
= 1;
38 void pcibios_make_OF_bus_map(void);
40 static void pcibios_fixup_resources(struct pci_dev
* dev
);
41 static void fixup_broken_pcnet32(struct pci_dev
* dev
);
42 static int reparent_resources(struct resource
*parent
, struct resource
*res
);
43 static void fixup_cpc710_pci64(struct pci_dev
* dev
);
45 static u8
* pci_to_OF_bus_map
;
48 /* By default, we don't re-assign bus numbers. We do this only on
51 int pci_assign_all_buses
;
55 static int pci_bus_count
;
58 fixup_hide_host_resource_fsl(struct pci_dev
* dev
)
60 int i
, class = dev
->class >> 8;
62 if ((class == PCI_CLASS_PROCESSOR_POWERPC
) &&
63 (dev
->hdr_type
== PCI_HEADER_TYPE_NORMAL
) &&
64 (dev
->bus
->parent
== NULL
)) {
65 for (i
= 0; i
< DEVICE_COUNT_RESOURCE
; i
++) {
66 dev
->resource
[i
].start
= 0;
67 dev
->resource
[i
].end
= 0;
68 dev
->resource
[i
].flags
= 0;
72 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA
, PCI_ANY_ID
, fixup_hide_host_resource_fsl
);
73 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE
, PCI_ANY_ID
, fixup_hide_host_resource_fsl
);
76 fixup_broken_pcnet32(struct pci_dev
* dev
)
78 if ((dev
->class>>8 == PCI_CLASS_NETWORK_ETHERNET
)) {
79 dev
->vendor
= PCI_VENDOR_ID_AMD
;
80 pci_write_config_word(dev
, PCI_VENDOR_ID
, PCI_VENDOR_ID_AMD
);
83 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT
, PCI_ANY_ID
, fixup_broken_pcnet32
);
86 fixup_cpc710_pci64(struct pci_dev
* dev
)
88 /* Hide the PCI64 BARs from the kernel as their content doesn't
89 * fit well in the resource management
91 dev
->resource
[0].start
= dev
->resource
[0].end
= 0;
92 dev
->resource
[0].flags
= 0;
93 dev
->resource
[1].start
= dev
->resource
[1].end
= 0;
94 dev
->resource
[1].flags
= 0;
96 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM
, PCI_DEVICE_ID_IBM_CPC710_PCI64
, fixup_cpc710_pci64
);
99 pcibios_fixup_resources(struct pci_dev
*dev
)
101 struct pci_controller
* hose
= (struct pci_controller
*)dev
->sysdata
;
103 resource_size_t offset
, mask
;
106 printk(KERN_ERR
"No hose for PCI dev %s!\n", pci_name(dev
));
109 for (i
= 0; i
< DEVICE_COUNT_RESOURCE
; i
++) {
110 struct resource
*res
= dev
->resource
+ i
;
113 if (res
->end
== 0xffffffff) {
114 DBG("PCI:%s Resource %d [%016llx-%016llx] is unassigned\n",
115 pci_name(dev
), i
, (u64
)res
->start
, (u64
)res
->end
);
116 res
->end
-= res
->start
;
118 res
->flags
|= IORESOURCE_UNSET
;
122 mask
= (resource_size_t
)-1;
123 if (res
->flags
& IORESOURCE_MEM
) {
124 offset
= hose
->pci_mem_offset
;
125 } else if (res
->flags
& IORESOURCE_IO
) {
126 offset
= (unsigned long) hose
->io_base_virt
131 res
->start
= (res
->start
+ offset
) & mask
;
132 res
->end
= (res
->end
+ offset
) & mask
;
133 DBG("PCI: Fixup res %d (0x%lx) of dev %s: %llx -> %llx\n",
134 i
, res
->flags
, pci_name(dev
),
135 (u64
)res
->start
- offset
, (u64
)res
->start
);
139 /* Call machine specific resource fixup */
140 if (ppc_md
.pcibios_fixup_resources
)
141 ppc_md
.pcibios_fixup_resources(dev
);
143 DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID
, PCI_ANY_ID
, pcibios_fixup_resources
);
145 void pcibios_resource_to_bus(struct pci_dev
*dev
, struct pci_bus_region
*region
,
146 struct resource
*res
)
148 resource_size_t offset
= 0, mask
= (resource_size_t
)-1;
149 struct pci_controller
*hose
= dev
->sysdata
;
151 if (hose
&& res
->flags
& IORESOURCE_IO
) {
152 offset
= (unsigned long)hose
->io_base_virt
- isa_io_base
;
154 } else if (hose
&& res
->flags
& IORESOURCE_MEM
)
155 offset
= hose
->pci_mem_offset
;
156 region
->start
= (res
->start
- offset
) & mask
;
157 region
->end
= (res
->end
- offset
) & mask
;
159 EXPORT_SYMBOL(pcibios_resource_to_bus
);
161 void pcibios_bus_to_resource(struct pci_dev
*dev
, struct resource
*res
,
162 struct pci_bus_region
*region
)
164 resource_size_t offset
= 0, mask
= (resource_size_t
)-1;
165 struct pci_controller
*hose
= dev
->sysdata
;
167 if (hose
&& res
->flags
& IORESOURCE_IO
) {
168 offset
= (unsigned long)hose
->io_base_virt
- isa_io_base
;
170 } else if (hose
&& res
->flags
& IORESOURCE_MEM
)
171 offset
= hose
->pci_mem_offset
;
172 res
->start
= (region
->start
+ offset
) & mask
;
173 res
->end
= (region
->end
+ offset
) & mask
;
175 EXPORT_SYMBOL(pcibios_bus_to_resource
);
178 * We need to avoid collisions with `mirrored' VGA ports
179 * and other strange ISA hardware, so we always want the
180 * addresses to be allocated in the 0x000-0x0ff region
183 * Why? Because some silly external IO cards only decode
184 * the low 10 bits of the IO address. The 0x00-0xff region
185 * is reserved for motherboard devices that decode all 16
186 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
187 * but we want to try to avoid allocating at 0x2900-0x2bff
188 * which might have be mirrored at 0x0100-0x03ff..
190 void pcibios_align_resource(void *data
, struct resource
*res
,
191 resource_size_t size
, resource_size_t align
)
193 struct pci_dev
*dev
= data
;
195 if (res
->flags
& IORESOURCE_IO
) {
196 resource_size_t start
= res
->start
;
199 start
= (start
+ 0x3ff) & ~0x3ff;
204 EXPORT_SYMBOL(pcibios_align_resource
);
207 * Handle resources of PCI devices. If the world were perfect, we could
208 * just allocate all the resource regions and do nothing more. It isn't.
209 * On the other hand, we cannot just re-allocate all devices, as it would
210 * require us to know lots of host bridge internals. So we attempt to
211 * keep as much of the original configuration as possible, but tweak it
212 * when it's found to be wrong.
214 * Known BIOS problems we have to work around:
215 * - I/O or memory regions not configured
216 * - regions configured, but not enabled in the command register
217 * - bogus I/O addresses above 64K used
218 * - expansion ROMs left enabled (this may sound harmless, but given
219 * the fact the PCI specs explicitly allow address decoders to be
220 * shared between expansion ROMs and other resource regions, it's
221 * at least dangerous)
224 * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
225 * This gives us fixed barriers on where we can allocate.
226 * (2) Allocate resources for all enabled devices. If there is
227 * a collision, just mark the resource as unallocated. Also
228 * disable expansion ROMs during this step.
229 * (3) Try to allocate resources for disabled devices. If the
230 * resources were assigned correctly, everything goes well,
231 * if they weren't, they won't disturb allocation of other
233 * (4) Assign new addresses to resources which were either
234 * not configured at all or misconfigured. If explicitly
235 * requested by the user, configure expansion ROM address
240 pcibios_allocate_bus_resources(struct list_head
*bus_list
)
244 struct resource
*res
, *pr
;
246 /* Depth-First Search on bus tree */
247 list_for_each_entry(bus
, bus_list
, node
) {
248 for (i
= 0; i
< 4; ++i
) {
249 if ((res
= bus
->resource
[i
]) == NULL
|| !res
->flags
250 || res
->start
> res
->end
)
252 if (bus
->parent
== NULL
)
253 pr
= (res
->flags
& IORESOURCE_IO
)?
254 &ioport_resource
: &iomem_resource
;
256 pr
= pci_find_parent_resource(bus
->self
, res
);
258 /* this happens when the generic PCI
259 * code (wrongly) decides that this
260 * bridge is transparent -- paulus
266 DBG("PCI: dev %s (bus 0x%02x) bridge rsrc %d: %016llx..%016llx "
267 "(f:0x%08lx), parent %p\n",
268 bus
->self
? pci_name(bus
->self
) : "PHB", bus
->number
, i
,
269 (u64
)res
->start
, (u64
)res
->end
, res
->flags
, pr
);
271 if (pr
&& !(pr
->flags
& IORESOURCE_UNSET
)) {
272 if (request_resource(pr
, res
) == 0)
275 * Must be a conflict with an existing entry.
276 * Move that entry (or entries) under the
277 * bridge resource and try again.
279 if (reparent_resources(pr
, res
) == 0)
283 "PCI: Cannot allocate resource region "
284 "%d of PCI bridge %d, will remap\n",
286 res
->flags
|= IORESOURCE_UNSET
;
288 pcibios_allocate_bus_resources(&bus
->children
);
293 * Reparent resource children of pr that conflict with res
294 * under res, and make res replace those children.
297 reparent_resources(struct resource
*parent
, struct resource
*res
)
299 struct resource
*p
, **pp
;
300 struct resource
**firstpp
= NULL
;
302 for (pp
= &parent
->child
; (p
= *pp
) != NULL
; pp
= &p
->sibling
) {
303 if (p
->end
< res
->start
)
305 if (res
->end
< p
->start
)
307 if (p
->start
< res
->start
|| p
->end
> res
->end
)
308 return -1; /* not completely contained */
313 return -1; /* didn't find any conflicting entries? */
314 res
->parent
= parent
;
315 res
->child
= *firstpp
;
319 for (p
= res
->child
; p
!= NULL
; p
= p
->sibling
) {
321 DBG(KERN_INFO
"PCI: reparented %s [%llx..%llx] under %s\n",
322 p
->name
, (u64
)p
->start
, (u64
)p
->end
, res
->name
);
328 update_bridge_resource(struct pci_dev
*dev
, struct resource
*res
)
330 u8 io_base_lo
, io_limit_lo
;
331 u16 mem_base
, mem_limit
;
333 resource_size_t start
, end
, off
;
334 struct pci_controller
*hose
= dev
->sysdata
;
337 printk("update_bridge_base: no hose?\n");
340 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
341 pci_write_config_word(dev
, PCI_COMMAND
,
342 cmd
& ~(PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
));
343 if (res
->flags
& IORESOURCE_IO
) {
344 off
= (unsigned long) hose
->io_base_virt
- isa_io_base
;
345 start
= res
->start
- off
;
346 end
= res
->end
- off
;
347 io_base_lo
= (start
>> 8) & PCI_IO_RANGE_MASK
;
348 io_limit_lo
= (end
>> 8) & PCI_IO_RANGE_MASK
;
350 io_base_lo
|= PCI_IO_RANGE_TYPE_32
;
352 io_base_lo
|= PCI_IO_RANGE_TYPE_16
;
353 pci_write_config_word(dev
, PCI_IO_BASE_UPPER16
,
355 pci_write_config_word(dev
, PCI_IO_LIMIT_UPPER16
,
357 pci_write_config_byte(dev
, PCI_IO_BASE
, io_base_lo
);
358 pci_write_config_byte(dev
, PCI_IO_LIMIT
, io_limit_lo
);
360 } else if ((res
->flags
& (IORESOURCE_MEM
| IORESOURCE_PREFETCH
))
362 off
= hose
->pci_mem_offset
;
363 mem_base
= ((res
->start
- off
) >> 16) & PCI_MEMORY_RANGE_MASK
;
364 mem_limit
= ((res
->end
- off
) >> 16) & PCI_MEMORY_RANGE_MASK
;
365 pci_write_config_word(dev
, PCI_MEMORY_BASE
, mem_base
);
366 pci_write_config_word(dev
, PCI_MEMORY_LIMIT
, mem_limit
);
368 } else if ((res
->flags
& (IORESOURCE_MEM
| IORESOURCE_PREFETCH
))
369 == (IORESOURCE_MEM
| IORESOURCE_PREFETCH
)) {
370 off
= hose
->pci_mem_offset
;
371 mem_base
= ((res
->start
- off
) >> 16) & PCI_PREF_RANGE_MASK
;
372 mem_limit
= ((res
->end
- off
) >> 16) & PCI_PREF_RANGE_MASK
;
373 pci_write_config_word(dev
, PCI_PREF_MEMORY_BASE
, mem_base
);
374 pci_write_config_word(dev
, PCI_PREF_MEMORY_LIMIT
, mem_limit
);
377 DBG(KERN_ERR
"PCI: ugh, bridge %s res has flags=%lx\n",
378 pci_name(dev
), res
->flags
);
380 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);
383 static inline void alloc_resource(struct pci_dev
*dev
, int idx
)
385 struct resource
*pr
, *r
= &dev
->resource
[idx
];
387 DBG("PCI: Allocating %s: Resource %d: %016llx..%016llx (f=%lx)\n",
388 pci_name(dev
), idx
, (u64
)r
->start
, (u64
)r
->end
, r
->flags
);
389 pr
= pci_find_parent_resource(dev
, r
);
390 if (!pr
|| (pr
->flags
& IORESOURCE_UNSET
) || request_resource(pr
, r
) < 0) {
391 printk(KERN_WARNING
"PCI: Cannot allocate resource region %d"
392 " of device %s, will remap\n", idx
, pci_name(dev
));
394 DBG("PCI: parent is %p: %016llx-%016llx (f=%lx)\n",
395 pr
, (u64
)pr
->start
, (u64
)pr
->end
, pr
->flags
);
396 /* We'll assign a new address later */
397 r
->flags
|= IORESOURCE_UNSET
;
404 pcibios_allocate_resources(int pass
)
406 struct pci_dev
*dev
= NULL
;
411 for_each_pci_dev(dev
) {
412 pci_read_config_word(dev
, PCI_COMMAND
, &command
);
413 for (idx
= 0; idx
< 6; idx
++) {
414 r
= &dev
->resource
[idx
];
415 if (r
->parent
) /* Already allocated */
417 if (!r
->flags
|| (r
->flags
& IORESOURCE_UNSET
))
418 continue; /* Not assigned at all */
419 if (r
->flags
& IORESOURCE_IO
)
420 disabled
= !(command
& PCI_COMMAND_IO
);
422 disabled
= !(command
& PCI_COMMAND_MEMORY
);
423 if (pass
== disabled
)
424 alloc_resource(dev
, idx
);
428 r
= &dev
->resource
[PCI_ROM_RESOURCE
];
429 if (r
->flags
& IORESOURCE_ROM_ENABLE
) {
430 /* Turn the ROM off, leave the resource region, but keep it unregistered. */
432 DBG("PCI: Switching off ROM of %s\n", pci_name(dev
));
433 r
->flags
&= ~IORESOURCE_ROM_ENABLE
;
434 pci_read_config_dword(dev
, dev
->rom_base_reg
, ®
);
435 pci_write_config_dword(dev
, dev
->rom_base_reg
,
436 reg
& ~PCI_ROM_ADDRESS_ENABLE
);
443 * Functions below are used on OpenFirmware machines.
446 make_one_node_map(struct device_node
* node
, u8 pci_bus
)
448 const int *bus_range
;
451 if (pci_bus
>= pci_bus_count
)
453 bus_range
= of_get_property(node
, "bus-range", &len
);
454 if (bus_range
== NULL
|| len
< 2 * sizeof(int)) {
455 printk(KERN_WARNING
"Can't get bus-range for %s, "
456 "assuming it starts at 0\n", node
->full_name
);
457 pci_to_OF_bus_map
[pci_bus
] = 0;
459 pci_to_OF_bus_map
[pci_bus
] = bus_range
[0];
461 for (node
=node
->child
; node
!= 0;node
= node
->sibling
) {
463 const unsigned int *class_code
, *reg
;
465 class_code
= of_get_property(node
, "class-code", NULL
);
466 if (!class_code
|| ((*class_code
>> 8) != PCI_CLASS_BRIDGE_PCI
&&
467 (*class_code
>> 8) != PCI_CLASS_BRIDGE_CARDBUS
))
469 reg
= of_get_property(node
, "reg", NULL
);
472 dev
= pci_get_bus_and_slot(pci_bus
, ((reg
[0] >> 8) & 0xff));
473 if (!dev
|| !dev
->subordinate
) {
477 make_one_node_map(node
, dev
->subordinate
->number
);
483 pcibios_make_OF_bus_map(void)
486 struct pci_controller
*hose
, *tmp
;
487 struct property
*map_prop
;
488 struct device_node
*dn
;
490 pci_to_OF_bus_map
= kmalloc(pci_bus_count
, GFP_KERNEL
);
491 if (!pci_to_OF_bus_map
) {
492 printk(KERN_ERR
"Can't allocate OF bus map !\n");
496 /* We fill the bus map with invalid values, that helps
499 for (i
=0; i
<pci_bus_count
; i
++)
500 pci_to_OF_bus_map
[i
] = 0xff;
502 /* For each hose, we begin searching bridges */
503 list_for_each_entry_safe(hose
, tmp
, &hose_list
, list_node
) {
504 struct device_node
* node
= hose
->dn
;
508 make_one_node_map(node
, hose
->first_busno
);
510 dn
= of_find_node_by_path("/");
511 map_prop
= of_find_property(dn
, "pci-OF-bus-map", NULL
);
513 BUG_ON(pci_bus_count
> map_prop
->length
);
514 memcpy(map_prop
->value
, pci_to_OF_bus_map
, pci_bus_count
);
518 printk("PCI->OF bus map:\n");
519 for (i
=0; i
<pci_bus_count
; i
++) {
520 if (pci_to_OF_bus_map
[i
] == 0xff)
522 printk("%d -> %d\n", i
, pci_to_OF_bus_map
[i
]);
527 typedef int (*pci_OF_scan_iterator
)(struct device_node
* node
, void* data
);
529 static struct device_node
*
530 scan_OF_pci_childs(struct device_node
* node
, pci_OF_scan_iterator filter
, void* data
)
532 struct device_node
* sub_node
;
534 for (; node
!= 0;node
= node
->sibling
) {
535 const unsigned int *class_code
;
537 if (filter(node
, data
))
540 /* For PCI<->PCI bridges or CardBus bridges, we go down
541 * Note: some OFs create a parent node "multifunc-device" as
542 * a fake root for all functions of a multi-function device,
543 * we go down them as well.
545 class_code
= of_get_property(node
, "class-code", NULL
);
546 if ((!class_code
|| ((*class_code
>> 8) != PCI_CLASS_BRIDGE_PCI
&&
547 (*class_code
>> 8) != PCI_CLASS_BRIDGE_CARDBUS
)) &&
548 strcmp(node
->name
, "multifunc-device"))
550 sub_node
= scan_OF_pci_childs(node
->child
, filter
, data
);
557 static struct device_node
*scan_OF_for_pci_dev(struct device_node
*parent
,
560 struct device_node
*np
= NULL
;
564 while ((np
= of_get_next_child(parent
, np
)) != NULL
) {
565 reg
= of_get_property(np
, "reg", &psize
);
566 if (reg
== NULL
|| psize
< 4)
568 if (((reg
[0] >> 8) & 0xff) == devfn
)
575 static struct device_node
*scan_OF_for_pci_bus(struct pci_bus
*bus
)
577 struct device_node
*parent
, *np
;
579 /* Are we a root bus ? */
580 if (bus
->self
== NULL
|| bus
->parent
== NULL
) {
581 struct pci_controller
*hose
= pci_bus_to_host(bus
);
584 return of_node_get(hose
->dn
);
587 /* not a root bus, we need to get our parent */
588 parent
= scan_OF_for_pci_bus(bus
->parent
);
592 /* now iterate for children for a match */
593 np
= scan_OF_for_pci_dev(parent
, bus
->self
->devfn
);
600 * Scans the OF tree for a device node matching a PCI device
603 pci_busdev_to_OF_node(struct pci_bus
*bus
, int devfn
)
605 struct device_node
*parent
, *np
;
610 DBG("pci_busdev_to_OF_node(%d,0x%x)\n", bus
->number
, devfn
);
611 parent
= scan_OF_for_pci_bus(bus
);
614 DBG(" parent is %s\n", parent
? parent
->full_name
: "<NULL>");
615 np
= scan_OF_for_pci_dev(parent
, devfn
);
617 DBG(" result is %s\n", np
? np
->full_name
: "<NULL>");
619 /* XXX most callers don't release the returned node
620 * mostly because ppc64 doesn't increase the refcount,
621 * we need to fix that.
625 EXPORT_SYMBOL(pci_busdev_to_OF_node
);
628 pci_device_to_OF_node(struct pci_dev
*dev
)
630 return pci_busdev_to_OF_node(dev
->bus
, dev
->devfn
);
632 EXPORT_SYMBOL(pci_device_to_OF_node
);
635 find_OF_pci_device_filter(struct device_node
* node
, void* data
)
637 return ((void *)node
== data
);
641 * Returns the PCI device matching a given OF node
644 pci_device_from_OF_node(struct device_node
* node
, u8
* bus
, u8
* devfn
)
646 const unsigned int *reg
;
647 struct pci_controller
* hose
;
648 struct pci_dev
* dev
= NULL
;
652 /* Make sure it's really a PCI device */
653 hose
= pci_find_hose_for_OF_device(node
);
654 if (!hose
|| !hose
->dn
)
656 if (!scan_OF_pci_childs(hose
->dn
->child
,
657 find_OF_pci_device_filter
, (void *)node
))
659 reg
= of_get_property(node
, "reg", NULL
);
662 *bus
= (reg
[0] >> 16) & 0xff;
663 *devfn
= ((reg
[0] >> 8) & 0xff);
665 /* Ok, here we need some tweak. If we have already renumbered
666 * all busses, we can't rely on the OF bus number any more.
667 * the pci_to_OF_bus_map is not enough as several PCI busses
668 * may match the same OF bus number.
670 if (!pci_to_OF_bus_map
)
673 for_each_pci_dev(dev
)
674 if (pci_to_OF_bus_map
[dev
->bus
->number
] == *bus
&&
675 dev
->devfn
== *devfn
) {
676 *bus
= dev
->bus
->number
;
683 EXPORT_SYMBOL(pci_device_from_OF_node
);
685 /* We create the "pci-OF-bus-map" property now so it appears in the
689 pci_create_OF_bus_map(void)
691 struct property
* of_prop
;
692 struct device_node
*dn
;
694 of_prop
= (struct property
*) alloc_bootmem(sizeof(struct property
) + 256);
697 dn
= of_find_node_by_path("/");
699 memset(of_prop
, -1, sizeof(struct property
) + 256);
700 of_prop
->name
= "pci-OF-bus-map";
701 of_prop
->length
= 256;
702 of_prop
->value
= &of_prop
[1];
703 prom_add_property(dn
, of_prop
);
708 #else /* CONFIG_PPC_OF */
709 void pcibios_make_OF_bus_map(void)
712 #endif /* CONFIG_PPC_OF */
717 struct pci_controller
*hose
, *tmp
;
721 printk(KERN_INFO
"PCI: Probing PCI hardware\n");
723 /* Scan all of the recorded PCI controllers. */
724 list_for_each_entry_safe(hose
, tmp
, &hose_list
, list_node
) {
725 if (pci_assign_all_buses
)
726 hose
->first_busno
= next_busno
;
727 hose
->last_busno
= 0xff;
728 bus
= pci_scan_bus_parented(hose
->parent
, hose
->first_busno
,
731 pci_bus_add_devices(bus
);
732 hose
->last_busno
= bus
->subordinate
;
733 if (pci_assign_all_buses
|| next_busno
<= hose
->last_busno
)
734 next_busno
= hose
->last_busno
+ pcibios_assign_bus_offset
;
736 pci_bus_count
= next_busno
;
738 /* OpenFirmware based machines need a map of OF bus
739 * numbers vs. kernel bus numbers since we may have to
742 if (pci_assign_all_buses
&& have_of
)
743 pcibios_make_OF_bus_map();
745 /* Call machine dependent fixup */
746 if (ppc_md
.pcibios_fixup
)
747 ppc_md
.pcibios_fixup();
749 /* Allocate and assign resources */
750 pcibios_allocate_bus_resources(&pci_root_buses
);
751 pcibios_allocate_resources(0);
752 pcibios_allocate_resources(1);
754 DBG("PCI: Assigning unassigned resouces...\n");
755 pci_assign_unassigned_resources();
757 /* Call machine dependent post-init code */
758 if (ppc_md
.pcibios_after_init
)
759 ppc_md
.pcibios_after_init();
764 subsys_initcall(pcibios_init
);
766 void pcibios_fixup_bus(struct pci_bus
*bus
)
768 struct pci_controller
*hose
= (struct pci_controller
*) bus
->sysdata
;
769 unsigned long io_offset
;
770 struct resource
*res
;
774 io_offset
= (unsigned long)hose
->io_base_virt
- isa_io_base
;
775 if (bus
->parent
== NULL
) {
776 /* This is a host bridge - fill in its resources */
779 bus
->resource
[0] = res
= &hose
->io_resource
;
782 printk(KERN_ERR
"I/O resource not set for host"
783 " bridge %d\n", hose
->global_number
);
785 res
->end
= IO_SPACE_LIMIT
;
786 res
->flags
= IORESOURCE_IO
;
788 res
->start
= (res
->start
+ io_offset
) & 0xffffffffu
;
789 res
->end
= (res
->end
+ io_offset
) & 0xffffffffu
;
791 for (i
= 0; i
< 3; ++i
) {
792 res
= &hose
->mem_resources
[i
];
796 printk(KERN_ERR
"Memory resource not set for "
797 "host bridge %d\n", hose
->global_number
);
798 res
->start
= hose
->pci_mem_offset
;
800 res
->flags
= IORESOURCE_MEM
;
802 bus
->resource
[i
+1] = res
;
805 /* This is a subordinate bridge */
806 pci_read_bridge_bases(bus
);
808 for (i
= 0; i
< 4; ++i
) {
809 if ((res
= bus
->resource
[i
]) == NULL
)
811 if (!res
->flags
|| bus
->self
->transparent
)
813 if (io_offset
&& (res
->flags
& IORESOURCE_IO
)) {
814 res
->start
= (res
->start
+ io_offset
) &
816 res
->end
= (res
->end
+ io_offset
) &
818 } else if (hose
->pci_mem_offset
819 && (res
->flags
& IORESOURCE_MEM
)) {
820 res
->start
+= hose
->pci_mem_offset
;
821 res
->end
+= hose
->pci_mem_offset
;
826 /* Platform specific bus fixups */
827 if (ppc_md
.pcibios_fixup_bus
)
828 ppc_md
.pcibios_fixup_bus(bus
);
830 /* Read default IRQs and fixup if necessary */
831 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
832 pci_read_irq_line(dev
);
833 if (ppc_md
.pci_irq_fixup
)
834 ppc_md
.pci_irq_fixup(dev
);
838 /* the next one is stolen from the alpha port... */
840 pcibios_update_irq(struct pci_dev
*dev
, int irq
)
842 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, irq
);
843 /* XXX FIXME - update OF device tree node interrupt property */
846 int pcibios_enable_device(struct pci_dev
*dev
, int mask
)
852 if (ppc_md
.pcibios_enable_device_hook
)
853 if (ppc_md
.pcibios_enable_device_hook(dev
, 0))
856 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
858 for (idx
=0; idx
<6; idx
++) {
859 r
= &dev
->resource
[idx
];
860 if (r
->flags
& IORESOURCE_UNSET
) {
861 printk(KERN_ERR
"PCI: Device %s not available because of resource collisions\n", pci_name(dev
));
864 if (r
->flags
& IORESOURCE_IO
)
865 cmd
|= PCI_COMMAND_IO
;
866 if (r
->flags
& IORESOURCE_MEM
)
867 cmd
|= PCI_COMMAND_MEMORY
;
869 if (cmd
!= old_cmd
) {
870 printk("PCI: Enabling device %s (%04x -> %04x)\n",
871 pci_name(dev
), old_cmd
, cmd
);
872 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);
877 static struct pci_controller
*
878 pci_bus_to_hose(int bus
)
880 struct pci_controller
*hose
, *tmp
;
882 list_for_each_entry_safe(hose
, tmp
, &hose_list
, list_node
)
883 if (bus
>= hose
->first_busno
&& bus
<= hose
->last_busno
)
888 /* Provide information on locations of various I/O regions in physical
889 * memory. Do this on a per-card basis so that we choose the right
891 * Note that the returned IO or memory base is a physical address
894 long sys_pciconfig_iobase(long which
, unsigned long bus
, unsigned long devfn
)
896 struct pci_controller
* hose
;
897 long result
= -EOPNOTSUPP
;
899 /* Argh ! Please forgive me for that hack, but that's the
900 * simplest way to get existing XFree to not lockup on some
901 * G5 machines... So when something asks for bus 0 io base
902 * (bus 0 is HT root), we return the AGP one instead.
904 #ifdef CONFIG_PPC_PMAC
905 if (machine_is(powermac
) && machine_is_compatible("MacRISC4"))
908 #endif /* CONFIG_PPC_PMAC */
910 hose
= pci_bus_to_hose(bus
);
915 case IOBASE_BRIDGE_NUMBER
:
916 return (long)hose
->first_busno
;
918 return (long)hose
->pci_mem_offset
;
920 return (long)hose
->io_base_phys
;
922 return (long)isa_io_base
;
924 return (long)isa_mem_base
;
930 unsigned long pci_address_to_pio(phys_addr_t address
)
932 struct pci_controller
*hose
, *tmp
;
934 list_for_each_entry_safe(hose
, tmp
, &hose_list
, list_node
) {
935 unsigned int size
= hose
->io_resource
.end
-
936 hose
->io_resource
.start
+ 1;
937 if (address
>= hose
->io_base_phys
&&
938 address
< (hose
->io_base_phys
+ size
)) {
940 (unsigned long)hose
->io_base_virt
- _IO_BASE
;
941 return base
+ (address
- hose
->io_base_phys
);
944 return (unsigned int)-1;
946 EXPORT_SYMBOL(pci_address_to_pio
);
949 * Null PCI config access functions, for the case when we can't
952 #define NULL_PCI_OP(rw, size, type) \
954 null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \
956 return PCIBIOS_DEVICE_NOT_FOUND; \
960 null_read_config(struct pci_bus
*bus
, unsigned int devfn
, int offset
,
963 return PCIBIOS_DEVICE_NOT_FOUND
;
967 null_write_config(struct pci_bus
*bus
, unsigned int devfn
, int offset
,
970 return PCIBIOS_DEVICE_NOT_FOUND
;
973 static struct pci_ops null_pci_ops
=
975 .read
= null_read_config
,
976 .write
= null_write_config
,
980 * These functions are used early on before PCI scanning is done
981 * and all of the pci_dev and pci_bus structures have been created.
983 static struct pci_bus
*
984 fake_pci_bus(struct pci_controller
*hose
, int busnr
)
986 static struct pci_bus bus
;
989 hose
= pci_bus_to_hose(busnr
);
991 printk(KERN_ERR
"Can't find hose for PCI bus %d!\n", busnr
);
995 bus
.ops
= hose
? hose
->ops
: &null_pci_ops
;
999 #define EARLY_PCI_OP(rw, size, type) \
1000 int early_##rw##_config_##size(struct pci_controller *hose, int bus, \
1001 int devfn, int offset, type value) \
1003 return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \
1004 devfn, offset, value); \
1007 EARLY_PCI_OP(read
, byte
, u8
*)
1008 EARLY_PCI_OP(read
, word
, u16
*)
1009 EARLY_PCI_OP(read
, dword
, u32
*)
1010 EARLY_PCI_OP(write
, byte
, u8
)
1011 EARLY_PCI_OP(write
, word
, u16
)
1012 EARLY_PCI_OP(write
, dword
, u32
)
1014 extern int pci_bus_find_capability (struct pci_bus
*bus
, unsigned int devfn
, int cap
);
1015 int early_find_capability(struct pci_controller
*hose
, int bus
, int devfn
,
1018 return pci_bus_find_capability(fake_pci_bus(hose
, bus
), devfn
, cap
);