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PM: Move clock-related definitions and headers to separate file
[linux-2.6.git] / arch / arm / mach-shmobile / board-ap4evb.c
blob074884c646db9f7cf81cfc0e4e37abd8ec309a37
1 /*
2 * AP4EVB board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20 #include <linux/clk.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/platform_device.h>
26 #include <linux/delay.h>
27 #include <linux/mfd/tmio.h>
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/sh_mobile_sdhi.h>
30 #include <linux/mtd/mtd.h>
31 #include <linux/mtd/partitions.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/mmc/sh_mmcif.h>
34 #include <linux/i2c.h>
35 #include <linux/i2c/tsc2007.h>
36 #include <linux/io.h>
37 #include <linux/smsc911x.h>
38 #include <linux/sh_intc.h>
39 #include <linux/sh_clk.h>
40 #include <linux/gpio.h>
41 #include <linux/input.h>
42 #include <linux/leds.h>
43 #include <linux/input/sh_keysc.h>
44 #include <linux/usb/r8a66597.h>
45 #include <linux/pm_clock.h>
46
47 #include <media/sh_mobile_ceu.h>
48 #include <media/sh_mobile_csi2.h>
49 #include <media/soc_camera.h>
50
51 #include <sound/sh_fsi.h>
52
53 #include <video/sh_mobile_hdmi.h>
54 #include <video/sh_mobile_lcdc.h>
55 #include <video/sh_mipi_dsi.h>
56
57 #include <mach/common.h>
58 #include <mach/irqs.h>
59 #include <mach/sh7372.h>
60
61 #include <asm/mach-types.h>
62 #include <asm/mach/arch.h>
63 #include <asm/mach/map.h>
64 #include <asm/mach/time.h>
65 #include <asm/setup.h>
66
67 /*
68 * Address Interface BusWidth note
69 * ------------------------------------------------------------------
70 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
71 * 0x0800_0000 user area -
72 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
73 * 0x1400_0000 Ether (LAN9220) 16bit
74 * 0x1600_0000 user area - cannot use with NAND
75 * 0x1800_0000 user area -
76 * 0x1A00_0000 -
77 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
78 */
79
80 /*
81 * NOR Flash ROM
82 *
83 * SW1 | SW2 | SW7 | NOR Flash ROM
84 * bit1 | bit1 bit2 | bit1 | Memory allocation
85 * ------+------------+------+------------------
86 * OFF | ON OFF | ON | Area 0
87 * OFF | ON OFF | OFF | Area 4
88 */
89
90 /*
91 * NAND Flash ROM
92 *
93 * SW1 | SW2 | SW7 | NAND Flash ROM
94 * bit1 | bit1 bit2 | bit2 | Memory allocation
95 * ------+------------+------+------------------
96 * OFF | ON OFF | ON | FCE 0
97 * OFF | ON OFF | OFF | FCE 1
98 */
99
100 /*
101 * SMSC 9220
102 *
103 * SW1 SMSC 9220
104 * -----------------------
105 * ON access disable
106 * OFF access enable
107 */
108
109 /*
110 * LCD / IRQ / KEYSC / IrDA
111 *
112 * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
113 * LCD = 2nd LCDC (WVGA)
114 *
115 * | SW43 |
116 * SW3 | ON | OFF |
117 * -------------+-----------------------+---------------+
118 * ON | KEY / IrDA | LCD |
119 * OFF | KEY / IrDA / IRQ | IRQ |
120 *
121 *
122 * QHD / WVGA display
123 *
124 * You can choice display type on menuconfig.
125 * Then, check above dip-switch.
126 */
127
128 /*
129 * USB
130 *
131 * J7 : 1-2 MAX3355E VBUS
132 * 2-3 DC 5.0V
133 *
134 * S39: bit2: off
135 */
136
137 /*
138 * FSI/FSMI
139 *
140 * SW41 : ON : SH-Mobile AP4 Audio Mode
141 * : OFF : Bluetooth Audio Mode
142 */
143
144 /*
145 * MMC0/SDHI1 (CN7)
146 *
147 * J22 : select card voltage
148 * 1-2 pin : 1.8v
149 * 2-3 pin : 3.3v
150 *
151 * SW1 | SW33
152 * | bit1 | bit2 | bit3 | bit4
153 * ------------+------+------+------+-------
154 * MMC0 OFF | OFF | ON | ON | X
155 * SDHI1 OFF | ON | X | OFF | ON
156 *
157 * voltage lebel
158 * CN7 : 1.8v
159 * CN12: 3.3v
160 */
161
162 /* MTD */
163 static struct mtd_partition nor_flash_partitions[] = {
164 {
165 .name = "loader",
166 .offset = 0x00000000,
167 .size = 512 * 1024,
168 .mask_flags = MTD_WRITEABLE,
169 },
170 {
171 .name = "bootenv",
172 .offset = MTDPART_OFS_APPEND,
173 .size = 512 * 1024,
174 .mask_flags = MTD_WRITEABLE,
175 },
176 {
177 .name = "kernel_ro",
178 .offset = MTDPART_OFS_APPEND,
179 .size = 8 * 1024 * 1024,
180 .mask_flags = MTD_WRITEABLE,
181 },
182 {
183 .name = "kernel",
184 .offset = MTDPART_OFS_APPEND,
185 .size = 8 * 1024 * 1024,
186 },
187 {
188 .name = "data",
189 .offset = MTDPART_OFS_APPEND,
190 .size = MTDPART_SIZ_FULL,
191 },
192 };
193
194 static struct physmap_flash_data nor_flash_data = {
195 .width = 2,
196 .parts = nor_flash_partitions,
197 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
198 };
199
200 static struct resource nor_flash_resources[] = {
201 [0] = {
202 .start = 0x00000000,
203 .end = 0x08000000 - 1,
204 .flags = IORESOURCE_MEM,
205 }
206 };
207
208 static struct platform_device nor_flash_device = {
209 .name = "physmap-flash",
210 .dev = {
211 .platform_data = &nor_flash_data,
212 },
213 .num_resources = ARRAY_SIZE(nor_flash_resources),
214 .resource = nor_flash_resources,
215 };
216
217 /* SMSC 9220 */
218 static struct resource smc911x_resources[] = {
219 {
220 .start = 0x14000000,
221 .end = 0x16000000 - 1,
222 .flags = IORESOURCE_MEM,
223 }, {
224 .start = evt2irq(0x02c0) /* IRQ6A */,
225 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
226 },
227 };
228
229 static struct smsc911x_platform_config smsc911x_info = {
230 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
231 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
232 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
233 };
234
235 static struct platform_device smc911x_device = {
236 .name = "smsc911x",
237 .id = -1,
238 .num_resources = ARRAY_SIZE(smc911x_resources),
239 .resource = smc911x_resources,
240 .dev = {
241 .platform_data = &smsc911x_info,
242 },
243 };
244
245 /*
246 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
247 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
248 */
249 static int slot_cn7_get_cd(struct platform_device *pdev)
250 {
251 return !gpio_get_value(GPIO_PORT41);
252 }
253 /* MERAM */
254 static struct sh_mobile_meram_info meram_info = {
255 .addr_mode = SH_MOBILE_MERAM_MODE1,
256 };
257
258 static struct resource meram_resources[] = {
259 [0] = {
260 .name = "MERAM",
261 .start = 0xe8000000,
262 .end = 0xe81fffff,
263 .flags = IORESOURCE_MEM,
264 },
265 };
266
267 static struct platform_device meram_device = {
268 .name = "sh_mobile_meram",
269 .id = 0,
270 .num_resources = ARRAY_SIZE(meram_resources),
271 .resource = meram_resources,
272 .dev = {
273 .platform_data = &meram_info,
274 },
275 };
276
277 /* SH_MMCIF */
278 static struct resource sh_mmcif_resources[] = {
279 [0] = {
280 .name = "MMCIF",
281 .start = 0xE6BD0000,
282 .end = 0xE6BD00FF,
283 .flags = IORESOURCE_MEM,
284 },
285 [1] = {
286 /* MMC ERR */
287 .start = evt2irq(0x1ac0),
288 .flags = IORESOURCE_IRQ,
289 },
290 [2] = {
291 /* MMC NOR */
292 .start = evt2irq(0x1ae0),
293 .flags = IORESOURCE_IRQ,
294 },
295 };
296
297 static struct sh_mmcif_dma sh_mmcif_dma = {
298 .chan_priv_rx = {
299 .slave_id = SHDMA_SLAVE_MMCIF_RX,
300 },
301 .chan_priv_tx = {
302 .slave_id = SHDMA_SLAVE_MMCIF_TX,
303 },
304 };
305
306 static struct sh_mmcif_plat_data sh_mmcif_plat = {
307 .sup_pclk = 0,
308 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
309 .caps = MMC_CAP_4_BIT_DATA |
310 MMC_CAP_8_BIT_DATA |
311 MMC_CAP_NEEDS_POLL,
312 .get_cd = slot_cn7_get_cd,
313 .dma = &sh_mmcif_dma,
314 };
315
316 static struct platform_device sh_mmcif_device = {
317 .name = "sh_mmcif",
318 .id = 0,
319 .dev = {
320 .dma_mask = NULL,
321 .coherent_dma_mask = 0xffffffff,
322 .platform_data = &sh_mmcif_plat,
323 },
324 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
325 .resource = sh_mmcif_resources,
326 };
327
328 /* SDHI0 */
329 static struct sh_mobile_sdhi_info sdhi0_info = {
330 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
331 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
332 .tmio_caps = MMC_CAP_SDIO_IRQ,
333 };
334
335 static struct resource sdhi0_resources[] = {
336 [0] = {
337 .name = "SDHI0",
338 .start = 0xe6850000,
339 .end = 0xe68500ff,
340 .flags = IORESOURCE_MEM,
341 },
342 [1] = {
343 .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
344 .flags = IORESOURCE_IRQ,
345 },
346 [2] = {
347 .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
348 .flags = IORESOURCE_IRQ,
349 },
350 [3] = {
351 .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
352 .flags = IORESOURCE_IRQ,
353 },
354 };
355
356 static struct platform_device sdhi0_device = {
357 .name = "sh_mobile_sdhi",
358 .num_resources = ARRAY_SIZE(sdhi0_resources),
359 .resource = sdhi0_resources,
360 .id = 0,
361 .dev = {
362 .platform_data = &sdhi0_info,
363 },
364 };
365
366 /* SDHI1 */
367 static struct sh_mobile_sdhi_info sdhi1_info = {
368 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
369 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
370 .tmio_ocr_mask = MMC_VDD_165_195,
371 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
372 .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
373 .get_cd = slot_cn7_get_cd,
374 };
375
376 static struct resource sdhi1_resources[] = {
377 [0] = {
378 .name = "SDHI1",
379 .start = 0xe6860000,
380 .end = 0xe68600ff,
381 .flags = IORESOURCE_MEM,
382 },
383 [1] = {
384 .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
385 .flags = IORESOURCE_IRQ,
386 },
387 [2] = {
388 .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
389 .flags = IORESOURCE_IRQ,
390 },
391 [3] = {
392 .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
393 .flags = IORESOURCE_IRQ,
394 },
395 };
396
397 static struct platform_device sdhi1_device = {
398 .name = "sh_mobile_sdhi",
399 .num_resources = ARRAY_SIZE(sdhi1_resources),
400 .resource = sdhi1_resources,
401 .id = 1,
402 .dev = {
403 .platform_data = &sdhi1_info,
404 },
405 };
406
407 /* USB1 */
408 static void usb1_host_port_power(int port, int power)
409 {
410 if (!power) /* only power-on supported for now */
411 return;
412
413 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
414 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
415 }
416
417 static struct r8a66597_platdata usb1_host_data = {
418 .on_chip = 1,
419 .port_power = usb1_host_port_power,
420 };
421
422 static struct resource usb1_host_resources[] = {
423 [0] = {
424 .name = "USBHS",
425 .start = 0xE68B0000,
426 .end = 0xE68B00E6 - 1,
427 .flags = IORESOURCE_MEM,
428 },
429 [1] = {
430 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
431 .flags = IORESOURCE_IRQ,
432 },
433 };
434
435 static struct platform_device usb1_host_device = {
436 .name = "r8a66597_hcd",
437 .id = 1,
438 .dev = {
439 .dma_mask = NULL, /* not use dma */
440 .coherent_dma_mask = 0xffffffff,
441 .platform_data = &usb1_host_data,
442 },
443 .num_resources = ARRAY_SIZE(usb1_host_resources),
444 .resource = usb1_host_resources,
445 };
446
447 static const struct fb_videomode ap4evb_lcdc_modes[] = {
448 {
449 #ifdef CONFIG_AP4EVB_QHD
450 .name = "R63302(QHD)",
451 .xres = 544,
452 .yres = 961,
453 .left_margin = 72,
454 .right_margin = 600,
455 .hsync_len = 16,
456 .upper_margin = 8,
457 .lower_margin = 8,
458 .vsync_len = 2,
459 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
460 #else
461 .name = "WVGA Panel",
462 .xres = 800,
463 .yres = 480,
464 .left_margin = 220,
465 .right_margin = 110,
466 .hsync_len = 70,
467 .upper_margin = 20,
468 .lower_margin = 5,
469 .vsync_len = 5,
470 .sync = 0,
471 #endif
472 },
473 };
474 static struct sh_mobile_meram_cfg lcd_meram_cfg = {
475 .icb[0] = {
476 .marker_icb = 28,
477 .cache_icb = 24,
478 .meram_offset = 0x0,
479 .meram_size = 0x40,
480 },
481 .icb[1] = {
482 .marker_icb = 29,
483 .cache_icb = 25,
484 .meram_offset = 0x40,
485 .meram_size = 0x40,
486 },
487 };
488
489 static struct sh_mobile_lcdc_info lcdc_info = {
490 .meram_dev = &meram_info,
491 .ch[0] = {
492 .chan = LCDC_CHAN_MAINLCD,
493 .bpp = 16,
494 .lcd_cfg = ap4evb_lcdc_modes,
495 .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
496 .meram_cfg = &lcd_meram_cfg,
497 }
498 };
499
500 static struct resource lcdc_resources[] = {
501 [0] = {
502 .name = "LCDC",
503 .start = 0xfe940000, /* P4-only space */
504 .end = 0xfe943fff,
505 .flags = IORESOURCE_MEM,
506 },
507 [1] = {
508 .start = intcs_evt2irq(0x580),
509 .flags = IORESOURCE_IRQ,
510 },
511 };
512
513 static struct platform_device lcdc_device = {
514 .name = "sh_mobile_lcdc_fb",
515 .num_resources = ARRAY_SIZE(lcdc_resources),
516 .resource = lcdc_resources,
517 .dev = {
518 .platform_data = &lcdc_info,
519 .coherent_dma_mask = ~0,
520 },
521 };
522
523 /*
524 * QHD display
525 */
526 #ifdef CONFIG_AP4EVB_QHD
527
528 /* KEYSC (Needs SW43 set to ON) */
529 static struct sh_keysc_info keysc_info = {
530 .mode = SH_KEYSC_MODE_1,
531 .scan_timing = 3,
532 .delay = 2500,
533 .keycodes = {
534 KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
535 KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
536 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
537 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
538 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
539 },
540 };
541
542 static struct resource keysc_resources[] = {
543 [0] = {
544 .name = "KEYSC",
545 .start = 0xe61b0000,
546 .end = 0xe61b0063,
547 .flags = IORESOURCE_MEM,
548 },
549 [1] = {
550 .start = evt2irq(0x0be0), /* KEYSC_KEY */
551 .flags = IORESOURCE_IRQ,
552 },
553 };
554
555 static struct platform_device keysc_device = {
556 .name = "sh_keysc",
557 .id = 0, /* "keysc0" clock */
558 .num_resources = ARRAY_SIZE(keysc_resources),
559 .resource = keysc_resources,
560 .dev = {
561 .platform_data = &keysc_info,
562 },
563 };
564
565 /* MIPI-DSI */
566 static struct resource mipidsi0_resources[] = {
567 [0] = {
568 .start = 0xffc60000,
569 .end = 0xffc63073,
570 .flags = IORESOURCE_MEM,
571 },
572 [1] = {
573 .start = 0xffc68000,
574 .end = 0xffc680ef,
575 .flags = IORESOURCE_MEM,
576 },
577 };
578
579 static struct sh_mipi_dsi_info mipidsi0_info = {
580 .data_format = MIPI_RGB888,
581 .lcd_chan = &lcdc_info.ch[0],
582 .vsynw_offset = 17,
583 };
584
585 static struct platform_device mipidsi0_device = {
586 .name = "sh-mipi-dsi",
587 .num_resources = ARRAY_SIZE(mipidsi0_resources),
588 .resource = mipidsi0_resources,
589 .id = 0,
590 .dev = {
591 .platform_data = &mipidsi0_info,
592 },
593 };
594
595 static struct platform_device *qhd_devices[] __initdata = {
596 &mipidsi0_device,
597 &keysc_device,
598 };
599 #endif /* CONFIG_AP4EVB_QHD */
600
601 /* FSI */
602 #define IRQ_FSI evt2irq(0x1840)
603 static int __fsi_set_rate(struct clk *clk, long rate, int enable)
604 {
605 int ret = 0;
606
607 if (rate <= 0)
608 return ret;
609
610 if (enable) {
611 ret = clk_set_rate(clk, rate);
612 if (0 == ret)
613 ret = clk_enable(clk);
614 } else {
615 clk_disable(clk);
616 }
617
618 return ret;
619 }
620
621 static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
622 {
623 return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
624 }
625
626 static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
627 {
628 struct clk *fsia_ick;
629 struct clk *fsiack;
630 int ret = -EIO;
631
632 fsia_ick = clk_get(dev, "icka");
633 if (IS_ERR(fsia_ick))
634 return PTR_ERR(fsia_ick);
635
636 /*
637 * FSIACK is connected to AK4642,
638 * and use external clock pin from it.
639 * it is parent of fsia_ick now.
640 */
641 fsiack = clk_get_parent(fsia_ick);
642 if (!fsiack)
643 goto fsia_ick_out;
644
645 /*
646 * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
647 *
648 ** FIXME **
649 * Because the freq_table of external clk (fsiack) are all 0,
650 * the return value of clk_round_rate became 0.
651 * So, it use __fsi_set_rate here.
652 */
653 ret = __fsi_set_rate(fsiack, rate, enable);
654 if (ret < 0)
655 goto fsiack_out;
656
657 ret = __fsi_set_round_rate(fsia_ick, rate, enable);
658 if ((ret < 0) && enable)
659 __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
660
661 fsiack_out:
662 clk_put(fsiack);
663
664 fsia_ick_out:
665 clk_put(fsia_ick);
666
667 return 0;
668 }
669
670 static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
671 {
672 struct clk *fsib_clk;
673 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
674 long fsib_rate = 0;
675 long fdiv_rate = 0;
676 int ackmd_bpfmd;
677 int ret;
678
679 switch (rate) {
680 case 44100:
681 fsib_rate = rate * 256;
682 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
683 break;
684 case 48000:
685 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
686 fdiv_rate = rate * 256;
687 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
688 break;
689 default:
690 pr_err("unsupported rate in FSI2 port B\n");
691 return -EINVAL;
692 }
693
694 /* FSI B setting */
695 fsib_clk = clk_get(dev, "ickb");
696 if (IS_ERR(fsib_clk))
697 return -EIO;
698
699 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
700 if (ret < 0)
701 goto fsi_set_rate_end;
702
703 /* FSI DIV setting */
704 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
705 if (ret < 0) {
706 /* disable FSI B */
707 if (enable)
708 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
709 goto fsi_set_rate_end;
710 }
711
712 ret = ackmd_bpfmd;
713
714 fsi_set_rate_end:
715 clk_put(fsib_clk);
716 return ret;
717 }
718
719 static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
720 {
721 int ret;
722
723 if (is_porta)
724 ret = fsi_ak4642_set_rate(dev, rate, enable);
725 else
726 ret = fsi_hdmi_set_rate(dev, rate, enable);
727
728 return ret;
729 }
730
731 static struct sh_fsi_platform_info fsi_info = {
732 .porta_flags = SH_FSI_BRS_INV,
733
734 .portb_flags = SH_FSI_BRS_INV |
735 SH_FSI_BRM_INV |
736 SH_FSI_LRS_INV |
737 SH_FSI_FMT_SPDIF,
738 .set_rate = fsi_set_rate,
739 };
740
741 static struct resource fsi_resources[] = {
742 [0] = {
743 .name = "FSI",
744 .start = 0xFE3C0000,
745 .end = 0xFE3C0400 - 1,
746 .flags = IORESOURCE_MEM,
747 },
748 [1] = {
749 .start = IRQ_FSI,
750 .flags = IORESOURCE_IRQ,
751 },
752 };
753
754 static struct platform_device fsi_device = {
755 .name = "sh_fsi2",
756 .id = -1,
757 .num_resources = ARRAY_SIZE(fsi_resources),
758 .resource = fsi_resources,
759 .dev = {
760 .platform_data = &fsi_info,
761 },
762 };
763
764 static struct platform_device fsi_ak4643_device = {
765 .name = "sh_fsi2_a_ak4643",
766 };
767 static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
768 .icb[0] = {
769 .marker_icb = 30,
770 .cache_icb = 26,
771 .meram_offset = 0x80,
772 .meram_size = 0x100,
773 },
774 .icb[1] = {
775 .marker_icb = 31,
776 .cache_icb = 27,
777 .meram_offset = 0x180,
778 .meram_size = 0x100,
779 },
780 };
781
782 static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
783 .clock_source = LCDC_CLK_EXTERNAL,
784 .meram_dev = &meram_info,
785 .ch[0] = {
786 .chan = LCDC_CHAN_MAINLCD,
787 .bpp = 16,
788 .interface_type = RGB24,
789 .clock_divider = 1,
790 .flags = LCDC_FLAGS_DWPOL,
791 .meram_cfg = &hdmi_meram_cfg,
792 }
793 };
794
795 static struct resource lcdc1_resources[] = {
796 [0] = {
797 .name = "LCDC1",
798 .start = 0xfe944000,
799 .end = 0xfe947fff,
800 .flags = IORESOURCE_MEM,
801 },
802 [1] = {
803 .start = intcs_evt2irq(0x1780),
804 .flags = IORESOURCE_IRQ,
805 },
806 };
807
808 static struct platform_device lcdc1_device = {
809 .name = "sh_mobile_lcdc_fb",
810 .num_resources = ARRAY_SIZE(lcdc1_resources),
811 .resource = lcdc1_resources,
812 .id = 1,
813 .dev = {
814 .platform_data = &sh_mobile_lcdc1_info,
815 .coherent_dma_mask = ~0,
816 },
817 };
818
819 static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
820 unsigned long *parent_freq);
821
822
823 static struct sh_mobile_hdmi_info hdmi_info = {
824 .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
825 .lcd_dev = &lcdc1_device.dev,
826 .flags = HDMI_SND_SRC_SPDIF,
827 .clk_optimize_parent = ap4evb_clk_optimize,
828 };
829
830 static struct resource hdmi_resources[] = {
831 [0] = {
832 .name = "HDMI",
833 .start = 0xe6be0000,
834 .end = 0xe6be00ff,
835 .flags = IORESOURCE_MEM,
836 },
837 [1] = {
838 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
839 .start = evt2irq(0x17e0),
840 .flags = IORESOURCE_IRQ,
841 },
842 };
843
844 static struct platform_device hdmi_device = {
845 .name = "sh-mobile-hdmi",
846 .num_resources = ARRAY_SIZE(hdmi_resources),
847 .resource = hdmi_resources,
848 .id = -1,
849 .dev = {
850 .platform_data = &hdmi_info,
851 },
852 };
853
854 static struct platform_device fsi_hdmi_device = {
855 .name = "sh_fsi2_b_hdmi",
856 };
857
858 static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
859 unsigned long *parent_freq)
860 {
861 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
862 long error;
863
864 if (IS_ERR(hdmi_ick)) {
865 int ret = PTR_ERR(hdmi_ick);
866 pr_err("Cannot get HDMI ICK: %d\n", ret);
867 return ret;
868 }
869
870 error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
871
872 clk_put(hdmi_ick);
873
874 return error;
875 }
876
877 static struct gpio_led ap4evb_leds[] = {
878 {
879 .name = "led4",
880 .gpio = GPIO_PORT185,
881 .default_state = LEDS_GPIO_DEFSTATE_ON,
882 },
883 {
884 .name = "led2",
885 .gpio = GPIO_PORT186,
886 .default_state = LEDS_GPIO_DEFSTATE_ON,
887 },
888 {
889 .name = "led3",
890 .gpio = GPIO_PORT187,
891 .default_state = LEDS_GPIO_DEFSTATE_ON,
892 },
893 {
894 .name = "led1",
895 .gpio = GPIO_PORT188,
896 .default_state = LEDS_GPIO_DEFSTATE_ON,
897 }
898 };
899
900 static struct gpio_led_platform_data ap4evb_leds_pdata = {
901 .num_leds = ARRAY_SIZE(ap4evb_leds),
902 .leds = ap4evb_leds,
903 };
904
905 static struct platform_device leds_device = {
906 .name = "leds-gpio",
907 .id = 0,
908 .dev = {
909 .platform_data = &ap4evb_leds_pdata,
910 },
911 };
912
913 static struct i2c_board_info imx074_info = {
914 I2C_BOARD_INFO("imx074", 0x1a),
915 };
916
917 static struct soc_camera_link imx074_link = {
918 .bus_id = 0,
919 .board_info = &imx074_info,
920 .i2c_adapter_id = 0,
921 .module_name = "imx074",
922 };
923
924 static struct platform_device ap4evb_camera = {
925 .name = "soc-camera-pdrv",
926 .id = 0,
927 .dev = {
928 .platform_data = &imx074_link,
929 },
930 };
931
932 static struct sh_csi2_client_config csi2_clients[] = {
933 {
934 .phy = SH_CSI2_PHY_MAIN,
935 .lanes = 3,
936 .channel = 0,
937 .pdev = &ap4evb_camera,
938 },
939 };
940
941 static struct sh_csi2_pdata csi2_info = {
942 .type = SH_CSI2C,
943 .clients = csi2_clients,
944 .num_clients = ARRAY_SIZE(csi2_clients),
945 .flags = SH_CSI2_ECC | SH_CSI2_CRC,
946 };
947
948 static struct resource csi2_resources[] = {
949 [0] = {
950 .name = "CSI2",
951 .start = 0xffc90000,
952 .end = 0xffc90fff,
953 .flags = IORESOURCE_MEM,
954 },
955 [1] = {
956 .start = intcs_evt2irq(0x17a0),
957 .flags = IORESOURCE_IRQ,
958 },
959 };
960
961 static struct sh_mobile_ceu_companion csi2 = {
962 .id = 0,
963 .num_resources = ARRAY_SIZE(csi2_resources),
964 .resource = csi2_resources,
965 .platform_data = &csi2_info,
966 };
967
968 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
969 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
970 .csi2 = &csi2,
971 };
972
973 static struct resource ceu_resources[] = {
974 [0] = {
975 .name = "CEU",
976 .start = 0xfe910000,
977 .end = 0xfe91009f,
978 .flags = IORESOURCE_MEM,
979 },
980 [1] = {
981 .start = intcs_evt2irq(0x880),
982 .flags = IORESOURCE_IRQ,
983 },
984 [2] = {
985 /* place holder for contiguous memory */
986 },
987 };
988
989 static struct platform_device ceu_device = {
990 .name = "sh_mobile_ceu",
991 .id = 0, /* "ceu0" clock */
992 .num_resources = ARRAY_SIZE(ceu_resources),
993 .resource = ceu_resources,
994 .dev = {
995 .platform_data = &sh_mobile_ceu_info,
996 .coherent_dma_mask = 0xffffffff,
997 },
998 };
999
1000 static struct platform_device *ap4evb_devices[] __initdata = {
1001 &leds_device,
1002 &nor_flash_device,
1003 &smc911x_device,
1004 &sdhi0_device,
1005 &sdhi1_device,
1006 &usb1_host_device,
1007 &fsi_device,
1008 &fsi_ak4643_device,
1009 &fsi_hdmi_device,
1010 &sh_mmcif_device,
1011 &lcdc1_device,
1012 &lcdc_device,
1013 &hdmi_device,
1014 &ceu_device,
1015 &ap4evb_camera,
1016 &meram_device,
1017 };
1018
1019 static void __init hdmi_init_pm_clock(void)
1020 {
1021 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
1022 int ret;
1023 long rate;
1024
1025 if (IS_ERR(hdmi_ick)) {
1026 ret = PTR_ERR(hdmi_ick);
1027 pr_err("Cannot get HDMI ICK: %d\n", ret);
1028 goto out;
1029 }
1030
1031 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
1032 if (ret < 0) {
1033 pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
1034 goto out;
1035 }
1036
1037 pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
1038
1039 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
1040 if (rate < 0) {
1041 pr_err("Cannot get suitable rate: %ld\n", rate);
1042 ret = rate;
1043 goto out;
1044 }
1045
1046 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
1047 if (ret < 0) {
1048 pr_err("Cannot set rate %ld: %d\n", rate, ret);
1049 goto out;
1050 }
1051
1052 pr_debug("PLLC2 set frequency %lu\n", rate);
1053
1054 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
1055 if (ret < 0)
1056 pr_err("Cannot set HDMI parent: %d\n", ret);
1057
1058 out:
1059 if (!IS_ERR(hdmi_ick))
1060 clk_put(hdmi_ick);
1061 }
1062
1063 static void __init fsi_init_pm_clock(void)
1064 {
1065 struct clk *fsia_ick;
1066 int ret;
1067
1068 fsia_ick = clk_get(&fsi_device.dev, "icka");
1069 if (IS_ERR(fsia_ick)) {
1070 ret = PTR_ERR(fsia_ick);
1071 pr_err("Cannot get FSI ICK: %d\n", ret);
1072 return;
1073 }
1074
1075 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
1076 if (ret < 0)
1077 pr_err("Cannot set FSI-A parent: %d\n", ret);
1078
1079 clk_put(fsia_ick);
1080 }
1081
1082 /*
1083 * FIXME !!
1084 *
1085 * gpio_no_direction
1086 * are quick_hack.
1087 *
1088 * current gpio frame work doesn't have
1089 * the method to control only pull up/down/free.
1090 * this function should be replaced by correct gpio function
1091 */
1092 static void __init gpio_no_direction(u32 addr)
1093 {
1094 __raw_writeb(0x00, addr);
1095 }
1096
1097 /* TouchScreen */
1098 #ifdef CONFIG_AP4EVB_QHD
1099 # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
1100 # define GPIO_TSC_PORT GPIO_PORT123
1101 #else /* WVGA */
1102 # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
1103 # define GPIO_TSC_PORT GPIO_PORT40
1104 #endif
1105
1106 #define IRQ28 evt2irq(0x3380) /* IRQ28A */
1107 #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
1108 static int ts_get_pendown_state(void)
1109 {
1110 int val;
1111
1112 gpio_free(GPIO_TSC_IRQ);
1113
1114 gpio_request(GPIO_TSC_PORT, NULL);
1115
1116 gpio_direction_input(GPIO_TSC_PORT);
1117
1118 val = gpio_get_value(GPIO_TSC_PORT);
1119
1120 gpio_request(GPIO_TSC_IRQ, NULL);
1121
1122 return !val;
1123 }
1124
1125 static int ts_init(void)
1126 {
1127 gpio_request(GPIO_TSC_IRQ, NULL);
1128
1129 return 0;
1130 }
1131
1132 static struct tsc2007_platform_data tsc2007_info = {
1133 .model = 2007,
1134 .x_plate_ohms = 180,
1135 .get_pendown_state = ts_get_pendown_state,
1136 .init_platform_hw = ts_init,
1137 };
1138
1139 static struct i2c_board_info tsc_device = {
1140 I2C_BOARD_INFO("tsc2007", 0x48),
1141 .type = "tsc2007",
1142 .platform_data = &tsc2007_info,
1143 /*.irq is selected on ap4evb_init */
1144 };
1145
1146 /* I2C */
1147 static struct i2c_board_info i2c0_devices[] = {
1148 {
1149 I2C_BOARD_INFO("ak4643", 0x13),
1150 },
1151 };
1152
1153 static struct i2c_board_info i2c1_devices[] = {
1154 {
1155 I2C_BOARD_INFO("r2025sd", 0x32),
1156 },
1157 };
1158
1159 static struct map_desc ap4evb_io_desc[] __initdata = {
1160 /* create a 1:1 entity map for 0xe6xxxxxx
1161 * used by CPGA, INTC and PFC.
1162 */
1163 {
1164 .virtual = 0xe6000000,
1165 .pfn = __phys_to_pfn(0xe6000000),
1166 .length = 256 << 20,
1167 .type = MT_DEVICE_NONSHARED
1168 },
1169 };
1170
1171 static void __init ap4evb_map_io(void)
1172 {
1173 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
1174
1175 /* setup early devices and console here as well */
1176 sh7372_add_early_devices();
1177 shmobile_setup_console();
1178 }
1179
1180 #define GPIO_PORT9CR 0xE6051009
1181 #define GPIO_PORT10CR 0xE605100A
1182 #define USCCR1 0xE6058144
1183 static void __init ap4evb_init(void)
1184 {
1185 u32 srcr4;
1186 struct clk *clk;
1187
1188 sh7372_pinmux_init();
1189
1190 /* enable SCIFA0 */
1191 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1192 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1193
1194 /* enable SMSC911X */
1195 gpio_request(GPIO_FN_CS5A, NULL);
1196 gpio_request(GPIO_FN_IRQ6_39, NULL);
1197
1198 /* enable Debug switch (S6) */
1199 gpio_request(GPIO_PORT32, NULL);
1200 gpio_request(GPIO_PORT33, NULL);
1201 gpio_request(GPIO_PORT34, NULL);
1202 gpio_request(GPIO_PORT35, NULL);
1203 gpio_direction_input(GPIO_PORT32);
1204 gpio_direction_input(GPIO_PORT33);
1205 gpio_direction_input(GPIO_PORT34);
1206 gpio_direction_input(GPIO_PORT35);
1207 gpio_export(GPIO_PORT32, 0);
1208 gpio_export(GPIO_PORT33, 0);
1209 gpio_export(GPIO_PORT34, 0);
1210 gpio_export(GPIO_PORT35, 0);
1211
1212 /* SDHI0 */
1213 gpio_request(GPIO_FN_SDHICD0, NULL);
1214 gpio_request(GPIO_FN_SDHIWP0, NULL);
1215 gpio_request(GPIO_FN_SDHICMD0, NULL);
1216 gpio_request(GPIO_FN_SDHICLK0, NULL);
1217 gpio_request(GPIO_FN_SDHID0_3, NULL);
1218 gpio_request(GPIO_FN_SDHID0_2, NULL);
1219 gpio_request(GPIO_FN_SDHID0_1, NULL);
1220 gpio_request(GPIO_FN_SDHID0_0, NULL);
1221
1222 /* SDHI1 */
1223 gpio_request(GPIO_FN_SDHICMD1, NULL);
1224 gpio_request(GPIO_FN_SDHICLK1, NULL);
1225 gpio_request(GPIO_FN_SDHID1_3, NULL);
1226 gpio_request(GPIO_FN_SDHID1_2, NULL);
1227 gpio_request(GPIO_FN_SDHID1_1, NULL);
1228 gpio_request(GPIO_FN_SDHID1_0, NULL);
1229
1230 /* MMCIF */
1231 gpio_request(GPIO_FN_MMCD0_0, NULL);
1232 gpio_request(GPIO_FN_MMCD0_1, NULL);
1233 gpio_request(GPIO_FN_MMCD0_2, NULL);
1234 gpio_request(GPIO_FN_MMCD0_3, NULL);
1235 gpio_request(GPIO_FN_MMCD0_4, NULL);
1236 gpio_request(GPIO_FN_MMCD0_5, NULL);
1237 gpio_request(GPIO_FN_MMCD0_6, NULL);
1238 gpio_request(GPIO_FN_MMCD0_7, NULL);
1239 gpio_request(GPIO_FN_MMCCMD0, NULL);
1240 gpio_request(GPIO_FN_MMCCLK0, NULL);
1241
1242 /* USB enable */
1243 gpio_request(GPIO_FN_VBUS0_1, NULL);
1244 gpio_request(GPIO_FN_IDIN_1_18, NULL);
1245 gpio_request(GPIO_FN_PWEN_1_115, NULL);
1246 gpio_request(GPIO_FN_OVCN_1_114, NULL);
1247 gpio_request(GPIO_FN_EXTLP_1, NULL);
1248 gpio_request(GPIO_FN_OVCN2_1, NULL);
1249
1250 /* setup USB phy */
1251 __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
1252
1253 /* enable FSI2 port A (ak4643) */
1254 gpio_request(GPIO_FN_FSIAIBT, NULL);
1255 gpio_request(GPIO_FN_FSIAILR, NULL);
1256 gpio_request(GPIO_FN_FSIAISLD, NULL);
1257 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1258 gpio_request(GPIO_PORT161, NULL);
1259 gpio_direction_output(GPIO_PORT161, 0); /* slave */
1260
1261 gpio_request(GPIO_PORT9, NULL);
1262 gpio_request(GPIO_PORT10, NULL);
1263 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1264 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1265
1266 /* card detect pin for MMC slot (CN7) */
1267 gpio_request(GPIO_PORT41, NULL);
1268 gpio_direction_input(GPIO_PORT41);
1269
1270 /* setup FSI2 port B (HDMI) */
1271 gpio_request(GPIO_FN_FSIBCK, NULL);
1272 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1273
1274 /* set SPU2 clock to 119.6 MHz */
1275 clk = clk_get(NULL, "spu_clk");
1276 if (!IS_ERR(clk)) {
1277 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1278 clk_put(clk);
1279 }
1280
1281 /*
1282 * set irq priority, to avoid sound chopping
1283 * when NFS rootfs is used
1284 * FSI(3) > SMSC911X(2)
1285 */
1286 intc_set_priority(IRQ_FSI, 3);
1287
1288 i2c_register_board_info(0, i2c0_devices,
1289 ARRAY_SIZE(i2c0_devices));
1290
1291 i2c_register_board_info(1, i2c1_devices,
1292 ARRAY_SIZE(i2c1_devices));
1293
1294 #ifdef CONFIG_AP4EVB_QHD
1295
1296 /*
1297 * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
1298 * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
1299 */
1300
1301 /* enable KEYSC */
1302 gpio_request(GPIO_FN_KEYOUT0, NULL);
1303 gpio_request(GPIO_FN_KEYOUT1, NULL);
1304 gpio_request(GPIO_FN_KEYOUT2, NULL);
1305 gpio_request(GPIO_FN_KEYOUT3, NULL);
1306 gpio_request(GPIO_FN_KEYOUT4, NULL);
1307 gpio_request(GPIO_FN_KEYIN0_136, NULL);
1308 gpio_request(GPIO_FN_KEYIN1_135, NULL);
1309 gpio_request(GPIO_FN_KEYIN2_134, NULL);
1310 gpio_request(GPIO_FN_KEYIN3_133, NULL);
1311 gpio_request(GPIO_FN_KEYIN4, NULL);
1312
1313 /* enable TouchScreen */
1314 irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
1315
1316 tsc_device.irq = IRQ28;
1317 i2c_register_board_info(1, &tsc_device, 1);
1318
1319 /* LCDC0 */
1320 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
1321 lcdc_info.ch[0].interface_type = RGB24;
1322 lcdc_info.ch[0].clock_divider = 1;
1323 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
1324 lcdc_info.ch[0].lcd_size_cfg.width = 44;
1325 lcdc_info.ch[0].lcd_size_cfg.height = 79;
1326
1327 platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
1328
1329 #else
1330 /*
1331 * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
1332 * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
1333 */
1334
1335 gpio_request(GPIO_FN_LCDD17, NULL);
1336 gpio_request(GPIO_FN_LCDD16, NULL);
1337 gpio_request(GPIO_FN_LCDD15, NULL);
1338 gpio_request(GPIO_FN_LCDD14, NULL);
1339 gpio_request(GPIO_FN_LCDD13, NULL);
1340 gpio_request(GPIO_FN_LCDD12, NULL);
1341 gpio_request(GPIO_FN_LCDD11, NULL);
1342 gpio_request(GPIO_FN_LCDD10, NULL);
1343 gpio_request(GPIO_FN_LCDD9, NULL);
1344 gpio_request(GPIO_FN_LCDD8, NULL);
1345 gpio_request(GPIO_FN_LCDD7, NULL);
1346 gpio_request(GPIO_FN_LCDD6, NULL);
1347 gpio_request(GPIO_FN_LCDD5, NULL);
1348 gpio_request(GPIO_FN_LCDD4, NULL);
1349 gpio_request(GPIO_FN_LCDD3, NULL);
1350 gpio_request(GPIO_FN_LCDD2, NULL);
1351 gpio_request(GPIO_FN_LCDD1, NULL);
1352 gpio_request(GPIO_FN_LCDD0, NULL);
1353 gpio_request(GPIO_FN_LCDDISP, NULL);
1354 gpio_request(GPIO_FN_LCDDCK, NULL);
1355
1356 gpio_request(GPIO_PORT189, NULL); /* backlight */
1357 gpio_direction_output(GPIO_PORT189, 1);
1358
1359 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1360 gpio_direction_output(GPIO_PORT151, 1);
1361
1362 lcdc_info.clock_source = LCDC_CLK_BUS;
1363 lcdc_info.ch[0].interface_type = RGB18;
1364 lcdc_info.ch[0].clock_divider = 3;
1365 lcdc_info.ch[0].flags = 0;
1366 lcdc_info.ch[0].lcd_size_cfg.width = 152;
1367 lcdc_info.ch[0].lcd_size_cfg.height = 91;
1368
1369 /* enable TouchScreen */
1370 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1371
1372 tsc_device.irq = IRQ7;
1373 i2c_register_board_info(0, &tsc_device, 1);
1374 #endif /* CONFIG_AP4EVB_QHD */
1375
1376 /* CEU */
1377
1378 /*
1379 * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
1380 * becomes available
1381 */
1382
1383 /* MIPI-CSI stuff */
1384 gpio_request(GPIO_FN_VIO_CKO, NULL);
1385
1386 clk = clk_get(NULL, "vck1_clk");
1387 if (!IS_ERR(clk)) {
1388 clk_set_rate(clk, clk_round_rate(clk, 13000000));
1389 clk_enable(clk);
1390 clk_put(clk);
1391 }
1392
1393 sh7372_add_standard_devices();
1394
1395 /* HDMI */
1396 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1397 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1398
1399 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1400 #define SRCR4 0xe61580bc
1401 srcr4 = __raw_readl(SRCR4);
1402 __raw_writel(srcr4 | (1 << 13), SRCR4);
1403 udelay(50);
1404 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1405
1406 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1407
1408 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device);
1409 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
1410 sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
1411
1412 hdmi_init_pm_clock();
1413 fsi_init_pm_clock();
1414 sh7372_pm_init();
1415 pm_clk_add(&fsi_device.dev, "spu2");
1416 pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
1417 }
1418
1419 static void __init ap4evb_timer_init(void)
1420 {
1421 sh7372_clock_init();
1422 shmobile_timer.init();
1423
1424 /* External clock source */
1425 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1426 }
1427
1428 static struct sys_timer ap4evb_timer = {
1429 .init = ap4evb_timer_init,
1430 };
1431
1432 MACHINE_START(AP4EVB, "ap4evb")
1433 .map_io = ap4evb_map_io,
1434 .init_irq = sh7372_init_irq,
1435 .handle_irq = shmobile_handle_irq_intc,
1436 .init_machine = ap4evb_init,
1437 .timer = &ap4evb_timer,
1438 MACHINE_END
Linus' kernel tree