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dlm: Handle application limited situations properly.
[linux-2.6.git] / drivers / serial / max3100.c
blobbeb1afa27d8d3a5549ca9b2b745702bffc8d6301
1 /*
2 *
3 * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 *
11 * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
12 * to use polling for flow control. TX empty IRQ is unusable, since
13 * writing conf clears FIFO buffer and we cannot have this interrupt
14 * always asking us for attention.
15 *
16 * Example platform data:
17
18 static struct plat_max3100 max3100_plat_data = {
19 .loopback = 0,
20 .crystal = 0,
21 .poll_time = 100,
22 };
23
24 static struct spi_board_info spi_board_info[] = {
25 {
26 .modalias = "max3100",
27 .platform_data = &max3100_plat_data,
28 .irq = IRQ_EINT12,
29 .max_speed_hz = 5*1000*1000,
30 .chip_select = 0,
31 },
32 };
33
34 * The initial minor number is 209 in the low-density serial port:
35 * mknod /dev/ttyMAX0 c 204 209
36 */
37
38 #define MAX3100_MAJOR 204
39 #define MAX3100_MINOR 209
40 /* 4 MAX3100s should be enough for everyone */
41 #define MAX_MAX3100 4
42
43 #include <linux/delay.h>
44 #include <linux/slab.h>
45 #include <linux/device.h>
46 #include <linux/serial_core.h>
47 #include <linux/serial.h>
48 #include <linux/spi/spi.h>
49 #include <linux/freezer.h>
50
51 #include <linux/serial_max3100.h>
52
53 #define MAX3100_C (1<<14)
54 #define MAX3100_D (0<<14)
55 #define MAX3100_W (1<<15)
56 #define MAX3100_RX (0<<15)
57
58 #define MAX3100_WC (MAX3100_W | MAX3100_C)
59 #define MAX3100_RC (MAX3100_RX | MAX3100_C)
60 #define MAX3100_WD (MAX3100_W | MAX3100_D)
61 #define MAX3100_RD (MAX3100_RX | MAX3100_D)
62 #define MAX3100_CMD (3 << 14)
63
64 #define MAX3100_T (1<<14)
65 #define MAX3100_R (1<<15)
66
67 #define MAX3100_FEN (1<<13)
68 #define MAX3100_SHDN (1<<12)
69 #define MAX3100_TM (1<<11)
70 #define MAX3100_RM (1<<10)
71 #define MAX3100_PM (1<<9)
72 #define MAX3100_RAM (1<<8)
73 #define MAX3100_IR (1<<7)
74 #define MAX3100_ST (1<<6)
75 #define MAX3100_PE (1<<5)
76 #define MAX3100_L (1<<4)
77 #define MAX3100_BAUD (0xf)
78
79 #define MAX3100_TE (1<<10)
80 #define MAX3100_RAFE (1<<10)
81 #define MAX3100_RTS (1<<9)
82 #define MAX3100_CTS (1<<9)
83 #define MAX3100_PT (1<<8)
84 #define MAX3100_DATA (0xff)
85
86 #define MAX3100_RT (MAX3100_R | MAX3100_T)
87 #define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
88
89 /* the following simulate a status reg for ignore_status_mask */
90 #define MAX3100_STATUS_PE 1
91 #define MAX3100_STATUS_FE 2
92 #define MAX3100_STATUS_OE 4
93
94 struct max3100_port {
95 struct uart_port port;
96 struct spi_device *spi;
97
98 int cts; /* last CTS received for flow ctrl */
99 int tx_empty; /* last TX empty bit */
100
101 spinlock_t conf_lock; /* shared data */
102 int conf_commit; /* need to make changes */
103 int conf; /* configuration for the MAX31000
104 * (bits 0-7, bits 8-11 are irqs) */
105 int rts_commit; /* need to change rts */
106 int rts; /* rts status */
107 int baud; /* current baud rate */
108
109 int parity; /* keeps track if we should send parity */
110 #define MAX3100_PARITY_ON 1
111 #define MAX3100_PARITY_ODD 2
112 #define MAX3100_7BIT 4
113 int rx_enabled; /* if we should rx chars */
114
115 int irq; /* irq assigned to the max3100 */
116
117 int minor; /* minor number */
118 int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */
119 int loopback; /* 1 if we are in loopback mode */
120
121 /* for handling irqs: need workqueue since we do spi_sync */
122 struct workqueue_struct *workqueue;
123 struct work_struct work;
124 /* set to 1 to make the workhandler exit as soon as possible */
125 int force_end_work;
126 /* need to know we are suspending to avoid deadlock on workqueue */
127 int suspending;
128
129 /* hook for suspending MAX3100 via dedicated pin */
130 void (*max3100_hw_suspend) (int suspend);
131
132 /* poll time (in ms) for ctrl lines */
133 int poll_time;
134 /* and its timer */
135 struct timer_list timer;
136 };
137
138 static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
139 static DEFINE_MUTEX(max3100s_lock); /* race on probe */
140
141 static int max3100_do_parity(struct max3100_port *s, u16 c)
142 {
143 int parity;
144
145 if (s->parity & MAX3100_PARITY_ODD)
146 parity = 1;
147 else
148 parity = 0;
149
150 if (s->parity & MAX3100_7BIT)
151 c &= 0x7f;
152 else
153 c &= 0xff;
154
155 parity = parity ^ (hweight8(c) & 1);
156 return parity;
157 }
158
159 static int max3100_check_parity(struct max3100_port *s, u16 c)
160 {
161 return max3100_do_parity(s, c) == ((c >> 8) & 1);
162 }
163
164 static void max3100_calc_parity(struct max3100_port *s, u16 *c)
165 {
166 if (s->parity & MAX3100_7BIT)
167 *c &= 0x7f;
168 else
169 *c &= 0xff;
170
171 if (s->parity & MAX3100_PARITY_ON)
172 *c |= max3100_do_parity(s, *c) << 8;
173 }
174
175 static void max3100_work(struct work_struct *w);
176
177 static void max3100_dowork(struct max3100_port *s)
178 {
179 if (!s->force_end_work && !work_pending(&s->work) &&
180 !freezing(current) && !s->suspending)
181 queue_work(s->workqueue, &s->work);
182 }
183
184 static void max3100_timeout(unsigned long data)
185 {
186 struct max3100_port *s = (struct max3100_port *)data;
187
188 if (s->port.state) {
189 max3100_dowork(s);
190 mod_timer(&s->timer, jiffies + s->poll_time);
191 }
192 }
193
194 static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
195 {
196 struct spi_message message;
197 u16 etx, erx;
198 int status;
199 struct spi_transfer tran = {
200 .tx_buf = &etx,
201 .rx_buf = &erx,
202 .len = 2,
203 };
204
205 etx = cpu_to_be16(tx);
206 spi_message_init(&message);
207 spi_message_add_tail(&tran, &message);
208 status = spi_sync(s->spi, &message);
209 if (status) {
210 dev_warn(&s->spi->dev, "error while calling spi_sync\n");
211 return -EIO;
212 }
213 *rx = be16_to_cpu(erx);
214 s->tx_empty = (*rx & MAX3100_T) > 0;
215 dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
216 return 0;
217 }
218
219 static int max3100_handlerx(struct max3100_port *s, u16 rx)
220 {
221 unsigned int ch, flg, status = 0;
222 int ret = 0, cts;
223
224 if (rx & MAX3100_R && s->rx_enabled) {
225 dev_dbg(&s->spi->dev, "%s\n", __func__);
226 ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
227 if (rx & MAX3100_RAFE) {
228 s->port.icount.frame++;
229 flg = TTY_FRAME;
230 status |= MAX3100_STATUS_FE;
231 } else {
232 if (s->parity & MAX3100_PARITY_ON) {
233 if (max3100_check_parity(s, rx)) {
234 s->port.icount.rx++;
235 flg = TTY_NORMAL;
236 } else {
237 s->port.icount.parity++;
238 flg = TTY_PARITY;
239 status |= MAX3100_STATUS_PE;
240 }
241 } else {
242 s->port.icount.rx++;
243 flg = TTY_NORMAL;
244 }
245 }
246 uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
247 ret = 1;
248 }
249
250 cts = (rx & MAX3100_CTS) > 0;
251 if (s->cts != cts) {
252 s->cts = cts;
253 uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
254 }
255
256 return ret;
257 }
258
259 static void max3100_work(struct work_struct *w)
260 {
261 struct max3100_port *s = container_of(w, struct max3100_port, work);
262 int rxchars;
263 u16 tx, rx;
264 int conf, cconf, rts, crts;
265 struct circ_buf *xmit = &s->port.state->xmit;
266
267 dev_dbg(&s->spi->dev, "%s\n", __func__);
268
269 rxchars = 0;
270 do {
271 spin_lock(&s->conf_lock);
272 conf = s->conf;
273 cconf = s->conf_commit;
274 s->conf_commit = 0;
275 rts = s->rts;
276 crts = s->rts_commit;
277 s->rts_commit = 0;
278 spin_unlock(&s->conf_lock);
279 if (cconf)
280 max3100_sr(s, MAX3100_WC | conf, &rx);
281 if (crts) {
282 max3100_sr(s, MAX3100_WD | MAX3100_TE |
283 (s->rts ? MAX3100_RTS : 0), &rx);
284 rxchars += max3100_handlerx(s, rx);
285 }
286
287 max3100_sr(s, MAX3100_RD, &rx);
288 rxchars += max3100_handlerx(s, rx);
289
290 if (rx & MAX3100_T) {
291 tx = 0xffff;
292 if (s->port.x_char) {
293 tx = s->port.x_char;
294 s->port.icount.tx++;
295 s->port.x_char = 0;
296 } else if (!uart_circ_empty(xmit) &&
297 !uart_tx_stopped(&s->port)) {
298 tx = xmit->buf[xmit->tail];
299 xmit->tail = (xmit->tail + 1) &
300 (UART_XMIT_SIZE - 1);
301 s->port.icount.tx++;
302 }
303 if (tx != 0xffff) {
304 max3100_calc_parity(s, &tx);
305 tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
306 max3100_sr(s, tx, &rx);
307 rxchars += max3100_handlerx(s, rx);
308 }
309 }
310
311 if (rxchars > 16 && s->port.state->port.tty != NULL) {
312 tty_flip_buffer_push(s->port.state->port.tty);
313 rxchars = 0;
314 }
315 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
316 uart_write_wakeup(&s->port);
317
318 } while (!s->force_end_work &&
319 !freezing(current) &&
320 ((rx & MAX3100_R) ||
321 (!uart_circ_empty(xmit) &&
322 !uart_tx_stopped(&s->port))));
323
324 if (rxchars > 0 && s->port.state->port.tty != NULL)
325 tty_flip_buffer_push(s->port.state->port.tty);
326 }
327
328 static irqreturn_t max3100_irq(int irqno, void *dev_id)
329 {
330 struct max3100_port *s = dev_id;
331
332 dev_dbg(&s->spi->dev, "%s\n", __func__);
333
334 max3100_dowork(s);
335 return IRQ_HANDLED;
336 }
337
338 static void max3100_enable_ms(struct uart_port *port)
339 {
340 struct max3100_port *s = container_of(port,
341 struct max3100_port,
342 port);
343
344 if (s->poll_time > 0)
345 mod_timer(&s->timer, jiffies);
346 dev_dbg(&s->spi->dev, "%s\n", __func__);
347 }
348
349 static void max3100_start_tx(struct uart_port *port)
350 {
351 struct max3100_port *s = container_of(port,
352 struct max3100_port,
353 port);
354
355 dev_dbg(&s->spi->dev, "%s\n", __func__);
356
357 max3100_dowork(s);
358 }
359
360 static void max3100_stop_rx(struct uart_port *port)
361 {
362 struct max3100_port *s = container_of(port,
363 struct max3100_port,
364 port);
365
366 dev_dbg(&s->spi->dev, "%s\n", __func__);
367
368 s->rx_enabled = 0;
369 spin_lock(&s->conf_lock);
370 s->conf &= ~MAX3100_RM;
371 s->conf_commit = 1;
372 spin_unlock(&s->conf_lock);
373 max3100_dowork(s);
374 }
375
376 static unsigned int max3100_tx_empty(struct uart_port *port)
377 {
378 struct max3100_port *s = container_of(port,
379 struct max3100_port,
380 port);
381
382 dev_dbg(&s->spi->dev, "%s\n", __func__);
383
384 /* may not be truly up-to-date */
385 max3100_dowork(s);
386 return s->tx_empty;
387 }
388
389 static unsigned int max3100_get_mctrl(struct uart_port *port)
390 {
391 struct max3100_port *s = container_of(port,
392 struct max3100_port,
393 port);
394
395 dev_dbg(&s->spi->dev, "%s\n", __func__);
396
397 /* may not be truly up-to-date */
398 max3100_dowork(s);
399 /* always assert DCD and DSR since these lines are not wired */
400 return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
401 }
402
403 static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
404 {
405 struct max3100_port *s = container_of(port,
406 struct max3100_port,
407 port);
408 int rts;
409
410 dev_dbg(&s->spi->dev, "%s\n", __func__);
411
412 rts = (mctrl & TIOCM_RTS) > 0;
413
414 spin_lock(&s->conf_lock);
415 if (s->rts != rts) {
416 s->rts = rts;
417 s->rts_commit = 1;
418 max3100_dowork(s);
419 }
420 spin_unlock(&s->conf_lock);
421 }
422
423 static void
424 max3100_set_termios(struct uart_port *port, struct ktermios *termios,
425 struct ktermios *old)
426 {
427 struct max3100_port *s = container_of(port,
428 struct max3100_port,
429 port);
430 int baud = 0;
431 unsigned cflag;
432 u32 param_new, param_mask, parity = 0;
433
434 dev_dbg(&s->spi->dev, "%s\n", __func__);
435
436 cflag = termios->c_cflag;
437 param_new = 0;
438 param_mask = 0;
439
440 baud = tty_termios_baud_rate(termios);
441 param_new = s->conf & MAX3100_BAUD;
442 switch (baud) {
443 case 300:
444 if (s->crystal)
445 baud = s->baud;
446 else
447 param_new = 15;
448 break;
449 case 600:
450 param_new = 14 + s->crystal;
451 break;
452 case 1200:
453 param_new = 13 + s->crystal;
454 break;
455 case 2400:
456 param_new = 12 + s->crystal;
457 break;
458 case 4800:
459 param_new = 11 + s->crystal;
460 break;
461 case 9600:
462 param_new = 10 + s->crystal;
463 break;
464 case 19200:
465 param_new = 9 + s->crystal;
466 break;
467 case 38400:
468 param_new = 8 + s->crystal;
469 break;
470 case 57600:
471 param_new = 1 + s->crystal;
472 break;
473 case 115200:
474 param_new = 0 + s->crystal;
475 break;
476 case 230400:
477 if (s->crystal)
478 param_new = 0;
479 else
480 baud = s->baud;
481 break;
482 default:
483 baud = s->baud;
484 }
485 tty_termios_encode_baud_rate(termios, baud, baud);
486 s->baud = baud;
487 param_mask |= MAX3100_BAUD;
488
489 if ((cflag & CSIZE) == CS8) {
490 param_new &= ~MAX3100_L;
491 parity &= ~MAX3100_7BIT;
492 } else {
493 param_new |= MAX3100_L;
494 parity |= MAX3100_7BIT;
495 cflag = (cflag & ~CSIZE) | CS7;
496 }
497 param_mask |= MAX3100_L;
498
499 if (cflag & CSTOPB)
500 param_new |= MAX3100_ST;
501 else
502 param_new &= ~MAX3100_ST;
503 param_mask |= MAX3100_ST;
504
505 if (cflag & PARENB) {
506 param_new |= MAX3100_PE;
507 parity |= MAX3100_PARITY_ON;
508 } else {
509 param_new &= ~MAX3100_PE;
510 parity &= ~MAX3100_PARITY_ON;
511 }
512 param_mask |= MAX3100_PE;
513
514 if (cflag & PARODD)
515 parity |= MAX3100_PARITY_ODD;
516 else
517 parity &= ~MAX3100_PARITY_ODD;
518
519 /* mask termios capabilities we don't support */
520 cflag &= ~CMSPAR;
521 termios->c_cflag = cflag;
522
523 s->port.ignore_status_mask = 0;
524 if (termios->c_iflag & IGNPAR)
525 s->port.ignore_status_mask |=
526 MAX3100_STATUS_PE | MAX3100_STATUS_FE |
527 MAX3100_STATUS_OE;
528
529 /* we are sending char from a workqueue so enable */
530 s->port.state->port.tty->low_latency = 1;
531
532 if (s->poll_time > 0)
533 del_timer_sync(&s->timer);
534
535 uart_update_timeout(port, termios->c_cflag, baud);
536
537 spin_lock(&s->conf_lock);
538 s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
539 s->conf_commit = 1;
540 s->parity = parity;
541 spin_unlock(&s->conf_lock);
542 max3100_dowork(s);
543
544 if (UART_ENABLE_MS(&s->port, termios->c_cflag))
545 max3100_enable_ms(&s->port);
546 }
547
548 static void max3100_shutdown(struct uart_port *port)
549 {
550 struct max3100_port *s = container_of(port,
551 struct max3100_port,
552 port);
553
554 dev_dbg(&s->spi->dev, "%s\n", __func__);
555
556 if (s->suspending)
557 return;
558
559 s->force_end_work = 1;
560
561 if (s->poll_time > 0)
562 del_timer_sync(&s->timer);
563
564 if (s->workqueue) {
565 flush_workqueue(s->workqueue);
566 destroy_workqueue(s->workqueue);
567 s->workqueue = NULL;
568 }
569 if (s->irq)
570 free_irq(s->irq, s);
571
572 /* set shutdown mode to save power */
573 if (s->max3100_hw_suspend)
574 s->max3100_hw_suspend(1);
575 else {
576 u16 tx, rx;
577
578 tx = MAX3100_WC | MAX3100_SHDN;
579 max3100_sr(s, tx, &rx);
580 }
581 }
582
583 static int max3100_startup(struct uart_port *port)
584 {
585 struct max3100_port *s = container_of(port,
586 struct max3100_port,
587 port);
588 char b[12];
589
590 dev_dbg(&s->spi->dev, "%s\n", __func__);
591
592 s->conf = MAX3100_RM;
593 s->baud = s->crystal ? 230400 : 115200;
594 s->rx_enabled = 1;
595
596 if (s->suspending)
597 return 0;
598
599 s->force_end_work = 0;
600 s->parity = 0;
601 s->rts = 0;
602
603 sprintf(b, "max3100-%d", s->minor);
604 s->workqueue = create_freezeable_workqueue(b);
605 if (!s->workqueue) {
606 dev_warn(&s->spi->dev, "cannot create workqueue\n");
607 return -EBUSY;
608 }
609 INIT_WORK(&s->work, max3100_work);
610
611 if (request_irq(s->irq, max3100_irq,
612 IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
613 dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
614 s->irq = 0;
615 destroy_workqueue(s->workqueue);
616 s->workqueue = NULL;
617 return -EBUSY;
618 }
619
620 if (s->loopback) {
621 u16 tx, rx;
622 tx = 0x4001;
623 max3100_sr(s, tx, &rx);
624 }
625
626 if (s->max3100_hw_suspend)
627 s->max3100_hw_suspend(0);
628 s->conf_commit = 1;
629 max3100_dowork(s);
630 /* wait for clock to settle */
631 msleep(50);
632
633 max3100_enable_ms(&s->port);
634
635 return 0;
636 }
637
638 static const char *max3100_type(struct uart_port *port)
639 {
640 struct max3100_port *s = container_of(port,
641 struct max3100_port,
642 port);
643
644 dev_dbg(&s->spi->dev, "%s\n", __func__);
645
646 return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
647 }
648
649 static void max3100_release_port(struct uart_port *port)
650 {
651 struct max3100_port *s = container_of(port,
652 struct max3100_port,
653 port);
654
655 dev_dbg(&s->spi->dev, "%s\n", __func__);
656 }
657
658 static void max3100_config_port(struct uart_port *port, int flags)
659 {
660 struct max3100_port *s = container_of(port,
661 struct max3100_port,
662 port);
663
664 dev_dbg(&s->spi->dev, "%s\n", __func__);
665
666 if (flags & UART_CONFIG_TYPE)
667 s->port.type = PORT_MAX3100;
668 }
669
670 static int max3100_verify_port(struct uart_port *port,
671 struct serial_struct *ser)
672 {
673 struct max3100_port *s = container_of(port,
674 struct max3100_port,
675 port);
676 int ret = -EINVAL;
677
678 dev_dbg(&s->spi->dev, "%s\n", __func__);
679
680 if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
681 ret = 0;
682 return ret;
683 }
684
685 static void max3100_stop_tx(struct uart_port *port)
686 {
687 struct max3100_port *s = container_of(port,
688 struct max3100_port,
689 port);
690
691 dev_dbg(&s->spi->dev, "%s\n", __func__);
692 }
693
694 static int max3100_request_port(struct uart_port *port)
695 {
696 struct max3100_port *s = container_of(port,
697 struct max3100_port,
698 port);
699
700 dev_dbg(&s->spi->dev, "%s\n", __func__);
701 return 0;
702 }
703
704 static void max3100_break_ctl(struct uart_port *port, int break_state)
705 {
706 struct max3100_port *s = container_of(port,
707 struct max3100_port,
708 port);
709
710 dev_dbg(&s->spi->dev, "%s\n", __func__);
711 }
712
713 static struct uart_ops max3100_ops = {
714 .tx_empty = max3100_tx_empty,
715 .set_mctrl = max3100_set_mctrl,
716 .get_mctrl = max3100_get_mctrl,
717 .stop_tx = max3100_stop_tx,
718 .start_tx = max3100_start_tx,
719 .stop_rx = max3100_stop_rx,
720 .enable_ms = max3100_enable_ms,
721 .break_ctl = max3100_break_ctl,
722 .startup = max3100_startup,
723 .shutdown = max3100_shutdown,
724 .set_termios = max3100_set_termios,
725 .type = max3100_type,
726 .release_port = max3100_release_port,
727 .request_port = max3100_request_port,
728 .config_port = max3100_config_port,
729 .verify_port = max3100_verify_port,
730 };
731
732 static struct uart_driver max3100_uart_driver = {
733 .owner = THIS_MODULE,
734 .driver_name = "ttyMAX",
735 .dev_name = "ttyMAX",
736 .major = MAX3100_MAJOR,
737 .minor = MAX3100_MINOR,
738 .nr = MAX_MAX3100,
739 };
740 static int uart_driver_registered;
741
742 static int __devinit max3100_probe(struct spi_device *spi)
743 {
744 int i, retval;
745 struct plat_max3100 *pdata;
746 u16 tx, rx;
747
748 mutex_lock(&max3100s_lock);
749
750 if (!uart_driver_registered) {
751 uart_driver_registered = 1;
752 retval = uart_register_driver(&max3100_uart_driver);
753 if (retval) {
754 printk(KERN_ERR "Couldn't register max3100 uart driver\n");
755 mutex_unlock(&max3100s_lock);
756 return retval;
757 }
758 }
759
760 for (i = 0; i < MAX_MAX3100; i++)
761 if (!max3100s[i])
762 break;
763 if (i == MAX_MAX3100) {
764 dev_warn(&spi->dev, "too many MAX3100 chips\n");
765 mutex_unlock(&max3100s_lock);
766 return -ENOMEM;
767 }
768
769 max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
770 if (!max3100s[i]) {
771 dev_warn(&spi->dev,
772 "kmalloc for max3100 structure %d failed!\n", i);
773 mutex_unlock(&max3100s_lock);
774 return -ENOMEM;
775 }
776 max3100s[i]->spi = spi;
777 max3100s[i]->irq = spi->irq;
778 spin_lock_init(&max3100s[i]->conf_lock);
779 dev_set_drvdata(&spi->dev, max3100s[i]);
780 pdata = spi->dev.platform_data;
781 max3100s[i]->crystal = pdata->crystal;
782 max3100s[i]->loopback = pdata->loopback;
783 max3100s[i]->poll_time = pdata->poll_time * HZ / 1000;
784 if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
785 max3100s[i]->poll_time = 1;
786 max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
787 max3100s[i]->minor = i;
788 init_timer(&max3100s[i]->timer);
789 max3100s[i]->timer.function = max3100_timeout;
790 max3100s[i]->timer.data = (unsigned long) max3100s[i];
791
792 dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
793 max3100s[i]->port.irq = max3100s[i]->irq;
794 max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
795 max3100s[i]->port.fifosize = 16;
796 max3100s[i]->port.ops = &max3100_ops;
797 max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
798 max3100s[i]->port.line = i;
799 max3100s[i]->port.type = PORT_MAX3100;
800 max3100s[i]->port.dev = &spi->dev;
801 retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
802 if (retval < 0)
803 dev_warn(&spi->dev,
804 "uart_add_one_port failed for line %d with error %d\n",
805 i, retval);
806
807 /* set shutdown mode to save power. Will be woken-up on open */
808 if (max3100s[i]->max3100_hw_suspend)
809 max3100s[i]->max3100_hw_suspend(1);
810 else {
811 tx = MAX3100_WC | MAX3100_SHDN;
812 max3100_sr(max3100s[i], tx, &rx);
813 }
814 mutex_unlock(&max3100s_lock);
815 return 0;
816 }
817
818 static int __devexit max3100_remove(struct spi_device *spi)
819 {
820 struct max3100_port *s = dev_get_drvdata(&spi->dev);
821 int i;
822
823 mutex_lock(&max3100s_lock);
824
825 /* find out the index for the chip we are removing */
826 for (i = 0; i < MAX_MAX3100; i++)
827 if (max3100s[i] == s)
828 break;
829
830 dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
831 uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
832 kfree(max3100s[i]);
833 max3100s[i] = NULL;
834
835 /* check if this is the last chip we have */
836 for (i = 0; i < MAX_MAX3100; i++)
837 if (max3100s[i]) {
838 mutex_unlock(&max3100s_lock);
839 return 0;
840 }
841 pr_debug("removing max3100 driver\n");
842 uart_unregister_driver(&max3100_uart_driver);
843
844 mutex_unlock(&max3100s_lock);
845 return 0;
846 }
847
848 #ifdef CONFIG_PM
849
850 static int max3100_suspend(struct spi_device *spi, pm_message_t state)
851 {
852 struct max3100_port *s = dev_get_drvdata(&spi->dev);
853
854 dev_dbg(&s->spi->dev, "%s\n", __func__);
855
856 disable_irq(s->irq);
857
858 s->suspending = 1;
859 uart_suspend_port(&max3100_uart_driver, &s->port);
860
861 if (s->max3100_hw_suspend)
862 s->max3100_hw_suspend(1);
863 else {
864 /* no HW suspend, so do SW one */
865 u16 tx, rx;
866
867 tx = MAX3100_WC | MAX3100_SHDN;
868 max3100_sr(s, tx, &rx);
869 }
870 return 0;
871 }
872
873 static int max3100_resume(struct spi_device *spi)
874 {
875 struct max3100_port *s = dev_get_drvdata(&spi->dev);
876
877 dev_dbg(&s->spi->dev, "%s\n", __func__);
878
879 if (s->max3100_hw_suspend)
880 s->max3100_hw_suspend(0);
881 uart_resume_port(&max3100_uart_driver, &s->port);
882 s->suspending = 0;
883
884 enable_irq(s->irq);
885
886 s->conf_commit = 1;
887 if (s->workqueue)
888 max3100_dowork(s);
889
890 return 0;
891 }
892
893 #else
894 #define max3100_suspend NULL
895 #define max3100_resume NULL
896 #endif
897
898 static struct spi_driver max3100_driver = {
899 .driver = {
900 .name = "max3100",
901 .bus = &spi_bus_type,
902 .owner = THIS_MODULE,
903 },
904
905 .probe = max3100_probe,
906 .remove = __devexit_p(max3100_remove),
907 .suspend = max3100_suspend,
908 .resume = max3100_resume,
909 };
910
911 static int __init max3100_init(void)
912 {
913 return spi_register_driver(&max3100_driver);
914 }
915 module_init(max3100_init);
916
917 static void __exit max3100_exit(void)
918 {
919 spi_unregister_driver(&max3100_driver);
920 }
921 module_exit(max3100_exit);
922
923 MODULE_DESCRIPTION("MAX3100 driver");
924 MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
925 MODULE_LICENSE("GPL");
926 MODULE_ALIAS("spi:max3100");
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