2 * tsunami.S: High speed MicroSparc-I mmu/cache operations.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
7 #include <asm/ptrace.h>
8 #include <asm/asm-offsets.h>
12 #include <asm/pgtsrmmu.h>
17 .globl tsunami_flush_cache_all, tsunami_flush_cache_mm
18 .globl tsunami_flush_cache_range, tsunami_flush_cache_page
19 .globl tsunami_flush_page_to_ram, tsunami_flush_page_for_dma
20 .globl tsunami_flush_sig_insns
21 .globl tsunami_flush_tlb_all, tsunami_flush_tlb_mm
22 .globl tsunami_flush_tlb_range, tsunami_flush_tlb_page
25 tsunami_flush_cache_page:
26 tsunami_flush_cache_range:
27 ld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */
28 tsunami_flush_cache_mm:
29 ld [%o0 + AOFF_mm_context], %g2
31 be tsunami_flush_cache_out
32 tsunami_flush_cache_all:
33 WINDOW_FLUSH(%g4, %g5)
34 tsunami_flush_page_for_dma:
35 sta %g0, [%g0] ASI_M_IC_FLCLEAR
36 sta %g0, [%g0] ASI_M_DC_FLCLEAR
37 tsunami_flush_cache_out:
38 tsunami_flush_page_to_ram:
42 tsunami_flush_sig_insns:
47 /* More slick stuff... */
48 tsunami_flush_tlb_range:
49 ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */
51 ld [%o0 + AOFF_mm_context], %g2
53 be tsunami_flush_tlb_out
54 tsunami_flush_tlb_all:
56 sta %g0, [%o1] ASI_M_FLUSH_PROBE
62 tsunami_flush_tlb_out:
66 /* This one can be done in a fine grained manner... */
67 tsunami_flush_tlb_page:
68 ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */
69 mov SRMMU_CTX_REG, %g1
70 ld [%o0 + AOFF_mm_context], %o3
71 andn %o1, (PAGE_SIZE - 1), %o1
73 be tsunami_flush_tlb_page_out
74 lda [%g1] ASI_M_MMUREGS, %g5
75 sta %o3, [%g1] ASI_M_MMUREGS
76 sta %g0, [%o1] ASI_M_FLUSH_PROBE
82 tsunami_flush_tlb_page_out:
84 sta %g5, [%g1] ASI_M_MMUREGS
86 #define MIRROR_BLOCK(dst, src, offset, t0, t1, t2, t3) \
87 ldd [src + offset + 0x18], t0; \
88 std t0, [dst + offset + 0x18]; \
89 ldd [src + offset + 0x10], t2; \
90 std t2, [dst + offset + 0x10]; \
91 ldd [src + offset + 0x08], t0; \
92 std t0, [dst + offset + 0x08]; \
93 ldd [src + offset + 0x00], t2; \
94 std t2, [dst + offset + 0x00];
97 /* NOTE: This routine has to be shorter than 70insns --jj */
98 or %g0, (PAGE_SIZE >> 8), %g1
100 MIRROR_BLOCK(%o0, %o1, 0x00, %o2, %o3, %o4, %o5)
101 MIRROR_BLOCK(%o0, %o1, 0x20, %o2, %o3, %o4, %o5)
102 MIRROR_BLOCK(%o0, %o1, 0x40, %o2, %o3, %o4, %o5)
103 MIRROR_BLOCK(%o0, %o1, 0x60, %o2, %o3, %o4, %o5)
104 MIRROR_BLOCK(%o0, %o1, 0x80, %o2, %o3, %o4, %o5)
105 MIRROR_BLOCK(%o0, %o1, 0xa0, %o2, %o3, %o4, %o5)
106 MIRROR_BLOCK(%o0, %o1, 0xc0, %o2, %o3, %o4, %o5)
107 MIRROR_BLOCK(%o0, %o1, 0xe0, %o2, %o3, %o4, %o5)
113 .globl tsunami_setup_blockops
114 tsunami_setup_blockops:
115 sethi %hi(__copy_1page), %o0
116 or %o0, %lo(__copy_1page), %o0
117 sethi %hi(tsunami_copy_1page), %o1
118 or %o1, %lo(tsunami_copy_1page), %o1
119 sethi %hi(tsunami_setup_blockops), %o2
120 or %o2, %lo(tsunami_setup_blockops), %o2
128 sta %g0, [%g0] ASI_M_IC_FLCLEAR
129 sta %g0, [%g0] ASI_M_DC_FLCLEAR