2 * drivers/net/mv643xx_eth.c - Driver for MV643XX ethernet ports
3 * Copyright (C) 2002 Matthew Dharm <mdharm@momenco.com>
5 * Based on the 64360 driver from:
6 * Copyright (C) 2002 rabeeh@galileo.co.il
8 * Copyright (C) 2003 PMC-Sierra, Inc.,
9 * written by Manish Lachwani (lachwani@pmc-sierra.com)
11 * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
13 * Copyright (C) 2004-2005 MontaVista Software, Inc.
14 * Dale Farnsworth <dale@farnsworth.org>
16 * Copyright (C) 2004 Steven J. Hill <sjhill1@rockwellcollins.com>
17 * <sjhill@realitydiluted.com>
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version 2
22 * of the License, or (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
33 #include <linux/init.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/tcp.h>
36 #include <linux/udp.h>
37 #include <linux/etherdevice.h>
39 #include <linux/bitops.h>
40 #include <linux/delay.h>
41 #include <linux/ethtool.h>
43 #include <asm/types.h>
44 #include <asm/pgtable.h>
45 #include <asm/system.h>
46 #include <asm/delay.h>
47 #include "mv643xx_eth.h"
50 * The first part is the high level driver of the gigE ethernet ports.
56 #define WRAP NET_IP_ALIGN + ETH_HLEN + VLAN_HLEN + FCS_LEN
57 #define RX_SKB_SIZE ((dev->mtu + WRAP + 7) & ~0x7)
59 #define INT_CAUSE_UNMASK_ALL 0x0007ffff
60 #define INT_CAUSE_UNMASK_ALL_EXT 0x0011ffff
61 #define INT_CAUSE_MASK_ALL 0x00000000
62 #define INT_CAUSE_MASK_ALL_EXT 0x00000000
63 #define INT_CAUSE_CHECK_BITS INT_CAUSE_UNMASK_ALL
64 #define INT_CAUSE_CHECK_BITS_EXT INT_CAUSE_UNMASK_ALL_EXT
66 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
67 #define MAX_DESCS_PER_SKB (MAX_SKB_FRAGS + 1)
69 #define MAX_DESCS_PER_SKB 1
72 #define PHY_WAIT_ITERATIONS 1000 /* 1000 iterations * 10uS = 10mS max */
73 #define PHY_WAIT_MICRO_SECONDS 10
75 /* Static function declarations */
76 static int eth_port_link_is_up(unsigned int eth_port_num
);
77 static void eth_port_uc_addr_get(struct net_device
*dev
,
78 unsigned char *MacAddr
);
79 static int mv643xx_eth_real_open(struct net_device
*);
80 static int mv643xx_eth_real_stop(struct net_device
*);
81 static int mv643xx_eth_change_mtu(struct net_device
*, int);
82 static struct net_device_stats
*mv643xx_eth_get_stats(struct net_device
*);
83 static void eth_port_init_mac_tables(unsigned int eth_port_num
);
85 static int mv643xx_poll(struct net_device
*dev
, int *budget
);
87 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
);
88 static int ethernet_phy_detect(unsigned int eth_port_num
);
89 static struct ethtool_ops mv643xx_ethtool_ops
;
91 static char mv643xx_driver_name
[] = "mv643xx_eth";
92 static char mv643xx_driver_version
[] = "1.0";
94 static void __iomem
*mv643xx_eth_shared_base
;
96 /* used to protect MV643XX_ETH_SMI_REG, which is shared across ports */
97 static DEFINE_SPINLOCK(mv643xx_eth_phy_lock
);
99 static inline u32
mv_read(int offset
)
101 void __iomem
*reg_base
;
103 reg_base
= mv643xx_eth_shared_base
- MV643XX_ETH_SHARED_REGS
;
105 return readl(reg_base
+ offset
);
108 static inline void mv_write(int offset
, u32 data
)
110 void __iomem
*reg_base
;
112 reg_base
= mv643xx_eth_shared_base
- MV643XX_ETH_SHARED_REGS
;
113 writel(data
, reg_base
+ offset
);
117 * Changes MTU (maximum transfer unit) of the gigabit ethenret port
119 * Input : pointer to ethernet interface network device structure
121 * Output : 0 upon success, -EINVAL upon failure
123 static int mv643xx_eth_change_mtu(struct net_device
*dev
, int new_mtu
)
125 struct mv643xx_private
*mp
= netdev_priv(dev
);
128 spin_lock_irqsave(&mp
->lock
, flags
);
130 if ((new_mtu
> 9500) || (new_mtu
< 64)) {
131 spin_unlock_irqrestore(&mp
->lock
, flags
);
137 * Stop then re-open the interface. This will allocate RX skb's with
139 * There is a possible danger that the open will not successed, due
140 * to memory is full, which might fail the open function.
142 if (netif_running(dev
)) {
143 if (mv643xx_eth_real_stop(dev
))
145 "%s: Fatal error on stopping device\n",
147 if (mv643xx_eth_real_open(dev
))
149 "%s: Fatal error on opening device\n",
153 spin_unlock_irqrestore(&mp
->lock
, flags
);
158 * mv643xx_eth_rx_task
160 * Fills / refills RX queue on a certain gigabit ethernet port
162 * Input : pointer to ethernet interface network device structure
165 static void mv643xx_eth_rx_task(void *data
)
167 struct net_device
*dev
= (struct net_device
*)data
;
168 struct mv643xx_private
*mp
= netdev_priv(dev
);
169 struct pkt_info pkt_info
;
172 if (test_and_set_bit(0, &mp
->rx_task_busy
))
173 panic("%s: Error in test_set_bit / clear_bit", dev
->name
);
175 while (mp
->rx_ring_skbs
< (mp
->rx_ring_size
- 5)) {
176 skb
= dev_alloc_skb(RX_SKB_SIZE
);
180 pkt_info
.cmd_sts
= ETH_RX_ENABLE_INTERRUPT
;
181 pkt_info
.byte_cnt
= RX_SKB_SIZE
;
182 pkt_info
.buf_ptr
= dma_map_single(NULL
, skb
->data
, RX_SKB_SIZE
,
184 pkt_info
.return_info
= skb
;
185 if (eth_rx_return_buff(mp
, &pkt_info
) != ETH_OK
) {
187 "%s: Error allocating RX Ring\n", dev
->name
);
192 clear_bit(0, &mp
->rx_task_busy
);
194 * If RX ring is empty of SKB, set a timer to try allocating
195 * again in a later time .
197 if ((mp
->rx_ring_skbs
== 0) && (mp
->rx_timer_flag
== 0)) {
198 printk(KERN_INFO
"%s: Rx ring is empty\n", dev
->name
);
200 mp
->timeout
.expires
= jiffies
+ (HZ
/ 10);
201 add_timer(&mp
->timeout
);
202 mp
->rx_timer_flag
= 1;
204 #ifdef MV643XX_RX_QUEUE_FILL_ON_TASK
206 /* Return interrupts */
207 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(mp
->port_num
),
208 INT_CAUSE_UNMASK_ALL
);
214 * mv643xx_eth_rx_task_timer_wrapper
216 * Timer routine to wake up RX queue filling task. This function is
217 * used only in case the RX queue is empty, and all alloc_skb has
218 * failed (due to out of memory event).
220 * Input : pointer to ethernet interface network device structure
223 static void mv643xx_eth_rx_task_timer_wrapper(unsigned long data
)
225 struct net_device
*dev
= (struct net_device
*)data
;
226 struct mv643xx_private
*mp
= netdev_priv(dev
);
228 mp
->rx_timer_flag
= 0;
229 mv643xx_eth_rx_task((void *)data
);
233 * mv643xx_eth_update_mac_address
235 * Update the MAC address of the port in the address table
237 * Input : pointer to ethernet interface network device structure
240 static void mv643xx_eth_update_mac_address(struct net_device
*dev
)
242 struct mv643xx_private
*mp
= netdev_priv(dev
);
243 unsigned int port_num
= mp
->port_num
;
245 eth_port_init_mac_tables(port_num
);
246 memcpy(mp
->port_mac_addr
, dev
->dev_addr
, 6);
247 eth_port_uc_addr_set(port_num
, mp
->port_mac_addr
);
251 * mv643xx_eth_set_rx_mode
253 * Change from promiscuos to regular rx mode
255 * Input : pointer to ethernet interface network device structure
258 static void mv643xx_eth_set_rx_mode(struct net_device
*dev
)
260 struct mv643xx_private
*mp
= netdev_priv(dev
);
262 if (dev
->flags
& IFF_PROMISC
)
263 mp
->port_config
|= (u32
) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE
;
265 mp
->port_config
&= ~(u32
) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE
;
267 mv_write(MV643XX_ETH_PORT_CONFIG_REG(mp
->port_num
), mp
->port_config
);
271 * mv643xx_eth_set_mac_address
273 * Change the interface's mac address.
274 * No special hardware thing should be done because interface is always
275 * put in promiscuous mode.
277 * Input : pointer to ethernet interface network device structure and
278 * a pointer to the designated entry to be added to the cache.
279 * Output : zero upon success, negative upon failure
281 static int mv643xx_eth_set_mac_address(struct net_device
*dev
, void *addr
)
285 for (i
= 0; i
< 6; i
++)
286 /* +2 is for the offset of the HW addr type */
287 dev
->dev_addr
[i
] = ((unsigned char *)addr
)[i
+ 2];
288 mv643xx_eth_update_mac_address(dev
);
293 * mv643xx_eth_tx_timeout
295 * Called upon a timeout on transmitting a packet
297 * Input : pointer to ethernet interface network device structure.
300 static void mv643xx_eth_tx_timeout(struct net_device
*dev
)
302 struct mv643xx_private
*mp
= netdev_priv(dev
);
304 printk(KERN_INFO
"%s: TX timeout ", dev
->name
);
306 /* Do the reset outside of interrupt context */
307 schedule_work(&mp
->tx_timeout_task
);
311 * mv643xx_eth_tx_timeout_task
313 * Actual routine to reset the adapter when a timeout on Tx has occurred
315 static void mv643xx_eth_tx_timeout_task(struct net_device
*dev
)
317 struct mv643xx_private
*mp
= netdev_priv(dev
);
319 netif_device_detach(dev
);
320 eth_port_reset(mp
->port_num
);
322 netif_device_attach(dev
);
326 * mv643xx_eth_free_tx_queue
328 * Input : dev - a pointer to the required interface
330 * Output : 0 if was able to release skb , nonzero otherwise
332 static int mv643xx_eth_free_tx_queue(struct net_device
*dev
,
333 unsigned int eth_int_cause_ext
)
335 struct mv643xx_private
*mp
= netdev_priv(dev
);
336 struct net_device_stats
*stats
= &mp
->stats
;
337 struct pkt_info pkt_info
;
340 if (!(eth_int_cause_ext
& (BIT0
| BIT8
)))
343 spin_lock(&mp
->lock
);
345 /* Check only queue 0 */
346 while (eth_tx_return_desc(mp
, &pkt_info
) == ETH_OK
) {
347 if (pkt_info
.cmd_sts
& BIT0
) {
348 printk("%s: Error in TX\n", dev
->name
);
353 * If return_info is different than 0, release the skb.
354 * The case where return_info is not 0 is only in case
355 * when transmitted a scatter/gather packet, where only
356 * last skb releases the whole chain.
358 if (pkt_info
.return_info
) {
359 if (skb_shinfo(pkt_info
.return_info
)->nr_frags
)
360 dma_unmap_page(NULL
, pkt_info
.buf_ptr
,
364 dma_unmap_single(NULL
, pkt_info
.buf_ptr
,
368 dev_kfree_skb_irq(pkt_info
.return_info
);
371 dma_unmap_page(NULL
, pkt_info
.buf_ptr
,
372 pkt_info
.byte_cnt
, DMA_TO_DEVICE
);
375 spin_unlock(&mp
->lock
);
381 * mv643xx_eth_receive
383 * This function is forward packets that are received from the port's
384 * queues toward kernel core or FastRoute them to another interface.
386 * Input : dev - a pointer to the required interface
387 * max - maximum number to receive (0 means unlimted)
389 * Output : number of served packets
392 static int mv643xx_eth_receive_queue(struct net_device
*dev
, int budget
)
394 static int mv643xx_eth_receive_queue(struct net_device
*dev
)
397 struct mv643xx_private
*mp
= netdev_priv(dev
);
398 struct net_device_stats
*stats
= &mp
->stats
;
399 unsigned int received_packets
= 0;
401 struct pkt_info pkt_info
;
404 while (budget
-- > 0 && eth_port_receive(mp
, &pkt_info
) == ETH_OK
) {
406 while (eth_port_receive(mp
, &pkt_info
) == ETH_OK
) {
411 /* Update statistics. Note byte count includes 4 byte CRC count */
413 stats
->rx_bytes
+= pkt_info
.byte_cnt
;
414 skb
= pkt_info
.return_info
;
416 * In case received a packet without first / last bits on OR
417 * the error summary bit is on, the packets needs to be dropeed.
419 if (((pkt_info
.cmd_sts
420 & (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
)) !=
421 (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
))
422 || (pkt_info
.cmd_sts
& ETH_ERROR_SUMMARY
)) {
424 if ((pkt_info
.cmd_sts
& (ETH_RX_FIRST_DESC
|
425 ETH_RX_LAST_DESC
)) !=
426 (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
)) {
429 "%s: Received packet spread "
430 "on multiple descriptors\n",
433 if (pkt_info
.cmd_sts
& ETH_ERROR_SUMMARY
)
436 dev_kfree_skb_irq(skb
);
439 * The -4 is for the CRC in the trailer of the
442 skb_put(skb
, pkt_info
.byte_cnt
- 4);
445 if (pkt_info
.cmd_sts
& ETH_LAYER_4_CHECKSUM_OK
) {
446 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
448 (pkt_info
.cmd_sts
& 0x0007fff8) >> 3);
450 skb
->protocol
= eth_type_trans(skb
, dev
);
452 netif_receive_skb(skb
);
459 return received_packets
;
463 * mv643xx_eth_int_handler
465 * Main interrupt handler for the gigbit ethernet ports
467 * Input : irq - irq number (not used)
468 * dev_id - a pointer to the required interface's data structure
473 static irqreturn_t
mv643xx_eth_int_handler(int irq
, void *dev_id
,
474 struct pt_regs
*regs
)
476 struct net_device
*dev
= (struct net_device
*)dev_id
;
477 struct mv643xx_private
*mp
= netdev_priv(dev
);
478 u32 eth_int_cause
, eth_int_cause_ext
= 0;
479 unsigned int port_num
= mp
->port_num
;
481 /* Read interrupt cause registers */
482 eth_int_cause
= mv_read(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
)) &
483 INT_CAUSE_UNMASK_ALL
;
485 if (eth_int_cause
& BIT1
)
486 eth_int_cause_ext
= mv_read(
487 MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
)) &
488 INT_CAUSE_UNMASK_ALL_EXT
;
491 if (!(eth_int_cause
& 0x0007fffd)) {
492 /* Dont ack the Rx interrupt */
495 * Clear specific ethernet port intrerrupt registers by
496 * acknowleding relevant bits.
498 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
),
500 if (eth_int_cause_ext
!= 0x0)
501 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG
502 (port_num
), ~eth_int_cause_ext
);
504 /* UDP change : We may need this */
505 if ((eth_int_cause_ext
& 0x0000ffff) &&
506 (mv643xx_eth_free_tx_queue(dev
, eth_int_cause_ext
) == 0) &&
507 (mp
->tx_ring_size
> mp
->tx_ring_skbs
+ MAX_DESCS_PER_SKB
))
508 netif_wake_queue(dev
);
511 if (netif_rx_schedule_prep(dev
)) {
512 /* Mask all the interrupts */
513 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), 0);
514 mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG
516 __netif_rx_schedule(dev
);
519 if (eth_int_cause
& (BIT2
| BIT11
))
520 mv643xx_eth_receive_queue(dev
, 0);
523 * After forwarded received packets to upper layer, add a task
524 * in an interrupts enabled context that refills the RX ring
527 #ifdef MV643XX_RX_QUEUE_FILL_ON_TASK
528 /* Unmask all interrupts on ethernet port */
529 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
531 queue_task(&mp
->rx_task
, &tq_immediate
);
532 mark_bh(IMMEDIATE_BH
);
534 mp
->rx_task
.func(dev
);
538 /* PHY status changed */
539 if (eth_int_cause_ext
& (BIT16
| BIT20
)) {
540 if (eth_port_link_is_up(port_num
)) {
541 netif_carrier_on(dev
);
542 netif_wake_queue(dev
);
544 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG
547 netif_carrier_off(dev
);
548 netif_stop_queue(dev
);
553 * If no real interrupt occured, exit.
554 * This can happen when using gigE interrupt coalescing mechanism.
556 if ((eth_int_cause
== 0x0) && (eth_int_cause_ext
== 0x0))
565 * eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path
568 * This routine sets the RX coalescing interrupt mechanism parameter.
569 * This parameter is a timeout counter, that counts in 64 t_clk
570 * chunks ; that when timeout event occurs a maskable interrupt
572 * The parameter is calculated using the tClk of the MV-643xx chip
573 * , and the required delay of the interrupt in usec.
576 * unsigned int eth_port_num Ethernet port number
577 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
578 * unsigned int delay Delay in usec
581 * Interrupt coalescing mechanism value is set in MV-643xx chip.
584 * The interrupt coalescing value set in the gigE port.
587 static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num
,
588 unsigned int t_clk
, unsigned int delay
)
590 unsigned int coal
= ((t_clk
/ 1000000) * delay
) / 64;
592 /* Set RX Coalescing mechanism */
593 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num
),
594 ((coal
& 0x3fff) << 8) |
595 (mv_read(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num
))
603 * eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
606 * This routine sets the TX coalescing interrupt mechanism parameter.
607 * This parameter is a timeout counter, that counts in 64 t_clk
608 * chunks ; that when timeout event occurs a maskable interrupt
610 * The parameter is calculated using the t_cLK frequency of the
611 * MV-643xx chip and the required delay in the interrupt in uSec
614 * unsigned int eth_port_num Ethernet port number
615 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
616 * unsigned int delay Delay in uSeconds
619 * Interrupt coalescing mechanism value is set in MV-643xx chip.
622 * The interrupt coalescing value set in the gigE port.
625 static unsigned int eth_port_set_tx_coal(unsigned int eth_port_num
,
626 unsigned int t_clk
, unsigned int delay
)
629 coal
= ((t_clk
/ 1000000) * delay
) / 64;
630 /* Set TX Coalescing mechanism */
631 mv_write(MV643XX_ETH_TX_FIFO_URGENT_THRESHOLD_REG(eth_port_num
),
639 * This function is called when openning the network device. The function
640 * should initialize all the hardware, initialize cyclic Rx/Tx
641 * descriptors chain and buffers and allocate an IRQ to the network
644 * Input : a pointer to the network device structure
646 * Output : zero of success , nonzero if fails.
649 static int mv643xx_eth_open(struct net_device
*dev
)
651 struct mv643xx_private
*mp
= netdev_priv(dev
);
652 unsigned int port_num
= mp
->port_num
;
655 spin_lock_irq(&mp
->lock
);
657 err
= request_irq(dev
->irq
, mv643xx_eth_int_handler
,
658 SA_SHIRQ
| SA_SAMPLE_RANDOM
, dev
->name
, dev
);
661 printk(KERN_ERR
"Can not assign IRQ number to MV643XX_eth%d\n",
667 if (mv643xx_eth_real_open(dev
)) {
668 printk("%s: Error opening interface\n", dev
->name
);
673 spin_unlock_irq(&mp
->lock
);
678 free_irq(dev
->irq
, dev
);
681 spin_unlock_irq(&mp
->lock
);
687 * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
690 * This function prepares a Rx chained list of descriptors and packet
691 * buffers in a form of a ring. The routine must be called after port
692 * initialization routine and before port start routine.
693 * The Ethernet SDMA engine uses CPU bus addresses to access the various
694 * devices in the system (i.e. DRAM). This function uses the ethernet
695 * struct 'virtual to physical' routine (set by the user) to set the ring
696 * with physical addresses.
699 * struct mv643xx_private *mp Ethernet Port Control srtuct.
702 * The routine updates the Ethernet port control struct with information
703 * regarding the Rx descriptors and buffers.
708 static void ether_init_rx_desc_ring(struct mv643xx_private
*mp
)
710 volatile struct eth_rx_desc
*p_rx_desc
;
711 int rx_desc_num
= mp
->rx_ring_size
;
714 /* initialize the next_desc_ptr links in the Rx descriptors ring */
715 p_rx_desc
= (struct eth_rx_desc
*)mp
->p_rx_desc_area
;
716 for (i
= 0; i
< rx_desc_num
; i
++) {
717 p_rx_desc
[i
].next_desc_ptr
= mp
->rx_desc_dma
+
718 ((i
+ 1) % rx_desc_num
) * sizeof(struct eth_rx_desc
);
721 /* Save Rx desc pointer to driver struct. */
722 mp
->rx_curr_desc_q
= 0;
723 mp
->rx_used_desc_q
= 0;
725 mp
->rx_desc_area_size
= rx_desc_num
* sizeof(struct eth_rx_desc
);
727 /* Add the queue to the list of RX queues of this port */
728 mp
->port_rx_queue_command
|= 1;
732 * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory.
735 * This function prepares a Tx chained list of descriptors and packet
736 * buffers in a form of a ring. The routine must be called after port
737 * initialization routine and before port start routine.
738 * The Ethernet SDMA engine uses CPU bus addresses to access the various
739 * devices in the system (i.e. DRAM). This function uses the ethernet
740 * struct 'virtual to physical' routine (set by the user) to set the ring
741 * with physical addresses.
744 * struct mv643xx_private *mp Ethernet Port Control srtuct.
747 * The routine updates the Ethernet port control struct with information
748 * regarding the Tx descriptors and buffers.
753 static void ether_init_tx_desc_ring(struct mv643xx_private
*mp
)
755 int tx_desc_num
= mp
->tx_ring_size
;
756 struct eth_tx_desc
*p_tx_desc
;
759 /* Initialize the next_desc_ptr links in the Tx descriptors ring */
760 p_tx_desc
= (struct eth_tx_desc
*)mp
->p_tx_desc_area
;
761 for (i
= 0; i
< tx_desc_num
; i
++) {
762 p_tx_desc
[i
].next_desc_ptr
= mp
->tx_desc_dma
+
763 ((i
+ 1) % tx_desc_num
) * sizeof(struct eth_tx_desc
);
766 mp
->tx_curr_desc_q
= 0;
767 mp
->tx_used_desc_q
= 0;
768 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
769 mp
->tx_first_desc_q
= 0;
772 mp
->tx_desc_area_size
= tx_desc_num
* sizeof(struct eth_tx_desc
);
774 /* Add the queue to the list of Tx queues of this port */
775 mp
->port_tx_queue_command
|= 1;
778 /* Helper function for mv643xx_eth_open */
779 static int mv643xx_eth_real_open(struct net_device
*dev
)
781 struct mv643xx_private
*mp
= netdev_priv(dev
);
782 unsigned int port_num
= mp
->port_num
;
786 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
), 0x0000ff00);
788 /* Clear the ethernet port interrupts */
789 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
), 0);
790 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
), 0);
792 /* Unmask RX buffer and TX end interrupt */
793 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
794 INT_CAUSE_UNMASK_ALL
);
796 /* Unmask phy and link status changes interrupts */
797 mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num
),
798 INT_CAUSE_UNMASK_ALL_EXT
);
800 /* Set the MAC Address */
801 memcpy(mp
->port_mac_addr
, dev
->dev_addr
, 6);
805 INIT_WORK(&mp
->rx_task
, (void (*)(void *))mv643xx_eth_rx_task
, dev
);
807 memset(&mp
->timeout
, 0, sizeof(struct timer_list
));
808 mp
->timeout
.function
= mv643xx_eth_rx_task_timer_wrapper
;
809 mp
->timeout
.data
= (unsigned long)dev
;
811 mp
->rx_task_busy
= 0;
812 mp
->rx_timer_flag
= 0;
814 /* Allocate RX and TX skb rings */
815 mp
->rx_skb
= kmalloc(sizeof(*mp
->rx_skb
) * mp
->rx_ring_size
,
818 printk(KERN_ERR
"%s: Cannot allocate Rx skb ring\n", dev
->name
);
821 mp
->tx_skb
= kmalloc(sizeof(*mp
->tx_skb
) * mp
->tx_ring_size
,
824 printk(KERN_ERR
"%s: Cannot allocate Tx skb ring\n", dev
->name
);
829 /* Allocate TX ring */
830 mp
->tx_ring_skbs
= 0;
831 size
= mp
->tx_ring_size
* sizeof(struct eth_tx_desc
);
832 mp
->tx_desc_area_size
= size
;
834 if (mp
->tx_sram_size
) {
835 mp
->p_tx_desc_area
= ioremap(mp
->tx_sram_addr
,
837 mp
->tx_desc_dma
= mp
->tx_sram_addr
;
839 mp
->p_tx_desc_area
= dma_alloc_coherent(NULL
, size
,
843 if (!mp
->p_tx_desc_area
) {
844 printk(KERN_ERR
"%s: Cannot allocate Tx Ring (size %d bytes)\n",
850 BUG_ON((u32
) mp
->p_tx_desc_area
& 0xf); /* check 16-byte alignment */
851 memset((void *)mp
->p_tx_desc_area
, 0, mp
->tx_desc_area_size
);
853 ether_init_tx_desc_ring(mp
);
855 /* Allocate RX ring */
856 mp
->rx_ring_skbs
= 0;
857 size
= mp
->rx_ring_size
* sizeof(struct eth_rx_desc
);
858 mp
->rx_desc_area_size
= size
;
860 if (mp
->rx_sram_size
) {
861 mp
->p_rx_desc_area
= ioremap(mp
->rx_sram_addr
,
863 mp
->rx_desc_dma
= mp
->rx_sram_addr
;
865 mp
->p_rx_desc_area
= dma_alloc_coherent(NULL
, size
,
869 if (!mp
->p_rx_desc_area
) {
870 printk(KERN_ERR
"%s: Cannot allocate Rx ring (size %d bytes)\n",
872 printk(KERN_ERR
"%s: Freeing previously allocated TX queues...",
874 if (mp
->rx_sram_size
)
875 iounmap(mp
->p_rx_desc_area
);
877 dma_free_coherent(NULL
, mp
->tx_desc_area_size
,
878 mp
->p_tx_desc_area
, mp
->tx_desc_dma
);
883 memset((void *)mp
->p_rx_desc_area
, 0, size
);
885 ether_init_rx_desc_ring(mp
);
887 mv643xx_eth_rx_task(dev
); /* Fill RX ring with skb's */
891 /* Interrupt Coalescing */
895 eth_port_set_rx_coal(port_num
, 133000000, MV643XX_RX_COAL
);
899 eth_port_set_tx_coal(port_num
, 133000000, MV643XX_TX_COAL
);
901 netif_start_queue(dev
);
906 static void mv643xx_eth_free_tx_rings(struct net_device
*dev
)
908 struct mv643xx_private
*mp
= netdev_priv(dev
);
909 unsigned int port_num
= mp
->port_num
;
913 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
), 0x0000ff00);
915 /* Free outstanding skb's on TX rings */
916 for (curr
= 0; mp
->tx_ring_skbs
&& curr
< mp
->tx_ring_size
; curr
++) {
917 if (mp
->tx_skb
[curr
]) {
918 dev_kfree_skb(mp
->tx_skb
[curr
]);
922 if (mp
->tx_ring_skbs
)
923 printk("%s: Error on Tx descriptor free - could not free %d"
924 " descriptors\n", dev
->name
, mp
->tx_ring_skbs
);
927 if (mp
->tx_sram_size
)
928 iounmap(mp
->p_tx_desc_area
);
930 dma_free_coherent(NULL
, mp
->tx_desc_area_size
,
931 mp
->p_tx_desc_area
, mp
->tx_desc_dma
);
934 static void mv643xx_eth_free_rx_rings(struct net_device
*dev
)
936 struct mv643xx_private
*mp
= netdev_priv(dev
);
937 unsigned int port_num
= mp
->port_num
;
941 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
), 0x0000ff00);
943 /* Free preallocated skb's on RX rings */
944 for (curr
= 0; mp
->rx_ring_skbs
&& curr
< mp
->rx_ring_size
; curr
++) {
945 if (mp
->rx_skb
[curr
]) {
946 dev_kfree_skb(mp
->rx_skb
[curr
]);
951 if (mp
->rx_ring_skbs
)
953 "%s: Error in freeing Rx Ring. %d skb's still"
954 " stuck in RX Ring - ignoring them\n", dev
->name
,
957 if (mp
->rx_sram_size
)
958 iounmap(mp
->p_rx_desc_area
);
960 dma_free_coherent(NULL
, mp
->rx_desc_area_size
,
961 mp
->p_rx_desc_area
, mp
->rx_desc_dma
);
967 * This function is used when closing the network device.
968 * It updates the hardware,
969 * release all memory that holds buffers and descriptors and release the IRQ.
970 * Input : a pointer to the device structure
971 * Output : zero if success , nonzero if fails
974 /* Helper function for mv643xx_eth_stop */
976 static int mv643xx_eth_real_stop(struct net_device
*dev
)
978 struct mv643xx_private
*mp
= netdev_priv(dev
);
979 unsigned int port_num
= mp
->port_num
;
981 netif_carrier_off(dev
);
982 netif_stop_queue(dev
);
984 mv643xx_eth_free_tx_rings(dev
);
985 mv643xx_eth_free_rx_rings(dev
);
987 eth_port_reset(mp
->port_num
);
989 /* Disable ethernet port interrupts */
990 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
), 0);
991 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
), 0);
993 /* Mask RX buffer and TX end interrupt */
994 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), 0);
996 /* Mask phy and link status changes interrupts */
997 mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num
), 0);
1002 static int mv643xx_eth_stop(struct net_device
*dev
)
1004 struct mv643xx_private
*mp
= netdev_priv(dev
);
1006 spin_lock_irq(&mp
->lock
);
1008 mv643xx_eth_real_stop(dev
);
1010 free_irq(dev
->irq
, dev
);
1011 spin_unlock_irq(&mp
->lock
);
1017 static void mv643xx_tx(struct net_device
*dev
)
1019 struct mv643xx_private
*mp
= netdev_priv(dev
);
1020 struct pkt_info pkt_info
;
1022 while (eth_tx_return_desc(mp
, &pkt_info
) == ETH_OK
) {
1023 if (pkt_info
.return_info
) {
1024 if (skb_shinfo(pkt_info
.return_info
)->nr_frags
)
1025 dma_unmap_page(NULL
, pkt_info
.buf_ptr
,
1029 dma_unmap_single(NULL
, pkt_info
.buf_ptr
,
1033 dev_kfree_skb_irq(pkt_info
.return_info
);
1035 dma_unmap_page(NULL
, pkt_info
.buf_ptr
,
1036 pkt_info
.byte_cnt
, DMA_TO_DEVICE
);
1039 if (netif_queue_stopped(dev
) &&
1040 mp
->tx_ring_size
> mp
->tx_ring_skbs
+ MAX_DESCS_PER_SKB
)
1041 netif_wake_queue(dev
);
1047 * This function is used in case of NAPI
1049 static int mv643xx_poll(struct net_device
*dev
, int *budget
)
1051 struct mv643xx_private
*mp
= netdev_priv(dev
);
1052 int done
= 1, orig_budget
, work_done
;
1053 unsigned int port_num
= mp
->port_num
;
1054 unsigned long flags
;
1056 #ifdef MV643XX_TX_FAST_REFILL
1057 if (++mp
->tx_clean_threshold
> 5) {
1058 spin_lock_irqsave(&mp
->lock
, flags
);
1060 mp
->tx_clean_threshold
= 0;
1061 spin_unlock_irqrestore(&mp
->lock
, flags
);
1065 if ((mv_read(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num
)))
1066 != (u32
) mp
->rx_used_desc_q
) {
1067 orig_budget
= *budget
;
1068 if (orig_budget
> dev
->quota
)
1069 orig_budget
= dev
->quota
;
1070 work_done
= mv643xx_eth_receive_queue(dev
, orig_budget
);
1071 mp
->rx_task
.func(dev
);
1072 *budget
-= work_done
;
1073 dev
->quota
-= work_done
;
1074 if (work_done
>= orig_budget
)
1079 spin_lock_irqsave(&mp
->lock
, flags
);
1080 __netif_rx_complete(dev
);
1081 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
), 0);
1082 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
), 0);
1083 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
1084 INT_CAUSE_UNMASK_ALL
);
1085 mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num
),
1086 INT_CAUSE_UNMASK_ALL_EXT
);
1087 spin_unlock_irqrestore(&mp
->lock
, flags
);
1090 return done
? 0 : 1;
1095 * mv643xx_eth_start_xmit
1097 * This function is queues a packet in the Tx descriptor for
1100 * Input : skb - a pointer to socket buffer
1101 * dev - a pointer to the required port
1103 * Output : zero upon success
1105 static int mv643xx_eth_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1107 struct mv643xx_private
*mp
= netdev_priv(dev
);
1108 struct net_device_stats
*stats
= &mp
->stats
;
1109 ETH_FUNC_RET_STATUS status
;
1110 unsigned long flags
;
1111 struct pkt_info pkt_info
;
1113 if (netif_queue_stopped(dev
)) {
1115 "%s: Tried sending packet when interface is stopped\n",
1120 /* This is a hard error, log it. */
1121 if ((mp
->tx_ring_size
- mp
->tx_ring_skbs
) <=
1122 (skb_shinfo(skb
)->nr_frags
+ 1)) {
1123 netif_stop_queue(dev
);
1125 "%s: Bug in mv643xx_eth - Trying to transmit when"
1126 " queue full !\n", dev
->name
);
1130 /* Paranoid check - this shouldn't happen */
1132 stats
->tx_dropped
++;
1133 printk(KERN_ERR
"mv64320_eth paranoid check failed\n");
1137 spin_lock_irqsave(&mp
->lock
, flags
);
1139 /* Update packet info data structure -- DMA owned, first last */
1140 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1141 if (!skb_shinfo(skb
)->nr_frags
) {
1143 if (skb
->ip_summed
!= CHECKSUM_HW
) {
1144 /* Errata BTS #50, IHL must be 5 if no HW checksum */
1145 pkt_info
.cmd_sts
= ETH_TX_ENABLE_INTERRUPT
|
1148 5 << ETH_TX_IHL_SHIFT
;
1149 pkt_info
.l4i_chk
= 0;
1152 pkt_info
.cmd_sts
= ETH_TX_ENABLE_INTERRUPT
|
1155 ETH_GEN_TCP_UDP_CHECKSUM
|
1156 ETH_GEN_IP_V_4_CHECKSUM
|
1157 skb
->nh
.iph
->ihl
<< ETH_TX_IHL_SHIFT
;
1158 /* CPU already calculated pseudo header checksum. */
1159 if (skb
->nh
.iph
->protocol
== IPPROTO_UDP
) {
1160 pkt_info
.cmd_sts
|= ETH_UDP_FRAME
;
1161 pkt_info
.l4i_chk
= skb
->h
.uh
->check
;
1162 } else if (skb
->nh
.iph
->protocol
== IPPROTO_TCP
)
1163 pkt_info
.l4i_chk
= skb
->h
.th
->check
;
1166 "%s: chksum proto != TCP or UDP\n",
1168 spin_unlock_irqrestore(&mp
->lock
, flags
);
1172 pkt_info
.byte_cnt
= skb
->len
;
1173 pkt_info
.buf_ptr
= dma_map_single(NULL
, skb
->data
, skb
->len
,
1175 pkt_info
.return_info
= skb
;
1176 status
= eth_port_send(mp
, &pkt_info
);
1177 if ((status
== ETH_ERROR
) || (status
== ETH_QUEUE_FULL
))
1178 printk(KERN_ERR
"%s: Error on transmitting packet\n",
1180 stats
->tx_bytes
+= pkt_info
.byte_cnt
;
1184 /* Since hardware can't handle unaligned fragments smaller
1185 * than 9 bytes, if we find any, we linearize the skb
1186 * and start again. When I've seen it, it's always been
1187 * the first frag (probably near the end of the page),
1188 * but we check all frags to be safe.
1190 for (frag
= 0; frag
< skb_shinfo(skb
)->nr_frags
; frag
++) {
1193 fragp
= &skb_shinfo(skb
)->frags
[frag
];
1194 if (fragp
->size
<= 8 && fragp
->page_offset
& 0x7) {
1195 skb_linearize(skb
, GFP_ATOMIC
);
1196 printk(KERN_DEBUG
"%s: unaligned tiny fragment"
1197 "%d of %d, fixed\n",
1199 skb_shinfo(skb
)->nr_frags
);
1204 /* first frag which is skb header */
1205 pkt_info
.byte_cnt
= skb_headlen(skb
);
1206 pkt_info
.buf_ptr
= dma_map_single(NULL
, skb
->data
,
1209 pkt_info
.l4i_chk
= 0;
1210 pkt_info
.return_info
= 0;
1212 if (skb
->ip_summed
!= CHECKSUM_HW
)
1213 /* Errata BTS #50, IHL must be 5 if no HW checksum */
1214 pkt_info
.cmd_sts
= ETH_TX_FIRST_DESC
|
1215 5 << ETH_TX_IHL_SHIFT
;
1217 pkt_info
.cmd_sts
= ETH_TX_FIRST_DESC
|
1218 ETH_GEN_TCP_UDP_CHECKSUM
|
1219 ETH_GEN_IP_V_4_CHECKSUM
|
1220 skb
->nh
.iph
->ihl
<< ETH_TX_IHL_SHIFT
;
1221 /* CPU already calculated pseudo header checksum. */
1222 if (skb
->nh
.iph
->protocol
== IPPROTO_UDP
) {
1223 pkt_info
.cmd_sts
|= ETH_UDP_FRAME
;
1224 pkt_info
.l4i_chk
= skb
->h
.uh
->check
;
1225 } else if (skb
->nh
.iph
->protocol
== IPPROTO_TCP
)
1226 pkt_info
.l4i_chk
= skb
->h
.th
->check
;
1229 "%s: chksum proto != TCP or UDP\n",
1231 spin_unlock_irqrestore(&mp
->lock
, flags
);
1236 status
= eth_port_send(mp
, &pkt_info
);
1237 if (status
!= ETH_OK
) {
1238 if ((status
== ETH_ERROR
))
1240 "%s: Error on transmitting packet\n",
1242 if (status
== ETH_QUEUE_FULL
)
1243 printk("Error on Queue Full \n");
1244 if (status
== ETH_QUEUE_LAST_RESOURCE
)
1245 printk("Tx resource error \n");
1247 stats
->tx_bytes
+= pkt_info
.byte_cnt
;
1249 /* Check for the remaining frags */
1250 for (frag
= 0; frag
< skb_shinfo(skb
)->nr_frags
; frag
++) {
1251 skb_frag_t
*this_frag
= &skb_shinfo(skb
)->frags
[frag
];
1252 pkt_info
.l4i_chk
= 0x0000;
1253 pkt_info
.cmd_sts
= 0x00000000;
1255 /* Last Frag enables interrupt and frees the skb */
1256 if (frag
== (skb_shinfo(skb
)->nr_frags
- 1)) {
1257 pkt_info
.cmd_sts
|= ETH_TX_ENABLE_INTERRUPT
|
1259 pkt_info
.return_info
= skb
;
1261 pkt_info
.return_info
= 0;
1263 pkt_info
.l4i_chk
= 0;
1264 pkt_info
.byte_cnt
= this_frag
->size
;
1266 pkt_info
.buf_ptr
= dma_map_page(NULL
, this_frag
->page
,
1267 this_frag
->page_offset
,
1271 status
= eth_port_send(mp
, &pkt_info
);
1273 if (status
!= ETH_OK
) {
1274 if ((status
== ETH_ERROR
))
1275 printk(KERN_ERR
"%s: Error on "
1276 "transmitting packet\n",
1279 if (status
== ETH_QUEUE_LAST_RESOURCE
)
1280 printk("Tx resource error \n");
1282 if (status
== ETH_QUEUE_FULL
)
1283 printk("Queue is full \n");
1285 stats
->tx_bytes
+= pkt_info
.byte_cnt
;
1289 pkt_info
.cmd_sts
= ETH_TX_ENABLE_INTERRUPT
| ETH_TX_FIRST_DESC
|
1291 pkt_info
.l4i_chk
= 0;
1292 pkt_info
.byte_cnt
= skb
->len
;
1293 pkt_info
.buf_ptr
= dma_map_single(NULL
, skb
->data
, skb
->len
,
1295 pkt_info
.return_info
= skb
;
1296 status
= eth_port_send(mp
, &pkt_info
);
1297 if ((status
== ETH_ERROR
) || (status
== ETH_QUEUE_FULL
))
1298 printk(KERN_ERR
"%s: Error on transmitting packet\n",
1300 stats
->tx_bytes
+= pkt_info
.byte_cnt
;
1303 /* Check if TX queue can handle another skb. If not, then
1304 * signal higher layers to stop requesting TX
1306 if (mp
->tx_ring_size
<= (mp
->tx_ring_skbs
+ MAX_DESCS_PER_SKB
))
1308 * Stop getting skb's from upper layers.
1309 * Getting skb's from upper layers will be enabled again after
1310 * packets are released.
1312 netif_stop_queue(dev
);
1314 /* Update statistics and start of transmittion time */
1315 stats
->tx_packets
++;
1316 dev
->trans_start
= jiffies
;
1318 spin_unlock_irqrestore(&mp
->lock
, flags
);
1320 return 0; /* success */
1324 * mv643xx_eth_get_stats
1326 * Returns a pointer to the interface statistics.
1328 * Input : dev - a pointer to the required interface
1330 * Output : a pointer to the interface's statistics
1333 static struct net_device_stats
*mv643xx_eth_get_stats(struct net_device
*dev
)
1335 struct mv643xx_private
*mp
= netdev_priv(dev
);
1340 #ifdef CONFIG_NET_POLL_CONTROLLER
1341 static inline void mv643xx_enable_irq(struct mv643xx_private
*mp
)
1343 int port_num
= mp
->port_num
;
1344 unsigned long flags
;
1346 spin_lock_irqsave(&mp
->lock
, flags
);
1347 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
1348 INT_CAUSE_UNMASK_ALL
);
1349 mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num
),
1350 INT_CAUSE_UNMASK_ALL_EXT
);
1351 spin_unlock_irqrestore(&mp
->lock
, flags
);
1354 static inline void mv643xx_disable_irq(struct mv643xx_private
*mp
)
1356 int port_num
= mp
->port_num
;
1357 unsigned long flags
;
1359 spin_lock_irqsave(&mp
->lock
, flags
);
1360 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
1361 INT_CAUSE_MASK_ALL
);
1362 mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num
),
1363 INT_CAUSE_MASK_ALL_EXT
);
1364 spin_unlock_irqrestore(&mp
->lock
, flags
);
1367 static void mv643xx_netpoll(struct net_device
*netdev
)
1369 struct mv643xx_private
*mp
= netdev_priv(netdev
);
1371 mv643xx_disable_irq(mp
);
1372 mv643xx_eth_int_handler(netdev
->irq
, netdev
, NULL
);
1373 mv643xx_enable_irq(mp
);
1380 * First function called after registering the network device.
1381 * It's purpose is to initialize the device as an ethernet device,
1382 * fill the ethernet device structure with pointers * to functions,
1383 * and set the MAC address of the interface
1385 * Input : struct device *
1386 * Output : -ENOMEM if failed , 0 if success
1388 static int mv643xx_eth_probe(struct device
*ddev
)
1390 struct platform_device
*pdev
= to_platform_device(ddev
);
1391 struct mv643xx_eth_platform_data
*pd
;
1392 int port_num
= pdev
->id
;
1393 struct mv643xx_private
*mp
;
1394 struct net_device
*dev
;
1396 struct resource
*res
;
1399 dev
= alloc_etherdev(sizeof(struct mv643xx_private
));
1403 dev_set_drvdata(ddev
, dev
);
1405 mp
= netdev_priv(dev
);
1407 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1409 dev
->irq
= res
->start
;
1411 mp
->port_num
= port_num
;
1413 dev
->open
= mv643xx_eth_open
;
1414 dev
->stop
= mv643xx_eth_stop
;
1415 dev
->hard_start_xmit
= mv643xx_eth_start_xmit
;
1416 dev
->get_stats
= mv643xx_eth_get_stats
;
1417 dev
->set_mac_address
= mv643xx_eth_set_mac_address
;
1418 dev
->set_multicast_list
= mv643xx_eth_set_rx_mode
;
1420 /* No need to Tx Timeout */
1421 dev
->tx_timeout
= mv643xx_eth_tx_timeout
;
1423 dev
->poll
= mv643xx_poll
;
1427 #ifdef CONFIG_NET_POLL_CONTROLLER
1428 dev
->poll_controller
= mv643xx_netpoll
;
1431 dev
->watchdog_timeo
= 2 * HZ
;
1432 dev
->tx_queue_len
= mp
->tx_ring_size
;
1434 dev
->change_mtu
= mv643xx_eth_change_mtu
;
1435 SET_ETHTOOL_OPS(dev
, &mv643xx_ethtool_ops
);
1437 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1438 #ifdef MAX_SKB_FRAGS
1440 * Zero copy can only work if we use Discovery II memory. Else, we will
1441 * have to map the buffers to ISA memory which is only 16 MB
1443 dev
->features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_HW_CSUM
;
1447 /* Configure the timeout task */
1448 INIT_WORK(&mp
->tx_timeout_task
,
1449 (void (*)(void *))mv643xx_eth_tx_timeout_task
, dev
);
1451 spin_lock_init(&mp
->lock
);
1453 /* set default config values */
1454 eth_port_uc_addr_get(dev
, dev
->dev_addr
);
1455 mp
->port_config
= MV643XX_ETH_PORT_CONFIG_DEFAULT_VALUE
;
1456 mp
->port_config_extend
= MV643XX_ETH_PORT_CONFIG_EXTEND_DEFAULT_VALUE
;
1457 mp
->port_sdma_config
= MV643XX_ETH_PORT_SDMA_CONFIG_DEFAULT_VALUE
;
1458 mp
->port_serial_control
= MV643XX_ETH_PORT_SERIAL_CONTROL_DEFAULT_VALUE
;
1459 mp
->rx_ring_size
= MV643XX_ETH_PORT_DEFAULT_RECEIVE_QUEUE_SIZE
;
1460 mp
->tx_ring_size
= MV643XX_ETH_PORT_DEFAULT_TRANSMIT_QUEUE_SIZE
;
1462 pd
= pdev
->dev
.platform_data
;
1464 if (pd
->mac_addr
!= NULL
)
1465 memcpy(dev
->dev_addr
, pd
->mac_addr
, 6);
1467 if (pd
->phy_addr
|| pd
->force_phy_addr
)
1468 ethernet_phy_set(port_num
, pd
->phy_addr
);
1470 if (pd
->port_config
|| pd
->force_port_config
)
1471 mp
->port_config
= pd
->port_config
;
1473 if (pd
->port_config_extend
|| pd
->force_port_config_extend
)
1474 mp
->port_config_extend
= pd
->port_config_extend
;
1476 if (pd
->port_sdma_config
|| pd
->force_port_sdma_config
)
1477 mp
->port_sdma_config
= pd
->port_sdma_config
;
1479 if (pd
->port_serial_control
|| pd
->force_port_serial_control
)
1480 mp
->port_serial_control
= pd
->port_serial_control
;
1482 if (pd
->rx_queue_size
)
1483 mp
->rx_ring_size
= pd
->rx_queue_size
;
1485 if (pd
->tx_queue_size
)
1486 mp
->tx_ring_size
= pd
->tx_queue_size
;
1488 if (pd
->tx_sram_size
) {
1489 mp
->tx_sram_size
= pd
->tx_sram_size
;
1490 mp
->tx_sram_addr
= pd
->tx_sram_addr
;
1493 if (pd
->rx_sram_size
) {
1494 mp
->rx_sram_size
= pd
->rx_sram_size
;
1495 mp
->rx_sram_addr
= pd
->rx_sram_addr
;
1499 err
= ethernet_phy_detect(port_num
);
1501 pr_debug("MV643xx ethernet port %d: "
1502 "No PHY detected at addr %d\n",
1503 port_num
, ethernet_phy_get(port_num
));
1507 err
= register_netdev(dev
);
1513 "%s: port %d with MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
1514 dev
->name
, port_num
, p
[0], p
[1], p
[2], p
[3], p
[4], p
[5]);
1516 if (dev
->features
& NETIF_F_SG
)
1517 printk(KERN_NOTICE
"%s: Scatter Gather Enabled\n", dev
->name
);
1519 if (dev
->features
& NETIF_F_IP_CSUM
)
1520 printk(KERN_NOTICE
"%s: TX TCP/IP Checksumming Supported\n",
1523 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1524 printk(KERN_NOTICE
"%s: RX TCP/UDP Checksum Offload ON \n", dev
->name
);
1528 printk(KERN_NOTICE
"%s: TX and RX Interrupt Coalescing ON \n",
1533 printk(KERN_NOTICE
"%s: RX NAPI Enabled \n", dev
->name
);
1536 if (mp
->tx_sram_size
> 0)
1537 printk(KERN_NOTICE
"%s: Using SRAM\n", dev
->name
);
1547 static int mv643xx_eth_remove(struct device
*ddev
)
1549 struct net_device
*dev
= dev_get_drvdata(ddev
);
1551 unregister_netdev(dev
);
1552 flush_scheduled_work();
1555 dev_set_drvdata(ddev
, NULL
);
1559 static int mv643xx_eth_shared_probe(struct device
*ddev
)
1561 struct platform_device
*pdev
= to_platform_device(ddev
);
1562 struct resource
*res
;
1564 printk(KERN_NOTICE
"MV-643xx 10/100/1000 Ethernet Driver\n");
1566 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1570 mv643xx_eth_shared_base
= ioremap(res
->start
,
1571 MV643XX_ETH_SHARED_REGS_SIZE
);
1572 if (mv643xx_eth_shared_base
== NULL
)
1579 static int mv643xx_eth_shared_remove(struct device
*ddev
)
1581 iounmap(mv643xx_eth_shared_base
);
1582 mv643xx_eth_shared_base
= NULL
;
1587 static struct device_driver mv643xx_eth_driver
= {
1588 .name
= MV643XX_ETH_NAME
,
1589 .bus
= &platform_bus_type
,
1590 .probe
= mv643xx_eth_probe
,
1591 .remove
= mv643xx_eth_remove
,
1594 static struct device_driver mv643xx_eth_shared_driver
= {
1595 .name
= MV643XX_ETH_SHARED_NAME
,
1596 .bus
= &platform_bus_type
,
1597 .probe
= mv643xx_eth_shared_probe
,
1598 .remove
= mv643xx_eth_shared_remove
,
1602 * mv643xx_init_module
1604 * Registers the network drivers into the Linux kernel
1610 static int __init
mv643xx_init_module(void)
1614 rc
= driver_register(&mv643xx_eth_shared_driver
);
1616 rc
= driver_register(&mv643xx_eth_driver
);
1618 driver_unregister(&mv643xx_eth_shared_driver
);
1624 * mv643xx_cleanup_module
1626 * Registers the network drivers into the Linux kernel
1632 static void __exit
mv643xx_cleanup_module(void)
1634 driver_unregister(&mv643xx_eth_driver
);
1635 driver_unregister(&mv643xx_eth_shared_driver
);
1638 module_init(mv643xx_init_module
);
1639 module_exit(mv643xx_cleanup_module
);
1641 MODULE_LICENSE("GPL");
1642 MODULE_AUTHOR( "Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, Manish Lachwani"
1643 " and Dale Farnsworth");
1644 MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX");
1647 * The second part is the low level driver of the gigE ethernet ports.
1651 * Marvell's Gigabit Ethernet controller low level driver
1654 * This file introduce low level API to Marvell's Gigabit Ethernet
1655 * controller. This Gigabit Ethernet Controller driver API controls
1656 * 1) Operations (i.e. port init, start, reset etc').
1657 * 2) Data flow (i.e. port send, receive etc').
1658 * Each Gigabit Ethernet port is controlled via
1659 * struct mv643xx_private.
1660 * This struct includes user configuration information as well as
1661 * driver internal data needed for its operations.
1663 * Supported Features:
1664 * - This low level driver is OS independent. Allocating memory for
1665 * the descriptor rings and buffers are not within the scope of
1667 * - The user is free from Rx/Tx queue managing.
1668 * - This low level driver introduce functionality API that enable
1669 * the to operate Marvell's Gigabit Ethernet Controller in a
1671 * - Simple Gigabit Ethernet port operation API.
1672 * - Simple Gigabit Ethernet port data flow API.
1673 * - Data flow and operation API support per queue functionality.
1674 * - Support cached descriptors for better performance.
1675 * - Enable access to all four DRAM banks and internal SRAM memory
1677 * - PHY access and control API.
1678 * - Port control register configuration API.
1679 * - Full control over Unicast and Multicast MAC configurations.
1683 * Initialization phase
1684 * This phase complete the initialization of the the
1685 * mv643xx_private struct.
1686 * User information regarding port configuration has to be set
1687 * prior to calling the port initialization routine.
1689 * In this phase any port Tx/Rx activity is halted, MIB counters
1690 * are cleared, PHY address is set according to user parameter and
1691 * access to DRAM and internal SRAM memory spaces.
1693 * Driver ring initialization
1694 * Allocating memory for the descriptor rings and buffers is not
1695 * within the scope of this driver. Thus, the user is required to
1696 * allocate memory for the descriptors ring and buffers. Those
1697 * memory parameters are used by the Rx and Tx ring initialization
1698 * routines in order to curve the descriptor linked list in a form
1700 * Note: Pay special attention to alignment issues when using
1701 * cached descriptors/buffers. In this phase the driver store
1702 * information in the mv643xx_private struct regarding each queue
1706 * This phase prepares the Ethernet port for Rx and Tx activity.
1707 * It uses the information stored in the mv643xx_private struct to
1708 * initialize the various port registers.
1711 * All packet references to/from the driver are done using
1713 * This struct is a unified struct used with Rx and Tx operations.
1714 * This way the user is not required to be familiar with neither
1715 * Tx nor Rx descriptors structures.
1716 * The driver's descriptors rings are management by indexes.
1717 * Those indexes controls the ring resources and used to indicate
1718 * a SW resource error:
1720 * This index points to the current available resource for use. For
1721 * example in Rx process this index will point to the descriptor
1722 * that will be passed to the user upon calling the receive
1723 * routine. In Tx process, this index will point to the descriptor
1724 * that will be assigned with the user packet info and transmitted.
1726 * This index points to the descriptor that need to restore its
1727 * resources. For example in Rx process, using the Rx buffer return
1728 * API will attach the buffer returned in packet info to the
1729 * descriptor pointed by 'used'. In Tx process, using the Tx
1730 * descriptor return will merely return the user packet info with
1731 * the command status of the transmitted buffer pointed by the
1732 * 'used' index. Nevertheless, it is essential to use this routine
1733 * to update the 'used' index.
1735 * This index supports Tx Scatter-Gather. It points to the first
1736 * descriptor of a packet assembled of multiple buffers. For
1737 * example when in middle of Such packet we have a Tx resource
1738 * error the 'curr' index get the value of 'first' to indicate
1739 * that the ring returned to its state before trying to transmit
1742 * Receive operation:
1743 * The eth_port_receive API set the packet information struct,
1744 * passed by the caller, with received information from the
1745 * 'current' SDMA descriptor.
1746 * It is the user responsibility to return this resource back
1747 * to the Rx descriptor ring to enable the reuse of this source.
1748 * Return Rx resource is done using the eth_rx_return_buff API.
1750 * Transmit operation:
1751 * The eth_port_send API supports Scatter-Gather which enables to
1752 * send a packet spanned over multiple buffers. This means that
1753 * for each packet info structure given by the user and put into
1754 * the Tx descriptors ring, will be transmitted only if the 'LAST'
1755 * bit will be set in the packet info command status field. This
1756 * API also consider restriction regarding buffer alignments and
1758 * The user must return a Tx resource after ensuring the buffer
1759 * has been transmitted to enable the Tx ring indexes to update.
1762 * This device is on-board. No jumper diagram is necessary.
1764 * EXTERNAL INTERFACE
1766 * Prior to calling the initialization routine eth_port_init() the user
1767 * must set the following fields under mv643xx_private struct:
1768 * port_num User Ethernet port number.
1769 * port_mac_addr[6] User defined port MAC address.
1770 * port_config User port configuration value.
1771 * port_config_extend User port config extend value.
1772 * port_sdma_config User port SDMA config value.
1773 * port_serial_control User port serial control value.
1775 * This driver data flow is done using the struct pkt_info which
1776 * is a unified struct for Rx and Tx operations:
1778 * byte_cnt Tx/Rx descriptor buffer byte count.
1779 * l4i_chk CPU provided TCP Checksum. For Tx operation
1781 * cmd_sts Tx/Rx descriptor command status.
1782 * buf_ptr Tx/Rx descriptor buffer pointer.
1783 * return_info Tx/Rx user resource return information.
1787 /* SDMA command macros */
1788 #define ETH_ENABLE_TX_QUEUE(eth_port) \
1789 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(eth_port), 1)
1794 static int ethernet_phy_get(unsigned int eth_port_num
);
1795 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
);
1797 /* Ethernet Port routines */
1798 static int eth_port_uc_addr(unsigned int eth_port_num
, unsigned char uc_nibble
,
1802 * eth_port_init - Initialize the Ethernet port driver
1805 * This function prepares the ethernet port to start its activity:
1806 * 1) Completes the ethernet port driver struct initialization toward port
1808 * 2) Resets the device to a quiescent state in case of warm reboot.
1809 * 3) Enable SDMA access to all four DRAM banks as well as internal SRAM.
1810 * 4) Clean MAC tables. The reset status of those tables is unknown.
1811 * 5) Set PHY address.
1812 * Note: Call this routine prior to eth_port_start routine and after
1813 * setting user values in the user fields of Ethernet port control
1817 * struct mv643xx_private *mp Ethernet port control struct
1825 static void eth_port_init(struct mv643xx_private
*mp
)
1827 mp
->port_rx_queue_command
= 0;
1828 mp
->port_tx_queue_command
= 0;
1830 mp
->rx_resource_err
= 0;
1831 mp
->tx_resource_err
= 0;
1833 eth_port_reset(mp
->port_num
);
1835 eth_port_init_mac_tables(mp
->port_num
);
1837 ethernet_phy_reset(mp
->port_num
);
1841 * eth_port_start - Start the Ethernet port activity.
1844 * This routine prepares the Ethernet port for Rx and Tx activity:
1845 * 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that
1846 * has been initialized a descriptor's ring (using
1847 * ether_init_tx_desc_ring for Tx and ether_init_rx_desc_ring for Rx)
1848 * 2. Initialize and enable the Ethernet configuration port by writing to
1849 * the port's configuration and command registers.
1850 * 3. Initialize and enable the SDMA by writing to the SDMA's
1851 * configuration and command registers. After completing these steps,
1852 * the ethernet port SDMA can starts to perform Rx and Tx activities.
1854 * Note: Each Rx and Tx queue descriptor's list must be initialized prior
1855 * to calling this function (use ether_init_tx_desc_ring for Tx queues
1856 * and ether_init_rx_desc_ring for Rx queues).
1859 * struct mv643xx_private *mp Ethernet port control struct
1862 * Ethernet port is ready to receive and transmit.
1867 static void eth_port_start(struct mv643xx_private
*mp
)
1869 unsigned int port_num
= mp
->port_num
;
1870 int tx_curr_desc
, rx_curr_desc
;
1872 /* Assignment of Tx CTRP of given queue */
1873 tx_curr_desc
= mp
->tx_curr_desc_q
;
1874 mv_write(MV643XX_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port_num
),
1875 (u32
)((struct eth_tx_desc
*)mp
->tx_desc_dma
+ tx_curr_desc
));
1877 /* Assignment of Rx CRDP of given queue */
1878 rx_curr_desc
= mp
->rx_curr_desc_q
;
1879 mv_write(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num
),
1880 (u32
)((struct eth_rx_desc
*)mp
->rx_desc_dma
+ rx_curr_desc
));
1882 /* Add the assigned Ethernet address to the port's address table */
1883 eth_port_uc_addr_set(port_num
, mp
->port_mac_addr
);
1885 /* Assign port configuration and command. */
1886 mv_write(MV643XX_ETH_PORT_CONFIG_REG(port_num
), mp
->port_config
);
1888 mv_write(MV643XX_ETH_PORT_CONFIG_EXTEND_REG(port_num
),
1889 mp
->port_config_extend
);
1892 /* Increase the Rx side buffer size if supporting GigE */
1893 if (mp
->port_serial_control
& MV643XX_ETH_SET_GMII_SPEED_TO_1000
)
1894 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
1895 (mp
->port_serial_control
& 0xfff1ffff) | (0x5 << 17));
1897 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
1898 mp
->port_serial_control
);
1900 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
1901 mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
)) |
1902 MV643XX_ETH_SERIAL_PORT_ENABLE
);
1904 /* Assign port SDMA configuration */
1905 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(port_num
),
1906 mp
->port_sdma_config
);
1908 /* Enable port Rx. */
1909 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
),
1910 mp
->port_rx_queue_command
);
1912 /* Disable port bandwidth limits by clearing MTU register */
1913 mv_write(MV643XX_ETH_MAXIMUM_TRANSMIT_UNIT(port_num
), 0);
1917 * eth_port_uc_addr_set - This function Set the port Unicast address.
1920 * This function Set the port Ethernet MAC address.
1923 * unsigned int eth_port_num Port number.
1924 * char * p_addr Address to be set
1927 * Set MAC address low and high registers. also calls eth_port_uc_addr()
1928 * To set the unicast table with the proper information.
1934 static void eth_port_uc_addr_set(unsigned int eth_port_num
,
1935 unsigned char *p_addr
)
1940 mac_l
= (p_addr
[4] << 8) | (p_addr
[5]);
1941 mac_h
= (p_addr
[0] << 24) | (p_addr
[1] << 16) | (p_addr
[2] << 8) |
1944 mv_write(MV643XX_ETH_MAC_ADDR_LOW(eth_port_num
), mac_l
);
1945 mv_write(MV643XX_ETH_MAC_ADDR_HIGH(eth_port_num
), mac_h
);
1947 /* Accept frames of this address */
1948 eth_port_uc_addr(eth_port_num
, p_addr
[5], ACCEPT_MAC_ADDR
);
1954 * eth_port_uc_addr_get - This function retrieves the port Unicast address
1955 * (MAC address) from the ethernet hw registers.
1958 * This function retrieves the port Ethernet MAC address.
1961 * unsigned int eth_port_num Port number.
1962 * char *MacAddr pointer where the MAC address is stored
1965 * Copy the MAC address to the location pointed to by MacAddr
1971 static void eth_port_uc_addr_get(struct net_device
*dev
, unsigned char *p_addr
)
1973 struct mv643xx_private
*mp
= netdev_priv(dev
);
1977 mac_h
= mv_read(MV643XX_ETH_MAC_ADDR_HIGH(mp
->port_num
));
1978 mac_l
= mv_read(MV643XX_ETH_MAC_ADDR_LOW(mp
->port_num
));
1980 p_addr
[0] = (mac_h
>> 24) & 0xff;
1981 p_addr
[1] = (mac_h
>> 16) & 0xff;
1982 p_addr
[2] = (mac_h
>> 8) & 0xff;
1983 p_addr
[3] = mac_h
& 0xff;
1984 p_addr
[4] = (mac_l
>> 8) & 0xff;
1985 p_addr
[5] = mac_l
& 0xff;
1989 * eth_port_uc_addr - This function Set the port unicast address table
1992 * This function locates the proper entry in the Unicast table for the
1993 * specified MAC nibble and sets its properties according to function
1997 * unsigned int eth_port_num Port number.
1998 * unsigned char uc_nibble Unicast MAC Address last nibble.
1999 * int option 0 = Add, 1 = remove address.
2002 * This function add/removes MAC addresses from the port unicast address
2006 * true is output succeeded.
2007 * false if option parameter is invalid.
2010 static int eth_port_uc_addr(unsigned int eth_port_num
, unsigned char uc_nibble
,
2013 unsigned int unicast_reg
;
2014 unsigned int tbl_offset
;
2015 unsigned int reg_offset
;
2017 /* Locate the Unicast table entry */
2018 uc_nibble
= (0xf & uc_nibble
);
2019 tbl_offset
= (uc_nibble
/ 4) * 4; /* Register offset from unicast table base */
2020 reg_offset
= uc_nibble
% 4; /* Entry offset within the above register */
2023 case REJECT_MAC_ADDR
:
2024 /* Clear accepts frame bit at given unicast DA table entry */
2025 unicast_reg
= mv_read((MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
2026 (eth_port_num
) + tbl_offset
));
2028 unicast_reg
&= (0x0E << (8 * reg_offset
));
2030 mv_write((MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
2031 (eth_port_num
) + tbl_offset
), unicast_reg
);
2034 case ACCEPT_MAC_ADDR
:
2035 /* Set accepts frame bit at unicast DA filter table entry */
2037 mv_read((MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
2038 (eth_port_num
) + tbl_offset
));
2040 unicast_reg
|= (0x01 << (8 * reg_offset
));
2042 mv_write((MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
2043 (eth_port_num
) + tbl_offset
), unicast_reg
);
2055 * eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
2058 * Go through all the DA filter tables (Unicast, Special Multicast &
2059 * Other Multicast) and set each entry to 0.
2062 * unsigned int eth_port_num Ethernet Port number.
2065 * Multicast and Unicast packets are rejected.
2070 static void eth_port_init_mac_tables(unsigned int eth_port_num
)
2074 /* Clear DA filter unicast table (Ex_dFUT) */
2075 for (table_index
= 0; table_index
<= 0xC; table_index
+= 4)
2076 mv_write((MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
2077 (eth_port_num
) + table_index
), 0);
2079 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2080 /* Clear DA filter special multicast table (Ex_dFSMT) */
2081 mv_write((MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2082 (eth_port_num
) + table_index
), 0);
2083 /* Clear DA filter other multicast table (Ex_dFOMT) */
2084 mv_write((MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2085 (eth_port_num
) + table_index
), 0);
2090 * eth_clear_mib_counters - Clear all MIB counters
2093 * This function clears all MIB counters of a specific ethernet port.
2094 * A read from the MIB counter will reset the counter.
2097 * unsigned int eth_port_num Ethernet Port number.
2100 * After reading all MIB counters, the counters resets.
2103 * MIB counter value.
2106 static void eth_clear_mib_counters(unsigned int eth_port_num
)
2110 /* Perform dummy reads from MIB counters */
2111 for (i
= ETH_MIB_GOOD_OCTETS_RECEIVED_LOW
; i
< ETH_MIB_LATE_COLLISION
;
2113 mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(eth_port_num
) + i
);
2116 static inline u32
read_mib(struct mv643xx_private
*mp
, int offset
)
2118 return mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(mp
->port_num
) + offset
);
2121 static void eth_update_mib_counters(struct mv643xx_private
*mp
)
2123 struct mv643xx_mib_counters
*p
= &mp
->mib_counters
;
2126 p
->good_octets_received
+=
2127 read_mib(mp
, ETH_MIB_GOOD_OCTETS_RECEIVED_LOW
);
2128 p
->good_octets_received
+=
2129 (u64
)read_mib(mp
, ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH
) << 32;
2131 for (offset
= ETH_MIB_BAD_OCTETS_RECEIVED
;
2132 offset
<= ETH_MIB_FRAMES_1024_TO_MAX_OCTETS
;
2134 *(u32
*)((char *)p
+ offset
) = read_mib(mp
, offset
);
2136 p
->good_octets_sent
+= read_mib(mp
, ETH_MIB_GOOD_OCTETS_SENT_LOW
);
2137 p
->good_octets_sent
+=
2138 (u64
)read_mib(mp
, ETH_MIB_GOOD_OCTETS_SENT_HIGH
) << 32;
2140 for (offset
= ETH_MIB_GOOD_FRAMES_SENT
;
2141 offset
<= ETH_MIB_LATE_COLLISION
;
2143 *(u32
*)((char *)p
+ offset
) = read_mib(mp
, offset
);
2147 * ethernet_phy_detect - Detect whether a phy is present
2150 * This function tests whether there is a PHY present on
2151 * the specified port.
2154 * unsigned int eth_port_num Ethernet Port number.
2161 * -ENODEV on failure
2164 static int ethernet_phy_detect(unsigned int port_num
)
2166 unsigned int phy_reg_data0
;
2169 eth_port_read_smi_reg(port_num
, 0, &phy_reg_data0
);
2170 auto_neg
= phy_reg_data0
& 0x1000;
2171 phy_reg_data0
^= 0x1000; /* invert auto_neg */
2172 eth_port_write_smi_reg(port_num
, 0, phy_reg_data0
);
2174 eth_port_read_smi_reg(port_num
, 0, &phy_reg_data0
);
2175 if ((phy_reg_data0
& 0x1000) == auto_neg
)
2176 return -ENODEV
; /* change didn't take */
2178 phy_reg_data0
^= 0x1000;
2179 eth_port_write_smi_reg(port_num
, 0, phy_reg_data0
);
2184 * ethernet_phy_get - Get the ethernet port PHY address.
2187 * This routine returns the given ethernet port PHY address.
2190 * unsigned int eth_port_num Ethernet Port number.
2199 static int ethernet_phy_get(unsigned int eth_port_num
)
2201 unsigned int reg_data
;
2203 reg_data
= mv_read(MV643XX_ETH_PHY_ADDR_REG
);
2205 return ((reg_data
>> (5 * eth_port_num
)) & 0x1f);
2209 * ethernet_phy_set - Set the ethernet port PHY address.
2212 * This routine sets the given ethernet port PHY address.
2215 * unsigned int eth_port_num Ethernet Port number.
2216 * int phy_addr PHY address.
2225 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
)
2228 int addr_shift
= 5 * eth_port_num
;
2230 reg_data
= mv_read(MV643XX_ETH_PHY_ADDR_REG
);
2231 reg_data
&= ~(0x1f << addr_shift
);
2232 reg_data
|= (phy_addr
& 0x1f) << addr_shift
;
2233 mv_write(MV643XX_ETH_PHY_ADDR_REG
, reg_data
);
2237 * ethernet_phy_reset - Reset Ethernet port PHY.
2240 * This routine utilizes the SMI interface to reset the ethernet port PHY.
2243 * unsigned int eth_port_num Ethernet Port number.
2252 static void ethernet_phy_reset(unsigned int eth_port_num
)
2254 unsigned int phy_reg_data
;
2257 eth_port_read_smi_reg(eth_port_num
, 0, &phy_reg_data
);
2258 phy_reg_data
|= 0x8000; /* Set bit 15 to reset the PHY */
2259 eth_port_write_smi_reg(eth_port_num
, 0, phy_reg_data
);
2263 * eth_port_reset - Reset Ethernet port
2266 * This routine resets the chip by aborting any SDMA engine activity and
2267 * clearing the MIB counters. The Receiver and the Transmit unit are in
2268 * idle state after this command is performed and the port is disabled.
2271 * unsigned int eth_port_num Ethernet Port number.
2274 * Channel activity is halted.
2280 static void eth_port_reset(unsigned int port_num
)
2282 unsigned int reg_data
;
2284 /* Stop Tx port activity. Check port Tx activity. */
2285 reg_data
= mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
));
2287 if (reg_data
& 0xFF) {
2288 /* Issue stop command for active channels only */
2289 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
),
2292 /* Wait for all Tx activity to terminate. */
2293 /* Check port cause register that all Tx queues are stopped */
2294 while (mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
))
2299 /* Stop Rx port activity. Check port Rx activity. */
2300 reg_data
= mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
));
2302 if (reg_data
& 0xFF) {
2303 /* Issue stop command for active channels only */
2304 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
),
2307 /* Wait for all Rx activity to terminate. */
2308 /* Check port cause register that all Rx queues are stopped */
2309 while (mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
))
2314 /* Clear all MIB counters */
2315 eth_clear_mib_counters(port_num
);
2317 /* Reset the Enable bit in the Configuration Register */
2318 reg_data
= mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
));
2319 reg_data
&= ~MV643XX_ETH_SERIAL_PORT_ENABLE
;
2320 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), reg_data
);
2324 static int eth_port_autoneg_supported(unsigned int eth_port_num
)
2326 unsigned int phy_reg_data0
;
2328 eth_port_read_smi_reg(eth_port_num
, 0, &phy_reg_data0
);
2330 return phy_reg_data0
& 0x1000;
2333 static int eth_port_link_is_up(unsigned int eth_port_num
)
2335 unsigned int phy_reg_data1
;
2337 eth_port_read_smi_reg(eth_port_num
, 1, &phy_reg_data1
);
2339 if (eth_port_autoneg_supported(eth_port_num
)) {
2340 if (phy_reg_data1
& 0x20) /* auto-neg complete */
2342 } else if (phy_reg_data1
& 0x4) /* link up */
2349 * eth_port_read_smi_reg - Read PHY registers
2352 * This routine utilize the SMI interface to interact with the PHY in
2353 * order to perform PHY register read.
2356 * unsigned int port_num Ethernet Port number.
2357 * unsigned int phy_reg PHY register address offset.
2358 * unsigned int *value Register value buffer.
2361 * Write the value of a specified PHY register into given buffer.
2364 * false if the PHY is busy or read data is not in valid state.
2368 static void eth_port_read_smi_reg(unsigned int port_num
,
2369 unsigned int phy_reg
, unsigned int *value
)
2371 int phy_addr
= ethernet_phy_get(port_num
);
2372 unsigned long flags
;
2375 /* the SMI register is a shared resource */
2376 spin_lock_irqsave(&mv643xx_eth_phy_lock
, flags
);
2378 /* wait for the SMI register to become available */
2379 for (i
= 0; mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_BUSY
; i
++) {
2380 if (i
== PHY_WAIT_ITERATIONS
) {
2381 printk("mv643xx PHY busy timeout, port %d\n", port_num
);
2384 udelay(PHY_WAIT_MICRO_SECONDS
);
2387 mv_write(MV643XX_ETH_SMI_REG
,
2388 (phy_addr
<< 16) | (phy_reg
<< 21) | ETH_SMI_OPCODE_READ
);
2390 /* now wait for the data to be valid */
2391 for (i
= 0; !(mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_READ_VALID
); i
++) {
2392 if (i
== PHY_WAIT_ITERATIONS
) {
2393 printk("mv643xx PHY read timeout, port %d\n", port_num
);
2396 udelay(PHY_WAIT_MICRO_SECONDS
);
2399 *value
= mv_read(MV643XX_ETH_SMI_REG
) & 0xffff;
2401 spin_unlock_irqrestore(&mv643xx_eth_phy_lock
, flags
);
2405 * eth_port_write_smi_reg - Write to PHY registers
2408 * This routine utilize the SMI interface to interact with the PHY in
2409 * order to perform writes to PHY registers.
2412 * unsigned int eth_port_num Ethernet Port number.
2413 * unsigned int phy_reg PHY register address offset.
2414 * unsigned int value Register value.
2417 * Write the given value to the specified PHY register.
2420 * false if the PHY is busy.
2424 static void eth_port_write_smi_reg(unsigned int eth_port_num
,
2425 unsigned int phy_reg
, unsigned int value
)
2429 unsigned long flags
;
2431 phy_addr
= ethernet_phy_get(eth_port_num
);
2433 /* the SMI register is a shared resource */
2434 spin_lock_irqsave(&mv643xx_eth_phy_lock
, flags
);
2436 /* wait for the SMI register to become available */
2437 for (i
= 0; mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_BUSY
; i
++) {
2438 if (i
== PHY_WAIT_ITERATIONS
) {
2439 printk("mv643xx PHY busy timeout, port %d\n",
2443 udelay(PHY_WAIT_MICRO_SECONDS
);
2446 mv_write(MV643XX_ETH_SMI_REG
, (phy_addr
<< 16) | (phy_reg
<< 21) |
2447 ETH_SMI_OPCODE_WRITE
| (value
& 0xffff));
2449 spin_unlock_irqrestore(&mv643xx_eth_phy_lock
, flags
);
2453 * eth_port_send - Send an Ethernet packet
2456 * This routine send a given packet described by p_pktinfo parameter. It
2457 * supports transmitting of a packet spaned over multiple buffers. The
2458 * routine updates 'curr' and 'first' indexes according to the packet
2459 * segment passed to the routine. In case the packet segment is first,
2460 * the 'first' index is update. In any case, the 'curr' index is updated.
2461 * If the routine get into Tx resource error it assigns 'curr' index as
2462 * 'first'. This way the function can abort Tx process of multiple
2463 * descriptors per packet.
2466 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2467 * struct pkt_info *p_pkt_info User packet buffer.
2470 * Tx ring 'curr' and 'first' indexes are updated.
2473 * ETH_QUEUE_FULL in case of Tx resource error.
2474 * ETH_ERROR in case the routine can not access Tx desc ring.
2475 * ETH_QUEUE_LAST_RESOURCE if the routine uses the last Tx resource.
2479 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
2481 * Modified to include the first descriptor pointer in case of SG
2483 static ETH_FUNC_RET_STATUS
eth_port_send(struct mv643xx_private
*mp
,
2484 struct pkt_info
*p_pkt_info
)
2486 int tx_desc_curr
, tx_desc_used
, tx_first_desc
, tx_next_desc
;
2487 struct eth_tx_desc
*current_descriptor
;
2488 struct eth_tx_desc
*first_descriptor
;
2491 /* Do not process Tx ring in case of Tx ring resource error */
2492 if (mp
->tx_resource_err
)
2493 return ETH_QUEUE_FULL
;
2496 * The hardware requires that each buffer that is <= 8 bytes
2497 * in length must be aligned on an 8 byte boundary.
2499 if (p_pkt_info
->byte_cnt
<= 8 && p_pkt_info
->buf_ptr
& 0x7) {
2501 "mv643xx_eth port %d: packet size <= 8 problem\n",
2507 BUG_ON(mp
->tx_ring_skbs
> mp
->tx_ring_size
);
2509 /* Get the Tx Desc ring indexes */
2510 tx_desc_curr
= mp
->tx_curr_desc_q
;
2511 tx_desc_used
= mp
->tx_used_desc_q
;
2513 current_descriptor
= &mp
->p_tx_desc_area
[tx_desc_curr
];
2515 tx_next_desc
= (tx_desc_curr
+ 1) % mp
->tx_ring_size
;
2517 current_descriptor
->buf_ptr
= p_pkt_info
->buf_ptr
;
2518 current_descriptor
->byte_cnt
= p_pkt_info
->byte_cnt
;
2519 current_descriptor
->l4i_chk
= p_pkt_info
->l4i_chk
;
2520 mp
->tx_skb
[tx_desc_curr
] = p_pkt_info
->return_info
;
2522 command
= p_pkt_info
->cmd_sts
| ETH_ZERO_PADDING
| ETH_GEN_CRC
|
2523 ETH_BUFFER_OWNED_BY_DMA
;
2524 if (command
& ETH_TX_FIRST_DESC
) {
2525 tx_first_desc
= tx_desc_curr
;
2526 mp
->tx_first_desc_q
= tx_first_desc
;
2527 first_descriptor
= current_descriptor
;
2528 mp
->tx_first_command
= command
;
2530 tx_first_desc
= mp
->tx_first_desc_q
;
2531 first_descriptor
= &mp
->p_tx_desc_area
[tx_first_desc
];
2532 BUG_ON(first_descriptor
== NULL
);
2533 current_descriptor
->cmd_sts
= command
;
2536 if (command
& ETH_TX_LAST_DESC
) {
2538 first_descriptor
->cmd_sts
= mp
->tx_first_command
;
2541 ETH_ENABLE_TX_QUEUE(mp
->port_num
);
2544 * Finish Tx packet. Update first desc in case of Tx resource
2546 tx_first_desc
= tx_next_desc
;
2547 mp
->tx_first_desc_q
= tx_first_desc
;
2550 /* Check for ring index overlap in the Tx desc ring */
2551 if (tx_next_desc
== tx_desc_used
) {
2552 mp
->tx_resource_err
= 1;
2553 mp
->tx_curr_desc_q
= tx_first_desc
;
2555 return ETH_QUEUE_LAST_RESOURCE
;
2558 mp
->tx_curr_desc_q
= tx_next_desc
;
2563 static ETH_FUNC_RET_STATUS
eth_port_send(struct mv643xx_private
*mp
,
2564 struct pkt_info
*p_pkt_info
)
2568 struct eth_tx_desc
*current_descriptor
;
2569 unsigned int command_status
;
2571 /* Do not process Tx ring in case of Tx ring resource error */
2572 if (mp
->tx_resource_err
)
2573 return ETH_QUEUE_FULL
;
2576 BUG_ON(mp
->tx_ring_skbs
> mp
->tx_ring_size
);
2578 /* Get the Tx Desc ring indexes */
2579 tx_desc_curr
= mp
->tx_curr_desc_q
;
2580 tx_desc_used
= mp
->tx_used_desc_q
;
2581 current_descriptor
= &mp
->p_tx_desc_area
[tx_desc_curr
];
2583 command_status
= p_pkt_info
->cmd_sts
| ETH_ZERO_PADDING
| ETH_GEN_CRC
;
2584 current_descriptor
->buf_ptr
= p_pkt_info
->buf_ptr
;
2585 current_descriptor
->byte_cnt
= p_pkt_info
->byte_cnt
;
2586 mp
->tx_skb
[tx_desc_curr
] = p_pkt_info
->return_info
;
2588 /* Set last desc with DMA ownership and interrupt enable. */
2590 current_descriptor
->cmd_sts
= command_status
|
2591 ETH_BUFFER_OWNED_BY_DMA
| ETH_TX_ENABLE_INTERRUPT
;
2594 ETH_ENABLE_TX_QUEUE(mp
->port_num
);
2596 /* Finish Tx packet. Update first desc in case of Tx resource error */
2597 tx_desc_curr
= (tx_desc_curr
+ 1) % mp
->tx_ring_size
;
2599 /* Update the current descriptor */
2600 mp
->tx_curr_desc_q
= tx_desc_curr
;
2602 /* Check for ring index overlap in the Tx desc ring */
2603 if (tx_desc_curr
== tx_desc_used
) {
2604 mp
->tx_resource_err
= 1;
2605 return ETH_QUEUE_LAST_RESOURCE
;
2613 * eth_tx_return_desc - Free all used Tx descriptors
2616 * This routine returns the transmitted packet information to the caller.
2617 * It uses the 'first' index to support Tx desc return in case a transmit
2618 * of a packet spanned over multiple buffer still in process.
2619 * In case the Tx queue was in "resource error" condition, where there are
2620 * no available Tx resources, the function resets the resource error flag.
2623 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2624 * struct pkt_info *p_pkt_info User packet buffer.
2627 * Tx ring 'first' and 'used' indexes are updated.
2630 * ETH_ERROR in case the routine can not access Tx desc ring.
2631 * ETH_RETRY in case there is transmission in process.
2632 * ETH_END_OF_JOB if the routine has nothing to release.
2636 static ETH_FUNC_RET_STATUS
eth_tx_return_desc(struct mv643xx_private
*mp
,
2637 struct pkt_info
*p_pkt_info
)
2640 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
2641 int tx_busy_desc
= mp
->tx_first_desc_q
;
2643 int tx_busy_desc
= mp
->tx_curr_desc_q
;
2645 struct eth_tx_desc
*p_tx_desc_used
;
2646 unsigned int command_status
;
2648 /* Get the Tx Desc ring indexes */
2649 tx_desc_used
= mp
->tx_used_desc_q
;
2651 p_tx_desc_used
= &mp
->p_tx_desc_area
[tx_desc_used
];
2654 if (p_tx_desc_used
== NULL
)
2657 /* Stop release. About to overlap the current available Tx descriptor */
2658 if (tx_desc_used
== tx_busy_desc
&& !mp
->tx_resource_err
)
2659 return ETH_END_OF_JOB
;
2661 command_status
= p_tx_desc_used
->cmd_sts
;
2663 /* Still transmitting... */
2664 if (command_status
& (ETH_BUFFER_OWNED_BY_DMA
))
2667 /* Pass the packet information to the caller */
2668 p_pkt_info
->cmd_sts
= command_status
;
2669 p_pkt_info
->return_info
= mp
->tx_skb
[tx_desc_used
];
2670 mp
->tx_skb
[tx_desc_used
] = NULL
;
2672 /* Update the next descriptor to release. */
2673 mp
->tx_used_desc_q
= (tx_desc_used
+ 1) % mp
->tx_ring_size
;
2675 /* Any Tx return cancels the Tx resource error status */
2676 mp
->tx_resource_err
= 0;
2678 BUG_ON(mp
->tx_ring_skbs
== 0);
2685 * eth_port_receive - Get received information from Rx ring.
2688 * This routine returns the received data to the caller. There is no
2689 * data copying during routine operation. All information is returned
2690 * using pointer to packet information struct passed from the caller.
2691 * If the routine exhausts Rx ring resources then the resource error flag
2695 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2696 * struct pkt_info *p_pkt_info User packet buffer.
2699 * Rx ring current and used indexes are updated.
2702 * ETH_ERROR in case the routine can not access Rx desc ring.
2703 * ETH_QUEUE_FULL if Rx ring resources are exhausted.
2704 * ETH_END_OF_JOB if there is no received data.
2707 static ETH_FUNC_RET_STATUS
eth_port_receive(struct mv643xx_private
*mp
,
2708 struct pkt_info
*p_pkt_info
)
2710 int rx_next_curr_desc
, rx_curr_desc
, rx_used_desc
;
2711 volatile struct eth_rx_desc
*p_rx_desc
;
2712 unsigned int command_status
;
2714 /* Do not process Rx ring in case of Rx ring resource error */
2715 if (mp
->rx_resource_err
)
2716 return ETH_QUEUE_FULL
;
2718 /* Get the Rx Desc ring 'curr and 'used' indexes */
2719 rx_curr_desc
= mp
->rx_curr_desc_q
;
2720 rx_used_desc
= mp
->rx_used_desc_q
;
2722 p_rx_desc
= &mp
->p_rx_desc_area
[rx_curr_desc
];
2724 /* The following parameters are used to save readings from memory */
2725 command_status
= p_rx_desc
->cmd_sts
;
2728 /* Nothing to receive... */
2729 if (command_status
& (ETH_BUFFER_OWNED_BY_DMA
))
2730 return ETH_END_OF_JOB
;
2732 p_pkt_info
->byte_cnt
= (p_rx_desc
->byte_cnt
) - RX_BUF_OFFSET
;
2733 p_pkt_info
->cmd_sts
= command_status
;
2734 p_pkt_info
->buf_ptr
= (p_rx_desc
->buf_ptr
) + RX_BUF_OFFSET
;
2735 p_pkt_info
->return_info
= mp
->rx_skb
[rx_curr_desc
];
2736 p_pkt_info
->l4i_chk
= p_rx_desc
->buf_size
;
2738 /* Clean the return info field to indicate that the packet has been */
2739 /* moved to the upper layers */
2740 mp
->rx_skb
[rx_curr_desc
] = NULL
;
2742 /* Update current index in data structure */
2743 rx_next_curr_desc
= (rx_curr_desc
+ 1) % mp
->rx_ring_size
;
2744 mp
->rx_curr_desc_q
= rx_next_curr_desc
;
2746 /* Rx descriptors exhausted. Set the Rx ring resource error flag */
2747 if (rx_next_curr_desc
== rx_used_desc
)
2748 mp
->rx_resource_err
= 1;
2754 * eth_rx_return_buff - Returns a Rx buffer back to the Rx ring.
2757 * This routine returns a Rx buffer back to the Rx ring. It retrieves the
2758 * next 'used' descriptor and attached the returned buffer to it.
2759 * In case the Rx ring was in "resource error" condition, where there are
2760 * no available Rx resources, the function resets the resource error flag.
2763 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2764 * struct pkt_info *p_pkt_info Information on returned buffer.
2767 * New available Rx resource in Rx descriptor ring.
2770 * ETH_ERROR in case the routine can not access Rx desc ring.
2773 static ETH_FUNC_RET_STATUS
eth_rx_return_buff(struct mv643xx_private
*mp
,
2774 struct pkt_info
*p_pkt_info
)
2776 int used_rx_desc
; /* Where to return Rx resource */
2777 volatile struct eth_rx_desc
*p_used_rx_desc
;
2779 /* Get 'used' Rx descriptor */
2780 used_rx_desc
= mp
->rx_used_desc_q
;
2781 p_used_rx_desc
= &mp
->p_rx_desc_area
[used_rx_desc
];
2783 p_used_rx_desc
->buf_ptr
= p_pkt_info
->buf_ptr
;
2784 p_used_rx_desc
->buf_size
= p_pkt_info
->byte_cnt
;
2785 mp
->rx_skb
[used_rx_desc
] = p_pkt_info
->return_info
;
2787 /* Flush the write pipe */
2789 /* Return the descriptor to DMA ownership */
2791 p_used_rx_desc
->cmd_sts
=
2792 ETH_BUFFER_OWNED_BY_DMA
| ETH_RX_ENABLE_INTERRUPT
;
2795 /* Move the used descriptor pointer to the next descriptor */
2796 mp
->rx_used_desc_q
= (used_rx_desc
+ 1) % mp
->rx_ring_size
;
2798 /* Any Rx return cancels the Rx resource error status */
2799 mp
->rx_resource_err
= 0;
2804 /************* Begin ethtool support *************************/
2806 struct mv643xx_stats
{
2807 char stat_string
[ETH_GSTRING_LEN
];
2812 #define MV643XX_STAT(m) sizeof(((struct mv643xx_private *)0)->m), \
2813 offsetof(struct mv643xx_private, m)
2815 static const struct mv643xx_stats mv643xx_gstrings_stats
[] = {
2816 { "rx_packets", MV643XX_STAT(stats
.rx_packets
) },
2817 { "tx_packets", MV643XX_STAT(stats
.tx_packets
) },
2818 { "rx_bytes", MV643XX_STAT(stats
.rx_bytes
) },
2819 { "tx_bytes", MV643XX_STAT(stats
.tx_bytes
) },
2820 { "rx_errors", MV643XX_STAT(stats
.rx_errors
) },
2821 { "tx_errors", MV643XX_STAT(stats
.tx_errors
) },
2822 { "rx_dropped", MV643XX_STAT(stats
.rx_dropped
) },
2823 { "tx_dropped", MV643XX_STAT(stats
.tx_dropped
) },
2824 { "good_octets_received", MV643XX_STAT(mib_counters
.good_octets_received
) },
2825 { "bad_octets_received", MV643XX_STAT(mib_counters
.bad_octets_received
) },
2826 { "internal_mac_transmit_err", MV643XX_STAT(mib_counters
.internal_mac_transmit_err
) },
2827 { "good_frames_received", MV643XX_STAT(mib_counters
.good_frames_received
) },
2828 { "bad_frames_received", MV643XX_STAT(mib_counters
.bad_frames_received
) },
2829 { "broadcast_frames_received", MV643XX_STAT(mib_counters
.broadcast_frames_received
) },
2830 { "multicast_frames_received", MV643XX_STAT(mib_counters
.multicast_frames_received
) },
2831 { "frames_64_octets", MV643XX_STAT(mib_counters
.frames_64_octets
) },
2832 { "frames_65_to_127_octets", MV643XX_STAT(mib_counters
.frames_65_to_127_octets
) },
2833 { "frames_128_to_255_octets", MV643XX_STAT(mib_counters
.frames_128_to_255_octets
) },
2834 { "frames_256_to_511_octets", MV643XX_STAT(mib_counters
.frames_256_to_511_octets
) },
2835 { "frames_512_to_1023_octets", MV643XX_STAT(mib_counters
.frames_512_to_1023_octets
) },
2836 { "frames_1024_to_max_octets", MV643XX_STAT(mib_counters
.frames_1024_to_max_octets
) },
2837 { "good_octets_sent", MV643XX_STAT(mib_counters
.good_octets_sent
) },
2838 { "good_frames_sent", MV643XX_STAT(mib_counters
.good_frames_sent
) },
2839 { "excessive_collision", MV643XX_STAT(mib_counters
.excessive_collision
) },
2840 { "multicast_frames_sent", MV643XX_STAT(mib_counters
.multicast_frames_sent
) },
2841 { "broadcast_frames_sent", MV643XX_STAT(mib_counters
.broadcast_frames_sent
) },
2842 { "unrec_mac_control_received", MV643XX_STAT(mib_counters
.unrec_mac_control_received
) },
2843 { "fc_sent", MV643XX_STAT(mib_counters
.fc_sent
) },
2844 { "good_fc_received", MV643XX_STAT(mib_counters
.good_fc_received
) },
2845 { "bad_fc_received", MV643XX_STAT(mib_counters
.bad_fc_received
) },
2846 { "undersize_received", MV643XX_STAT(mib_counters
.undersize_received
) },
2847 { "fragments_received", MV643XX_STAT(mib_counters
.fragments_received
) },
2848 { "oversize_received", MV643XX_STAT(mib_counters
.oversize_received
) },
2849 { "jabber_received", MV643XX_STAT(mib_counters
.jabber_received
) },
2850 { "mac_receive_error", MV643XX_STAT(mib_counters
.mac_receive_error
) },
2851 { "bad_crc_event", MV643XX_STAT(mib_counters
.bad_crc_event
) },
2852 { "collision", MV643XX_STAT(mib_counters
.collision
) },
2853 { "late_collision", MV643XX_STAT(mib_counters
.late_collision
) },
2856 #define MV643XX_STATS_LEN \
2857 sizeof(mv643xx_gstrings_stats) / sizeof(struct mv643xx_stats)
2860 mv643xx_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*ecmd
)
2862 struct mv643xx_private
*mp
= netdev
->priv
;
2863 int port_num
= mp
->port_num
;
2864 int autoneg
= eth_port_autoneg_supported(port_num
);
2867 int half_duplex
= 0;
2868 int full_duplex
= 0;
2874 u32 pcs
= mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
));
2875 u32 psr
= mv_read(MV643XX_ETH_PORT_STATUS_REG(port_num
));
2877 mode_10_bit
= psr
& MV643XX_ETH_PORT_STATUS_MODE_10_BIT
;
2880 ecmd
->supported
= SUPPORTED_10baseT_Half
;
2882 ecmd
->supported
= (SUPPORTED_10baseT_Half
|
2883 SUPPORTED_10baseT_Full
|
2884 SUPPORTED_100baseT_Half
|
2885 SUPPORTED_100baseT_Full
|
2886 SUPPORTED_1000baseT_Full
|
2887 (autoneg
? SUPPORTED_Autoneg
: 0) |
2890 auto_duplex
= !(pcs
& MV643XX_ETH_DISABLE_AUTO_NEG_FOR_DUPLX
);
2891 auto_speed
= !(pcs
& MV643XX_ETH_DISABLE_AUTO_NEG_SPEED_GMII
);
2893 ecmd
->advertising
= ADVERTISED_TP
;
2896 ecmd
->advertising
|= ADVERTISED_Autoneg
;
2902 if (pcs
& MV643XX_ETH_SET_FULL_DUPLEX_MODE
)
2913 if (pcs
& MV643XX_ETH_SET_GMII_SPEED_TO_1000
)
2915 else if (pcs
& MV643XX_ETH_SET_MII_SPEED_TO_100
)
2921 if (speed_10
& half_duplex
)
2922 ecmd
->advertising
|= ADVERTISED_10baseT_Half
;
2923 if (speed_10
& full_duplex
)
2924 ecmd
->advertising
|= ADVERTISED_10baseT_Full
;
2925 if (speed_100
& half_duplex
)
2926 ecmd
->advertising
|= ADVERTISED_100baseT_Half
;
2927 if (speed_100
& full_duplex
)
2928 ecmd
->advertising
|= ADVERTISED_100baseT_Full
;
2930 ecmd
->advertising
|= ADVERTISED_1000baseT_Full
;
2934 ecmd
->port
= PORT_TP
;
2935 ecmd
->phy_address
= ethernet_phy_get(port_num
);
2937 ecmd
->transceiver
= XCVR_EXTERNAL
;
2939 if (netif_carrier_ok(netdev
)) {
2941 ecmd
->speed
= SPEED_10
;
2943 if (psr
& MV643XX_ETH_PORT_STATUS_GMII_1000
)
2944 ecmd
->speed
= SPEED_1000
;
2945 else if (psr
& MV643XX_ETH_PORT_STATUS_MII_100
)
2946 ecmd
->speed
= SPEED_100
;
2948 ecmd
->speed
= SPEED_10
;
2951 if (psr
& MV643XX_ETH_PORT_STATUS_FULL_DUPLEX
)
2952 ecmd
->duplex
= DUPLEX_FULL
;
2954 ecmd
->duplex
= DUPLEX_HALF
;
2960 ecmd
->autoneg
= autoneg
? AUTONEG_ENABLE
: AUTONEG_DISABLE
;
2965 mv643xx_get_drvinfo(struct net_device
*netdev
,
2966 struct ethtool_drvinfo
*drvinfo
)
2968 strncpy(drvinfo
->driver
, mv643xx_driver_name
, 32);
2969 strncpy(drvinfo
->version
, mv643xx_driver_version
, 32);
2970 strncpy(drvinfo
->fw_version
, "N/A", 32);
2971 strncpy(drvinfo
->bus_info
, "mv643xx", 32);
2972 drvinfo
->n_stats
= MV643XX_STATS_LEN
;
2976 mv643xx_get_stats_count(struct net_device
*netdev
)
2978 return MV643XX_STATS_LEN
;
2982 mv643xx_get_ethtool_stats(struct net_device
*netdev
,
2983 struct ethtool_stats
*stats
, uint64_t *data
)
2985 struct mv643xx_private
*mp
= netdev
->priv
;
2988 eth_update_mib_counters(mp
);
2990 for(i
= 0; i
< MV643XX_STATS_LEN
; i
++) {
2991 char *p
= (char *)mp
+mv643xx_gstrings_stats
[i
].stat_offset
;
2992 data
[i
] = (mv643xx_gstrings_stats
[i
].sizeof_stat
==
2993 sizeof(uint64_t)) ? *(uint64_t *)p
: *(uint32_t *)p
;
2998 mv643xx_get_strings(struct net_device
*netdev
, uint32_t stringset
, uint8_t *data
)
3004 for (i
=0; i
< MV643XX_STATS_LEN
; i
++) {
3005 memcpy(data
+ i
* ETH_GSTRING_LEN
,
3006 mv643xx_gstrings_stats
[i
].stat_string
,
3013 static struct ethtool_ops mv643xx_ethtool_ops
= {
3014 .get_settings
= mv643xx_get_settings
,
3015 .get_drvinfo
= mv643xx_get_drvinfo
,
3016 .get_link
= ethtool_op_get_link
,
3017 .get_sg
= ethtool_op_get_sg
,
3018 .set_sg
= ethtool_op_set_sg
,
3019 .get_strings
= mv643xx_get_strings
,
3020 .get_stats_count
= mv643xx_get_stats_count
,
3021 .get_ethtool_stats
= mv643xx_get_ethtool_stats
,
3024 /************* End ethtool support *************************/