2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 static u8
parse_mpdudensity(u8 mpdudensity
)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity
) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc
*sc
, struct ath_txq
*txq
)
61 spin_lock_bh(&txq
->axq_lock
);
63 if (txq
->axq_depth
|| !list_empty(&txq
->axq_acq
))
66 spin_unlock_bh(&txq
->axq_lock
);
70 static bool ath9k_setpower(struct ath_softc
*sc
, enum ath9k_power_mode mode
)
75 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
76 ret
= ath9k_hw_setpower(sc
->sc_ah
, mode
);
77 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
82 void ath9k_ps_wakeup(struct ath_softc
*sc
)
84 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
86 enum ath9k_power_mode power_mode
;
88 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
89 if (++sc
->ps_usecount
!= 1)
92 power_mode
= sc
->sc_ah
->power_mode
;
93 ath9k_hw_setpower(sc
->sc_ah
, ATH9K_PM_AWAKE
);
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
100 if (power_mode
!= ATH9K_PM_AWAKE
) {
101 spin_lock(&common
->cc_lock
);
102 ath_hw_cycle_counters_update(common
);
103 memset(&common
->cc_survey
, 0, sizeof(common
->cc_survey
));
104 spin_unlock(&common
->cc_lock
);
108 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
111 void ath9k_ps_restore(struct ath_softc
*sc
)
113 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
116 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
117 if (--sc
->ps_usecount
!= 0)
120 spin_lock(&common
->cc_lock
);
121 ath_hw_cycle_counters_update(common
);
122 spin_unlock(&common
->cc_lock
);
125 ath9k_hw_setpower(sc
->sc_ah
, ATH9K_PM_FULL_SLEEP
);
126 else if (sc
->ps_enabled
&&
127 !(sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
129 PS_WAIT_FOR_PSPOLL_DATA
|
130 PS_WAIT_FOR_TX_ACK
)))
131 ath9k_hw_setpower(sc
->sc_ah
, ATH9K_PM_NETWORK_SLEEP
);
134 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
137 void ath_start_ani(struct ath_common
*common
)
139 struct ath_hw
*ah
= common
->ah
;
140 unsigned long timestamp
= jiffies_to_msecs(jiffies
);
141 struct ath_softc
*sc
= (struct ath_softc
*) common
->priv
;
143 if (!(sc
->sc_flags
& SC_OP_ANI_RUN
))
146 if (sc
->sc_flags
& SC_OP_OFFCHANNEL
)
149 common
->ani
.longcal_timer
= timestamp
;
150 common
->ani
.shortcal_timer
= timestamp
;
151 common
->ani
.checkani_timer
= timestamp
;
153 mod_timer(&common
->ani
.timer
,
155 msecs_to_jiffies((u32
)ah
->config
.ani_poll_interval
));
158 static void ath_update_survey_nf(struct ath_softc
*sc
, int channel
)
160 struct ath_hw
*ah
= sc
->sc_ah
;
161 struct ath9k_channel
*chan
= &ah
->channels
[channel
];
162 struct survey_info
*survey
= &sc
->survey
[channel
];
164 if (chan
->noisefloor
) {
165 survey
->filled
|= SURVEY_INFO_NOISE_DBM
;
166 survey
->noise
= ath9k_hw_getchan_noise(ah
, chan
);
171 * Updates the survey statistics and returns the busy time since last
172 * update in %, if the measurement duration was long enough for the
173 * result to be useful, -1 otherwise.
175 static int ath_update_survey_stats(struct ath_softc
*sc
)
177 struct ath_hw
*ah
= sc
->sc_ah
;
178 struct ath_common
*common
= ath9k_hw_common(ah
);
179 int pos
= ah
->curchan
- &ah
->channels
[0];
180 struct survey_info
*survey
= &sc
->survey
[pos
];
181 struct ath_cycle_counters
*cc
= &common
->cc_survey
;
182 unsigned int div
= common
->clockrate
* 1000;
188 if (ah
->power_mode
== ATH9K_PM_AWAKE
)
189 ath_hw_cycle_counters_update(common
);
191 if (cc
->cycles
> 0) {
192 survey
->filled
|= SURVEY_INFO_CHANNEL_TIME
|
193 SURVEY_INFO_CHANNEL_TIME_BUSY
|
194 SURVEY_INFO_CHANNEL_TIME_RX
|
195 SURVEY_INFO_CHANNEL_TIME_TX
;
196 survey
->channel_time
+= cc
->cycles
/ div
;
197 survey
->channel_time_busy
+= cc
->rx_busy
/ div
;
198 survey
->channel_time_rx
+= cc
->rx_frame
/ div
;
199 survey
->channel_time_tx
+= cc
->tx_frame
/ div
;
202 if (cc
->cycles
< div
)
206 ret
= cc
->rx_busy
* 100 / cc
->cycles
;
208 memset(cc
, 0, sizeof(*cc
));
210 ath_update_survey_nf(sc
, pos
);
216 * Set/change channels. If the channel is really being changed, it's done
217 * by reseting the chip. To accomplish this we must first cleanup any pending
218 * DMA, then restart stuff.
220 static int ath_set_channel(struct ath_softc
*sc
, struct ieee80211_hw
*hw
,
221 struct ath9k_channel
*hchan
)
223 struct ath_hw
*ah
= sc
->sc_ah
;
224 struct ath_common
*common
= ath9k_hw_common(ah
);
225 struct ieee80211_conf
*conf
= &common
->hw
->conf
;
226 bool fastcc
= true, stopped
;
227 struct ieee80211_channel
*channel
= hw
->conf
.channel
;
228 struct ath9k_hw_cal_data
*caldata
= NULL
;
231 if (sc
->sc_flags
& SC_OP_INVALID
)
234 sc
->hw_busy_count
= 0;
236 del_timer_sync(&common
->ani
.timer
);
237 cancel_work_sync(&sc
->paprd_work
);
238 cancel_work_sync(&sc
->hw_check_work
);
239 cancel_delayed_work_sync(&sc
->tx_complete_work
);
240 cancel_delayed_work_sync(&sc
->hw_pll_work
);
244 spin_lock_bh(&sc
->sc_pcu_lock
);
247 * This is only performed if the channel settings have
250 * To switch channels clear any pending DMA operations;
251 * wait long enough for the RX fifo to drain, reset the
252 * hardware at the new frequency, and then re-enable
253 * the relevant bits of the h/w.
255 ath9k_hw_disable_interrupts(ah
);
256 stopped
= ath_drain_all_txq(sc
, false);
258 if (!ath_stoprecv(sc
))
261 if (!ath9k_hw_check_alive(ah
))
264 /* XXX: do not flush receive queue here. We don't want
265 * to flush data frames already in queue because of
266 * changing channel. */
268 if (!stopped
|| !(sc
->sc_flags
& SC_OP_OFFCHANNEL
))
271 if (!(sc
->sc_flags
& SC_OP_OFFCHANNEL
))
272 caldata
= &sc
->caldata
;
274 ath_dbg(common
, ATH_DBG_CONFIG
,
275 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
276 sc
->sc_ah
->curchan
->channel
,
277 channel
->center_freq
, conf_is_ht40(conf
),
280 r
= ath9k_hw_reset(ah
, hchan
, caldata
, fastcc
);
283 "Unable to reset channel (%u MHz), reset status %d\n",
284 channel
->center_freq
, r
);
288 if (ath_startrecv(sc
) != 0) {
289 ath_err(common
, "Unable to restart recv logic\n");
294 ath9k_cmn_update_txpow(ah
, sc
->curtxpow
,
295 sc
->config
.txpowlimit
, &sc
->curtxpow
);
296 ath9k_hw_set_interrupts(ah
, ah
->imask
);
297 ath9k_hw_enable_interrupts(ah
);
299 if (!(sc
->sc_flags
& (SC_OP_OFFCHANNEL
))) {
300 if (sc
->sc_flags
& SC_OP_BEACONS
)
302 ieee80211_queue_delayed_work(sc
->hw
, &sc
->tx_complete_work
, 0);
303 ieee80211_queue_delayed_work(sc
->hw
, &sc
->hw_pll_work
, HZ
/2);
304 if (!common
->disable_ani
)
305 ath_start_ani(common
);
309 ieee80211_wake_queues(hw
);
311 spin_unlock_bh(&sc
->sc_pcu_lock
);
313 ath9k_ps_restore(sc
);
317 static void ath_paprd_activate(struct ath_softc
*sc
)
319 struct ath_hw
*ah
= sc
->sc_ah
;
320 struct ath9k_hw_cal_data
*caldata
= ah
->caldata
;
321 struct ath_common
*common
= ath9k_hw_common(ah
);
324 if (!caldata
|| !caldata
->paprd_done
)
328 ar9003_paprd_enable(ah
, false);
329 for (chain
= 0; chain
< AR9300_MAX_CHAINS
; chain
++) {
330 if (!(common
->tx_chainmask
& BIT(chain
)))
333 ar9003_paprd_populate_single_table(ah
, caldata
, chain
);
336 ar9003_paprd_enable(ah
, true);
337 ath9k_ps_restore(sc
);
340 static bool ath_paprd_send_frame(struct ath_softc
*sc
, struct sk_buff
*skb
, int chain
)
342 struct ieee80211_hw
*hw
= sc
->hw
;
343 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
344 struct ath_hw
*ah
= sc
->sc_ah
;
345 struct ath_common
*common
= ath9k_hw_common(ah
);
346 struct ath_tx_control txctl
;
349 memset(&txctl
, 0, sizeof(txctl
));
350 txctl
.txq
= sc
->tx
.txq_map
[WME_AC_BE
];
352 memset(tx_info
, 0, sizeof(*tx_info
));
353 tx_info
->band
= hw
->conf
.channel
->band
;
354 tx_info
->flags
|= IEEE80211_TX_CTL_NO_ACK
;
355 tx_info
->control
.rates
[0].idx
= 0;
356 tx_info
->control
.rates
[0].count
= 1;
357 tx_info
->control
.rates
[0].flags
= IEEE80211_TX_RC_MCS
;
358 tx_info
->control
.rates
[1].idx
= -1;
360 init_completion(&sc
->paprd_complete
);
361 txctl
.paprd
= BIT(chain
);
363 if (ath_tx_start(hw
, skb
, &txctl
) != 0) {
364 ath_dbg(common
, ATH_DBG_CALIBRATE
, "PAPRD TX failed\n");
365 dev_kfree_skb_any(skb
);
369 time_left
= wait_for_completion_timeout(&sc
->paprd_complete
,
370 msecs_to_jiffies(ATH_PAPRD_TIMEOUT
));
373 ath_dbg(common
, ATH_DBG_CALIBRATE
,
374 "Timeout waiting for paprd training on TX chain %d\n",
380 void ath_paprd_calibrate(struct work_struct
*work
)
382 struct ath_softc
*sc
= container_of(work
, struct ath_softc
, paprd_work
);
383 struct ieee80211_hw
*hw
= sc
->hw
;
384 struct ath_hw
*ah
= sc
->sc_ah
;
385 struct ieee80211_hdr
*hdr
;
386 struct sk_buff
*skb
= NULL
;
387 struct ath9k_hw_cal_data
*caldata
= ah
->caldata
;
388 struct ath_common
*common
= ath9k_hw_common(ah
);
399 if (ar9003_paprd_init_table(ah
) < 0)
402 skb
= alloc_skb(len
, GFP_KERNEL
);
407 memset(skb
->data
, 0, len
);
408 hdr
= (struct ieee80211_hdr
*)skb
->data
;
409 ftype
= IEEE80211_FTYPE_DATA
| IEEE80211_STYPE_NULLFUNC
;
410 hdr
->frame_control
= cpu_to_le16(ftype
);
411 hdr
->duration_id
= cpu_to_le16(10);
412 memcpy(hdr
->addr1
, hw
->wiphy
->perm_addr
, ETH_ALEN
);
413 memcpy(hdr
->addr2
, hw
->wiphy
->perm_addr
, ETH_ALEN
);
414 memcpy(hdr
->addr3
, hw
->wiphy
->perm_addr
, ETH_ALEN
);
416 for (chain
= 0; chain
< AR9300_MAX_CHAINS
; chain
++) {
417 if (!(common
->tx_chainmask
& BIT(chain
)))
422 ath_dbg(common
, ATH_DBG_CALIBRATE
,
423 "Sending PAPRD frame for thermal measurement "
424 "on chain %d\n", chain
);
425 if (!ath_paprd_send_frame(sc
, skb
, chain
))
428 ar9003_paprd_setup_gain_table(ah
, chain
);
430 ath_dbg(common
, ATH_DBG_CALIBRATE
,
431 "Sending PAPRD training frame on chain %d\n", chain
);
432 if (!ath_paprd_send_frame(sc
, skb
, chain
))
435 if (!ar9003_paprd_is_done(ah
)) {
436 ath_dbg(common
, ATH_DBG_CALIBRATE
,
437 "PAPRD not yet done on chain %d\n", chain
);
441 if (ar9003_paprd_create_curve(ah
, caldata
, chain
)) {
442 ath_dbg(common
, ATH_DBG_CALIBRATE
,
443 "PAPRD create curve failed on chain %d\n",
453 caldata
->paprd_done
= true;
454 ath_paprd_activate(sc
);
458 ath9k_ps_restore(sc
);
462 * This routine performs the periodic noise floor calibration function
463 * that is used to adjust and optimize the chip performance. This
464 * takes environmental changes (location, temperature) into account.
465 * When the task is complete, it reschedules itself depending on the
466 * appropriate interval that was calculated.
468 void ath_ani_calibrate(unsigned long data
)
470 struct ath_softc
*sc
= (struct ath_softc
*)data
;
471 struct ath_hw
*ah
= sc
->sc_ah
;
472 struct ath_common
*common
= ath9k_hw_common(ah
);
473 bool longcal
= false;
474 bool shortcal
= false;
475 bool aniflag
= false;
476 unsigned int timestamp
= jiffies_to_msecs(jiffies
);
477 u32 cal_interval
, short_cal_interval
, long_cal_interval
;
480 if (ah
->caldata
&& ah
->caldata
->nfcal_interference
)
481 long_cal_interval
= ATH_LONG_CALINTERVAL_INT
;
483 long_cal_interval
= ATH_LONG_CALINTERVAL
;
485 short_cal_interval
= (ah
->opmode
== NL80211_IFTYPE_AP
) ?
486 ATH_AP_SHORT_CALINTERVAL
: ATH_STA_SHORT_CALINTERVAL
;
488 /* Only calibrate if awake */
489 if (sc
->sc_ah
->power_mode
!= ATH9K_PM_AWAKE
)
494 /* Long calibration runs independently of short calibration. */
495 if ((timestamp
- common
->ani
.longcal_timer
) >= long_cal_interval
) {
497 ath_dbg(common
, ATH_DBG_ANI
, "longcal @%lu\n", jiffies
);
498 common
->ani
.longcal_timer
= timestamp
;
501 /* Short calibration applies only while caldone is false */
502 if (!common
->ani
.caldone
) {
503 if ((timestamp
- common
->ani
.shortcal_timer
) >= short_cal_interval
) {
505 ath_dbg(common
, ATH_DBG_ANI
,
506 "shortcal @%lu\n", jiffies
);
507 common
->ani
.shortcal_timer
= timestamp
;
508 common
->ani
.resetcal_timer
= timestamp
;
511 if ((timestamp
- common
->ani
.resetcal_timer
) >=
512 ATH_RESTART_CALINTERVAL
) {
513 common
->ani
.caldone
= ath9k_hw_reset_calvalid(ah
);
514 if (common
->ani
.caldone
)
515 common
->ani
.resetcal_timer
= timestamp
;
519 /* Verify whether we must check ANI */
520 if ((timestamp
- common
->ani
.checkani_timer
) >=
521 ah
->config
.ani_poll_interval
) {
523 common
->ani
.checkani_timer
= timestamp
;
526 /* Call ANI routine if necessary */
528 spin_lock_irqsave(&common
->cc_lock
, flags
);
529 ath9k_hw_ani_monitor(ah
, ah
->curchan
);
530 ath_update_survey_stats(sc
);
531 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
534 /* Perform calibration if necessary */
535 if (longcal
|| shortcal
) {
536 common
->ani
.caldone
=
537 ath9k_hw_calibrate(ah
, ah
->curchan
,
538 common
->rx_chainmask
, longcal
);
541 ath9k_ps_restore(sc
);
545 * Set timer interval based on previous results.
546 * The interval must be the shortest necessary to satisfy ANI,
547 * short calibration and long calibration.
549 cal_interval
= ATH_LONG_CALINTERVAL
;
550 if (sc
->sc_ah
->config
.enable_ani
)
551 cal_interval
= min(cal_interval
,
552 (u32
)ah
->config
.ani_poll_interval
);
553 if (!common
->ani
.caldone
)
554 cal_interval
= min(cal_interval
, (u32
)short_cal_interval
);
556 mod_timer(&common
->ani
.timer
, jiffies
+ msecs_to_jiffies(cal_interval
));
557 if ((sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_PAPRD
) && ah
->caldata
) {
558 if (!ah
->caldata
->paprd_done
)
559 ieee80211_queue_work(sc
->hw
, &sc
->paprd_work
);
560 else if (!ah
->paprd_table_write_done
)
561 ath_paprd_activate(sc
);
565 static void ath_node_attach(struct ath_softc
*sc
, struct ieee80211_sta
*sta
)
568 struct ath_hw
*ah
= sc
->sc_ah
;
569 an
= (struct ath_node
*)sta
->drv_priv
;
571 #ifdef CONFIG_ATH9K_DEBUGFS
572 spin_lock(&sc
->nodes_lock
);
573 list_add(&an
->list
, &sc
->nodes
);
574 spin_unlock(&sc
->nodes_lock
);
577 if ((ah
->caps
.hw_caps
) & ATH9K_HW_CAP_APM
)
578 sc
->sc_flags
|= SC_OP_ENABLE_APM
;
580 if (sc
->sc_flags
& SC_OP_TXAGGR
) {
581 ath_tx_node_init(sc
, an
);
582 an
->maxampdu
= 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR
+
583 sta
->ht_cap
.ampdu_factor
);
584 an
->mpdudensity
= parse_mpdudensity(sta
->ht_cap
.ampdu_density
);
588 static void ath_node_detach(struct ath_softc
*sc
, struct ieee80211_sta
*sta
)
590 struct ath_node
*an
= (struct ath_node
*)sta
->drv_priv
;
592 #ifdef CONFIG_ATH9K_DEBUGFS
593 spin_lock(&sc
->nodes_lock
);
595 spin_unlock(&sc
->nodes_lock
);
599 if (sc
->sc_flags
& SC_OP_TXAGGR
)
600 ath_tx_node_cleanup(sc
, an
);
603 void ath_hw_check(struct work_struct
*work
)
605 struct ath_softc
*sc
= container_of(work
, struct ath_softc
, hw_check_work
);
606 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
611 if (ath9k_hw_check_alive(sc
->sc_ah
))
614 spin_lock_irqsave(&common
->cc_lock
, flags
);
615 busy
= ath_update_survey_stats(sc
);
616 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
618 ath_dbg(common
, ATH_DBG_RESET
, "Possible baseband hang, "
619 "busy=%d (try %d)\n", busy
, sc
->hw_busy_count
+ 1);
621 if (++sc
->hw_busy_count
>= 3) {
622 spin_lock_bh(&sc
->sc_pcu_lock
);
624 spin_unlock_bh(&sc
->sc_pcu_lock
);
626 } else if (busy
>= 0)
627 sc
->hw_busy_count
= 0;
630 ath9k_ps_restore(sc
);
633 static void ath_hw_pll_rx_hang_check(struct ath_softc
*sc
, u32 pll_sqsum
)
636 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
638 if (pll_sqsum
>= 0x40000) {
641 /* Rx is hung for more than 500ms. Reset it */
642 ath_dbg(common
, ATH_DBG_RESET
,
643 "Possible RX hang, resetting");
644 spin_lock_bh(&sc
->sc_pcu_lock
);
646 spin_unlock_bh(&sc
->sc_pcu_lock
);
653 void ath_hw_pll_work(struct work_struct
*work
)
655 struct ath_softc
*sc
= container_of(work
, struct ath_softc
,
659 if (AR_SREV_9485(sc
->sc_ah
)) {
662 pll_sqsum
= ar9003_get_pll_sqsum_dvc(sc
->sc_ah
);
663 ath9k_ps_restore(sc
);
665 ath_hw_pll_rx_hang_check(sc
, pll_sqsum
);
667 ieee80211_queue_delayed_work(sc
->hw
, &sc
->hw_pll_work
, HZ
/5);
672 void ath9k_tasklet(unsigned long data
)
674 struct ath_softc
*sc
= (struct ath_softc
*)data
;
675 struct ath_hw
*ah
= sc
->sc_ah
;
676 struct ath_common
*common
= ath9k_hw_common(ah
);
678 u32 status
= sc
->intrstatus
;
681 if ((status
& ATH9K_INT_FATAL
) ||
682 (status
& ATH9K_INT_BB_WATCHDOG
)) {
683 spin_lock(&sc
->sc_pcu_lock
);
685 spin_unlock(&sc
->sc_pcu_lock
);
690 spin_lock(&sc
->sc_pcu_lock
);
693 * Only run the baseband hang check if beacons stop working in AP or
694 * IBSS mode, because it has a high false positive rate. For station
695 * mode it should not be necessary, since the upper layers will detect
696 * this through a beacon miss automatically and the following channel
697 * change will trigger a hardware reset anyway
699 if (ath9k_hw_numtxpending(ah
, sc
->beacon
.beaconq
) != 0 &&
700 !ath9k_hw_check_alive(ah
))
701 ieee80211_queue_work(sc
->hw
, &sc
->hw_check_work
);
703 if ((status
& ATH9K_INT_TSFOOR
) && sc
->ps_enabled
) {
705 * TSF sync does not look correct; remain awake to sync with
708 ath_dbg(common
, ATH_DBG_PS
,
709 "TSFOOR - Sync with next Beacon\n");
710 sc
->ps_flags
|= PS_WAIT_FOR_BEACON
| PS_BEACON_SYNC
|
714 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
715 rxmask
= (ATH9K_INT_RXHP
| ATH9K_INT_RXLP
| ATH9K_INT_RXEOL
|
718 rxmask
= (ATH9K_INT_RX
| ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
720 if (status
& rxmask
) {
721 /* Check for high priority Rx first */
722 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) &&
723 (status
& ATH9K_INT_RXHP
))
724 ath_rx_tasklet(sc
, 0, true);
726 ath_rx_tasklet(sc
, 0, false);
729 if (status
& ATH9K_INT_TX
) {
730 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
731 ath_tx_edma_tasklet(sc
);
736 if (ah
->btcoex_hw
.scheme
== ATH_BTCOEX_CFG_3WIRE
)
737 if (status
& ATH9K_INT_GENTIMER
)
738 ath_gen_timer_isr(sc
->sc_ah
);
740 /* re-enable hardware interrupt */
741 ath9k_hw_enable_interrupts(ah
);
743 spin_unlock(&sc
->sc_pcu_lock
);
744 ath9k_ps_restore(sc
);
747 irqreturn_t
ath_isr(int irq
, void *dev
)
749 #define SCHED_INTR ( \
751 ATH9K_INT_BB_WATCHDOG | \
763 struct ath_softc
*sc
= dev
;
764 struct ath_hw
*ah
= sc
->sc_ah
;
765 struct ath_common
*common
= ath9k_hw_common(ah
);
766 enum ath9k_int status
;
770 * The hardware is not ready/present, don't
771 * touch anything. Note this can happen early
772 * on if the IRQ is shared.
774 if (sc
->sc_flags
& SC_OP_INVALID
)
778 /* shared irq, not for us */
780 if (!ath9k_hw_intrpend(ah
))
784 * Figure out the reason(s) for the interrupt. Note
785 * that the hal returns a pseudo-ISR that may include
786 * bits we haven't explicitly enabled so we mask the
787 * value to insure we only process bits we requested.
789 ath9k_hw_getisr(ah
, &status
); /* NB: clears ISR too */
790 status
&= ah
->imask
; /* discard unasked-for bits */
793 * If there are no status bits set, then this interrupt was not
794 * for me (should have been caught above).
799 /* Cache the status */
800 sc
->intrstatus
= status
;
802 if (status
& SCHED_INTR
)
806 * If a FATAL or RXORN interrupt is received, we have to reset the
809 if ((status
& ATH9K_INT_FATAL
) || ((status
& ATH9K_INT_RXORN
) &&
810 !(ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)))
813 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) &&
814 (status
& ATH9K_INT_BB_WATCHDOG
)) {
816 spin_lock(&common
->cc_lock
);
817 ath_hw_cycle_counters_update(common
);
818 ar9003_hw_bb_watchdog_dbg_info(ah
);
819 spin_unlock(&common
->cc_lock
);
824 if (status
& ATH9K_INT_SWBA
)
825 tasklet_schedule(&sc
->bcon_tasklet
);
827 if (status
& ATH9K_INT_TXURN
)
828 ath9k_hw_updatetxtriglevel(ah
, true);
830 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
831 if (status
& ATH9K_INT_RXEOL
) {
832 ah
->imask
&= ~(ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
833 ath9k_hw_set_interrupts(ah
, ah
->imask
);
837 if (status
& ATH9K_INT_MIB
) {
839 * Disable interrupts until we service the MIB
840 * interrupt; otherwise it will continue to
843 ath9k_hw_disable_interrupts(ah
);
845 * Let the hal handle the event. We assume
846 * it will clear whatever condition caused
849 spin_lock(&common
->cc_lock
);
850 ath9k_hw_proc_mib_event(ah
);
851 spin_unlock(&common
->cc_lock
);
852 ath9k_hw_enable_interrupts(ah
);
855 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
))
856 if (status
& ATH9K_INT_TIM_TIMER
) {
857 if (ATH_DBG_WARN_ON_ONCE(sc
->ps_idle
))
859 /* Clear RxAbort bit so that we can
861 ath9k_setpower(sc
, ATH9K_PM_AWAKE
);
862 ath9k_hw_setrxabort(sc
->sc_ah
, 0);
863 sc
->ps_flags
|= PS_WAIT_FOR_BEACON
;
868 ath_debug_stat_interrupt(sc
, status
);
871 /* turn off every interrupt */
872 ath9k_hw_disable_interrupts(ah
);
873 tasklet_schedule(&sc
->intr_tq
);
881 static void ath_radio_enable(struct ath_softc
*sc
, struct ieee80211_hw
*hw
)
883 struct ath_hw
*ah
= sc
->sc_ah
;
884 struct ath_common
*common
= ath9k_hw_common(ah
);
885 struct ieee80211_channel
*channel
= hw
->conf
.channel
;
889 spin_lock_bh(&sc
->sc_pcu_lock
);
891 ath9k_hw_configpcipowersave(ah
, 0, 0);
894 ah
->curchan
= ath9k_cmn_get_curchannel(sc
->hw
, ah
);
896 r
= ath9k_hw_reset(ah
, ah
->curchan
, ah
->caldata
, false);
899 "Unable to reset channel (%u MHz), reset status %d\n",
900 channel
->center_freq
, r
);
903 ath9k_cmn_update_txpow(ah
, sc
->curtxpow
,
904 sc
->config
.txpowlimit
, &sc
->curtxpow
);
905 if (ath_startrecv(sc
) != 0) {
906 ath_err(common
, "Unable to restart recv logic\n");
909 if (sc
->sc_flags
& SC_OP_BEACONS
)
910 ath_set_beacon(sc
); /* restart beacons */
912 /* Re-Enable interrupts */
913 ath9k_hw_set_interrupts(ah
, ah
->imask
);
914 ath9k_hw_enable_interrupts(ah
);
917 ath9k_hw_cfg_output(ah
, ah
->led_pin
,
918 AR_GPIO_OUTPUT_MUX_AS_OUTPUT
);
919 ath9k_hw_set_gpio(ah
, ah
->led_pin
, 0);
921 ieee80211_wake_queues(hw
);
922 ieee80211_queue_delayed_work(hw
, &sc
->hw_pll_work
, HZ
/2);
925 spin_unlock_bh(&sc
->sc_pcu_lock
);
927 ath9k_ps_restore(sc
);
930 void ath_radio_disable(struct ath_softc
*sc
, struct ieee80211_hw
*hw
)
932 struct ath_hw
*ah
= sc
->sc_ah
;
933 struct ieee80211_channel
*channel
= hw
->conf
.channel
;
937 cancel_delayed_work_sync(&sc
->hw_pll_work
);
939 spin_lock_bh(&sc
->sc_pcu_lock
);
941 ieee80211_stop_queues(hw
);
944 * Keep the LED on when the radio is disabled
945 * during idle unassociated state.
948 ath9k_hw_set_gpio(ah
, ah
->led_pin
, 1);
949 ath9k_hw_cfg_gpio_input(ah
, ah
->led_pin
);
952 /* Disable interrupts */
953 ath9k_hw_disable_interrupts(ah
);
955 ath_drain_all_txq(sc
, false); /* clear pending tx frames */
957 ath_stoprecv(sc
); /* turn off frame recv */
958 ath_flushrecv(sc
); /* flush recv queue */
961 ah
->curchan
= ath9k_cmn_get_curchannel(hw
, ah
);
963 r
= ath9k_hw_reset(ah
, ah
->curchan
, ah
->caldata
, false);
965 ath_err(ath9k_hw_common(sc
->sc_ah
),
966 "Unable to reset channel (%u MHz), reset status %d\n",
967 channel
->center_freq
, r
);
970 ath9k_hw_phy_disable(ah
);
972 ath9k_hw_configpcipowersave(ah
, 1, 1);
974 spin_unlock_bh(&sc
->sc_pcu_lock
);
975 ath9k_ps_restore(sc
);
978 int ath_reset(struct ath_softc
*sc
, bool retry_tx
)
980 struct ath_hw
*ah
= sc
->sc_ah
;
981 struct ath_common
*common
= ath9k_hw_common(ah
);
982 struct ieee80211_hw
*hw
= sc
->hw
;
985 sc
->hw_busy_count
= 0;
989 del_timer_sync(&common
->ani
.timer
);
993 ieee80211_stop_queues(hw
);
995 ath9k_hw_disable_interrupts(ah
);
996 ath_drain_all_txq(sc
, retry_tx
);
1001 r
= ath9k_hw_reset(ah
, sc
->sc_ah
->curchan
, ah
->caldata
, false);
1004 "Unable to reset hardware; reset status %d\n", r
);
1006 if (ath_startrecv(sc
) != 0)
1007 ath_err(common
, "Unable to start recv logic\n");
1010 * We may be doing a reset in response to a request
1011 * that changes the channel so update any state that
1012 * might change as a result.
1014 ath9k_cmn_update_txpow(ah
, sc
->curtxpow
,
1015 sc
->config
.txpowlimit
, &sc
->curtxpow
);
1017 if ((sc
->sc_flags
& SC_OP_BEACONS
) || !(sc
->sc_flags
& (SC_OP_OFFCHANNEL
)))
1018 ath_set_beacon(sc
); /* restart beacons */
1020 ath9k_hw_set_interrupts(ah
, ah
->imask
);
1021 ath9k_hw_enable_interrupts(ah
);
1025 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
1026 if (ATH_TXQ_SETUP(sc
, i
)) {
1027 spin_lock_bh(&sc
->tx
.txq
[i
].axq_lock
);
1028 ath_txq_schedule(sc
, &sc
->tx
.txq
[i
]);
1029 spin_unlock_bh(&sc
->tx
.txq
[i
].axq_lock
);
1034 ieee80211_wake_queues(hw
);
1037 if (!common
->disable_ani
)
1038 ath_start_ani(common
);
1040 ath9k_ps_restore(sc
);
1045 /**********************/
1046 /* mac80211 callbacks */
1047 /**********************/
1049 static int ath9k_start(struct ieee80211_hw
*hw
)
1051 struct ath_softc
*sc
= hw
->priv
;
1052 struct ath_hw
*ah
= sc
->sc_ah
;
1053 struct ath_common
*common
= ath9k_hw_common(ah
);
1054 struct ieee80211_channel
*curchan
= hw
->conf
.channel
;
1055 struct ath9k_channel
*init_channel
;
1058 ath_dbg(common
, ATH_DBG_CONFIG
,
1059 "Starting driver with initial channel: %d MHz\n",
1060 curchan
->center_freq
);
1062 ath9k_ps_wakeup(sc
);
1064 mutex_lock(&sc
->mutex
);
1066 /* setup initial channel */
1067 sc
->chan_idx
= curchan
->hw_value
;
1069 init_channel
= ath9k_cmn_get_curchannel(hw
, ah
);
1071 /* Reset SERDES registers */
1072 ath9k_hw_configpcipowersave(ah
, 0, 0);
1075 * The basic interface to setting the hardware in a good
1076 * state is ``reset''. On return the hardware is known to
1077 * be powered up and with interrupts disabled. This must
1078 * be followed by initialization of the appropriate bits
1079 * and then setup of the interrupt mask.
1081 spin_lock_bh(&sc
->sc_pcu_lock
);
1082 r
= ath9k_hw_reset(ah
, init_channel
, ah
->caldata
, false);
1085 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1086 r
, curchan
->center_freq
);
1087 spin_unlock_bh(&sc
->sc_pcu_lock
);
1092 * This is needed only to setup initial state
1093 * but it's best done after a reset.
1095 ath9k_cmn_update_txpow(ah
, sc
->curtxpow
,
1096 sc
->config
.txpowlimit
, &sc
->curtxpow
);
1099 * Setup the hardware after reset:
1100 * The receive engine is set going.
1101 * Frame transmit is handled entirely
1102 * in the frame output path; there's nothing to do
1103 * here except setup the interrupt mask.
1105 if (ath_startrecv(sc
) != 0) {
1106 ath_err(common
, "Unable to start recv logic\n");
1108 spin_unlock_bh(&sc
->sc_pcu_lock
);
1111 spin_unlock_bh(&sc
->sc_pcu_lock
);
1113 /* Setup our intr mask. */
1114 ah
->imask
= ATH9K_INT_TX
| ATH9K_INT_RXEOL
|
1115 ATH9K_INT_RXORN
| ATH9K_INT_FATAL
|
1118 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
1119 ah
->imask
|= ATH9K_INT_RXHP
|
1121 ATH9K_INT_BB_WATCHDOG
;
1123 ah
->imask
|= ATH9K_INT_RX
;
1125 ah
->imask
|= ATH9K_INT_GTT
;
1127 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_HT
)
1128 ah
->imask
|= ATH9K_INT_CST
;
1130 sc
->sc_flags
&= ~SC_OP_INVALID
;
1131 sc
->sc_ah
->is_monitoring
= false;
1133 /* Disable BMISS interrupt when we're not associated */
1134 ah
->imask
&= ~(ATH9K_INT_SWBA
| ATH9K_INT_BMISS
);
1135 ath9k_hw_set_interrupts(ah
, ah
->imask
);
1136 ath9k_hw_enable_interrupts(ah
);
1138 ieee80211_wake_queues(hw
);
1140 ieee80211_queue_delayed_work(sc
->hw
, &sc
->tx_complete_work
, 0);
1142 if ((ah
->btcoex_hw
.scheme
!= ATH_BTCOEX_CFG_NONE
) &&
1143 !ah
->btcoex_hw
.enabled
) {
1144 ath9k_hw_btcoex_set_weight(ah
, AR_BT_COEX_WGHT
,
1145 AR_STOMP_LOW_WLAN_WGHT
);
1146 ath9k_hw_btcoex_enable(ah
);
1148 if (common
->bus_ops
->bt_coex_prep
)
1149 common
->bus_ops
->bt_coex_prep(common
);
1150 if (ah
->btcoex_hw
.scheme
== ATH_BTCOEX_CFG_3WIRE
)
1151 ath9k_btcoex_timer_resume(sc
);
1154 if (ah
->caps
.pcie_lcr_extsync_en
&& common
->bus_ops
->extn_synch_en
)
1155 common
->bus_ops
->extn_synch_en(common
);
1158 mutex_unlock(&sc
->mutex
);
1160 ath9k_ps_restore(sc
);
1165 static void ath9k_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
1167 struct ath_softc
*sc
= hw
->priv
;
1168 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1169 struct ath_tx_control txctl
;
1170 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*) skb
->data
;
1172 if (sc
->ps_enabled
) {
1174 * mac80211 does not set PM field for normal data frames, so we
1175 * need to update that based on the current PS mode.
1177 if (ieee80211_is_data(hdr
->frame_control
) &&
1178 !ieee80211_is_nullfunc(hdr
->frame_control
) &&
1179 !ieee80211_has_pm(hdr
->frame_control
)) {
1180 ath_dbg(common
, ATH_DBG_PS
,
1181 "Add PM=1 for a TX frame while in PS mode\n");
1182 hdr
->frame_control
|= cpu_to_le16(IEEE80211_FCTL_PM
);
1186 if (unlikely(sc
->sc_ah
->power_mode
!= ATH9K_PM_AWAKE
)) {
1188 * We are using PS-Poll and mac80211 can request TX while in
1189 * power save mode. Need to wake up hardware for the TX to be
1190 * completed and if needed, also for RX of buffered frames.
1192 ath9k_ps_wakeup(sc
);
1193 if (!(sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
))
1194 ath9k_hw_setrxabort(sc
->sc_ah
, 0);
1195 if (ieee80211_is_pspoll(hdr
->frame_control
)) {
1196 ath_dbg(common
, ATH_DBG_PS
,
1197 "Sending PS-Poll to pick a buffered frame\n");
1198 sc
->ps_flags
|= PS_WAIT_FOR_PSPOLL_DATA
;
1200 ath_dbg(common
, ATH_DBG_PS
,
1201 "Wake up to complete TX\n");
1202 sc
->ps_flags
|= PS_WAIT_FOR_TX_ACK
;
1205 * The actual restore operation will happen only after
1206 * the sc_flags bit is cleared. We are just dropping
1207 * the ps_usecount here.
1209 ath9k_ps_restore(sc
);
1212 memset(&txctl
, 0, sizeof(struct ath_tx_control
));
1213 txctl
.txq
= sc
->tx
.txq_map
[skb_get_queue_mapping(skb
)];
1215 ath_dbg(common
, ATH_DBG_XMIT
, "transmitting packet, skb: %p\n", skb
);
1217 if (ath_tx_start(hw
, skb
, &txctl
) != 0) {
1218 ath_dbg(common
, ATH_DBG_XMIT
, "TX failed\n");
1224 dev_kfree_skb_any(skb
);
1227 static void ath9k_stop(struct ieee80211_hw
*hw
)
1229 struct ath_softc
*sc
= hw
->priv
;
1230 struct ath_hw
*ah
= sc
->sc_ah
;
1231 struct ath_common
*common
= ath9k_hw_common(ah
);
1233 mutex_lock(&sc
->mutex
);
1235 cancel_delayed_work_sync(&sc
->tx_complete_work
);
1236 cancel_delayed_work_sync(&sc
->hw_pll_work
);
1237 cancel_work_sync(&sc
->paprd_work
);
1238 cancel_work_sync(&sc
->hw_check_work
);
1240 if (sc
->sc_flags
& SC_OP_INVALID
) {
1241 ath_dbg(common
, ATH_DBG_ANY
, "Device not present\n");
1242 mutex_unlock(&sc
->mutex
);
1246 /* Ensure HW is awake when we try to shut it down. */
1247 ath9k_ps_wakeup(sc
);
1249 if (ah
->btcoex_hw
.enabled
) {
1250 ath9k_hw_btcoex_disable(ah
);
1251 if (ah
->btcoex_hw
.scheme
== ATH_BTCOEX_CFG_3WIRE
)
1252 ath9k_btcoex_timer_pause(sc
);
1255 spin_lock_bh(&sc
->sc_pcu_lock
);
1257 /* prevent tasklets to enable interrupts once we disable them */
1258 ah
->imask
&= ~ATH9K_INT_GLOBAL
;
1260 /* make sure h/w will not generate any interrupt
1261 * before setting the invalid flag. */
1262 ath9k_hw_disable_interrupts(ah
);
1264 if (!(sc
->sc_flags
& SC_OP_INVALID
)) {
1265 ath_drain_all_txq(sc
, false);
1267 ath9k_hw_phy_disable(ah
);
1269 sc
->rx
.rxlink
= NULL
;
1272 dev_kfree_skb_any(sc
->rx
.frag
);
1276 /* disable HAL and put h/w to sleep */
1277 ath9k_hw_disable(ah
);
1279 spin_unlock_bh(&sc
->sc_pcu_lock
);
1281 /* we can now sync irq and kill any running tasklets, since we already
1282 * disabled interrupts and not holding a spin lock */
1283 synchronize_irq(sc
->irq
);
1284 tasklet_kill(&sc
->intr_tq
);
1285 tasklet_kill(&sc
->bcon_tasklet
);
1287 ath9k_ps_restore(sc
);
1290 ath_radio_disable(sc
, hw
);
1292 sc
->sc_flags
|= SC_OP_INVALID
;
1294 mutex_unlock(&sc
->mutex
);
1296 ath_dbg(common
, ATH_DBG_CONFIG
, "Driver halt\n");
1299 bool ath9k_uses_beacons(int type
)
1302 case NL80211_IFTYPE_AP
:
1303 case NL80211_IFTYPE_ADHOC
:
1304 case NL80211_IFTYPE_MESH_POINT
:
1311 static void ath9k_reclaim_beacon(struct ath_softc
*sc
,
1312 struct ieee80211_vif
*vif
)
1314 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1316 ath9k_set_beaconing_status(sc
, false);
1317 ath_beacon_return(sc
, avp
);
1318 ath9k_set_beaconing_status(sc
, true);
1319 sc
->sc_flags
&= ~SC_OP_BEACONS
;
1322 static void ath9k_vif_iter(void *data
, u8
*mac
, struct ieee80211_vif
*vif
)
1324 struct ath9k_vif_iter_data
*iter_data
= data
;
1327 if (iter_data
->hw_macaddr
)
1328 for (i
= 0; i
< ETH_ALEN
; i
++)
1329 iter_data
->mask
[i
] &=
1330 ~(iter_data
->hw_macaddr
[i
] ^ mac
[i
]);
1332 switch (vif
->type
) {
1333 case NL80211_IFTYPE_AP
:
1336 case NL80211_IFTYPE_STATION
:
1337 iter_data
->nstations
++;
1339 case NL80211_IFTYPE_ADHOC
:
1340 iter_data
->nadhocs
++;
1342 case NL80211_IFTYPE_MESH_POINT
:
1343 iter_data
->nmeshes
++;
1345 case NL80211_IFTYPE_WDS
:
1349 iter_data
->nothers
++;
1354 /* Called with sc->mutex held. */
1355 void ath9k_calculate_iter_data(struct ieee80211_hw
*hw
,
1356 struct ieee80211_vif
*vif
,
1357 struct ath9k_vif_iter_data
*iter_data
)
1359 struct ath_softc
*sc
= hw
->priv
;
1360 struct ath_hw
*ah
= sc
->sc_ah
;
1361 struct ath_common
*common
= ath9k_hw_common(ah
);
1364 * Use the hardware MAC address as reference, the hardware uses it
1365 * together with the BSSID mask when matching addresses.
1367 memset(iter_data
, 0, sizeof(*iter_data
));
1368 iter_data
->hw_macaddr
= common
->macaddr
;
1369 memset(&iter_data
->mask
, 0xff, ETH_ALEN
);
1372 ath9k_vif_iter(iter_data
, vif
->addr
, vif
);
1374 /* Get list of all active MAC addresses */
1375 ieee80211_iterate_active_interfaces_atomic(sc
->hw
, ath9k_vif_iter
,
1379 /* Called with sc->mutex held. */
1380 static void ath9k_calculate_summary_state(struct ieee80211_hw
*hw
,
1381 struct ieee80211_vif
*vif
)
1383 struct ath_softc
*sc
= hw
->priv
;
1384 struct ath_hw
*ah
= sc
->sc_ah
;
1385 struct ath_common
*common
= ath9k_hw_common(ah
);
1386 struct ath9k_vif_iter_data iter_data
;
1388 ath9k_calculate_iter_data(hw
, vif
, &iter_data
);
1390 /* Set BSSID mask. */
1391 memcpy(common
->bssidmask
, iter_data
.mask
, ETH_ALEN
);
1392 ath_hw_setbssidmask(common
);
1394 /* Set op-mode & TSF */
1395 if (iter_data
.naps
> 0) {
1396 ath9k_hw_set_tsfadjust(ah
, 1);
1397 sc
->sc_flags
|= SC_OP_TSF_RESET
;
1398 ah
->opmode
= NL80211_IFTYPE_AP
;
1400 ath9k_hw_set_tsfadjust(ah
, 0);
1401 sc
->sc_flags
&= ~SC_OP_TSF_RESET
;
1403 if (iter_data
.nmeshes
)
1404 ah
->opmode
= NL80211_IFTYPE_MESH_POINT
;
1405 else if (iter_data
.nwds
)
1406 ah
->opmode
= NL80211_IFTYPE_AP
;
1407 else if (iter_data
.nadhocs
)
1408 ah
->opmode
= NL80211_IFTYPE_ADHOC
;
1410 ah
->opmode
= NL80211_IFTYPE_STATION
;
1414 * Enable MIB interrupts when there are hardware phy counters.
1416 if ((iter_data
.nstations
+ iter_data
.nadhocs
+ iter_data
.nmeshes
) > 0) {
1417 if (ah
->config
.enable_ani
)
1418 ah
->imask
|= ATH9K_INT_MIB
;
1419 ah
->imask
|= ATH9K_INT_TSFOOR
;
1421 ah
->imask
&= ~ATH9K_INT_MIB
;
1422 ah
->imask
&= ~ATH9K_INT_TSFOOR
;
1425 ath9k_hw_set_interrupts(ah
, ah
->imask
);
1428 if (iter_data
.naps
> 0) {
1429 sc
->sc_ah
->stats
.avgbrssi
= ATH_RSSI_DUMMY_MARKER
;
1431 if (!common
->disable_ani
) {
1432 sc
->sc_flags
|= SC_OP_ANI_RUN
;
1433 ath_start_ani(common
);
1437 sc
->sc_flags
&= ~SC_OP_ANI_RUN
;
1438 del_timer_sync(&common
->ani
.timer
);
1442 /* Called with sc->mutex held, vif counts set up properly. */
1443 static void ath9k_do_vif_add_setup(struct ieee80211_hw
*hw
,
1444 struct ieee80211_vif
*vif
)
1446 struct ath_softc
*sc
= hw
->priv
;
1448 ath9k_calculate_summary_state(hw
, vif
);
1450 if (ath9k_uses_beacons(vif
->type
)) {
1452 /* This may fail because upper levels do not have beacons
1453 * properly configured yet. That's OK, we assume it
1454 * will be properly configured and then we will be notified
1455 * in the info_changed method and set up beacons properly
1458 ath9k_set_beaconing_status(sc
, false);
1459 error
= ath_beacon_alloc(sc
, vif
);
1461 ath_beacon_config(sc
, vif
);
1462 ath9k_set_beaconing_status(sc
, true);
1467 static int ath9k_add_interface(struct ieee80211_hw
*hw
,
1468 struct ieee80211_vif
*vif
)
1470 struct ath_softc
*sc
= hw
->priv
;
1471 struct ath_hw
*ah
= sc
->sc_ah
;
1472 struct ath_common
*common
= ath9k_hw_common(ah
);
1475 ath9k_ps_wakeup(sc
);
1476 mutex_lock(&sc
->mutex
);
1478 switch (vif
->type
) {
1479 case NL80211_IFTYPE_STATION
:
1480 case NL80211_IFTYPE_WDS
:
1481 case NL80211_IFTYPE_ADHOC
:
1482 case NL80211_IFTYPE_AP
:
1483 case NL80211_IFTYPE_MESH_POINT
:
1486 ath_err(common
, "Interface type %d not yet supported\n",
1492 if (ath9k_uses_beacons(vif
->type
)) {
1493 if (sc
->nbcnvifs
>= ATH_BCBUF
) {
1494 ath_err(common
, "Not enough beacon buffers when adding"
1495 " new interface of type: %i\n",
1502 if ((ah
->opmode
== NL80211_IFTYPE_ADHOC
) ||
1503 ((vif
->type
== NL80211_IFTYPE_ADHOC
) &&
1505 ath_err(common
, "Cannot create ADHOC interface when other"
1506 " interfaces already exist.\n");
1511 ath_dbg(common
, ATH_DBG_CONFIG
,
1512 "Attach a VIF of type: %d\n", vif
->type
);
1516 ath9k_do_vif_add_setup(hw
, vif
);
1518 mutex_unlock(&sc
->mutex
);
1519 ath9k_ps_restore(sc
);
1523 static int ath9k_change_interface(struct ieee80211_hw
*hw
,
1524 struct ieee80211_vif
*vif
,
1525 enum nl80211_iftype new_type
,
1528 struct ath_softc
*sc
= hw
->priv
;
1529 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1532 ath_dbg(common
, ATH_DBG_CONFIG
, "Change Interface\n");
1533 mutex_lock(&sc
->mutex
);
1534 ath9k_ps_wakeup(sc
);
1536 /* See if new interface type is valid. */
1537 if ((new_type
== NL80211_IFTYPE_ADHOC
) &&
1539 ath_err(common
, "When using ADHOC, it must be the only"
1545 if (ath9k_uses_beacons(new_type
) &&
1546 !ath9k_uses_beacons(vif
->type
)) {
1547 if (sc
->nbcnvifs
>= ATH_BCBUF
) {
1548 ath_err(common
, "No beacon slot available\n");
1554 /* Clean up old vif stuff */
1555 if (ath9k_uses_beacons(vif
->type
))
1556 ath9k_reclaim_beacon(sc
, vif
);
1558 /* Add new settings */
1559 vif
->type
= new_type
;
1562 ath9k_do_vif_add_setup(hw
, vif
);
1564 ath9k_ps_restore(sc
);
1565 mutex_unlock(&sc
->mutex
);
1569 static void ath9k_remove_interface(struct ieee80211_hw
*hw
,
1570 struct ieee80211_vif
*vif
)
1572 struct ath_softc
*sc
= hw
->priv
;
1573 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1575 ath_dbg(common
, ATH_DBG_CONFIG
, "Detach Interface\n");
1577 ath9k_ps_wakeup(sc
);
1578 mutex_lock(&sc
->mutex
);
1582 /* Reclaim beacon resources */
1583 if (ath9k_uses_beacons(vif
->type
))
1584 ath9k_reclaim_beacon(sc
, vif
);
1586 ath9k_calculate_summary_state(hw
, NULL
);
1588 mutex_unlock(&sc
->mutex
);
1589 ath9k_ps_restore(sc
);
1592 static void ath9k_enable_ps(struct ath_softc
*sc
)
1594 struct ath_hw
*ah
= sc
->sc_ah
;
1596 sc
->ps_enabled
= true;
1597 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
)) {
1598 if ((ah
->imask
& ATH9K_INT_TIM_TIMER
) == 0) {
1599 ah
->imask
|= ATH9K_INT_TIM_TIMER
;
1600 ath9k_hw_set_interrupts(ah
, ah
->imask
);
1602 ath9k_hw_setrxabort(ah
, 1);
1606 static void ath9k_disable_ps(struct ath_softc
*sc
)
1608 struct ath_hw
*ah
= sc
->sc_ah
;
1610 sc
->ps_enabled
= false;
1611 ath9k_hw_setpower(ah
, ATH9K_PM_AWAKE
);
1612 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
)) {
1613 ath9k_hw_setrxabort(ah
, 0);
1614 sc
->ps_flags
&= ~(PS_WAIT_FOR_BEACON
|
1616 PS_WAIT_FOR_PSPOLL_DATA
|
1617 PS_WAIT_FOR_TX_ACK
);
1618 if (ah
->imask
& ATH9K_INT_TIM_TIMER
) {
1619 ah
->imask
&= ~ATH9K_INT_TIM_TIMER
;
1620 ath9k_hw_set_interrupts(ah
, ah
->imask
);
1626 static int ath9k_config(struct ieee80211_hw
*hw
, u32 changed
)
1628 struct ath_softc
*sc
= hw
->priv
;
1629 struct ath_hw
*ah
= sc
->sc_ah
;
1630 struct ath_common
*common
= ath9k_hw_common(ah
);
1631 struct ieee80211_conf
*conf
= &hw
->conf
;
1632 bool disable_radio
= false;
1634 mutex_lock(&sc
->mutex
);
1637 * Leave this as the first check because we need to turn on the
1638 * radio if it was disabled before prior to processing the rest
1639 * of the changes. Likewise we must only disable the radio towards
1642 if (changed
& IEEE80211_CONF_CHANGE_IDLE
) {
1643 sc
->ps_idle
= !!(conf
->flags
& IEEE80211_CONF_IDLE
);
1645 ath_radio_enable(sc
, hw
);
1646 ath_dbg(common
, ATH_DBG_CONFIG
,
1647 "not-idle: enabling radio\n");
1649 disable_radio
= true;
1654 * We just prepare to enable PS. We have to wait until our AP has
1655 * ACK'd our null data frame to disable RX otherwise we'll ignore
1656 * those ACKs and end up retransmitting the same null data frames.
1657 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1659 if (changed
& IEEE80211_CONF_CHANGE_PS
) {
1660 unsigned long flags
;
1661 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
1662 if (conf
->flags
& IEEE80211_CONF_PS
)
1663 ath9k_enable_ps(sc
);
1665 ath9k_disable_ps(sc
);
1666 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
1669 if (changed
& IEEE80211_CONF_CHANGE_MONITOR
) {
1670 if (conf
->flags
& IEEE80211_CONF_MONITOR
) {
1671 ath_dbg(common
, ATH_DBG_CONFIG
,
1672 "Monitor mode is enabled\n");
1673 sc
->sc_ah
->is_monitoring
= true;
1675 ath_dbg(common
, ATH_DBG_CONFIG
,
1676 "Monitor mode is disabled\n");
1677 sc
->sc_ah
->is_monitoring
= false;
1681 if (changed
& IEEE80211_CONF_CHANGE_CHANNEL
) {
1682 struct ieee80211_channel
*curchan
= hw
->conf
.channel
;
1683 int pos
= curchan
->hw_value
;
1685 unsigned long flags
;
1688 old_pos
= ah
->curchan
- &ah
->channels
[0];
1690 if (hw
->conf
.flags
& IEEE80211_CONF_OFFCHANNEL
)
1691 sc
->sc_flags
|= SC_OP_OFFCHANNEL
;
1693 sc
->sc_flags
&= ~SC_OP_OFFCHANNEL
;
1695 ath_dbg(common
, ATH_DBG_CONFIG
,
1696 "Set channel: %d MHz type: %d\n",
1697 curchan
->center_freq
, conf
->channel_type
);
1699 ath9k_cmn_update_ichannel(&sc
->sc_ah
->channels
[pos
],
1700 curchan
, conf
->channel_type
);
1702 /* update survey stats for the old channel before switching */
1703 spin_lock_irqsave(&common
->cc_lock
, flags
);
1704 ath_update_survey_stats(sc
);
1705 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
1708 * If the operating channel changes, change the survey in-use flags
1710 * Reset the survey data for the new channel, unless we're switching
1711 * back to the operating channel from an off-channel operation.
1713 if (!(hw
->conf
.flags
& IEEE80211_CONF_OFFCHANNEL
) &&
1714 sc
->cur_survey
!= &sc
->survey
[pos
]) {
1717 sc
->cur_survey
->filled
&= ~SURVEY_INFO_IN_USE
;
1719 sc
->cur_survey
= &sc
->survey
[pos
];
1721 memset(sc
->cur_survey
, 0, sizeof(struct survey_info
));
1722 sc
->cur_survey
->filled
|= SURVEY_INFO_IN_USE
;
1723 } else if (!(sc
->survey
[pos
].filled
& SURVEY_INFO_IN_USE
)) {
1724 memset(&sc
->survey
[pos
], 0, sizeof(struct survey_info
));
1727 if (ath_set_channel(sc
, hw
, &sc
->sc_ah
->channels
[pos
]) < 0) {
1728 ath_err(common
, "Unable to set channel\n");
1729 mutex_unlock(&sc
->mutex
);
1734 * The most recent snapshot of channel->noisefloor for the old
1735 * channel is only available after the hardware reset. Copy it to
1736 * the survey stats now.
1739 ath_update_survey_nf(sc
, old_pos
);
1742 if (changed
& IEEE80211_CONF_CHANGE_POWER
) {
1743 ath_dbg(common
, ATH_DBG_CONFIG
,
1744 "Set power: %d\n", conf
->power_level
);
1745 sc
->config
.txpowlimit
= 2 * conf
->power_level
;
1746 ath9k_ps_wakeup(sc
);
1747 ath9k_cmn_update_txpow(ah
, sc
->curtxpow
,
1748 sc
->config
.txpowlimit
, &sc
->curtxpow
);
1749 ath9k_ps_restore(sc
);
1752 if (disable_radio
) {
1753 ath_dbg(common
, ATH_DBG_CONFIG
, "idle: disabling radio\n");
1754 ath_radio_disable(sc
, hw
);
1757 mutex_unlock(&sc
->mutex
);
1762 #define SUPPORTED_FILTERS \
1763 (FIF_PROMISC_IN_BSS | \
1768 FIF_BCN_PRBRESP_PROMISC | \
1772 /* FIXME: sc->sc_full_reset ? */
1773 static void ath9k_configure_filter(struct ieee80211_hw
*hw
,
1774 unsigned int changed_flags
,
1775 unsigned int *total_flags
,
1778 struct ath_softc
*sc
= hw
->priv
;
1781 changed_flags
&= SUPPORTED_FILTERS
;
1782 *total_flags
&= SUPPORTED_FILTERS
;
1784 sc
->rx
.rxfilter
= *total_flags
;
1785 ath9k_ps_wakeup(sc
);
1786 rfilt
= ath_calcrxfilter(sc
);
1787 ath9k_hw_setrxfilter(sc
->sc_ah
, rfilt
);
1788 ath9k_ps_restore(sc
);
1790 ath_dbg(ath9k_hw_common(sc
->sc_ah
), ATH_DBG_CONFIG
,
1791 "Set HW RX filter: 0x%x\n", rfilt
);
1794 static int ath9k_sta_add(struct ieee80211_hw
*hw
,
1795 struct ieee80211_vif
*vif
,
1796 struct ieee80211_sta
*sta
)
1798 struct ath_softc
*sc
= hw
->priv
;
1799 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1800 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1801 struct ieee80211_key_conf ps_key
= { };
1803 ath_node_attach(sc
, sta
);
1805 if (vif
->type
!= NL80211_IFTYPE_AP
&&
1806 vif
->type
!= NL80211_IFTYPE_AP_VLAN
)
1809 an
->ps_key
= ath_key_config(common
, vif
, sta
, &ps_key
);
1814 static void ath9k_del_ps_key(struct ath_softc
*sc
,
1815 struct ieee80211_vif
*vif
,
1816 struct ieee80211_sta
*sta
)
1818 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1819 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1820 struct ieee80211_key_conf ps_key
= { .hw_key_idx
= an
->ps_key
};
1825 ath_key_delete(common
, &ps_key
);
1828 static int ath9k_sta_remove(struct ieee80211_hw
*hw
,
1829 struct ieee80211_vif
*vif
,
1830 struct ieee80211_sta
*sta
)
1832 struct ath_softc
*sc
= hw
->priv
;
1834 ath9k_del_ps_key(sc
, vif
, sta
);
1835 ath_node_detach(sc
, sta
);
1840 static void ath9k_sta_notify(struct ieee80211_hw
*hw
,
1841 struct ieee80211_vif
*vif
,
1842 enum sta_notify_cmd cmd
,
1843 struct ieee80211_sta
*sta
)
1845 struct ath_softc
*sc
= hw
->priv
;
1846 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1849 case STA_NOTIFY_SLEEP
:
1850 an
->sleeping
= true;
1851 if (ath_tx_aggr_sleep(sc
, an
))
1852 ieee80211_sta_set_tim(sta
);
1854 case STA_NOTIFY_AWAKE
:
1855 an
->sleeping
= false;
1856 ath_tx_aggr_wakeup(sc
, an
);
1861 static int ath9k_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
1862 const struct ieee80211_tx_queue_params
*params
)
1864 struct ath_softc
*sc
= hw
->priv
;
1865 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1866 struct ath_txq
*txq
;
1867 struct ath9k_tx_queue_info qi
;
1870 if (queue
>= WME_NUM_AC
)
1873 txq
= sc
->tx
.txq_map
[queue
];
1875 ath9k_ps_wakeup(sc
);
1876 mutex_lock(&sc
->mutex
);
1878 memset(&qi
, 0, sizeof(struct ath9k_tx_queue_info
));
1880 qi
.tqi_aifs
= params
->aifs
;
1881 qi
.tqi_cwmin
= params
->cw_min
;
1882 qi
.tqi_cwmax
= params
->cw_max
;
1883 qi
.tqi_burstTime
= params
->txop
;
1885 ath_dbg(common
, ATH_DBG_CONFIG
,
1886 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1887 queue
, txq
->axq_qnum
, params
->aifs
, params
->cw_min
,
1888 params
->cw_max
, params
->txop
);
1890 ret
= ath_txq_update(sc
, txq
->axq_qnum
, &qi
);
1892 ath_err(common
, "TXQ Update failed\n");
1894 if (sc
->sc_ah
->opmode
== NL80211_IFTYPE_ADHOC
)
1895 if (queue
== WME_AC_BE
&& !ret
)
1896 ath_beaconq_config(sc
);
1898 mutex_unlock(&sc
->mutex
);
1899 ath9k_ps_restore(sc
);
1904 static int ath9k_set_key(struct ieee80211_hw
*hw
,
1905 enum set_key_cmd cmd
,
1906 struct ieee80211_vif
*vif
,
1907 struct ieee80211_sta
*sta
,
1908 struct ieee80211_key_conf
*key
)
1910 struct ath_softc
*sc
= hw
->priv
;
1911 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1914 if (ath9k_modparam_nohwcrypt
)
1917 if (vif
->type
== NL80211_IFTYPE_ADHOC
&&
1918 (key
->cipher
== WLAN_CIPHER_SUITE_TKIP
||
1919 key
->cipher
== WLAN_CIPHER_SUITE_CCMP
) &&
1920 !(key
->flags
& IEEE80211_KEY_FLAG_PAIRWISE
)) {
1922 * For now, disable hw crypto for the RSN IBSS group keys. This
1923 * could be optimized in the future to use a modified key cache
1924 * design to support per-STA RX GTK, but until that gets
1925 * implemented, use of software crypto for group addressed
1926 * frames is a acceptable to allow RSN IBSS to be used.
1931 mutex_lock(&sc
->mutex
);
1932 ath9k_ps_wakeup(sc
);
1933 ath_dbg(common
, ATH_DBG_CONFIG
, "Set HW Key\n");
1938 ath9k_del_ps_key(sc
, vif
, sta
);
1940 ret
= ath_key_config(common
, vif
, sta
, key
);
1942 key
->hw_key_idx
= ret
;
1943 /* push IV and Michael MIC generation to stack */
1944 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_IV
;
1945 if (key
->cipher
== WLAN_CIPHER_SUITE_TKIP
)
1946 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_MMIC
;
1947 if (sc
->sc_ah
->sw_mgmt_crypto
&&
1948 key
->cipher
== WLAN_CIPHER_SUITE_CCMP
)
1949 key
->flags
|= IEEE80211_KEY_FLAG_SW_MGMT
;
1954 ath_key_delete(common
, key
);
1960 ath9k_ps_restore(sc
);
1961 mutex_unlock(&sc
->mutex
);
1965 static void ath9k_bss_iter(void *data
, u8
*mac
, struct ieee80211_vif
*vif
)
1967 struct ath_softc
*sc
= data
;
1968 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1969 struct ieee80211_bss_conf
*bss_conf
= &vif
->bss_conf
;
1970 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1973 * Skip iteration if primary station vif's bss info
1976 if (sc
->sc_flags
& SC_OP_PRIM_STA_VIF
)
1979 if (bss_conf
->assoc
) {
1980 sc
->sc_flags
|= SC_OP_PRIM_STA_VIF
;
1981 avp
->primary_sta_vif
= true;
1982 memcpy(common
->curbssid
, bss_conf
->bssid
, ETH_ALEN
);
1983 common
->curaid
= bss_conf
->aid
;
1984 ath9k_hw_write_associd(sc
->sc_ah
);
1985 ath_dbg(common
, ATH_DBG_CONFIG
,
1986 "Bss Info ASSOC %d, bssid: %pM\n",
1987 bss_conf
->aid
, common
->curbssid
);
1988 ath_beacon_config(sc
, vif
);
1990 * Request a re-configuration of Beacon related timers
1991 * on the receipt of the first Beacon frame (i.e.,
1992 * after time sync with the AP).
1994 sc
->ps_flags
|= PS_BEACON_SYNC
| PS_WAIT_FOR_BEACON
;
1995 /* Reset rssi stats */
1996 sc
->last_rssi
= ATH_RSSI_DUMMY_MARKER
;
1997 sc
->sc_ah
->stats
.avgbrssi
= ATH_RSSI_DUMMY_MARKER
;
1999 if (!common
->disable_ani
) {
2000 sc
->sc_flags
|= SC_OP_ANI_RUN
;
2001 ath_start_ani(common
);
2007 static void ath9k_config_bss(struct ath_softc
*sc
, struct ieee80211_vif
*vif
)
2009 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2010 struct ieee80211_bss_conf
*bss_conf
= &vif
->bss_conf
;
2011 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
2013 if (sc
->sc_ah
->opmode
!= NL80211_IFTYPE_STATION
)
2016 /* Reconfigure bss info */
2017 if (avp
->primary_sta_vif
&& !bss_conf
->assoc
) {
2018 ath_dbg(common
, ATH_DBG_CONFIG
,
2019 "Bss Info DISASSOC %d, bssid %pM\n",
2020 common
->curaid
, common
->curbssid
);
2021 sc
->sc_flags
&= ~(SC_OP_PRIM_STA_VIF
| SC_OP_BEACONS
);
2022 avp
->primary_sta_vif
= false;
2023 memset(common
->curbssid
, 0, ETH_ALEN
);
2027 ieee80211_iterate_active_interfaces_atomic(
2028 sc
->hw
, ath9k_bss_iter
, sc
);
2031 * None of station vifs are associated.
2034 if (!(sc
->sc_flags
& SC_OP_PRIM_STA_VIF
)) {
2035 ath9k_hw_write_associd(sc
->sc_ah
);
2037 sc
->sc_flags
&= ~SC_OP_ANI_RUN
;
2038 del_timer_sync(&common
->ani
.timer
);
2042 static void ath9k_bss_info_changed(struct ieee80211_hw
*hw
,
2043 struct ieee80211_vif
*vif
,
2044 struct ieee80211_bss_conf
*bss_conf
,
2047 struct ath_softc
*sc
= hw
->priv
;
2048 struct ath_hw
*ah
= sc
->sc_ah
;
2049 struct ath_common
*common
= ath9k_hw_common(ah
);
2050 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
2054 ath9k_ps_wakeup(sc
);
2055 mutex_lock(&sc
->mutex
);
2057 if (changed
& BSS_CHANGED_BSSID
) {
2058 ath9k_config_bss(sc
, vif
);
2060 ath_dbg(common
, ATH_DBG_CONFIG
, "BSSID: %pM aid: 0x%x\n",
2061 common
->curbssid
, common
->curaid
);
2064 if (changed
& BSS_CHANGED_IBSS
) {
2065 /* There can be only one vif available */
2066 memcpy(common
->curbssid
, bss_conf
->bssid
, ETH_ALEN
);
2067 common
->curaid
= bss_conf
->aid
;
2068 ath9k_hw_write_associd(sc
->sc_ah
);
2070 if (bss_conf
->ibss_joined
) {
2071 sc
->sc_ah
->stats
.avgbrssi
= ATH_RSSI_DUMMY_MARKER
;
2073 if (!common
->disable_ani
) {
2074 sc
->sc_flags
|= SC_OP_ANI_RUN
;
2075 ath_start_ani(common
);
2079 sc
->sc_flags
&= ~SC_OP_ANI_RUN
;
2080 del_timer_sync(&common
->ani
.timer
);
2084 /* Enable transmission of beacons (AP, IBSS, MESH) */
2085 if ((changed
& BSS_CHANGED_BEACON
) ||
2086 ((changed
& BSS_CHANGED_BEACON_ENABLED
) && bss_conf
->enable_beacon
)) {
2087 ath9k_set_beaconing_status(sc
, false);
2088 error
= ath_beacon_alloc(sc
, vif
);
2090 ath_beacon_config(sc
, vif
);
2091 ath9k_set_beaconing_status(sc
, true);
2094 if (changed
& BSS_CHANGED_ERP_SLOT
) {
2095 if (bss_conf
->use_short_slot
)
2099 if (vif
->type
== NL80211_IFTYPE_AP
) {
2101 * Defer update, so that connected stations can adjust
2102 * their settings at the same time.
2103 * See beacon.c for more details
2105 sc
->beacon
.slottime
= slottime
;
2106 sc
->beacon
.updateslot
= UPDATE
;
2108 ah
->slottime
= slottime
;
2109 ath9k_hw_init_global_settings(ah
);
2113 /* Disable transmission of beacons */
2114 if ((changed
& BSS_CHANGED_BEACON_ENABLED
) &&
2115 !bss_conf
->enable_beacon
) {
2116 ath9k_set_beaconing_status(sc
, false);
2117 avp
->is_bslot_active
= false;
2118 ath9k_set_beaconing_status(sc
, true);
2121 if (changed
& BSS_CHANGED_BEACON_INT
) {
2123 * In case of AP mode, the HW TSF has to be reset
2124 * when the beacon interval changes.
2126 if (vif
->type
== NL80211_IFTYPE_AP
) {
2127 sc
->sc_flags
|= SC_OP_TSF_RESET
;
2128 ath9k_set_beaconing_status(sc
, false);
2129 error
= ath_beacon_alloc(sc
, vif
);
2131 ath_beacon_config(sc
, vif
);
2132 ath9k_set_beaconing_status(sc
, true);
2134 ath_beacon_config(sc
, vif
);
2137 if (changed
& BSS_CHANGED_ERP_PREAMBLE
) {
2138 ath_dbg(common
, ATH_DBG_CONFIG
, "BSS Changed PREAMBLE %d\n",
2139 bss_conf
->use_short_preamble
);
2140 if (bss_conf
->use_short_preamble
)
2141 sc
->sc_flags
|= SC_OP_PREAMBLE_SHORT
;
2143 sc
->sc_flags
&= ~SC_OP_PREAMBLE_SHORT
;
2146 if (changed
& BSS_CHANGED_ERP_CTS_PROT
) {
2147 ath_dbg(common
, ATH_DBG_CONFIG
, "BSS Changed CTS PROT %d\n",
2148 bss_conf
->use_cts_prot
);
2149 if (bss_conf
->use_cts_prot
&&
2150 hw
->conf
.channel
->band
!= IEEE80211_BAND_5GHZ
)
2151 sc
->sc_flags
|= SC_OP_PROTECT_ENABLE
;
2153 sc
->sc_flags
&= ~SC_OP_PROTECT_ENABLE
;
2156 mutex_unlock(&sc
->mutex
);
2157 ath9k_ps_restore(sc
);
2160 static u64
ath9k_get_tsf(struct ieee80211_hw
*hw
)
2162 struct ath_softc
*sc
= hw
->priv
;
2165 mutex_lock(&sc
->mutex
);
2166 ath9k_ps_wakeup(sc
);
2167 tsf
= ath9k_hw_gettsf64(sc
->sc_ah
);
2168 ath9k_ps_restore(sc
);
2169 mutex_unlock(&sc
->mutex
);
2174 static void ath9k_set_tsf(struct ieee80211_hw
*hw
, u64 tsf
)
2176 struct ath_softc
*sc
= hw
->priv
;
2178 mutex_lock(&sc
->mutex
);
2179 ath9k_ps_wakeup(sc
);
2180 ath9k_hw_settsf64(sc
->sc_ah
, tsf
);
2181 ath9k_ps_restore(sc
);
2182 mutex_unlock(&sc
->mutex
);
2185 static void ath9k_reset_tsf(struct ieee80211_hw
*hw
)
2187 struct ath_softc
*sc
= hw
->priv
;
2189 mutex_lock(&sc
->mutex
);
2191 ath9k_ps_wakeup(sc
);
2192 ath9k_hw_reset_tsf(sc
->sc_ah
);
2193 ath9k_ps_restore(sc
);
2195 mutex_unlock(&sc
->mutex
);
2198 static int ath9k_ampdu_action(struct ieee80211_hw
*hw
,
2199 struct ieee80211_vif
*vif
,
2200 enum ieee80211_ampdu_mlme_action action
,
2201 struct ieee80211_sta
*sta
,
2202 u16 tid
, u16
*ssn
, u8 buf_size
)
2204 struct ath_softc
*sc
= hw
->priv
;
2210 case IEEE80211_AMPDU_RX_START
:
2211 if (!(sc
->sc_flags
& SC_OP_RXAGGR
))
2214 case IEEE80211_AMPDU_RX_STOP
:
2216 case IEEE80211_AMPDU_TX_START
:
2217 if (!(sc
->sc_flags
& SC_OP_TXAGGR
))
2220 ath9k_ps_wakeup(sc
);
2221 ret
= ath_tx_aggr_start(sc
, sta
, tid
, ssn
);
2223 ieee80211_start_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
2224 ath9k_ps_restore(sc
);
2226 case IEEE80211_AMPDU_TX_STOP
:
2227 ath9k_ps_wakeup(sc
);
2228 ath_tx_aggr_stop(sc
, sta
, tid
);
2229 ieee80211_stop_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
2230 ath9k_ps_restore(sc
);
2232 case IEEE80211_AMPDU_TX_OPERATIONAL
:
2233 ath9k_ps_wakeup(sc
);
2234 ath_tx_aggr_resume(sc
, sta
, tid
);
2235 ath9k_ps_restore(sc
);
2238 ath_err(ath9k_hw_common(sc
->sc_ah
), "Unknown AMPDU action\n");
2246 static int ath9k_get_survey(struct ieee80211_hw
*hw
, int idx
,
2247 struct survey_info
*survey
)
2249 struct ath_softc
*sc
= hw
->priv
;
2250 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2251 struct ieee80211_supported_band
*sband
;
2252 struct ieee80211_channel
*chan
;
2253 unsigned long flags
;
2256 spin_lock_irqsave(&common
->cc_lock
, flags
);
2258 ath_update_survey_stats(sc
);
2260 sband
= hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
];
2261 if (sband
&& idx
>= sband
->n_channels
) {
2262 idx
-= sband
->n_channels
;
2267 sband
= hw
->wiphy
->bands
[IEEE80211_BAND_5GHZ
];
2269 if (!sband
|| idx
>= sband
->n_channels
) {
2270 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
2274 chan
= &sband
->channels
[idx
];
2275 pos
= chan
->hw_value
;
2276 memcpy(survey
, &sc
->survey
[pos
], sizeof(*survey
));
2277 survey
->channel
= chan
;
2278 spin_unlock_irqrestore(&common
->cc_lock
, flags
);
2283 static void ath9k_set_coverage_class(struct ieee80211_hw
*hw
, u8 coverage_class
)
2285 struct ath_softc
*sc
= hw
->priv
;
2286 struct ath_hw
*ah
= sc
->sc_ah
;
2288 mutex_lock(&sc
->mutex
);
2289 ah
->coverage_class
= coverage_class
;
2290 ath9k_hw_init_global_settings(ah
);
2291 mutex_unlock(&sc
->mutex
);
2294 static void ath9k_flush(struct ieee80211_hw
*hw
, bool drop
)
2296 struct ath_softc
*sc
= hw
->priv
;
2297 struct ath_hw
*ah
= sc
->sc_ah
;
2298 struct ath_common
*common
= ath9k_hw_common(ah
);
2299 int timeout
= 200; /* ms */
2303 mutex_lock(&sc
->mutex
);
2304 cancel_delayed_work_sync(&sc
->tx_complete_work
);
2306 if (sc
->sc_flags
& SC_OP_INVALID
) {
2307 ath_dbg(common
, ATH_DBG_ANY
, "Device not present\n");
2308 mutex_unlock(&sc
->mutex
);
2315 for (j
= 0; j
< timeout
; j
++) {
2319 usleep_range(1000, 2000);
2321 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
2322 if (!ATH_TXQ_SETUP(sc
, i
))
2325 npend
= ath9k_has_pending_frames(sc
, &sc
->tx
.txq
[i
]);
2335 ath9k_ps_wakeup(sc
);
2336 spin_lock_bh(&sc
->sc_pcu_lock
);
2337 drain_txq
= ath_drain_all_txq(sc
, false);
2339 ath_reset(sc
, false);
2340 spin_unlock_bh(&sc
->sc_pcu_lock
);
2341 ath9k_ps_restore(sc
);
2342 ieee80211_wake_queues(hw
);
2345 ieee80211_queue_delayed_work(hw
, &sc
->tx_complete_work
, 0);
2346 mutex_unlock(&sc
->mutex
);
2349 static bool ath9k_tx_frames_pending(struct ieee80211_hw
*hw
)
2351 struct ath_softc
*sc
= hw
->priv
;
2354 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
2355 if (!ATH_TXQ_SETUP(sc
, i
))
2358 if (ath9k_has_pending_frames(sc
, &sc
->tx
.txq
[i
]))
2364 static int ath9k_tx_last_beacon(struct ieee80211_hw
*hw
)
2366 struct ath_softc
*sc
= hw
->priv
;
2367 struct ath_hw
*ah
= sc
->sc_ah
;
2368 struct ieee80211_vif
*vif
;
2369 struct ath_vif
*avp
;
2371 struct ath_tx_status ts
;
2374 vif
= sc
->beacon
.bslot
[0];
2378 avp
= (void *)vif
->drv_priv
;
2379 if (!avp
->is_bslot_active
)
2382 if (!sc
->beacon
.tx_processed
) {
2383 tasklet_disable(&sc
->bcon_tasklet
);
2386 if (!bf
|| !bf
->bf_mpdu
)
2389 status
= ath9k_hw_txprocdesc(ah
, bf
->bf_desc
, &ts
);
2390 if (status
== -EINPROGRESS
)
2393 sc
->beacon
.tx_processed
= true;
2394 sc
->beacon
.tx_last
= !(ts
.ts_status
& ATH9K_TXERR_MASK
);
2397 tasklet_enable(&sc
->bcon_tasklet
);
2400 return sc
->beacon
.tx_last
;
2403 struct ieee80211_ops ath9k_ops
= {
2405 .start
= ath9k_start
,
2407 .add_interface
= ath9k_add_interface
,
2408 .change_interface
= ath9k_change_interface
,
2409 .remove_interface
= ath9k_remove_interface
,
2410 .config
= ath9k_config
,
2411 .configure_filter
= ath9k_configure_filter
,
2412 .sta_add
= ath9k_sta_add
,
2413 .sta_remove
= ath9k_sta_remove
,
2414 .sta_notify
= ath9k_sta_notify
,
2415 .conf_tx
= ath9k_conf_tx
,
2416 .bss_info_changed
= ath9k_bss_info_changed
,
2417 .set_key
= ath9k_set_key
,
2418 .get_tsf
= ath9k_get_tsf
,
2419 .set_tsf
= ath9k_set_tsf
,
2420 .reset_tsf
= ath9k_reset_tsf
,
2421 .ampdu_action
= ath9k_ampdu_action
,
2422 .get_survey
= ath9k_get_survey
,
2423 .rfkill_poll
= ath9k_rfkill_poll_state
,
2424 .set_coverage_class
= ath9k_set_coverage_class
,
2425 .flush
= ath9k_flush
,
2426 .tx_frames_pending
= ath9k_tx_frames_pending
,
2427 .tx_last_beacon
= ath9k_tx_last_beacon
,