Disintegrate asm/system.h for PowerPC
[linux-2.6.git] / arch / powerpc / platforms / powernv / smp.c
blob3ef46254c35ba907dfd9329f9164db3176a9d7a4
1 /*
2 * SMP support for PowerNV machines.
4 * Copyright 2011 IBM Corp.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/smp.h>
16 #include <linux/interrupt.h>
17 #include <linux/delay.h>
18 #include <linux/init.h>
19 #include <linux/spinlock.h>
20 #include <linux/cpu.h>
22 #include <asm/irq.h>
23 #include <asm/smp.h>
24 #include <asm/paca.h>
25 #include <asm/machdep.h>
26 #include <asm/cputable.h>
27 #include <asm/firmware.h>
28 #include <asm/rtas.h>
29 #include <asm/vdso_datapage.h>
30 #include <asm/cputhreads.h>
31 #include <asm/xics.h>
32 #include <asm/opal.h>
34 #include "powernv.h"
36 #ifdef DEBUG
37 #include <asm/udbg.h>
38 #define DBG(fmt...) udbg_printf(fmt)
39 #else
40 #define DBG(fmt...)
41 #endif
43 static void __cpuinit pnv_smp_setup_cpu(int cpu)
45 if (cpu != boot_cpuid)
46 xics_setup_cpu();
49 static int pnv_smp_cpu_bootable(unsigned int nr)
51 /* Special case - we inhibit secondary thread startup
52 * during boot if the user requests it.
54 if (system_state < SYSTEM_RUNNING && cpu_has_feature(CPU_FTR_SMT)) {
55 if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
56 return 0;
57 if (smt_enabled_at_boot
58 && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
59 return 0;
62 return 1;
65 int __devinit pnv_smp_kick_cpu(int nr)
67 unsigned int pcpu = get_hard_smp_processor_id(nr);
68 unsigned long start_here = __pa(*((unsigned long *)
69 generic_secondary_smp_init));
70 long rc;
72 BUG_ON(nr < 0 || nr >= NR_CPUS);
74 /* On OPAL v2 the CPU are still spinning inside OPAL itself,
75 * get them back now
77 if (!paca[nr].cpu_start && firmware_has_feature(FW_FEATURE_OPALv2)) {
78 pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu);
79 rc = opal_start_cpu(pcpu, start_here);
80 if (rc != OPAL_SUCCESS)
81 pr_warn("OPAL Error %ld starting CPU %d\n",
82 rc, nr);
84 return smp_generic_kick_cpu(nr);
87 #ifdef CONFIG_HOTPLUG_CPU
89 static int pnv_smp_cpu_disable(void)
91 int cpu = smp_processor_id();
93 /* This is identical to pSeries... might consolidate by
94 * moving migrate_irqs_away to a ppc_md with default to
95 * the generic fixup_irqs. --BenH.
97 set_cpu_online(cpu, false);
98 vdso_data->processorCount--;
99 if (cpu == boot_cpuid)
100 boot_cpuid = cpumask_any(cpu_online_mask);
101 xics_migrate_irqs_away();
102 return 0;
105 static void pnv_smp_cpu_kill_self(void)
107 unsigned int cpu;
109 /* If powersave_nap is enabled, use NAP mode, else just
110 * spin aimlessly
112 if (!powersave_nap) {
113 generic_mach_cpu_die();
114 return;
117 /* Standard hot unplug procedure */
118 local_irq_disable();
119 idle_task_exit();
120 current->active_mm = NULL; /* for sanity */
121 cpu = smp_processor_id();
122 DBG("CPU%d offline\n", cpu);
123 generic_set_cpu_dead(cpu);
124 smp_wmb();
126 /* We don't want to take decrementer interrupts while we are offline,
127 * so clear LPCR:PECE1. We keep PECE2 enabled.
129 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
130 while (!generic_check_cpu_restart(cpu)) {
131 power7_idle();
132 if (!generic_check_cpu_restart(cpu)) {
133 DBG("CPU%d Unexpected exit while offline !\n", cpu);
134 /* We may be getting an IPI, so we re-enable
135 * interrupts to process it, it will be ignored
136 * since we aren't online (hopefully)
138 local_irq_enable();
139 local_irq_disable();
142 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
143 DBG("CPU%d coming online...\n", cpu);
146 #endif /* CONFIG_HOTPLUG_CPU */
148 static struct smp_ops_t pnv_smp_ops = {
149 .message_pass = smp_muxed_ipi_message_pass,
150 .cause_ipi = NULL, /* Filled at runtime by xics_smp_probe() */
151 .probe = xics_smp_probe,
152 .kick_cpu = pnv_smp_kick_cpu,
153 .setup_cpu = pnv_smp_setup_cpu,
154 .cpu_bootable = pnv_smp_cpu_bootable,
155 #ifdef CONFIG_HOTPLUG_CPU
156 .cpu_disable = pnv_smp_cpu_disable,
157 .cpu_die = generic_cpu_die,
158 #endif /* CONFIG_HOTPLUG_CPU */
161 /* This is called very early during platform setup_arch */
162 void __init pnv_smp_init(void)
164 smp_ops = &pnv_smp_ops;
166 /* XXX We don't yet have a proper entry point from HAL, for
167 * now we rely on kexec-style entry from BML
170 #ifdef CONFIG_PPC_RTAS
171 /* Non-lpar has additional take/give timebase */
172 if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
173 smp_ops->give_timebase = rtas_give_timebase;
174 smp_ops->take_timebase = rtas_take_timebase;
176 #endif /* CONFIG_PPC_RTAS */
178 #ifdef CONFIG_HOTPLUG_CPU
179 ppc_md.cpu_die = pnv_smp_cpu_kill_self;
180 #endif