arch/powerpc/platforms/85xx/mpc85xx_rdb.c

   1 /*
   2  * MPC85xx RDB Board Setup
   3  *
   4  * Copyright 2009,2012 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 #include <linux/stddef.h>
  13 #include <linux/kernel.h>
  14 #include <linux/pci.h>
  15 #include <linux/kdev_t.h>
  16 #include <linux/delay.h>
  17 #include <linux/seq_file.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/of_platform.h>
  20
  21 #include <asm/time.h>
  22 #include <asm/machdep.h>
  23 #include <asm/pci-bridge.h>
  24 #include <mm/mmu_decl.h>
  25 #include <asm/prom.h>
  26 #include <asm/udbg.h>
  27 #include <asm/mpic.h>
  28 #include <asm/qe.h>
  29 #include <asm/qe_ic.h>
  30 #include <asm/fsl_guts.h>
  31
  32 #include <sysdev/fsl_soc.h>
  33 #include <sysdev/fsl_pci.h>
  34 #include "smp.h"
  35
  36 #include "mpc85xx.h"
  37
  38 #undef DEBUG
  39
  40 #ifdef DEBUG
  41 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  42 #else
  43 #define DBG(fmt, args...)
  44 #endif
  45
  46
  47 void __init mpc85xx_rdb_pic_init(void)
  48 {
  49         struct mpic *mpic;
  50         unsigned long root = of_get_flat_dt_root();
  51
  52 #ifdef CONFIG_QUICC_ENGINE
  53         struct device_node *np;
  54 #endif
  55
  56         if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
  57                 mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
  58                         MPIC_BIG_ENDIAN |
  59                         MPIC_SINGLE_DEST_CPU,
  60                         0, 256, " OpenPIC  ");
  61         } else {
  62                 mpic = mpic_alloc(NULL, 0,
  63                   MPIC_BIG_ENDIAN |
  64                   MPIC_SINGLE_DEST_CPU,
  65                   0, 256, " OpenPIC  ");
  66         }
  67
  68         BUG_ON(mpic == NULL);
  69         mpic_init(mpic);
  70
  71 #ifdef CONFIG_QUICC_ENGINE
  72         np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
  73         if (np) {
  74                 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
  75                                 qe_ic_cascade_high_mpic);
  76                 of_node_put(np);
  77
  78         } else
  79                 pr_err("%s: Could not find qe-ic node\n", __func__);
  80 #endif
  81
  82 }
  83
  84 /*
  85  * Setup the architecture
  86  */
  87 static void __init mpc85xx_rdb_setup_arch(void)
  88 {
  89 #if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
  90         struct device_node *np;
  91 #endif
  92
  93         if (ppc_md.progress)
  94                 ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
  95
  96 #ifdef CONFIG_PCI
  97         for_each_node_by_type(np, "pci") {
  98                 if (of_device_is_compatible(np, "fsl,mpc8548-pcie"))
  99                         fsl_add_bridge(np, 0);
 100         }
 101
 102 #endif
 103
 104         mpc85xx_smp_init();
 105
 106 #ifdef CONFIG_QUICC_ENGINE
 107         np = of_find_compatible_node(NULL, NULL, "fsl,qe");
 108         if (!np) {
 109                 pr_err("%s: Could not find Quicc Engine node\n", __func__);
 110                 goto qe_fail;
 111         }
 112
 113         qe_reset();
 114         of_node_put(np);
 115
 116         np = of_find_node_by_name(NULL, "par_io");
 117         if (np) {
 118                 struct device_node *ucc;
 119
 120                 par_io_init(np);
 121                 of_node_put(np);
 122
 123                 for_each_node_by_name(ucc, "ucc")
 124                         par_io_of_config(ucc);
 125
 126         }
 127 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
 128         if (machine_is(p1025_rdb)) {
 129
 130                 struct ccsr_guts_85xx __iomem *guts;
 131
 132                 np = of_find_node_by_name(NULL, "global-utilities");
 133                 if (np) {
 134                         guts = of_iomap(np, 0);
 135                         if (!guts) {
 136
 137                                 pr_err("mpc85xx-rdb: could not map global utilities register\n");
 138
 139                         } else {
 140                         /* P1025 has pins muxed for QE and other functions. To
 141                         * enable QE UEC mode, we need to set bit QE0 for UCC1
 142                         * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
 143                         * and QE12 for QE MII management singals in PMUXCR
 144                         * register.
 145                         */
 146                                 setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
 147                                                 MPC85xx_PMUXCR_QE(3) |
 148                                                 MPC85xx_PMUXCR_QE(9) |
 149                                                 MPC85xx_PMUXCR_QE(12));
 150                                 iounmap(guts);
 151                         }
 152                         of_node_put(np);
 153                 }
 154
 155         }
 156 #endif
 157
 158 qe_fail:
 159 #endif  /* CONFIG_QUICC_ENGINE */
 160
 161         printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
 162 }
 163
 164 machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
 165 machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
 166 machine_device_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
 167 machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
 168 machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
 169 machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
 170 machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
 171 machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
 172
 173 /*
 174  * Called very early, device-tree isn't unflattened
 175  */
 176 static int __init p2020_rdb_probe(void)
 177 {
 178         unsigned long root = of_get_flat_dt_root();
 179
 180         if (of_flat_dt_is_compatible(root, "fsl,P2020RDB"))
 181                 return 1;
 182         return 0;
 183 }
 184
 185 static int __init p1020_rdb_probe(void)
 186 {
 187         unsigned long root = of_get_flat_dt_root();
 188
 189         if (of_flat_dt_is_compatible(root, "fsl,P1020RDB"))
 190                 return 1;
 191         return 0;
 192 }
 193
 194 static int __init p1020_rdb_pc_probe(void)
 195 {
 196         unsigned long root = of_get_flat_dt_root();
 197
 198         return of_flat_dt_is_compatible(root, "fsl,P1020RDB-PC");
 199 }
 200
 201 static int __init p1021_rdb_pc_probe(void)
 202 {
 203         unsigned long root = of_get_flat_dt_root();
 204
 205         if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
 206                 return 1;
 207         return 0;
 208 }
 209
 210 static int __init p2020_rdb_pc_probe(void)
 211 {
 212         unsigned long root = of_get_flat_dt_root();
 213
 214         if (of_flat_dt_is_compatible(root, "fsl,P2020RDB-PC"))
 215                 return 1;
 216         return 0;
 217 }
 218
 219 static int __init p1025_rdb_probe(void)
 220 {
 221         unsigned long root = of_get_flat_dt_root();
 222
 223         return of_flat_dt_is_compatible(root, "fsl,P1025RDB");
 224 }
 225
 226 static int __init p1020_mbg_pc_probe(void)
 227 {
 228         unsigned long root = of_get_flat_dt_root();
 229
 230         return of_flat_dt_is_compatible(root, "fsl,P1020MBG-PC");
 231 }
 232
 233 static int __init p1020_utm_pc_probe(void)
 234 {
 235         unsigned long root = of_get_flat_dt_root();
 236
 237         return of_flat_dt_is_compatible(root, "fsl,P1020UTM-PC");
 238 }
 239
 240 define_machine(p2020_rdb) {
 241         .name                   = "P2020 RDB",
 242         .probe                  = p2020_rdb_probe,
 243         .setup_arch             = mpc85xx_rdb_setup_arch,
 244         .init_IRQ               = mpc85xx_rdb_pic_init,
 245 #ifdef CONFIG_PCI
 246         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 247 #endif
 248         .get_irq                = mpic_get_irq,
 249         .restart                = fsl_rstcr_restart,
 250         .calibrate_decr         = generic_calibrate_decr,
 251         .progress               = udbg_progress,
 252 };
 253
 254 define_machine(p1020_rdb) {
 255         .name                   = "P1020 RDB",
 256         .probe                  = p1020_rdb_probe,
 257         .setup_arch             = mpc85xx_rdb_setup_arch,
 258         .init_IRQ               = mpc85xx_rdb_pic_init,
 259 #ifdef CONFIG_PCI
 260         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 261 #endif
 262         .get_irq                = mpic_get_irq,
 263         .restart                = fsl_rstcr_restart,
 264         .calibrate_decr         = generic_calibrate_decr,
 265         .progress               = udbg_progress,
 266 };
 267
 268 define_machine(p1021_rdb_pc) {
 269         .name                   = "P1021 RDB-PC",
 270         .probe                  = p1021_rdb_pc_probe,
 271         .setup_arch             = mpc85xx_rdb_setup_arch,
 272         .init_IRQ               = mpc85xx_rdb_pic_init,
 273 #ifdef CONFIG_PCI
 274         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 275 #endif
 276         .get_irq                = mpic_get_irq,
 277         .restart                = fsl_rstcr_restart,
 278         .calibrate_decr         = generic_calibrate_decr,
 279         .progress               = udbg_progress,
 280 };
 281
 282 define_machine(p2020_rdb_pc) {
 283         .name                   = "P2020RDB-PC",
 284         .probe                  = p2020_rdb_pc_probe,
 285         .setup_arch             = mpc85xx_rdb_setup_arch,
 286         .init_IRQ               = mpc85xx_rdb_pic_init,
 287 #ifdef CONFIG_PCI
 288         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 289 #endif
 290         .get_irq                = mpic_get_irq,
 291         .restart                = fsl_rstcr_restart,
 292         .calibrate_decr         = generic_calibrate_decr,
 293         .progress               = udbg_progress,
 294 };
 295
 296 define_machine(p1025_rdb) {
 297         .name                   = "P1025 RDB",
 298         .probe                  = p1025_rdb_probe,
 299         .setup_arch             = mpc85xx_rdb_setup_arch,
 300         .init_IRQ               = mpc85xx_rdb_pic_init,
 301 #ifdef CONFIG_PCI
 302         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 303 #endif
 304         .get_irq                = mpic_get_irq,
 305         .restart                = fsl_rstcr_restart,
 306         .calibrate_decr         = generic_calibrate_decr,
 307         .progress               = udbg_progress,
 308 };
 309
 310 define_machine(p1020_mbg_pc) {
 311         .name                   = "P1020 MBG-PC",
 312         .probe                  = p1020_mbg_pc_probe,
 313         .setup_arch             = mpc85xx_rdb_setup_arch,
 314         .init_IRQ               = mpc85xx_rdb_pic_init,
 315 #ifdef CONFIG_PCI
 316         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 317 #endif
 318         .get_irq                = mpic_get_irq,
 319         .restart                = fsl_rstcr_restart,
 320         .calibrate_decr         = generic_calibrate_decr,
 321         .progress               = udbg_progress,
 322 };
 323
 324 define_machine(p1020_utm_pc) {
 325         .name                   = "P1020 UTM-PC",
 326         .probe                  = p1020_utm_pc_probe,
 327         .setup_arch             = mpc85xx_rdb_setup_arch,
 328         .init_IRQ               = mpc85xx_rdb_pic_init,
 329 #ifdef CONFIG_PCI
 330         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 331 #endif
 332         .get_irq                = mpic_get_irq,
 333         .restart                = fsl_rstcr_restart,
 334         .calibrate_decr         = generic_calibrate_decr,
 335         .progress               = udbg_progress,
 336 };
 337
 338 define_machine(p1020_rdb_pc) {
 339         .name                   = "P1020RDB-PC",
 340         .probe                  = p1020_rdb_pc_probe,
 341         .setup_arch             = mpc85xx_rdb_setup_arch,
 342         .init_IRQ               = mpc85xx_rdb_pic_init,
 343 #ifdef CONFIG_PCI
 344         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 345 #endif
 346         .get_irq                = mpic_get_irq,
 347         .restart                = fsl_rstcr_restart,
 348         .calibrate_decr         = generic_calibrate_decr,
 349         .progress               = udbg_progress,
 350 };