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p54: return NETDEV_TX_OK in p54_tx and fix sparse warnings
[linux-2.6.git] / drivers / net / wireless / p54 / p54common.c
blobe463c7c3a7e00b1f55bb58942524cbd895f6741e
1 /*
2 * Common code for mac80211 Prism54 drivers
3 *
4 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
5 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
7 *
8 * Based on:
9 * - the islsm (softmac prism54) driver, which is:
10 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
11 * - stlc45xx driver
12 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19 #include <linux/init.h>
20 #include <linux/firmware.h>
21 #include <linux/etherdevice.h>
22
23 #include <net/mac80211.h>
24
25 #include "p54.h"
26 #include "p54common.h"
27
28 static int modparam_nohwcrypt;
29 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
30 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
31 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
32 MODULE_DESCRIPTION("Softmac Prism54 common code");
33 MODULE_LICENSE("GPL");
34 MODULE_ALIAS("prism54common");
35
36 static struct ieee80211_rate p54_bgrates[] = {
37 { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
38 { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
39 { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
40 { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
41 { .bitrate = 60, .hw_value = 4, },
42 { .bitrate = 90, .hw_value = 5, },
43 { .bitrate = 120, .hw_value = 6, },
44 { .bitrate = 180, .hw_value = 7, },
45 { .bitrate = 240, .hw_value = 8, },
46 { .bitrate = 360, .hw_value = 9, },
47 { .bitrate = 480, .hw_value = 10, },
48 { .bitrate = 540, .hw_value = 11, },
49 };
50
51 static struct ieee80211_channel p54_bgchannels[] = {
52 { .center_freq = 2412, .hw_value = 1, },
53 { .center_freq = 2417, .hw_value = 2, },
54 { .center_freq = 2422, .hw_value = 3, },
55 { .center_freq = 2427, .hw_value = 4, },
56 { .center_freq = 2432, .hw_value = 5, },
57 { .center_freq = 2437, .hw_value = 6, },
58 { .center_freq = 2442, .hw_value = 7, },
59 { .center_freq = 2447, .hw_value = 8, },
60 { .center_freq = 2452, .hw_value = 9, },
61 { .center_freq = 2457, .hw_value = 10, },
62 { .center_freq = 2462, .hw_value = 11, },
63 { .center_freq = 2467, .hw_value = 12, },
64 { .center_freq = 2472, .hw_value = 13, },
65 { .center_freq = 2484, .hw_value = 14, },
66 };
67
68 static struct ieee80211_supported_band band_2GHz = {
69 .channels = p54_bgchannels,
70 .n_channels = ARRAY_SIZE(p54_bgchannels),
71 .bitrates = p54_bgrates,
72 .n_bitrates = ARRAY_SIZE(p54_bgrates),
73 };
74
75 static struct ieee80211_rate p54_arates[] = {
76 { .bitrate = 60, .hw_value = 4, },
77 { .bitrate = 90, .hw_value = 5, },
78 { .bitrate = 120, .hw_value = 6, },
79 { .bitrate = 180, .hw_value = 7, },
80 { .bitrate = 240, .hw_value = 8, },
81 { .bitrate = 360, .hw_value = 9, },
82 { .bitrate = 480, .hw_value = 10, },
83 { .bitrate = 540, .hw_value = 11, },
84 };
85
86 static struct ieee80211_channel p54_achannels[] = {
87 { .center_freq = 4920 },
88 { .center_freq = 4940 },
89 { .center_freq = 4960 },
90 { .center_freq = 4980 },
91 { .center_freq = 5040 },
92 { .center_freq = 5060 },
93 { .center_freq = 5080 },
94 { .center_freq = 5170 },
95 { .center_freq = 5180 },
96 { .center_freq = 5190 },
97 { .center_freq = 5200 },
98 { .center_freq = 5210 },
99 { .center_freq = 5220 },
100 { .center_freq = 5230 },
101 { .center_freq = 5240 },
102 { .center_freq = 5260 },
103 { .center_freq = 5280 },
104 { .center_freq = 5300 },
105 { .center_freq = 5320 },
106 { .center_freq = 5500 },
107 { .center_freq = 5520 },
108 { .center_freq = 5540 },
109 { .center_freq = 5560 },
110 { .center_freq = 5580 },
111 { .center_freq = 5600 },
112 { .center_freq = 5620 },
113 { .center_freq = 5640 },
114 { .center_freq = 5660 },
115 { .center_freq = 5680 },
116 { .center_freq = 5700 },
117 { .center_freq = 5745 },
118 { .center_freq = 5765 },
119 { .center_freq = 5785 },
120 { .center_freq = 5805 },
121 { .center_freq = 5825 },
122 };
123
124 static struct ieee80211_supported_band band_5GHz = {
125 .channels = p54_achannels,
126 .n_channels = ARRAY_SIZE(p54_achannels),
127 .bitrates = p54_arates,
128 .n_bitrates = ARRAY_SIZE(p54_arates),
129 };
130
131 int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
132 {
133 struct p54_common *priv = dev->priv;
134 struct bootrec_exp_if *exp_if;
135 struct bootrec *bootrec;
136 u32 *data = (u32 *)fw->data;
137 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
138 u8 *fw_version = NULL;
139 size_t len;
140 int i;
141 int maxlen;
142
143 if (priv->rx_start)
144 return 0;
145
146 while (data < end_data && *data)
147 data++;
148
149 while (data < end_data && !*data)
150 data++;
151
152 bootrec = (struct bootrec *) data;
153
154 while (bootrec->data <= end_data &&
155 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
156 u32 code = le32_to_cpu(bootrec->code);
157 switch (code) {
158 case BR_CODE_COMPONENT_ID:
159 priv->fw_interface = be32_to_cpup((__be32 *)
160 bootrec->data);
161 switch (priv->fw_interface) {
162 case FW_LM86:
163 case FW_LM20:
164 case FW_LM87: {
165 char *iftype = (char *)bootrec->data;
166 printk(KERN_INFO "%s: p54 detected a LM%c%c "
167 "firmware\n",
168 wiphy_name(dev->wiphy),
169 iftype[2], iftype[3]);
170 break;
171 }
172 case FW_FMAC:
173 default:
174 printk(KERN_ERR "%s: unsupported firmware\n",
175 wiphy_name(dev->wiphy));
176 return -ENODEV;
177 }
178 break;
179 case BR_CODE_COMPONENT_VERSION:
180 /* 24 bytes should be enough for all firmwares */
181 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
182 fw_version = (unsigned char*)bootrec->data;
183 break;
184 case BR_CODE_DESCR: {
185 struct bootrec_desc *desc =
186 (struct bootrec_desc *)bootrec->data;
187 priv->rx_start = le32_to_cpu(desc->rx_start);
188 /* FIXME add sanity checking */
189 priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
190 priv->headroom = desc->headroom;
191 priv->tailroom = desc->tailroom;
192 priv->privacy_caps = desc->privacy_caps;
193 priv->rx_keycache_size = desc->rx_keycache_size;
194 if (le32_to_cpu(bootrec->len) == 11)
195 priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
196 else
197 priv->rx_mtu = (size_t)
198 0x620 - priv->tx_hdr_len;
199 maxlen = priv->tx_hdr_len + /* USB devices */
200 sizeof(struct p54_rx_data) +
201 4 + /* rx alignment */
202 IEEE80211_MAX_FRAG_THRESHOLD;
203 if (priv->rx_mtu > maxlen && PAGE_SIZE == 4096) {
204 printk(KERN_INFO "p54: rx_mtu reduced from %d "
205 "to %d\n", priv->rx_mtu,
206 maxlen);
207 priv->rx_mtu = maxlen;
208 }
209 break;
210 }
211 case BR_CODE_EXPOSED_IF:
212 exp_if = (struct bootrec_exp_if *) bootrec->data;
213 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
214 if (exp_if[i].if_id == cpu_to_le16(0x1a))
215 priv->fw_var = le16_to_cpu(exp_if[i].variant);
216 break;
217 case BR_CODE_DEPENDENT_IF:
218 break;
219 case BR_CODE_END_OF_BRA:
220 case LEGACY_BR_CODE_END_OF_BRA:
221 end_data = NULL;
222 break;
223 default:
224 break;
225 }
226 bootrec = (struct bootrec *)&bootrec->data[len];
227 }
228
229 if (fw_version)
230 printk(KERN_INFO "%s: FW rev %s - Softmac protocol %x.%x\n",
231 wiphy_name(dev->wiphy), fw_version,
232 priv->fw_var >> 8, priv->fw_var & 0xff);
233
234 if (priv->fw_var < 0x500)
235 printk(KERN_INFO "%s: you are using an obsolete firmware. "
236 "visit http://wireless.kernel.org/en/users/Drivers/p54 "
237 "and grab one for \"kernel >= 2.6.28\"!\n",
238 wiphy_name(dev->wiphy));
239
240 if (priv->fw_var >= 0x300) {
241 /* Firmware supports QoS, use it! */
242 priv->tx_stats[P54_QUEUE_AC_VO].limit = 3;
243 priv->tx_stats[P54_QUEUE_AC_VI].limit = 4;
244 priv->tx_stats[P54_QUEUE_AC_BE].limit = 3;
245 priv->tx_stats[P54_QUEUE_AC_BK].limit = 2;
246 dev->queues = P54_QUEUE_AC_NUM;
247 }
248
249 if (!modparam_nohwcrypt)
250 printk(KERN_INFO "%s: cryptographic accelerator "
251 "WEP:%s, TKIP:%s, CCMP:%s\n",
252 wiphy_name(dev->wiphy),
253 (priv->privacy_caps & BR_DESC_PRIV_CAP_WEP) ? "YES" :
254 "no", (priv->privacy_caps & (BR_DESC_PRIV_CAP_TKIP |
255 BR_DESC_PRIV_CAP_MICHAEL)) ? "YES" : "no",
256 (priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP) ?
257 "YES" : "no");
258
259 return 0;
260 }
261 EXPORT_SYMBOL_GPL(p54_parse_firmware);
262
263 static int p54_convert_rev0(struct ieee80211_hw *dev,
264 struct pda_pa_curve_data *curve_data)
265 {
266 struct p54_common *priv = dev->priv;
267 struct p54_pa_curve_data_sample *dst;
268 struct pda_pa_curve_data_sample_rev0 *src;
269 size_t cd_len = sizeof(*curve_data) +
270 (curve_data->points_per_channel*sizeof(*dst) + 2) *
271 curve_data->channels;
272 unsigned int i, j;
273 void *source, *target;
274
275 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
276 if (!priv->curve_data)
277 return -ENOMEM;
278
279 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
280 source = curve_data->data;
281 target = priv->curve_data->data;
282 for (i = 0; i < curve_data->channels; i++) {
283 __le16 *freq = source;
284 source += sizeof(__le16);
285 *((__le16 *)target) = *freq;
286 target += sizeof(__le16);
287 for (j = 0; j < curve_data->points_per_channel; j++) {
288 dst = target;
289 src = source;
290
291 dst->rf_power = src->rf_power;
292 dst->pa_detector = src->pa_detector;
293 dst->data_64qam = src->pcv;
294 /* "invent" the points for the other modulations */
295 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
296 dst->data_16qam = SUB(src->pcv, 12);
297 dst->data_qpsk = SUB(dst->data_16qam, 12);
298 dst->data_bpsk = SUB(dst->data_qpsk, 12);
299 dst->data_barker = SUB(dst->data_bpsk, 14);
300 #undef SUB
301 target += sizeof(*dst);
302 source += sizeof(*src);
303 }
304 }
305
306 return 0;
307 }
308
309 static int p54_convert_rev1(struct ieee80211_hw *dev,
310 struct pda_pa_curve_data *curve_data)
311 {
312 struct p54_common *priv = dev->priv;
313 struct p54_pa_curve_data_sample *dst;
314 struct pda_pa_curve_data_sample_rev1 *src;
315 size_t cd_len = sizeof(*curve_data) +
316 (curve_data->points_per_channel*sizeof(*dst) + 2) *
317 curve_data->channels;
318 unsigned int i, j;
319 void *source, *target;
320
321 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
322 if (!priv->curve_data)
323 return -ENOMEM;
324
325 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
326 source = curve_data->data;
327 target = priv->curve_data->data;
328 for (i = 0; i < curve_data->channels; i++) {
329 __le16 *freq = source;
330 source += sizeof(__le16);
331 *((__le16 *)target) = *freq;
332 target += sizeof(__le16);
333 for (j = 0; j < curve_data->points_per_channel; j++) {
334 memcpy(target, source, sizeof(*src));
335
336 target += sizeof(*dst);
337 source += sizeof(*src);
338 }
339 source++;
340 }
341
342 return 0;
343 }
344
345 static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
346 "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
347 static int p54_init_xbow_synth(struct ieee80211_hw *dev);
348
349 static void p54_parse_rssical(struct ieee80211_hw *dev, void *data, int len,
350 u16 type)
351 {
352 struct p54_common *priv = dev->priv;
353 int offset = (type == PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED) ? 2 : 0;
354 int entry_size = sizeof(struct pda_rssi_cal_entry) + offset;
355 int num_entries = (type == PDR_RSSI_LINEAR_APPROXIMATION) ? 1 : 2;
356 int i;
357
358 if (len != (entry_size * num_entries)) {
359 printk(KERN_ERR "%s: unknown rssi calibration data packing "
360 " type:(%x) len:%d.\n",
361 wiphy_name(dev->wiphy), type, len);
362
363 print_hex_dump_bytes("rssical:", DUMP_PREFIX_NONE,
364 data, len);
365
366 printk(KERN_ERR "%s: please report this issue.\n",
367 wiphy_name(dev->wiphy));
368 return;
369 }
370
371 for (i = 0; i < num_entries; i++) {
372 struct pda_rssi_cal_entry *cal = data +
373 (offset + i * entry_size);
374 priv->rssical_db[i].mul = (s16) le16_to_cpu(cal->mul);
375 priv->rssical_db[i].add = (s16) le16_to_cpu(cal->add);
376 }
377 }
378
379 static void p54_parse_default_country(struct ieee80211_hw *dev,
380 void *data, int len)
381 {
382 struct pda_country *country;
383
384 if (len != sizeof(*country)) {
385 printk(KERN_ERR "%s: found possible invalid default country "
386 "eeprom entry. (entry size: %d)\n",
387 wiphy_name(dev->wiphy), len);
388
389 print_hex_dump_bytes("country:", DUMP_PREFIX_NONE,
390 data, len);
391
392 printk(KERN_ERR "%s: please report this issue.\n",
393 wiphy_name(dev->wiphy));
394 return;
395 }
396
397 country = (struct pda_country *) data;
398 if (country->flags == PDR_COUNTRY_CERT_CODE_PSEUDO)
399 regulatory_hint(dev->wiphy, country->alpha2);
400 else {
401 /* TODO:
402 * write a shared/common function that converts
403 * "Regulatory domain codes" (802.11-2007 14.8.2.2)
404 * into ISO/IEC 3166-1 alpha2 for regulatory_hint.
405 */
406 }
407 }
408
409 static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
410 {
411 struct p54_common *priv = dev->priv;
412 struct eeprom_pda_wrap *wrap = NULL;
413 struct pda_entry *entry;
414 unsigned int data_len, entry_len;
415 void *tmp;
416 int err;
417 u8 *end = (u8 *)eeprom + len;
418 u16 synth = 0;
419
420 wrap = (struct eeprom_pda_wrap *) eeprom;
421 entry = (void *)wrap->data + le16_to_cpu(wrap->len);
422
423 /* verify that at least the entry length/code fits */
424 while ((u8 *)entry <= end - sizeof(*entry)) {
425 entry_len = le16_to_cpu(entry->len);
426 data_len = ((entry_len - 1) << 1);
427
428 /* abort if entry exceeds whole structure */
429 if ((u8 *)entry + sizeof(*entry) + data_len > end)
430 break;
431
432 switch (le16_to_cpu(entry->code)) {
433 case PDR_MAC_ADDRESS:
434 SET_IEEE80211_PERM_ADDR(dev, entry->data);
435 break;
436 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
437 if (data_len < 2) {
438 err = -EINVAL;
439 goto err;
440 }
441
442 if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
443 err = -EINVAL;
444 goto err;
445 }
446
447 priv->output_limit = kmalloc(entry->data[1] *
448 sizeof(*priv->output_limit), GFP_KERNEL);
449
450 if (!priv->output_limit) {
451 err = -ENOMEM;
452 goto err;
453 }
454
455 memcpy(priv->output_limit, &entry->data[2],
456 entry->data[1]*sizeof(*priv->output_limit));
457 priv->output_limit_len = entry->data[1];
458 break;
459 case PDR_PRISM_PA_CAL_CURVE_DATA: {
460 struct pda_pa_curve_data *curve_data =
461 (struct pda_pa_curve_data *)entry->data;
462 if (data_len < sizeof(*curve_data)) {
463 err = -EINVAL;
464 goto err;
465 }
466
467 switch (curve_data->cal_method_rev) {
468 case 0:
469 err = p54_convert_rev0(dev, curve_data);
470 break;
471 case 1:
472 err = p54_convert_rev1(dev, curve_data);
473 break;
474 default:
475 printk(KERN_ERR "%s: unknown curve data "
476 "revision %d\n",
477 wiphy_name(dev->wiphy),
478 curve_data->cal_method_rev);
479 err = -ENODEV;
480 break;
481 }
482 if (err)
483 goto err;
484 }
485 break;
486 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
487 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
488 if (!priv->iq_autocal) {
489 err = -ENOMEM;
490 goto err;
491 }
492
493 memcpy(priv->iq_autocal, entry->data, data_len);
494 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
495 break;
496 case PDR_DEFAULT_COUNTRY:
497 p54_parse_default_country(dev, entry->data, data_len);
498 break;
499 case PDR_INTERFACE_LIST:
500 tmp = entry->data;
501 while ((u8 *)tmp < entry->data + data_len) {
502 struct bootrec_exp_if *exp_if = tmp;
503 if (le16_to_cpu(exp_if->if_id) == 0xf)
504 synth = le16_to_cpu(exp_if->variant);
505 tmp += sizeof(struct bootrec_exp_if);
506 }
507 break;
508 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
509 priv->version = *(u8 *)(entry->data + 1);
510 break;
511 case PDR_RSSI_LINEAR_APPROXIMATION:
512 case PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND:
513 case PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED:
514 p54_parse_rssical(dev, entry->data, data_len,
515 le16_to_cpu(entry->code));
516 break;
517 case PDR_END:
518 /* make it overrun */
519 entry_len = len;
520 break;
521 case PDR_MANUFACTURING_PART_NUMBER:
522 case PDR_PDA_VERSION:
523 case PDR_NIC_SERIAL_NUMBER:
524 case PDR_REGULATORY_DOMAIN_LIST:
525 case PDR_TEMPERATURE_TYPE:
526 case PDR_PRISM_PCI_IDENTIFIER:
527 case PDR_COUNTRY_INFORMATION:
528 case PDR_OEM_NAME:
529 case PDR_PRODUCT_NAME:
530 case PDR_UTF8_OEM_NAME:
531 case PDR_UTF8_PRODUCT_NAME:
532 case PDR_COUNTRY_LIST:
533 case PDR_ANTENNA_GAIN:
534 case PDR_PRISM_INDIGO_PA_CALIBRATION_DATA:
535 case PDR_REGULATORY_POWER_LIMITS:
536 case PDR_RADIATED_TRANSMISSION_CORRECTION:
537 case PDR_PRISM_TX_IQ_CALIBRATION:
538 case PDR_BASEBAND_REGISTERS:
539 case PDR_PER_CHANNEL_BASEBAND_REGISTERS:
540 break;
541 default:
542 printk(KERN_INFO "%s: unknown eeprom code : 0x%x\n",
543 wiphy_name(dev->wiphy),
544 le16_to_cpu(entry->code));
545 break;
546 }
547
548 entry = (void *)entry + (entry_len + 1)*2;
549 }
550
551 if (!synth || !priv->iq_autocal || !priv->output_limit ||
552 !priv->curve_data) {
553 printk(KERN_ERR "%s: not all required entries found in eeprom!\n",
554 wiphy_name(dev->wiphy));
555 err = -EINVAL;
556 goto err;
557 }
558
559 priv->rxhw = synth & PDR_SYNTH_FRONTEND_MASK;
560 if (priv->rxhw == 4)
561 p54_init_xbow_synth(dev);
562 if (!(synth & PDR_SYNTH_24_GHZ_DISABLED))
563 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
564 if (!(synth & PDR_SYNTH_5_GHZ_DISABLED))
565 dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
566 if ((synth & PDR_SYNTH_RX_DIV_MASK) == PDR_SYNTH_RX_DIV_SUPPORTED)
567 priv->rx_diversity_mask = 3;
568 if ((synth & PDR_SYNTH_TX_DIV_MASK) == PDR_SYNTH_TX_DIV_SUPPORTED)
569 priv->tx_diversity_mask = 3;
570
571 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
572 u8 perm_addr[ETH_ALEN];
573
574 printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
575 wiphy_name(dev->wiphy));
576 random_ether_addr(perm_addr);
577 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
578 }
579
580 printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
581 wiphy_name(dev->wiphy),
582 dev->wiphy->perm_addr,
583 priv->version, p54_rf_chips[priv->rxhw]);
584
585 return 0;
586
587 err:
588 if (priv->iq_autocal) {
589 kfree(priv->iq_autocal);
590 priv->iq_autocal = NULL;
591 }
592
593 if (priv->output_limit) {
594 kfree(priv->output_limit);
595 priv->output_limit = NULL;
596 }
597
598 if (priv->curve_data) {
599 kfree(priv->curve_data);
600 priv->curve_data = NULL;
601 }
602
603 printk(KERN_ERR "%s: eeprom parse failed!\n",
604 wiphy_name(dev->wiphy));
605 return err;
606 }
607
608 static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
609 {
610 struct p54_common *priv = dev->priv;
611 int band = dev->conf.channel->band;
612
613 return ((rssi * priv->rssical_db[band].mul) / 64 +
614 priv->rssical_db[band].add) / 4;
615 }
616
617 static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
618 {
619 struct p54_common *priv = dev->priv;
620 struct p54_rx_data *hdr = (struct p54_rx_data *) skb->data;
621 struct ieee80211_rx_status rx_status = {0};
622 u16 freq = le16_to_cpu(hdr->freq);
623 size_t header_len = sizeof(*hdr);
624 u32 tsf32;
625 u8 rate = hdr->rate & 0xf;
626
627 /*
628 * If the device is in a unspecified state we have to
629 * ignore all data frames. Else we could end up with a
630 * nasty crash.
631 */
632 if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
633 return 0;
634
635 if (!(hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_IN_FCS_GOOD))) {
636 if (priv->filter_flags & FIF_FCSFAIL)
637 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
638 else
639 return 0;
640 }
641
642 if (hdr->decrypt_status == P54_DECRYPT_OK)
643 rx_status.flag |= RX_FLAG_DECRYPTED;
644 if ((hdr->decrypt_status == P54_DECRYPT_FAIL_MICHAEL) ||
645 (hdr->decrypt_status == P54_DECRYPT_FAIL_TKIP))
646 rx_status.flag |= RX_FLAG_MMIC_ERROR;
647
648 rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
649 rx_status.noise = priv->noise;
650 /* XX correct? */
651 rx_status.qual = (100 * hdr->rssi) / 127;
652 if (hdr->rate & 0x10)
653 rx_status.flag |= RX_FLAG_SHORTPRE;
654 if (dev->conf.channel->band == IEEE80211_BAND_5GHZ)
655 rx_status.rate_idx = (rate < 4) ? 0 : rate - 4;
656 else
657 rx_status.rate_idx = rate;
658
659 rx_status.freq = freq;
660 rx_status.band = dev->conf.channel->band;
661 rx_status.antenna = hdr->antenna;
662
663 tsf32 = le32_to_cpu(hdr->tsf32);
664 if (tsf32 < priv->tsf_low32)
665 priv->tsf_high32++;
666 rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
667 priv->tsf_low32 = tsf32;
668
669 rx_status.flag |= RX_FLAG_TSFT;
670
671 if (hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
672 header_len += hdr->align[0];
673
674 skb_pull(skb, header_len);
675 skb_trim(skb, le16_to_cpu(hdr->len));
676
677 ieee80211_rx_irqsafe(dev, skb, &rx_status);
678
679 queue_delayed_work(dev->workqueue, &priv->work,
680 msecs_to_jiffies(P54_STATISTICS_UPDATE));
681
682 return -1;
683 }
684
685 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
686 {
687 struct p54_common *priv = dev->priv;
688 int i;
689
690 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
691 return ;
692
693 for (i = 0; i < dev->queues; i++)
694 if (priv->tx_stats[i + P54_QUEUE_DATA].len <
695 priv->tx_stats[i + P54_QUEUE_DATA].limit)
696 ieee80211_wake_queue(dev, i);
697 }
698
699 void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb)
700 {
701 struct p54_common *priv = dev->priv;
702 struct ieee80211_tx_info *info;
703 struct memrecord *range;
704 unsigned long flags;
705 u32 freed = 0, last_addr = priv->rx_start;
706
707 if (unlikely(!skb || !dev || !skb_queue_len(&priv->tx_queue)))
708 return;
709
710 /*
711 * don't try to free an already unlinked skb
712 */
713 if (unlikely((!skb->next) || (!skb->prev)))
714 return;
715
716 spin_lock_irqsave(&priv->tx_queue.lock, flags);
717 info = IEEE80211_SKB_CB(skb);
718 range = (void *)info->rate_driver_data;
719 if (skb->prev != (struct sk_buff *)&priv->tx_queue) {
720 struct ieee80211_tx_info *ni;
721 struct memrecord *mr;
722
723 ni = IEEE80211_SKB_CB(skb->prev);
724 mr = (struct memrecord *)ni->rate_driver_data;
725 last_addr = mr->end_addr;
726 }
727 if (skb->next != (struct sk_buff *)&priv->tx_queue) {
728 struct ieee80211_tx_info *ni;
729 struct memrecord *mr;
730
731 ni = IEEE80211_SKB_CB(skb->next);
732 mr = (struct memrecord *)ni->rate_driver_data;
733 freed = mr->start_addr - last_addr;
734 } else
735 freed = priv->rx_end - last_addr;
736 __skb_unlink(skb, &priv->tx_queue);
737 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
738 dev_kfree_skb_any(skb);
739
740 if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
741 IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
742 p54_wake_free_queues(dev);
743 }
744 EXPORT_SYMBOL_GPL(p54_free_skb);
745
746 static struct sk_buff *p54_find_tx_entry(struct ieee80211_hw *dev,
747 __le32 req_id)
748 {
749 struct p54_common *priv = dev->priv;
750 struct sk_buff *entry = priv->tx_queue.next;
751 unsigned long flags;
752
753 spin_lock_irqsave(&priv->tx_queue.lock, flags);
754 while (entry != (struct sk_buff *)&priv->tx_queue) {
755 struct p54_hdr *hdr = (struct p54_hdr *) entry->data;
756
757 if (hdr->req_id == req_id) {
758 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
759 return entry;
760 }
761 entry = entry->next;
762 }
763 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
764 return NULL;
765 }
766
767 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
768 {
769 struct p54_common *priv = dev->priv;
770 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
771 struct p54_frame_sent *payload = (struct p54_frame_sent *) hdr->data;
772 struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
773 u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
774 struct memrecord *range = NULL;
775 u32 freed = 0;
776 u32 last_addr = priv->rx_start;
777 unsigned long flags;
778 int count, idx;
779
780 spin_lock_irqsave(&priv->tx_queue.lock, flags);
781 while (entry != (struct sk_buff *)&priv->tx_queue) {
782 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
783 struct p54_hdr *entry_hdr;
784 struct p54_tx_data *entry_data;
785 unsigned int pad = 0, frame_len;
786
787 range = (void *)info->rate_driver_data;
788 if (range->start_addr != addr) {
789 last_addr = range->end_addr;
790 entry = entry->next;
791 continue;
792 }
793
794 if (entry->next != (struct sk_buff *)&priv->tx_queue) {
795 struct ieee80211_tx_info *ni;
796 struct memrecord *mr;
797
798 ni = IEEE80211_SKB_CB(entry->next);
799 mr = (struct memrecord *)ni->rate_driver_data;
800 freed = mr->start_addr - last_addr;
801 } else
802 freed = priv->rx_end - last_addr;
803
804 last_addr = range->end_addr;
805 __skb_unlink(entry, &priv->tx_queue);
806 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
807
808 frame_len = entry->len;
809 entry_hdr = (struct p54_hdr *) entry->data;
810 entry_data = (struct p54_tx_data *) entry_hdr->data;
811 priv->tx_stats[entry_data->hw_queue].len--;
812 priv->stats.dot11ACKFailureCount += payload->tries - 1;
813
814 /*
815 * Frames in P54_QUEUE_FWSCAN and P54_QUEUE_BEACON are
816 * generated by the driver. Therefore tx_status is bogus
817 * and we don't want to confuse the mac80211 stack.
818 */
819 if (unlikely(entry_data->hw_queue < P54_QUEUE_FWSCAN)) {
820 if (entry_data->hw_queue == P54_QUEUE_BEACON)
821 priv->cached_beacon = NULL;
822
823 kfree_skb(entry);
824 goto out;
825 }
826
827 /*
828 * Clear manually, ieee80211_tx_info_clear_status would
829 * clear the counts too and we need them.
830 */
831 memset(&info->status.ampdu_ack_len, 0,
832 sizeof(struct ieee80211_tx_info) -
833 offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
834 BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
835 status.ampdu_ack_len) != 23);
836
837 if (entry_hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
838 pad = entry_data->align[0];
839
840 /* walk through the rates array and adjust the counts */
841 count = payload->tries;
842 for (idx = 0; idx < 4; idx++) {
843 if (count >= info->status.rates[idx].count) {
844 count -= info->status.rates[idx].count;
845 } else if (count > 0) {
846 info->status.rates[idx].count = count;
847 count = 0;
848 } else {
849 info->status.rates[idx].idx = -1;
850 info->status.rates[idx].count = 0;
851 }
852 }
853
854 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
855 (!payload->status))
856 info->flags |= IEEE80211_TX_STAT_ACK;
857 if (payload->status & P54_TX_PSM_CANCELLED)
858 info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
859 info->status.ack_signal = p54_rssi_to_dbm(dev,
860 (int)payload->ack_rssi);
861
862 /* Undo all changes to the frame. */
863 switch (entry_data->key_type) {
864 case P54_CRYPTO_TKIPMICHAEL: {
865 u8 *iv = (u8 *)(entry_data->align + pad +
866 entry_data->crypt_offset);
867
868 /* Restore the original TKIP IV. */
869 iv[2] = iv[0];
870 iv[0] = iv[1];
871 iv[1] = (iv[0] | 0x20) & 0x7f; /* WEPSeed - 8.3.2.2 */
872
873 frame_len -= 12; /* remove TKIP_MMIC + TKIP_ICV */
874 break;
875 }
876 case P54_CRYPTO_AESCCMP:
877 frame_len -= 8; /* remove CCMP_MIC */
878 break;
879 case P54_CRYPTO_WEP:
880 frame_len -= 4; /* remove WEP_ICV */
881 break;
882 }
883 skb_trim(entry, frame_len);
884 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
885 ieee80211_tx_status_irqsafe(dev, entry);
886 goto out;
887 }
888 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
889
890 out:
891 if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
892 IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
893 p54_wake_free_queues(dev);
894 }
895
896 static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
897 struct sk_buff *skb)
898 {
899 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
900 struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
901 struct p54_common *priv = dev->priv;
902
903 if (!priv->eeprom)
904 return ;
905
906 if (priv->fw_var >= 0x509) {
907 memcpy(priv->eeprom, eeprom->v2.data,
908 le16_to_cpu(eeprom->v2.len));
909 } else {
910 memcpy(priv->eeprom, eeprom->v1.data,
911 le16_to_cpu(eeprom->v1.len));
912 }
913
914 complete(&priv->eeprom_comp);
915 }
916
917 static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
918 {
919 struct p54_common *priv = dev->priv;
920 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
921 struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
922 u32 tsf32;
923
924 if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
925 return ;
926
927 tsf32 = le32_to_cpu(stats->tsf32);
928 if (tsf32 < priv->tsf_low32)
929 priv->tsf_high32++;
930 priv->tsf_low32 = tsf32;
931
932 priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
933 priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
934 priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
935
936 priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
937
938 p54_free_skb(dev, p54_find_tx_entry(dev, hdr->req_id));
939 }
940
941 static void p54_rx_trap(struct ieee80211_hw *dev, struct sk_buff *skb)
942 {
943 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
944 struct p54_trap *trap = (struct p54_trap *) hdr->data;
945 u16 event = le16_to_cpu(trap->event);
946 u16 freq = le16_to_cpu(trap->frequency);
947
948 switch (event) {
949 case P54_TRAP_BEACON_TX:
950 break;
951 case P54_TRAP_RADAR:
952 printk(KERN_INFO "%s: radar (freq:%d MHz)\n",
953 wiphy_name(dev->wiphy), freq);
954 break;
955 case P54_TRAP_NO_BEACON:
956 break;
957 case P54_TRAP_SCAN:
958 break;
959 case P54_TRAP_TBTT:
960 break;
961 case P54_TRAP_TIMER:
962 break;
963 default:
964 printk(KERN_INFO "%s: received event:%x freq:%d\n",
965 wiphy_name(dev->wiphy), event, freq);
966 break;
967 }
968 }
969
970 static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
971 {
972 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
973
974 switch (le16_to_cpu(hdr->type)) {
975 case P54_CONTROL_TYPE_TXDONE:
976 p54_rx_frame_sent(dev, skb);
977 break;
978 case P54_CONTROL_TYPE_TRAP:
979 p54_rx_trap(dev, skb);
980 break;
981 case P54_CONTROL_TYPE_BBP:
982 break;
983 case P54_CONTROL_TYPE_STAT_READBACK:
984 p54_rx_stats(dev, skb);
985 break;
986 case P54_CONTROL_TYPE_EEPROM_READBACK:
987 p54_rx_eeprom_readback(dev, skb);
988 break;
989 default:
990 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
991 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
992 break;
993 }
994
995 return 0;
996 }
997
998 /* returns zero if skb can be reused */
999 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
1000 {
1001 u16 type = le16_to_cpu(*((__le16 *)skb->data));
1002
1003 if (type & P54_HDR_FLAG_CONTROL)
1004 return p54_rx_control(dev, skb);
1005 else
1006 return p54_rx_data(dev, skb);
1007 }
1008 EXPORT_SYMBOL_GPL(p54_rx);
1009
1010 /*
1011 * So, the firmware is somewhat stupid and doesn't know what places in its
1012 * memory incoming data should go to. By poking around in the firmware, we
1013 * can find some unused memory to upload our packets to. However, data that we
1014 * want the card to TX needs to stay intact until the card has told us that
1015 * it is done with it. This function finds empty places we can upload to and
1016 * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
1017 * allocated areas.
1018 */
1019 static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
1020 struct p54_hdr *data, u32 len)
1021 {
1022 struct p54_common *priv = dev->priv;
1023 struct sk_buff *entry = priv->tx_queue.next;
1024 struct sk_buff *target_skb = NULL;
1025 struct ieee80211_tx_info *info;
1026 struct memrecord *range;
1027 u32 last_addr = priv->rx_start;
1028 u32 largest_hole = 0;
1029 u32 target_addr = priv->rx_start;
1030 unsigned long flags;
1031 unsigned int left;
1032 len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
1033
1034 if (!skb)
1035 return -EINVAL;
1036
1037 spin_lock_irqsave(&priv->tx_queue.lock, flags);
1038
1039 left = skb_queue_len(&priv->tx_queue);
1040 if (unlikely(left >= 28)) {
1041 /*
1042 * The tx_queue is nearly full!
1043 * We have throttle normal data traffic, because we must
1044 * have a few spare slots for control frames left.
1045 */
1046 ieee80211_stop_queues(dev);
1047 queue_delayed_work(dev->workqueue, &priv->work,
1048 msecs_to_jiffies(P54_TX_TIMEOUT));
1049
1050 if (unlikely(left == 32)) {
1051 /*
1052 * The tx_queue is now really full.
1053 *
1054 * TODO: check if the device has crashed and reset it.
1055 */
1056 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
1057 return -ENOSPC;
1058 }
1059 }
1060
1061 while (left--) {
1062 u32 hole_size;
1063 info = IEEE80211_SKB_CB(entry);
1064 range = (void *)info->rate_driver_data;
1065 hole_size = range->start_addr - last_addr;
1066 if (!target_skb && hole_size >= len) {
1067 target_skb = entry->prev;
1068 hole_size -= len;
1069 target_addr = last_addr;
1070 }
1071 largest_hole = max(largest_hole, hole_size);
1072 last_addr = range->end_addr;
1073 entry = entry->next;
1074 }
1075 if (!target_skb && priv->rx_end - last_addr >= len) {
1076 target_skb = priv->tx_queue.prev;
1077 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
1078 if (!skb_queue_empty(&priv->tx_queue)) {
1079 info = IEEE80211_SKB_CB(target_skb);
1080 range = (void *)info->rate_driver_data;
1081 target_addr = range->end_addr;
1082 }
1083 } else
1084 largest_hole = max(largest_hole, priv->rx_end - last_addr);
1085
1086 if (!target_skb) {
1087 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
1088 ieee80211_stop_queues(dev);
1089 return -ENOSPC;
1090 }
1091
1092 info = IEEE80211_SKB_CB(skb);
1093 range = (void *)info->rate_driver_data;
1094 range->start_addr = target_addr;
1095 range->end_addr = target_addr + len;
1096 __skb_queue_after(&priv->tx_queue, target_skb, skb);
1097 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
1098
1099 if (largest_hole < priv->headroom + sizeof(struct p54_hdr) +
1100 48 + IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
1101 ieee80211_stop_queues(dev);
1102
1103 data->req_id = cpu_to_le32(target_addr + priv->headroom);
1104 return 0;
1105 }
1106
1107 static struct sk_buff *p54_alloc_skb(struct ieee80211_hw *dev,
1108 u16 hdr_flags, u16 len, u16 type, gfp_t memflags)
1109 {
1110 struct p54_common *priv = dev->priv;
1111 struct p54_hdr *hdr;
1112 struct sk_buff *skb;
1113
1114 skb = __dev_alloc_skb(len + priv->tx_hdr_len, memflags);
1115 if (!skb)
1116 return NULL;
1117 skb_reserve(skb, priv->tx_hdr_len);
1118
1119 hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
1120 hdr->flags = cpu_to_le16(hdr_flags);
1121 hdr->len = cpu_to_le16(len - sizeof(*hdr));
1122 hdr->type = cpu_to_le16(type);
1123 hdr->tries = hdr->rts_tries = 0;
1124
1125 if (unlikely(p54_assign_address(dev, skb, hdr, len))) {
1126 kfree_skb(skb);
1127 return NULL;
1128 }
1129 return skb;
1130 }
1131
1132 int p54_read_eeprom(struct ieee80211_hw *dev)
1133 {
1134 struct p54_common *priv = dev->priv;
1135 struct p54_hdr *hdr = NULL;
1136 struct p54_eeprom_lm86 *eeprom_hdr;
1137 struct sk_buff *skb;
1138 size_t eeprom_size = 0x2020, offset = 0, blocksize, maxblocksize;
1139 int ret = -ENOMEM;
1140 void *eeprom = NULL;
1141
1142 maxblocksize = EEPROM_READBACK_LEN;
1143 if (priv->fw_var >= 0x509)
1144 maxblocksize -= 0xc;
1145 else
1146 maxblocksize -= 0x4;
1147
1148 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL, sizeof(*hdr) +
1149 sizeof(*eeprom_hdr) + maxblocksize,
1150 P54_CONTROL_TYPE_EEPROM_READBACK, GFP_KERNEL);
1151 if (!skb)
1152 goto free;
1153 priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
1154 if (!priv->eeprom)
1155 goto free;
1156 eeprom = kzalloc(eeprom_size, GFP_KERNEL);
1157 if (!eeprom)
1158 goto free;
1159
1160 eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
1161 sizeof(*eeprom_hdr) + maxblocksize);
1162
1163 while (eeprom_size) {
1164 blocksize = min(eeprom_size, maxblocksize);
1165 if (priv->fw_var < 0x509) {
1166 eeprom_hdr->v1.offset = cpu_to_le16(offset);
1167 eeprom_hdr->v1.len = cpu_to_le16(blocksize);
1168 } else {
1169 eeprom_hdr->v2.offset = cpu_to_le32(offset);
1170 eeprom_hdr->v2.len = cpu_to_le16(blocksize);
1171 eeprom_hdr->v2.magic2 = 0xf;
1172 memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4);
1173 }
1174 priv->tx(dev, skb);
1175
1176 if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
1177 printk(KERN_ERR "%s: device does not respond!\n",
1178 wiphy_name(dev->wiphy));
1179 ret = -EBUSY;
1180 goto free;
1181 }
1182
1183 memcpy(eeprom + offset, priv->eeprom, blocksize);
1184 offset += blocksize;
1185 eeprom_size -= blocksize;
1186 }
1187
1188 ret = p54_parse_eeprom(dev, eeprom, offset);
1189 free:
1190 kfree(priv->eeprom);
1191 priv->eeprom = NULL;
1192 p54_free_skb(dev, skb);
1193 kfree(eeprom);
1194
1195 return ret;
1196 }
1197 EXPORT_SYMBOL_GPL(p54_read_eeprom);
1198
1199 static int p54_set_tim(struct ieee80211_hw *dev, struct ieee80211_sta *sta,
1200 bool set)
1201 {
1202 struct p54_common *priv = dev->priv;
1203 struct sk_buff *skb;
1204 struct p54_tim *tim;
1205
1206 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
1207 sizeof(struct p54_hdr) + sizeof(*tim),
1208 P54_CONTROL_TYPE_TIM, GFP_ATOMIC);
1209 if (!skb)
1210 return -ENOMEM;
1211
1212 tim = (struct p54_tim *) skb_put(skb, sizeof(*tim));
1213 tim->count = 1;
1214 tim->entry[0] = cpu_to_le16(set ? (sta->aid | 0x8000) : sta->aid);
1215 priv->tx(dev, skb);
1216 return 0;
1217 }
1218
1219 static int p54_sta_unlock(struct ieee80211_hw *dev, u8 *addr)
1220 {
1221 struct p54_common *priv = dev->priv;
1222 struct sk_buff *skb;
1223 struct p54_sta_unlock *sta;
1224
1225 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
1226 sizeof(struct p54_hdr) + sizeof(*sta),
1227 P54_CONTROL_TYPE_PSM_STA_UNLOCK, GFP_ATOMIC);
1228 if (!skb)
1229 return -ENOMEM;
1230
1231 sta = (struct p54_sta_unlock *)skb_put(skb, sizeof(*sta));
1232 memcpy(sta->addr, addr, ETH_ALEN);
1233 priv->tx(dev, skb);
1234 return 0;
1235 }
1236
1237 static void p54_sta_notify(struct ieee80211_hw *dev, struct ieee80211_vif *vif,
1238 enum sta_notify_cmd notify_cmd,
1239 struct ieee80211_sta *sta)
1240 {
1241 switch (notify_cmd) {
1242 case STA_NOTIFY_ADD:
1243 case STA_NOTIFY_REMOVE:
1244 /*
1245 * Notify the firmware that we don't want or we don't
1246 * need to buffer frames for this station anymore.
1247 */
1248
1249 p54_sta_unlock(dev, sta->addr);
1250 break;
1251 case STA_NOTIFY_AWAKE:
1252 /* update the firmware's filter table */
1253 p54_sta_unlock(dev, sta->addr);
1254 break;
1255 default:
1256 break;
1257 }
1258 }
1259
1260 static int p54_tx_cancel(struct ieee80211_hw *dev, struct sk_buff *entry)
1261 {
1262 struct p54_common *priv = dev->priv;
1263 struct sk_buff *skb;
1264 struct p54_hdr *hdr;
1265 struct p54_txcancel *cancel;
1266
1267 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
1268 sizeof(struct p54_hdr) + sizeof(*cancel),
1269 P54_CONTROL_TYPE_TXCANCEL, GFP_ATOMIC);
1270 if (!skb)
1271 return -ENOMEM;
1272
1273 hdr = (void *)entry->data;
1274 cancel = (struct p54_txcancel *)skb_put(skb, sizeof(*cancel));
1275 cancel->req_id = hdr->req_id;
1276 priv->tx(dev, skb);
1277 return 0;
1278 }
1279
1280 static int p54_tx_fill(struct ieee80211_hw *dev, struct sk_buff *skb,
1281 struct ieee80211_tx_info *info, u8 *queue, size_t *extra_len,
1282 u16 *flags, u16 *aid)
1283 {
1284 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1285 struct p54_common *priv = dev->priv;
1286 int ret = 1;
1287
1288 switch (priv->mode) {
1289 case NL80211_IFTYPE_MONITOR:
1290 /*
1291 * We have to set P54_HDR_FLAG_DATA_OUT_PROMISC for
1292 * every frame in promiscuous/monitor mode.
1293 * see STSW45x0C LMAC API - page 12.
1294 */
1295 *aid = 0;
1296 *flags = P54_HDR_FLAG_DATA_OUT_PROMISC;
1297 *queue += P54_QUEUE_DATA;
1298 break;
1299 case NL80211_IFTYPE_STATION:
1300 *aid = 1;
1301 if (unlikely(ieee80211_is_mgmt(hdr->frame_control))) {
1302 *queue = P54_QUEUE_MGMT;
1303 ret = 0;
1304 } else
1305 *queue += P54_QUEUE_DATA;
1306 break;
1307 case NL80211_IFTYPE_AP:
1308 case NL80211_IFTYPE_ADHOC:
1309 case NL80211_IFTYPE_MESH_POINT:
1310 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
1311 *aid = 0;
1312 *queue = P54_QUEUE_CAB;
1313 return 0;
1314 }
1315
1316 if (unlikely(ieee80211_is_mgmt(hdr->frame_control))) {
1317 if (ieee80211_is_probe_resp(hdr->frame_control)) {
1318 *aid = 0;
1319 *queue = P54_QUEUE_MGMT;
1320 *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP |
1321 P54_HDR_FLAG_DATA_OUT_NOCANCEL;
1322 return 0;
1323 } else if (ieee80211_is_beacon(hdr->frame_control)) {
1324 *aid = 0;
1325
1326 if (info->flags & IEEE80211_TX_CTL_INJECTED) {
1327 /*
1328 * Injecting beacons on top of a AP is
1329 * not a good idea... nevertheless,
1330 * it should be doable.
1331 */
1332
1333 *queue += P54_QUEUE_DATA;
1334 return 1;
1335 }
1336
1337 *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP;
1338 *queue = P54_QUEUE_BEACON;
1339 *extra_len = IEEE80211_MAX_TIM_LEN;
1340 return 0;
1341 } else {
1342 *queue = P54_QUEUE_MGMT;
1343 ret = 0;
1344 }
1345 } else
1346 *queue += P54_QUEUE_DATA;
1347
1348 if (info->control.sta)
1349 *aid = info->control.sta->aid;
1350 else
1351 *flags |= P54_HDR_FLAG_DATA_OUT_NOCANCEL;
1352 break;
1353 }
1354 return ret;
1355 }
1356
1357 static u8 p54_convert_algo(enum ieee80211_key_alg alg)
1358 {
1359 switch (alg) {
1360 case ALG_WEP:
1361 return P54_CRYPTO_WEP;
1362 case ALG_TKIP:
1363 return P54_CRYPTO_TKIPMICHAEL;
1364 case ALG_CCMP:
1365 return P54_CRYPTO_AESCCMP;
1366 default:
1367 return 0;
1368 }
1369 }
1370
1371 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
1372 {
1373 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1374 struct ieee80211_tx_queue_stats *current_queue;
1375 struct p54_common *priv = dev->priv;
1376 struct p54_hdr *hdr;
1377 struct p54_tx_data *txhdr;
1378 size_t padding, len, tim_len = 0;
1379 int i, j, ridx, ret;
1380 u16 hdr_flags = 0, aid = 0;
1381 u8 rate, queue, crypt_offset = 0;
1382 u8 cts_rate = 0x20;
1383 u8 rc_flags;
1384 u8 calculated_tries[4];
1385 u8 nrates = 0, nremaining = 8;
1386
1387 queue = skb_get_queue_mapping(skb);
1388
1389 ret = p54_tx_fill(dev, skb, info, &queue, &tim_len, &hdr_flags, &aid);
1390 current_queue = &priv->tx_stats[queue];
1391 if (unlikely((current_queue->len > current_queue->limit) && ret))
1392 return NETDEV_TX_BUSY;
1393 current_queue->len++;
1394 current_queue->count++;
1395 if ((current_queue->len == current_queue->limit) && ret)
1396 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
1397
1398 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
1399 len = skb->len;
1400
1401 if (info->control.hw_key) {
1402 crypt_offset = ieee80211_get_hdrlen_from_skb(skb);
1403 if (info->control.hw_key->alg == ALG_TKIP) {
1404 u8 *iv = (u8 *)(skb->data + crypt_offset);
1405 /*
1406 * The firmware excepts that the IV has to have
1407 * this special format
1408 */
1409 iv[1] = iv[0];
1410 iv[0] = iv[2];
1411 iv[2] = 0;
1412 }
1413 }
1414
1415 txhdr = (struct p54_tx_data *) skb_push(skb, sizeof(*txhdr) + padding);
1416 hdr = (struct p54_hdr *) skb_push(skb, sizeof(*hdr));
1417
1418 if (padding)
1419 hdr_flags |= P54_HDR_FLAG_DATA_ALIGN;
1420 hdr->type = cpu_to_le16(aid);
1421 hdr->rts_tries = info->control.rates[0].count;
1422
1423 /*
1424 * we register the rates in perfect order, and
1425 * RTS/CTS won't happen on 5 GHz
1426 */
1427 cts_rate = info->control.rts_cts_rate_idx;
1428
1429 memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
1430
1431 /* see how many rates got used */
1432 for (i = 0; i < 4; i++) {
1433 if (info->control.rates[i].idx < 0)
1434 break;
1435 nrates++;
1436 }
1437
1438 /* limit tries to 8/nrates per rate */
1439 for (i = 0; i < nrates; i++) {
1440 /*
1441 * The magic expression here is equivalent to 8/nrates for
1442 * all values that matter, but avoids division and jumps.
1443 * Note that nrates can only take the values 1 through 4.
1444 */
1445 calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
1446 info->control.rates[i].count);
1447 nremaining -= calculated_tries[i];
1448 }
1449
1450 /* if there are tries left, distribute from back to front */
1451 for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
1452 int tmp = info->control.rates[i].count - calculated_tries[i];
1453
1454 if (tmp <= 0)
1455 continue;
1456 /* RC requested more tries at this rate */
1457
1458 tmp = min_t(int, tmp, nremaining);
1459 calculated_tries[i] += tmp;
1460 nremaining -= tmp;
1461 }
1462
1463 ridx = 0;
1464 for (i = 0; i < nrates && ridx < 8; i++) {
1465 /* we register the rates in perfect order */
1466 rate = info->control.rates[i].idx;
1467 if (info->band == IEEE80211_BAND_5GHZ)
1468 rate += 4;
1469
1470 /* store the count we actually calculated for TX status */
1471 info->control.rates[i].count = calculated_tries[i];
1472
1473 rc_flags = info->control.rates[i].flags;
1474 if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
1475 rate |= 0x10;
1476 cts_rate |= 0x10;
1477 }
1478 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
1479 rate |= 0x40;
1480 else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
1481 rate |= 0x20;
1482 for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
1483 txhdr->rateset[ridx] = rate;
1484 ridx++;
1485 }
1486 }
1487
1488 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
1489 hdr_flags |= P54_HDR_FLAG_DATA_OUT_SEQNR;
1490
1491 /* TODO: enable bursting */
1492 hdr->flags = cpu_to_le16(hdr_flags);
1493 hdr->tries = ridx;
1494 txhdr->rts_rate_idx = 0;
1495 if (info->control.hw_key) {
1496 txhdr->key_type = p54_convert_algo(info->control.hw_key->alg);
1497 txhdr->key_len = min((u8)16, info->control.hw_key->keylen);
1498 memcpy(txhdr->key, info->control.hw_key->key, txhdr->key_len);
1499 if (info->control.hw_key->alg == ALG_TKIP) {
1500 if (unlikely(skb_tailroom(skb) < 12))
1501 goto err;
1502 /* reserve space for the MIC key */
1503 len += 8;
1504 memcpy(skb_put(skb, 8), &(info->control.hw_key->key
1505 [NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY]), 8);
1506 }
1507 /* reserve some space for ICV */
1508 len += info->control.hw_key->icv_len;
1509 memset(skb_put(skb, info->control.hw_key->icv_len), 0,
1510 info->control.hw_key->icv_len);
1511 } else {
1512 txhdr->key_type = 0;
1513 txhdr->key_len = 0;
1514 }
1515 txhdr->crypt_offset = crypt_offset;
1516 txhdr->hw_queue = queue;
1517 txhdr->backlog = current_queue->len;
1518 memset(txhdr->durations, 0, sizeof(txhdr->durations));
1519 txhdr->tx_antenna = ((info->antenna_sel_tx == 0) ?
1520 2 : info->antenna_sel_tx - 1) & priv->tx_diversity_mask;
1521 txhdr->output_power = priv->output_power;
1522 txhdr->cts_rate = cts_rate;
1523 if (padding)
1524 txhdr->align[0] = padding;
1525
1526 hdr->len = cpu_to_le16(len);
1527 /* modifies skb->cb and with it info, so must be last! */
1528 if (unlikely(p54_assign_address(dev, skb, hdr, skb->len + tim_len)))
1529 goto err;
1530 priv->tx(dev, skb);
1531
1532 queue_delayed_work(dev->workqueue, &priv->work,
1533 msecs_to_jiffies(P54_TX_FRAME_LIFETIME));
1534
1535 return NETDEV_TX_OK;
1536
1537 err:
1538 skb_pull(skb, sizeof(*hdr) + sizeof(*txhdr) + padding);
1539 current_queue->len--;
1540 current_queue->count--;
1541 return NETDEV_TX_BUSY;
1542 }
1543
1544 static int p54_setup_mac(struct ieee80211_hw *dev)
1545 {
1546 struct p54_common *priv = dev->priv;
1547 struct sk_buff *skb;
1548 struct p54_setup_mac *setup;
1549 u16 mode;
1550
1551 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup) +
1552 sizeof(struct p54_hdr), P54_CONTROL_TYPE_SETUP,
1553 GFP_ATOMIC);
1554 if (!skb)
1555 return -ENOMEM;
1556
1557 setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
1558 if (dev->conf.radio_enabled) {
1559 switch (priv->mode) {
1560 case NL80211_IFTYPE_STATION:
1561 mode = P54_FILTER_TYPE_STATION;
1562 break;
1563 case NL80211_IFTYPE_AP:
1564 mode = P54_FILTER_TYPE_AP;
1565 break;
1566 case NL80211_IFTYPE_ADHOC:
1567 case NL80211_IFTYPE_MESH_POINT:
1568 mode = P54_FILTER_TYPE_IBSS;
1569 break;
1570 case NL80211_IFTYPE_MONITOR:
1571 mode = P54_FILTER_TYPE_PROMISCUOUS;
1572 break;
1573 default:
1574 mode = P54_FILTER_TYPE_NONE;
1575 break;
1576 }
1577
1578 /*
1579 * "TRANSPARENT and PROMISCUOUS are mutually exclusive"
1580 * STSW45X0C LMAC API - page 12
1581 */
1582 if (((priv->filter_flags & FIF_PROMISC_IN_BSS) ||
1583 (priv->filter_flags & FIF_OTHER_BSS)) &&
1584 (mode != P54_FILTER_TYPE_PROMISCUOUS))
1585 mode |= P54_FILTER_TYPE_TRANSPARENT;
1586 } else
1587 mode = P54_FILTER_TYPE_RX_DISABLED;
1588
1589 setup->mac_mode = cpu_to_le16(mode);
1590 memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
1591 memcpy(setup->bssid, priv->bssid, ETH_ALEN);
1592 setup->rx_antenna = 2 & priv->rx_diversity_mask; /* automatic */
1593 setup->rx_align = 0;
1594 if (priv->fw_var < 0x500) {
1595 setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
1596 memset(setup->v1.rts_rates, 0, 8);
1597 setup->v1.rx_addr = cpu_to_le32(priv->rx_end);
1598 setup->v1.max_rx = cpu_to_le16(priv->rx_mtu);
1599 setup->v1.rxhw = cpu_to_le16(priv->rxhw);
1600 setup->v1.wakeup_timer = cpu_to_le16(priv->wakeup_timer);
1601 setup->v1.unalloc0 = cpu_to_le16(0);
1602 } else {
1603 setup->v2.rx_addr = cpu_to_le32(priv->rx_end);
1604 setup->v2.max_rx = cpu_to_le16(priv->rx_mtu);
1605 setup->v2.rxhw = cpu_to_le16(priv->rxhw);
1606 setup->v2.timer = cpu_to_le16(priv->wakeup_timer);
1607 setup->v2.truncate = cpu_to_le16(48896);
1608 setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
1609 setup->v2.sbss_offset = 0;
1610 setup->v2.mcast_window = 0;
1611 setup->v2.rx_rssi_threshold = 0;
1612 setup->v2.rx_ed_threshold = 0;
1613 setup->v2.ref_clock = cpu_to_le32(644245094);
1614 setup->v2.lpf_bandwidth = cpu_to_le16(65535);
1615 setup->v2.osc_start_delay = cpu_to_le16(65535);
1616 }
1617 priv->tx(dev, skb);
1618 return 0;
1619 }
1620
1621 static int p54_scan(struct ieee80211_hw *dev, u16 mode, u16 dwell)
1622 {
1623 struct p54_common *priv = dev->priv;
1624 struct sk_buff *skb;
1625 struct p54_scan *chan;
1626 unsigned int i;
1627 void *entry;
1628 __le16 freq = cpu_to_le16(dev->conf.channel->center_freq);
1629 int band = dev->conf.channel->band;
1630
1631 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*chan) +
1632 sizeof(struct p54_hdr), P54_CONTROL_TYPE_SCAN,
1633 GFP_ATOMIC);
1634 if (!skb)
1635 return -ENOMEM;
1636
1637 chan = (struct p54_scan *) skb_put(skb, sizeof(*chan));
1638 memset(chan->padding1, 0, sizeof(chan->padding1));
1639 chan->mode = cpu_to_le16(mode);
1640 chan->dwell = cpu_to_le16(dwell);
1641
1642 for (i = 0; i < priv->iq_autocal_len; i++) {
1643 if (priv->iq_autocal[i].freq != freq)
1644 continue;
1645
1646 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
1647 sizeof(*priv->iq_autocal));
1648 break;
1649 }
1650 if (i == priv->iq_autocal_len)
1651 goto err;
1652
1653 for (i = 0; i < priv->output_limit_len; i++) {
1654 if (priv->output_limit[i].freq != freq)
1655 continue;
1656
1657 chan->val_barker = 0x38;
1658 chan->val_bpsk = chan->dup_bpsk =
1659 priv->output_limit[i].val_bpsk;
1660 chan->val_qpsk = chan->dup_qpsk =
1661 priv->output_limit[i].val_qpsk;
1662 chan->val_16qam = chan->dup_16qam =
1663 priv->output_limit[i].val_16qam;
1664 chan->val_64qam = chan->dup_64qam =
1665 priv->output_limit[i].val_64qam;
1666 break;
1667 }
1668 if (i == priv->output_limit_len)
1669 goto err;
1670
1671 entry = priv->curve_data->data;
1672 for (i = 0; i < priv->curve_data->channels; i++) {
1673 if (*((__le16 *)entry) != freq) {
1674 entry += sizeof(__le16);
1675 entry += sizeof(struct p54_pa_curve_data_sample) *
1676 priv->curve_data->points_per_channel;
1677 continue;
1678 }
1679
1680 entry += sizeof(__le16);
1681 chan->pa_points_per_curve = 8;
1682 memset(chan->curve_data, 0, sizeof(*chan->curve_data));
1683 memcpy(chan->curve_data, entry,
1684 sizeof(struct p54_pa_curve_data_sample) *
1685 min((u8)8, priv->curve_data->points_per_channel));
1686 break;
1687 }
1688
1689 if (priv->fw_var < 0x500) {
1690 chan->v1_rssi.mul = cpu_to_le16(priv->rssical_db[band].mul);
1691 chan->v1_rssi.add = cpu_to_le16(priv->rssical_db[band].add);
1692 } else {
1693 chan->v2.rssi.mul = cpu_to_le16(priv->rssical_db[band].mul);
1694 chan->v2.rssi.add = cpu_to_le16(priv->rssical_db[band].add);
1695 chan->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
1696 memset(chan->v2.rts_rates, 0, 8);
1697 }
1698 priv->tx(dev, skb);
1699 return 0;
1700
1701 err:
1702 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
1703 p54_free_skb(dev, skb);
1704 return -EINVAL;
1705 }
1706
1707 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
1708 {
1709 struct p54_common *priv = dev->priv;
1710 struct sk_buff *skb;
1711 struct p54_led *led;
1712
1713 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led) +
1714 sizeof(struct p54_hdr), P54_CONTROL_TYPE_LED,
1715 GFP_ATOMIC);
1716 if (!skb)
1717 return -ENOMEM;
1718
1719 led = (struct p54_led *)skb_put(skb, sizeof(*led));
1720 led->mode = cpu_to_le16(mode);
1721 led->led_permanent = cpu_to_le16(link);
1722 led->led_temporary = cpu_to_le16(act);
1723 led->duration = cpu_to_le16(1000);
1724 priv->tx(dev, skb);
1725 return 0;
1726 }
1727
1728 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
1729 do { \
1730 queue.aifs = cpu_to_le16(ai_fs); \
1731 queue.cwmin = cpu_to_le16(cw_min); \
1732 queue.cwmax = cpu_to_le16(cw_max); \
1733 queue.txop = cpu_to_le16(_txop); \
1734 } while(0)
1735
1736 static int p54_set_edcf(struct ieee80211_hw *dev)
1737 {
1738 struct p54_common *priv = dev->priv;
1739 struct sk_buff *skb;
1740 struct p54_edcf *edcf;
1741
1742 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf) +
1743 sizeof(struct p54_hdr), P54_CONTROL_TYPE_DCFINIT,
1744 GFP_ATOMIC);
1745 if (!skb)
1746 return -ENOMEM;
1747
1748 edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
1749 if (priv->use_short_slot) {
1750 edcf->slottime = 9;
1751 edcf->sifs = 0x10;
1752 edcf->eofpad = 0x00;
1753 } else {
1754 edcf->slottime = 20;
1755 edcf->sifs = 0x0a;
1756 edcf->eofpad = 0x06;
1757 }
1758 /* (see prism54/isl_oid.h for further details) */
1759 edcf->frameburst = cpu_to_le16(0);
1760 edcf->round_trip_delay = cpu_to_le16(0);
1761 edcf->flags = 0;
1762 memset(edcf->mapping, 0, sizeof(edcf->mapping));
1763 memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
1764 priv->tx(dev, skb);
1765 return 0;
1766 }
1767
1768 static int p54_set_ps(struct ieee80211_hw *dev)
1769 {
1770 struct p54_common *priv = dev->priv;
1771 struct sk_buff *skb;
1772 struct p54_psm *psm;
1773 u16 mode;
1774 int i;
1775
1776 if (dev->conf.flags & IEEE80211_CONF_PS)
1777 mode = P54_PSM | P54_PSM_DTIM | P54_PSM_MCBC;
1778 else
1779 mode = P54_PSM_CAM;
1780
1781 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*psm) +
1782 sizeof(struct p54_hdr), P54_CONTROL_TYPE_PSM,
1783 GFP_ATOMIC);
1784 if (!skb)
1785 return -ENOMEM;
1786
1787 psm = (struct p54_psm *)skb_put(skb, sizeof(*psm));
1788 psm->mode = cpu_to_le16(mode);
1789 psm->aid = cpu_to_le16(priv->aid);
1790 for (i = 0; i < ARRAY_SIZE(psm->intervals); i++) {
1791 psm->intervals[i].interval =
1792 cpu_to_le16(dev->conf.listen_interval);
1793 psm->intervals[i].periods = cpu_to_le16(1);
1794 }
1795
1796 psm->beacon_rssi_skip_max = 60;
1797 psm->rssi_delta_threshold = 0;
1798 psm->nr = 0;
1799
1800 priv->tx(dev, skb);
1801
1802 return 0;
1803 }
1804
1805 static int p54_beacon_tim(struct sk_buff *skb)
1806 {
1807 /*
1808 * the good excuse for this mess is ... the firmware.
1809 * The dummy TIM MUST be at the end of the beacon frame,
1810 * because it'll be overwritten!
1811 */
1812
1813 struct ieee80211_mgmt *mgmt = (void *)skb->data;
1814 u8 *pos, *end;
1815
1816 if (skb->len <= sizeof(mgmt))
1817 return -EINVAL;
1818
1819 pos = (u8 *)mgmt->u.beacon.variable;
1820 end = skb->data + skb->len;
1821 while (pos < end) {
1822 if (pos + 2 + pos[1] > end)
1823 return -EINVAL;
1824
1825 if (pos[0] == WLAN_EID_TIM) {
1826 u8 dtim_len = pos[1];
1827 u8 dtim_period = pos[3];
1828 u8 *next = pos + 2 + dtim_len;
1829
1830 if (dtim_len < 3)
1831 return -EINVAL;
1832
1833 memmove(pos, next, end - next);
1834
1835 if (dtim_len > 3)
1836 skb_trim(skb, skb->len - (dtim_len - 3));
1837
1838 pos = end - (dtim_len + 2);
1839
1840 /* add the dummy at the end */
1841 pos[0] = WLAN_EID_TIM;
1842 pos[1] = 3;
1843 pos[2] = 0;
1844 pos[3] = dtim_period;
1845 pos[4] = 0;
1846 return 0;
1847 }
1848 pos += 2 + pos[1];
1849 }
1850 return 0;
1851 }
1852
1853 static int p54_beacon_update(struct ieee80211_hw *dev,
1854 struct ieee80211_vif *vif)
1855 {
1856 struct p54_common *priv = dev->priv;
1857 struct sk_buff *beacon;
1858 int ret;
1859
1860 if (priv->cached_beacon) {
1861 p54_tx_cancel(dev, priv->cached_beacon);
1862 /* wait for the last beacon the be freed */
1863 msleep(10);
1864 }
1865
1866 beacon = ieee80211_beacon_get(dev, vif);
1867 if (!beacon)
1868 return -ENOMEM;
1869 ret = p54_beacon_tim(beacon);
1870 if (ret)
1871 return ret;
1872 ret = p54_tx(dev, beacon);
1873 if (ret)
1874 return ret;
1875 priv->cached_beacon = beacon;
1876 priv->tsf_high32 = 0;
1877 priv->tsf_low32 = 0;
1878
1879 return 0;
1880 }
1881
1882 static int p54_start(struct ieee80211_hw *dev)
1883 {
1884 struct p54_common *priv = dev->priv;
1885 int err;
1886
1887 mutex_lock(&priv->conf_mutex);
1888 err = priv->open(dev);
1889 if (err)
1890 goto out;
1891 P54_SET_QUEUE(priv->qos_params[0], 0x0002, 0x0003, 0x0007, 47);
1892 P54_SET_QUEUE(priv->qos_params[1], 0x0002, 0x0007, 0x000f, 94);
1893 P54_SET_QUEUE(priv->qos_params[2], 0x0003, 0x000f, 0x03ff, 0);
1894 P54_SET_QUEUE(priv->qos_params[3], 0x0007, 0x000f, 0x03ff, 0);
1895 err = p54_set_edcf(dev);
1896 if (err)
1897 goto out;
1898
1899 memset(priv->bssid, ~0, ETH_ALEN);
1900 priv->mode = NL80211_IFTYPE_MONITOR;
1901 err = p54_setup_mac(dev);
1902 if (err) {
1903 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1904 goto out;
1905 }
1906
1907 queue_delayed_work(dev->workqueue, &priv->work, 0);
1908
1909 out:
1910 mutex_unlock(&priv->conf_mutex);
1911 return err;
1912 }
1913
1914 static void p54_stop(struct ieee80211_hw *dev)
1915 {
1916 struct p54_common *priv = dev->priv;
1917 struct sk_buff *skb;
1918
1919 mutex_lock(&priv->conf_mutex);
1920 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1921 cancel_delayed_work_sync(&priv->work);
1922 if (priv->cached_beacon)
1923 p54_tx_cancel(dev, priv->cached_beacon);
1924
1925 priv->stop(dev);
1926 while ((skb = skb_dequeue(&priv->tx_queue)))
1927 kfree_skb(skb);
1928 priv->cached_beacon = NULL;
1929 priv->tsf_high32 = priv->tsf_low32 = 0;
1930 mutex_unlock(&priv->conf_mutex);
1931 }
1932
1933 static int p54_add_interface(struct ieee80211_hw *dev,
1934 struct ieee80211_if_init_conf *conf)
1935 {
1936 struct p54_common *priv = dev->priv;
1937
1938 mutex_lock(&priv->conf_mutex);
1939 if (priv->mode != NL80211_IFTYPE_MONITOR) {
1940 mutex_unlock(&priv->conf_mutex);
1941 return -EOPNOTSUPP;
1942 }
1943
1944 switch (conf->type) {
1945 case NL80211_IFTYPE_STATION:
1946 case NL80211_IFTYPE_ADHOC:
1947 case NL80211_IFTYPE_AP:
1948 case NL80211_IFTYPE_MESH_POINT:
1949 priv->mode = conf->type;
1950 break;
1951 default:
1952 mutex_unlock(&priv->conf_mutex);
1953 return -EOPNOTSUPP;
1954 }
1955
1956 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
1957 p54_setup_mac(dev);
1958 p54_set_leds(dev, 1, 0, 0);
1959 mutex_unlock(&priv->conf_mutex);
1960 return 0;
1961 }
1962
1963 static void p54_remove_interface(struct ieee80211_hw *dev,
1964 struct ieee80211_if_init_conf *conf)
1965 {
1966 struct p54_common *priv = dev->priv;
1967
1968 mutex_lock(&priv->conf_mutex);
1969 if (priv->cached_beacon)
1970 p54_tx_cancel(dev, priv->cached_beacon);
1971 priv->mode = NL80211_IFTYPE_MONITOR;
1972 memset(priv->mac_addr, 0, ETH_ALEN);
1973 memset(priv->bssid, 0, ETH_ALEN);
1974 p54_setup_mac(dev);
1975 mutex_unlock(&priv->conf_mutex);
1976 }
1977
1978 static int p54_config(struct ieee80211_hw *dev, u32 changed)
1979 {
1980 int ret = 0;
1981 struct p54_common *priv = dev->priv;
1982 struct ieee80211_conf *conf = &dev->conf;
1983
1984 mutex_lock(&priv->conf_mutex);
1985 if (changed & IEEE80211_CONF_CHANGE_POWER)
1986 priv->output_power = conf->power_level << 2;
1987 if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
1988 ret = p54_setup_mac(dev);
1989 if (ret)
1990 goto out;
1991 }
1992 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1993 ret = p54_scan(dev, P54_SCAN_EXIT, 0);
1994 if (ret)
1995 goto out;
1996 }
1997 if (changed & IEEE80211_CONF_CHANGE_PS) {
1998 ret = p54_set_ps(dev);
1999 if (ret)
2000 goto out;
2001 }
2002
2003 out:
2004 mutex_unlock(&priv->conf_mutex);
2005 return ret;
2006 }
2007
2008 static int p54_config_interface(struct ieee80211_hw *dev,
2009 struct ieee80211_vif *vif,
2010 struct ieee80211_if_conf *conf)
2011 {
2012 struct p54_common *priv = dev->priv;
2013 int ret = 0;
2014
2015 mutex_lock(&priv->conf_mutex);
2016 if (conf->changed & IEEE80211_IFCC_BSSID) {
2017 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2018 ret = p54_setup_mac(dev);
2019 if (ret)
2020 goto out;
2021 }
2022
2023 if (conf->changed & IEEE80211_IFCC_BEACON) {
2024 ret = p54_scan(dev, P54_SCAN_EXIT, 0);
2025 if (ret)
2026 goto out;
2027 ret = p54_setup_mac(dev);
2028 if (ret)
2029 goto out;
2030 ret = p54_beacon_update(dev, vif);
2031 if (ret)
2032 goto out;
2033 ret = p54_set_edcf(dev);
2034 if (ret)
2035 goto out;
2036 }
2037
2038 ret = p54_set_leds(dev, 1, !is_multicast_ether_addr(priv->bssid), 0);
2039
2040 out:
2041 mutex_unlock(&priv->conf_mutex);
2042 return ret;
2043 }
2044
2045 static void p54_configure_filter(struct ieee80211_hw *dev,
2046 unsigned int changed_flags,
2047 unsigned int *total_flags,
2048 int mc_count, struct dev_mc_list *mclist)
2049 {
2050 struct p54_common *priv = dev->priv;
2051
2052 *total_flags &= FIF_PROMISC_IN_BSS |
2053 FIF_OTHER_BSS |
2054 (*total_flags & FIF_PROMISC_IN_BSS) ?
2055 FIF_FCSFAIL : 0;
2056
2057 priv->filter_flags = *total_flags;
2058
2059 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS))
2060 p54_setup_mac(dev);
2061 }
2062
2063 static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
2064 const struct ieee80211_tx_queue_params *params)
2065 {
2066 struct p54_common *priv = dev->priv;
2067 int ret;
2068
2069 mutex_lock(&priv->conf_mutex);
2070 if ((params) && !(queue > 4)) {
2071 P54_SET_QUEUE(priv->qos_params[queue], params->aifs,
2072 params->cw_min, params->cw_max, params->txop);
2073 ret = p54_set_edcf(dev);
2074 } else
2075 ret = -EINVAL;
2076 mutex_unlock(&priv->conf_mutex);
2077 return ret;
2078 }
2079
2080 static int p54_init_xbow_synth(struct ieee80211_hw *dev)
2081 {
2082 struct p54_common *priv = dev->priv;
2083 struct sk_buff *skb;
2084 struct p54_xbow_synth *xbow;
2085
2086 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow) +
2087 sizeof(struct p54_hdr),
2088 P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
2089 GFP_KERNEL);
2090 if (!skb)
2091 return -ENOMEM;
2092
2093 xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
2094 xbow->magic1 = cpu_to_le16(0x1);
2095 xbow->magic2 = cpu_to_le16(0x2);
2096 xbow->freq = cpu_to_le16(5390);
2097 memset(xbow->padding, 0, sizeof(xbow->padding));
2098 priv->tx(dev, skb);
2099 return 0;
2100 }
2101
2102 static void p54_work(struct work_struct *work)
2103 {
2104 struct p54_common *priv = container_of(work, struct p54_common,
2105 work.work);
2106 struct ieee80211_hw *dev = priv->hw;
2107 struct sk_buff *skb;
2108
2109 if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
2110 return ;
2111
2112 /*
2113 * TODO: walk through tx_queue and do the following tasks
2114 * 1. initiate bursts.
2115 * 2. cancel stuck frames / reset the device if necessary.
2116 */
2117
2118 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL, sizeof(struct p54_hdr) +
2119 sizeof(struct p54_statistics),
2120 P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
2121 if (!skb)
2122 return ;
2123
2124 priv->tx(dev, skb);
2125 }
2126
2127 static int p54_get_stats(struct ieee80211_hw *dev,
2128 struct ieee80211_low_level_stats *stats)
2129 {
2130 struct p54_common *priv = dev->priv;
2131
2132 memcpy(stats, &priv->stats, sizeof(*stats));
2133 return 0;
2134 }
2135
2136 static int p54_get_tx_stats(struct ieee80211_hw *dev,
2137 struct ieee80211_tx_queue_stats *stats)
2138 {
2139 struct p54_common *priv = dev->priv;
2140
2141 memcpy(stats, &priv->tx_stats[P54_QUEUE_DATA],
2142 sizeof(stats[0]) * dev->queues);
2143 return 0;
2144 }
2145
2146 static void p54_bss_info_changed(struct ieee80211_hw *dev,
2147 struct ieee80211_vif *vif,
2148 struct ieee80211_bss_conf *info,
2149 u32 changed)
2150 {
2151 struct p54_common *priv = dev->priv;
2152
2153 if (changed & BSS_CHANGED_ERP_SLOT) {
2154 priv->use_short_slot = info->use_short_slot;
2155 p54_set_edcf(dev);
2156 }
2157 if (changed & BSS_CHANGED_BASIC_RATES) {
2158 if (dev->conf.channel->band == IEEE80211_BAND_5GHZ)
2159 priv->basic_rate_mask = (info->basic_rates << 4);
2160 else
2161 priv->basic_rate_mask = info->basic_rates;
2162 p54_setup_mac(dev);
2163 if (priv->fw_var >= 0x500)
2164 p54_scan(dev, P54_SCAN_EXIT, 0);
2165 }
2166 if (changed & BSS_CHANGED_ASSOC) {
2167 if (info->assoc) {
2168 priv->aid = info->aid;
2169 priv->wakeup_timer = info->beacon_int *
2170 info->dtim_period * 5;
2171 p54_setup_mac(dev);
2172 }
2173 }
2174
2175 }
2176
2177 static int p54_set_key(struct ieee80211_hw *dev, enum set_key_cmd cmd,
2178 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2179 struct ieee80211_key_conf *key)
2180 {
2181 struct p54_common *priv = dev->priv;
2182 struct sk_buff *skb;
2183 struct p54_keycache *rxkey;
2184 u8 algo = 0;
2185
2186 if (modparam_nohwcrypt)
2187 return -EOPNOTSUPP;
2188
2189 if (cmd == DISABLE_KEY)
2190 algo = 0;
2191 else {
2192 switch (key->alg) {
2193 case ALG_TKIP:
2194 if (!(priv->privacy_caps & (BR_DESC_PRIV_CAP_MICHAEL |
2195 BR_DESC_PRIV_CAP_TKIP)))
2196 return -EOPNOTSUPP;
2197 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2198 algo = P54_CRYPTO_TKIPMICHAEL;
2199 break;
2200 case ALG_WEP:
2201 if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_WEP))
2202 return -EOPNOTSUPP;
2203 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2204 algo = P54_CRYPTO_WEP;
2205 break;
2206 case ALG_CCMP:
2207 if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP))
2208 return -EOPNOTSUPP;
2209 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2210 algo = P54_CRYPTO_AESCCMP;
2211 break;
2212 default:
2213 return -EOPNOTSUPP;
2214 }
2215 }
2216
2217 if (key->keyidx > priv->rx_keycache_size) {
2218 /*
2219 * The device supports the choosen algorithm, but the firmware
2220 * does not provide enough key slots to store all of them.
2221 * So, incoming frames have to be decoded by the mac80211 stack,
2222 * but we can still offload encryption for outgoing frames.
2223 */
2224
2225 return 0;
2226 }
2227
2228 mutex_lock(&priv->conf_mutex);
2229 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey) +
2230 sizeof(struct p54_hdr), P54_CONTROL_TYPE_RX_KEYCACHE,
2231 GFP_ATOMIC);
2232 if (!skb) {
2233 mutex_unlock(&priv->conf_mutex);
2234 return -ENOMEM;
2235 }
2236
2237 /* TODO: some devices have 4 more free slots for rx keys */
2238 rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey));
2239 rxkey->entry = key->keyidx;
2240 rxkey->key_id = key->keyidx;
2241 rxkey->key_type = algo;
2242 if (sta)
2243 memcpy(rxkey->mac, sta->addr, ETH_ALEN);
2244 else
2245 memset(rxkey->mac, ~0, ETH_ALEN);
2246 if (key->alg != ALG_TKIP) {
2247 rxkey->key_len = min((u8)16, key->keylen);
2248 memcpy(rxkey->key, key->key, rxkey->key_len);
2249 } else {
2250 rxkey->key_len = 24;
2251 memcpy(rxkey->key, key->key, 16);
2252 memcpy(&(rxkey->key[16]), &(key->key
2253 [NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY]), 8);
2254 }
2255
2256 priv->tx(dev, skb);
2257 mutex_unlock(&priv->conf_mutex);
2258 return 0;
2259 }
2260
2261 static const struct ieee80211_ops p54_ops = {
2262 .tx = p54_tx,
2263 .start = p54_start,
2264 .stop = p54_stop,
2265 .add_interface = p54_add_interface,
2266 .remove_interface = p54_remove_interface,
2267 .set_tim = p54_set_tim,
2268 .sta_notify = p54_sta_notify,
2269 .set_key = p54_set_key,
2270 .config = p54_config,
2271 .config_interface = p54_config_interface,
2272 .bss_info_changed = p54_bss_info_changed,
2273 .configure_filter = p54_configure_filter,
2274 .conf_tx = p54_conf_tx,
2275 .get_stats = p54_get_stats,
2276 .get_tx_stats = p54_get_tx_stats
2277 };
2278
2279 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
2280 {
2281 struct ieee80211_hw *dev;
2282 struct p54_common *priv;
2283
2284 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
2285 if (!dev)
2286 return NULL;
2287
2288 priv = dev->priv;
2289 priv->hw = dev;
2290 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
2291 priv->basic_rate_mask = 0x15f;
2292 skb_queue_head_init(&priv->tx_queue);
2293 dev->flags = IEEE80211_HW_RX_INCLUDES_FCS |
2294 IEEE80211_HW_SIGNAL_DBM |
2295 IEEE80211_HW_NOISE_DBM;
2296
2297 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
2298 BIT(NL80211_IFTYPE_ADHOC) |
2299 BIT(NL80211_IFTYPE_AP) |
2300 BIT(NL80211_IFTYPE_MESH_POINT);
2301
2302 dev->channel_change_time = 1000; /* TODO: find actual value */
2303 priv->tx_stats[P54_QUEUE_BEACON].limit = 1;
2304 priv->tx_stats[P54_QUEUE_FWSCAN].limit = 1;
2305 priv->tx_stats[P54_QUEUE_MGMT].limit = 3;
2306 priv->tx_stats[P54_QUEUE_CAB].limit = 3;
2307 priv->tx_stats[P54_QUEUE_DATA].limit = 5;
2308 dev->queues = 1;
2309 priv->noise = -94;
2310 /*
2311 * We support at most 8 tries no matter which rate they're at,
2312 * we cannot support max_rates * max_rate_tries as we set it
2313 * here, but setting it correctly to 4/2 or so would limit us
2314 * artificially if the RC algorithm wants just two rates, so
2315 * let's say 4/7, we'll redistribute it at TX time, see the
2316 * comments there.
2317 */
2318 dev->max_rates = 4;
2319 dev->max_rate_tries = 7;
2320 dev->extra_tx_headroom = sizeof(struct p54_hdr) + 4 +
2321 sizeof(struct p54_tx_data);
2322
2323 mutex_init(&priv->conf_mutex);
2324 init_completion(&priv->eeprom_comp);
2325 INIT_DELAYED_WORK(&priv->work, p54_work);
2326
2327 return dev;
2328 }
2329 EXPORT_SYMBOL_GPL(p54_init_common);
2330
2331 void p54_free_common(struct ieee80211_hw *dev)
2332 {
2333 struct p54_common *priv = dev->priv;
2334 kfree(priv->iq_autocal);
2335 kfree(priv->output_limit);
2336 kfree(priv->curve_data);
2337 }
2338 EXPORT_SYMBOL_GPL(p54_free_common);
2339
2340 static int __init p54_init(void)
2341 {
2342 return 0;
2343 }
2344
2345 static void __exit p54_exit(void)
2346 {
2347 }
2348
2349 module_init(p54_init);
2350 module_exit(p54_exit);
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