?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
nommu: Add noMMU support to the DMA API
[linux-2.6.git] / drivers / net / e1000 / e1000_main.c
blob5b8cbdb4b5201fa71223bd409b5d2ddf5e8f6287
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #define DRV_VERSION "7.3.21-k3-NAPI"
35 const char e1000_driver_version[] = DRV_VERSION;
36 static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
37
38 /* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45 static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
82 /* required last entry */
83 {0,}
84 };
85
86 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
88 int e1000_up(struct e1000_adapter *adapter);
89 void e1000_down(struct e1000_adapter *adapter);
90 void e1000_reinit_locked(struct e1000_adapter *adapter);
91 void e1000_reset(struct e1000_adapter *adapter);
92 int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
93 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
97 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
98 struct e1000_tx_ring *txdr);
99 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
100 struct e1000_rx_ring *rxdr);
101 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
102 struct e1000_tx_ring *tx_ring);
103 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
104 struct e1000_rx_ring *rx_ring);
105 void e1000_update_stats(struct e1000_adapter *adapter);
106
107 static int e1000_init_module(void);
108 static void e1000_exit_module(void);
109 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110 static void __devexit e1000_remove(struct pci_dev *pdev);
111 static int e1000_alloc_queues(struct e1000_adapter *adapter);
112 static int e1000_sw_init(struct e1000_adapter *adapter);
113 static int e1000_open(struct net_device *netdev);
114 static int e1000_close(struct net_device *netdev);
115 static void e1000_configure_tx(struct e1000_adapter *adapter);
116 static void e1000_configure_rx(struct e1000_adapter *adapter);
117 static void e1000_setup_rctl(struct e1000_adapter *adapter);
118 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
124 static void e1000_set_rx_mode(struct net_device *netdev);
125 static void e1000_update_phy_info(unsigned long data);
126 static void e1000_watchdog(unsigned long data);
127 static void e1000_82547_tx_fifo_stall(unsigned long data);
128 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
129 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
130 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
131 static int e1000_set_mac(struct net_device *netdev, void *p);
132 static irqreturn_t e1000_intr(int irq, void *data);
133 static irqreturn_t e1000_intr_msi(int irq, void *data);
134 static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
136 static int e1000_clean(struct napi_struct *napi, int budget);
137 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
140 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
141 struct e1000_rx_ring *rx_ring,
142 int cleaned_count);
143 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
144 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
145 int cmd);
146 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
147 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
148 static void e1000_tx_timeout(struct net_device *dev);
149 static void e1000_reset_task(struct work_struct *work);
150 static void e1000_smartspeed(struct e1000_adapter *adapter);
151 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
152 struct sk_buff *skb);
153
154 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
155 static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
156 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
157 static void e1000_restore_vlan(struct e1000_adapter *adapter);
158
159 #ifdef CONFIG_PM
160 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
161 static int e1000_resume(struct pci_dev *pdev);
162 #endif
163 static void e1000_shutdown(struct pci_dev *pdev);
164
165 #ifdef CONFIG_NET_POLL_CONTROLLER
166 /* for netdump / net console */
167 static void e1000_netpoll (struct net_device *netdev);
168 #endif
169
170 #define COPYBREAK_DEFAULT 256
171 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
172 module_param(copybreak, uint, 0644);
173 MODULE_PARM_DESC(copybreak,
174 "Maximum size of packet that is copied to a new buffer on receive");
175
176 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
177 pci_channel_state_t state);
178 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
179 static void e1000_io_resume(struct pci_dev *pdev);
180
181 static struct pci_error_handlers e1000_err_handler = {
182 .error_detected = e1000_io_error_detected,
183 .slot_reset = e1000_io_slot_reset,
184 .resume = e1000_io_resume,
185 };
186
187 static struct pci_driver e1000_driver = {
188 .name = e1000_driver_name,
189 .id_table = e1000_pci_tbl,
190 .probe = e1000_probe,
191 .remove = __devexit_p(e1000_remove),
192 #ifdef CONFIG_PM
193 /* Power Managment Hooks */
194 .suspend = e1000_suspend,
195 .resume = e1000_resume,
196 #endif
197 .shutdown = e1000_shutdown,
198 .err_handler = &e1000_err_handler
199 };
200
201 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
202 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
203 MODULE_LICENSE("GPL");
204 MODULE_VERSION(DRV_VERSION);
205
206 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
207 module_param(debug, int, 0);
208 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
209
210 /**
211 * e1000_init_module - Driver Registration Routine
212 *
213 * e1000_init_module is the first routine called when the driver is
214 * loaded. All it does is register with the PCI subsystem.
215 **/
216
217 static int __init e1000_init_module(void)
218 {
219 int ret;
220 printk(KERN_INFO "%s - version %s\n",
221 e1000_driver_string, e1000_driver_version);
222
223 printk(KERN_INFO "%s\n", e1000_copyright);
224
225 ret = pci_register_driver(&e1000_driver);
226 if (copybreak != COPYBREAK_DEFAULT) {
227 if (copybreak == 0)
228 printk(KERN_INFO "e1000: copybreak disabled\n");
229 else
230 printk(KERN_INFO "e1000: copybreak enabled for "
231 "packets <= %u bytes\n", copybreak);
232 }
233 return ret;
234 }
235
236 module_init(e1000_init_module);
237
238 /**
239 * e1000_exit_module - Driver Exit Cleanup Routine
240 *
241 * e1000_exit_module is called just before the driver is removed
242 * from memory.
243 **/
244
245 static void __exit e1000_exit_module(void)
246 {
247 pci_unregister_driver(&e1000_driver);
248 }
249
250 module_exit(e1000_exit_module);
251
252 static int e1000_request_irq(struct e1000_adapter *adapter)
253 {
254 struct e1000_hw *hw = &adapter->hw;
255 struct net_device *netdev = adapter->netdev;
256 irq_handler_t handler = e1000_intr;
257 int irq_flags = IRQF_SHARED;
258 int err;
259
260 if (hw->mac_type >= e1000_82571) {
261 adapter->have_msi = !pci_enable_msi(adapter->pdev);
262 if (adapter->have_msi) {
263 handler = e1000_intr_msi;
264 irq_flags = 0;
265 }
266 }
267
268 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
269 netdev);
270 if (err) {
271 if (adapter->have_msi)
272 pci_disable_msi(adapter->pdev);
273 DPRINTK(PROBE, ERR,
274 "Unable to allocate interrupt Error: %d\n", err);
275 }
276
277 return err;
278 }
279
280 static void e1000_free_irq(struct e1000_adapter *adapter)
281 {
282 struct net_device *netdev = adapter->netdev;
283
284 free_irq(adapter->pdev->irq, netdev);
285
286 if (adapter->have_msi)
287 pci_disable_msi(adapter->pdev);
288 }
289
290 /**
291 * e1000_irq_disable - Mask off interrupt generation on the NIC
292 * @adapter: board private structure
293 **/
294
295 static void e1000_irq_disable(struct e1000_adapter *adapter)
296 {
297 struct e1000_hw *hw = &adapter->hw;
298
299 ew32(IMC, ~0);
300 E1000_WRITE_FLUSH();
301 synchronize_irq(adapter->pdev->irq);
302 }
303
304 /**
305 * e1000_irq_enable - Enable default interrupt generation settings
306 * @adapter: board private structure
307 **/
308
309 static void e1000_irq_enable(struct e1000_adapter *adapter)
310 {
311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMS, IMS_ENABLE_MASK);
314 E1000_WRITE_FLUSH();
315 }
316
317 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
318 {
319 struct e1000_hw *hw = &adapter->hw;
320 struct net_device *netdev = adapter->netdev;
321 u16 vid = hw->mng_cookie.vlan_id;
322 u16 old_vid = adapter->mng_vlan_id;
323 if (adapter->vlgrp) {
324 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
325 if (hw->mng_cookie.status &
326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
331
332 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
333 (vid != old_vid) &&
334 !vlan_group_get_device(adapter->vlgrp, old_vid))
335 e1000_vlan_rx_kill_vid(netdev, old_vid);
336 } else
337 adapter->mng_vlan_id = vid;
338 }
339 }
340
341 /**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
348 * of the f/w this means that the network i/f is closed.
349 *
350 **/
351
352 static void e1000_release_hw_control(struct e1000_adapter *adapter)
353 {
354 u32 ctrl_ext;
355 u32 swsm;
356 struct e1000_hw *hw = &adapter->hw;
357
358 /* Let firmware taken over control of h/w */
359 switch (hw->mac_type) {
360 case e1000_82573:
361 swsm = er32(SWSM);
362 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
363 break;
364 case e1000_82571:
365 case e1000_82572:
366 case e1000_80003es2lan:
367 case e1000_ich8lan:
368 ctrl_ext = er32(CTRL_EXT);
369 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
370 break;
371 default:
372 break;
373 }
374 }
375
376 /**
377 * e1000_get_hw_control - get control of the h/w from f/w
378 * @adapter: address of board private structure
379 *
380 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
381 * For ASF and Pass Through versions of f/w this means that
382 * the driver is loaded. For AMT version (only with 82573)
383 * of the f/w this means that the network i/f is open.
384 *
385 **/
386
387 static void e1000_get_hw_control(struct e1000_adapter *adapter)
388 {
389 u32 ctrl_ext;
390 u32 swsm;
391 struct e1000_hw *hw = &adapter->hw;
392
393 /* Let firmware know the driver has taken over */
394 switch (hw->mac_type) {
395 case e1000_82573:
396 swsm = er32(SWSM);
397 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
398 break;
399 case e1000_82571:
400 case e1000_82572:
401 case e1000_80003es2lan:
402 case e1000_ich8lan:
403 ctrl_ext = er32(CTRL_EXT);
404 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
405 break;
406 default:
407 break;
408 }
409 }
410
411 static void e1000_init_manageability(struct e1000_adapter *adapter)
412 {
413 struct e1000_hw *hw = &adapter->hw;
414
415 if (adapter->en_mng_pt) {
416 u32 manc = er32(MANC);
417
418 /* disable hardware interception of ARP */
419 manc &= ~(E1000_MANC_ARP_EN);
420
421 /* enable receiving management packets to the host */
422 /* this will probably generate destination unreachable messages
423 * from the host OS, but the packets will be handled on SMBUS */
424 if (hw->has_manc2h) {
425 u32 manc2h = er32(MANC2H);
426
427 manc |= E1000_MANC_EN_MNG2HOST;
428 #define E1000_MNG2HOST_PORT_623 (1 << 5)
429 #define E1000_MNG2HOST_PORT_664 (1 << 6)
430 manc2h |= E1000_MNG2HOST_PORT_623;
431 manc2h |= E1000_MNG2HOST_PORT_664;
432 ew32(MANC2H, manc2h);
433 }
434
435 ew32(MANC, manc);
436 }
437 }
438
439 static void e1000_release_manageability(struct e1000_adapter *adapter)
440 {
441 struct e1000_hw *hw = &adapter->hw;
442
443 if (adapter->en_mng_pt) {
444 u32 manc = er32(MANC);
445
446 /* re-enable hardware interception of ARP */
447 manc |= E1000_MANC_ARP_EN;
448
449 if (hw->has_manc2h)
450 manc &= ~E1000_MANC_EN_MNG2HOST;
451
452 /* don't explicitly have to mess with MANC2H since
453 * MANC has an enable disable that gates MANC2H */
454
455 ew32(MANC, manc);
456 }
457 }
458
459 /**
460 * e1000_configure - configure the hardware for RX and TX
461 * @adapter = private board structure
462 **/
463 static void e1000_configure(struct e1000_adapter *adapter)
464 {
465 struct net_device *netdev = adapter->netdev;
466 int i;
467
468 e1000_set_rx_mode(netdev);
469
470 e1000_restore_vlan(adapter);
471 e1000_init_manageability(adapter);
472
473 e1000_configure_tx(adapter);
474 e1000_setup_rctl(adapter);
475 e1000_configure_rx(adapter);
476 /* call E1000_DESC_UNUSED which always leaves
477 * at least 1 descriptor unused to make sure
478 * next_to_use != next_to_clean */
479 for (i = 0; i < adapter->num_rx_queues; i++) {
480 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
481 adapter->alloc_rx_buf(adapter, ring,
482 E1000_DESC_UNUSED(ring));
483 }
484
485 adapter->tx_queue_len = netdev->tx_queue_len;
486 }
487
488 int e1000_up(struct e1000_adapter *adapter)
489 {
490 struct e1000_hw *hw = &adapter->hw;
491
492 /* hardware has been reset, we need to reload some things */
493 e1000_configure(adapter);
494
495 clear_bit(__E1000_DOWN, &adapter->flags);
496
497 napi_enable(&adapter->napi);
498
499 e1000_irq_enable(adapter);
500
501 netif_wake_queue(adapter->netdev);
502
503 /* fire a link change interrupt to start the watchdog */
504 ew32(ICS, E1000_ICS_LSC);
505 return 0;
506 }
507
508 /**
509 * e1000_power_up_phy - restore link in case the phy was powered down
510 * @adapter: address of board private structure
511 *
512 * The phy may be powered down to save power and turn off link when the
513 * driver is unloaded and wake on lan is not enabled (among others)
514 * *** this routine MUST be followed by a call to e1000_reset ***
515 *
516 **/
517
518 void e1000_power_up_phy(struct e1000_adapter *adapter)
519 {
520 struct e1000_hw *hw = &adapter->hw;
521 u16 mii_reg = 0;
522
523 /* Just clear the power down bit to wake the phy back up */
524 if (hw->media_type == e1000_media_type_copper) {
525 /* according to the manual, the phy will retain its
526 * settings across a power-down/up cycle */
527 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
528 mii_reg &= ~MII_CR_POWER_DOWN;
529 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
530 }
531 }
532
533 static void e1000_power_down_phy(struct e1000_adapter *adapter)
534 {
535 struct e1000_hw *hw = &adapter->hw;
536
537 /* Power down the PHY so no link is implied when interface is down *
538 * The PHY cannot be powered down if any of the following is true *
539 * (a) WoL is enabled
540 * (b) AMT is active
541 * (c) SoL/IDER session is active */
542 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
543 hw->media_type == e1000_media_type_copper) {
544 u16 mii_reg = 0;
545
546 switch (hw->mac_type) {
547 case e1000_82540:
548 case e1000_82545:
549 case e1000_82545_rev_3:
550 case e1000_82546:
551 case e1000_82546_rev_3:
552 case e1000_82541:
553 case e1000_82541_rev_2:
554 case e1000_82547:
555 case e1000_82547_rev_2:
556 if (er32(MANC) & E1000_MANC_SMBUS_EN)
557 goto out;
558 break;
559 case e1000_82571:
560 case e1000_82572:
561 case e1000_82573:
562 case e1000_80003es2lan:
563 case e1000_ich8lan:
564 if (e1000_check_mng_mode(hw) ||
565 e1000_check_phy_reset_block(hw))
566 goto out;
567 break;
568 default:
569 goto out;
570 }
571 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
572 mii_reg |= MII_CR_POWER_DOWN;
573 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
574 mdelay(1);
575 }
576 out:
577 return;
578 }
579
580 void e1000_down(struct e1000_adapter *adapter)
581 {
582 struct e1000_hw *hw = &adapter->hw;
583 struct net_device *netdev = adapter->netdev;
584 u32 rctl, tctl;
585
586 /* signal that we're down so the interrupt handler does not
587 * reschedule our watchdog timer */
588 set_bit(__E1000_DOWN, &adapter->flags);
589
590 /* disable receives in the hardware */
591 rctl = er32(RCTL);
592 ew32(RCTL, rctl & ~E1000_RCTL_EN);
593 /* flush and sleep below */
594
595 /* can be netif_tx_disable when NETIF_F_LLTX is removed */
596 netif_stop_queue(netdev);
597
598 /* disable transmits in the hardware */
599 tctl = er32(TCTL);
600 tctl &= ~E1000_TCTL_EN;
601 ew32(TCTL, tctl);
602 /* flush both disables and wait for them to finish */
603 E1000_WRITE_FLUSH();
604 msleep(10);
605
606 napi_disable(&adapter->napi);
607
608 e1000_irq_disable(adapter);
609
610 del_timer_sync(&adapter->tx_fifo_stall_timer);
611 del_timer_sync(&adapter->watchdog_timer);
612 del_timer_sync(&adapter->phy_info_timer);
613
614 netdev->tx_queue_len = adapter->tx_queue_len;
615 adapter->link_speed = 0;
616 adapter->link_duplex = 0;
617 netif_carrier_off(netdev);
618
619 e1000_reset(adapter);
620 e1000_clean_all_tx_rings(adapter);
621 e1000_clean_all_rx_rings(adapter);
622 }
623
624 void e1000_reinit_locked(struct e1000_adapter *adapter)
625 {
626 WARN_ON(in_interrupt());
627 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
628 msleep(1);
629 e1000_down(adapter);
630 e1000_up(adapter);
631 clear_bit(__E1000_RESETTING, &adapter->flags);
632 }
633
634 void e1000_reset(struct e1000_adapter *adapter)
635 {
636 struct e1000_hw *hw = &adapter->hw;
637 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
638 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
639 bool legacy_pba_adjust = false;
640
641 /* Repartition Pba for greater than 9k mtu
642 * To take effect CTRL.RST is required.
643 */
644
645 switch (hw->mac_type) {
646 case e1000_82542_rev2_0:
647 case e1000_82542_rev2_1:
648 case e1000_82543:
649 case e1000_82544:
650 case e1000_82540:
651 case e1000_82541:
652 case e1000_82541_rev_2:
653 legacy_pba_adjust = true;
654 pba = E1000_PBA_48K;
655 break;
656 case e1000_82545:
657 case e1000_82545_rev_3:
658 case e1000_82546:
659 case e1000_82546_rev_3:
660 pba = E1000_PBA_48K;
661 break;
662 case e1000_82547:
663 case e1000_82547_rev_2:
664 legacy_pba_adjust = true;
665 pba = E1000_PBA_30K;
666 break;
667 case e1000_82571:
668 case e1000_82572:
669 case e1000_80003es2lan:
670 pba = E1000_PBA_38K;
671 break;
672 case e1000_82573:
673 pba = E1000_PBA_20K;
674 break;
675 case e1000_ich8lan:
676 pba = E1000_PBA_8K;
677 case e1000_undefined:
678 case e1000_num_macs:
679 break;
680 }
681
682 if (legacy_pba_adjust) {
683 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
684 pba -= 8; /* allocate more FIFO for Tx */
685
686 if (hw->mac_type == e1000_82547) {
687 adapter->tx_fifo_head = 0;
688 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
689 adapter->tx_fifo_size =
690 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
691 atomic_set(&adapter->tx_fifo_stall, 0);
692 }
693 } else if (hw->max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
694 /* adjust PBA for jumbo frames */
695 ew32(PBA, pba);
696
697 /* To maintain wire speed transmits, the Tx FIFO should be
698 * large enough to accomodate two full transmit packets,
699 * rounded up to the next 1KB and expressed in KB. Likewise,
700 * the Rx FIFO should be large enough to accomodate at least
701 * one full receive packet and is similarly rounded up and
702 * expressed in KB. */
703 pba = er32(PBA);
704 /* upper 16 bits has Tx packet buffer allocation size in KB */
705 tx_space = pba >> 16;
706 /* lower 16 bits has Rx packet buffer allocation size in KB */
707 pba &= 0xffff;
708 /* don't include ethernet FCS because hardware appends/strips */
709 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
710 VLAN_TAG_SIZE;
711 min_tx_space = min_rx_space;
712 min_tx_space *= 2;
713 min_tx_space = ALIGN(min_tx_space, 1024);
714 min_tx_space >>= 10;
715 min_rx_space = ALIGN(min_rx_space, 1024);
716 min_rx_space >>= 10;
717
718 /* If current Tx allocation is less than the min Tx FIFO size,
719 * and the min Tx FIFO size is less than the current Rx FIFO
720 * allocation, take space away from current Rx allocation */
721 if (tx_space < min_tx_space &&
722 ((min_tx_space - tx_space) < pba)) {
723 pba = pba - (min_tx_space - tx_space);
724
725 /* PCI/PCIx hardware has PBA alignment constraints */
726 switch (hw->mac_type) {
727 case e1000_82545 ... e1000_82546_rev_3:
728 pba &= ~(E1000_PBA_8K - 1);
729 break;
730 default:
731 break;
732 }
733
734 /* if short on rx space, rx wins and must trump tx
735 * adjustment or use Early Receive if available */
736 if (pba < min_rx_space) {
737 switch (hw->mac_type) {
738 case e1000_82573:
739 /* ERT enabled in e1000_configure_rx */
740 break;
741 default:
742 pba = min_rx_space;
743 break;
744 }
745 }
746 }
747 }
748
749 ew32(PBA, pba);
750
751 /* flow control settings */
752 /* Set the FC high water mark to 90% of the FIFO size.
753 * Required to clear last 3 LSB */
754 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
755 /* We can't use 90% on small FIFOs because the remainder
756 * would be less than 1 full frame. In this case, we size
757 * it to allow at least a full frame above the high water
758 * mark. */
759 if (pba < E1000_PBA_16K)
760 fc_high_water_mark = (pba * 1024) - 1600;
761
762 hw->fc_high_water = fc_high_water_mark;
763 hw->fc_low_water = fc_high_water_mark - 8;
764 if (hw->mac_type == e1000_80003es2lan)
765 hw->fc_pause_time = 0xFFFF;
766 else
767 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
768 hw->fc_send_xon = 1;
769 hw->fc = hw->original_fc;
770
771 /* Allow time for pending master requests to run */
772 e1000_reset_hw(hw);
773 if (hw->mac_type >= e1000_82544)
774 ew32(WUC, 0);
775
776 if (e1000_init_hw(hw))
777 DPRINTK(PROBE, ERR, "Hardware Error\n");
778 e1000_update_mng_vlan(adapter);
779
780 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
781 if (hw->mac_type >= e1000_82544 &&
782 hw->mac_type <= e1000_82547_rev_2 &&
783 hw->autoneg == 1 &&
784 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
785 u32 ctrl = er32(CTRL);
786 /* clear phy power management bit if we are in gig only mode,
787 * which if enabled will attempt negotiation to 100Mb, which
788 * can cause a loss of link at power off or driver unload */
789 ctrl &= ~E1000_CTRL_SWDPIN3;
790 ew32(CTRL, ctrl);
791 }
792
793 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
794 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
795
796 e1000_reset_adaptive(hw);
797 e1000_phy_get_info(hw, &adapter->phy_info);
798
799 if (!adapter->smart_power_down &&
800 (hw->mac_type == e1000_82571 ||
801 hw->mac_type == e1000_82572)) {
802 u16 phy_data = 0;
803 /* speed up time to link by disabling smart power down, ignore
804 * the return value of this function because there is nothing
805 * different we would do if it failed */
806 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
807 &phy_data);
808 phy_data &= ~IGP02E1000_PM_SPD;
809 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
810 phy_data);
811 }
812
813 e1000_release_manageability(adapter);
814 }
815
816 /**
817 * Dump the eeprom for users having checksum issues
818 **/
819 static void e1000_dump_eeprom(struct e1000_adapter *adapter)
820 {
821 struct net_device *netdev = adapter->netdev;
822 struct ethtool_eeprom eeprom;
823 const struct ethtool_ops *ops = netdev->ethtool_ops;
824 u8 *data;
825 int i;
826 u16 csum_old, csum_new = 0;
827
828 eeprom.len = ops->get_eeprom_len(netdev);
829 eeprom.offset = 0;
830
831 data = kmalloc(eeprom.len, GFP_KERNEL);
832 if (!data) {
833 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
834 " data\n");
835 return;
836 }
837
838 ops->get_eeprom(netdev, &eeprom, data);
839
840 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
841 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
842 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
843 csum_new += data[i] + (data[i + 1] << 8);
844 csum_new = EEPROM_SUM - csum_new;
845
846 printk(KERN_ERR "/*********************/\n");
847 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
848 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
849
850 printk(KERN_ERR "Offset Values\n");
851 printk(KERN_ERR "======== ======\n");
852 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
853
854 printk(KERN_ERR "Include this output when contacting your support "
855 "provider.\n");
856 printk(KERN_ERR "This is not a software error! Something bad "
857 "happened to your hardware or\n");
858 printk(KERN_ERR "EEPROM image. Ignoring this "
859 "problem could result in further problems,\n");
860 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
861 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
862 "which is invalid\n");
863 printk(KERN_ERR "and requires you to set the proper MAC "
864 "address manually before continuing\n");
865 printk(KERN_ERR "to enable this network device.\n");
866 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
867 "to your hardware vendor\n");
868 printk(KERN_ERR "or Intel Customer Support.\n");
869 printk(KERN_ERR "/*********************/\n");
870
871 kfree(data);
872 }
873
874 /**
875 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
876 * @pdev: PCI device information struct
877 *
878 * Return true if an adapter needs ioport resources
879 **/
880 static int e1000_is_need_ioport(struct pci_dev *pdev)
881 {
882 switch (pdev->device) {
883 case E1000_DEV_ID_82540EM:
884 case E1000_DEV_ID_82540EM_LOM:
885 case E1000_DEV_ID_82540EP:
886 case E1000_DEV_ID_82540EP_LOM:
887 case E1000_DEV_ID_82540EP_LP:
888 case E1000_DEV_ID_82541EI:
889 case E1000_DEV_ID_82541EI_MOBILE:
890 case E1000_DEV_ID_82541ER:
891 case E1000_DEV_ID_82541ER_LOM:
892 case E1000_DEV_ID_82541GI:
893 case E1000_DEV_ID_82541GI_LF:
894 case E1000_DEV_ID_82541GI_MOBILE:
895 case E1000_DEV_ID_82544EI_COPPER:
896 case E1000_DEV_ID_82544EI_FIBER:
897 case E1000_DEV_ID_82544GC_COPPER:
898 case E1000_DEV_ID_82544GC_LOM:
899 case E1000_DEV_ID_82545EM_COPPER:
900 case E1000_DEV_ID_82545EM_FIBER:
901 case E1000_DEV_ID_82546EB_COPPER:
902 case E1000_DEV_ID_82546EB_FIBER:
903 case E1000_DEV_ID_82546EB_QUAD_COPPER:
904 return true;
905 default:
906 return false;
907 }
908 }
909
910 static const struct net_device_ops e1000_netdev_ops = {
911 .ndo_open = e1000_open,
912 .ndo_stop = e1000_close,
913 .ndo_start_xmit = e1000_xmit_frame,
914 .ndo_get_stats = e1000_get_stats,
915 .ndo_set_rx_mode = e1000_set_rx_mode,
916 .ndo_set_mac_address = e1000_set_mac,
917 .ndo_tx_timeout = e1000_tx_timeout,
918 .ndo_change_mtu = e1000_change_mtu,
919 .ndo_do_ioctl = e1000_ioctl,
920 .ndo_validate_addr = eth_validate_addr,
921
922 .ndo_vlan_rx_register = e1000_vlan_rx_register,
923 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
924 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
925 #ifdef CONFIG_NET_POLL_CONTROLLER
926 .ndo_poll_controller = e1000_netpoll,
927 #endif
928 };
929
930 /**
931 * e1000_probe - Device Initialization Routine
932 * @pdev: PCI device information struct
933 * @ent: entry in e1000_pci_tbl
934 *
935 * Returns 0 on success, negative on failure
936 *
937 * e1000_probe initializes an adapter identified by a pci_dev structure.
938 * The OS initialization, configuring of the adapter private structure,
939 * and a hardware reset occur.
940 **/
941 static int __devinit e1000_probe(struct pci_dev *pdev,
942 const struct pci_device_id *ent)
943 {
944 struct net_device *netdev;
945 struct e1000_adapter *adapter;
946 struct e1000_hw *hw;
947
948 static int cards_found = 0;
949 static int global_quad_port_a = 0; /* global ksp3 port a indication */
950 int i, err, pci_using_dac;
951 u16 eeprom_data = 0;
952 u16 eeprom_apme_mask = E1000_EEPROM_APME;
953 int bars, need_ioport;
954
955 /* do not allocate ioport bars when not needed */
956 need_ioport = e1000_is_need_ioport(pdev);
957 if (need_ioport) {
958 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
959 err = pci_enable_device(pdev);
960 } else {
961 bars = pci_select_bars(pdev, IORESOURCE_MEM);
962 err = pci_enable_device_mem(pdev);
963 }
964 if (err)
965 return err;
966
967 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
968 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
969 pci_using_dac = 1;
970 } else {
971 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
972 if (err) {
973 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
974 if (err) {
975 E1000_ERR("No usable DMA configuration, "
976 "aborting\n");
977 goto err_dma;
978 }
979 }
980 pci_using_dac = 0;
981 }
982
983 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
984 if (err)
985 goto err_pci_reg;
986
987 pci_set_master(pdev);
988
989 err = -ENOMEM;
990 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
991 if (!netdev)
992 goto err_alloc_etherdev;
993
994 SET_NETDEV_DEV(netdev, &pdev->dev);
995
996 pci_set_drvdata(pdev, netdev);
997 adapter = netdev_priv(netdev);
998 adapter->netdev = netdev;
999 adapter->pdev = pdev;
1000 adapter->msg_enable = (1 << debug) - 1;
1001 adapter->bars = bars;
1002 adapter->need_ioport = need_ioport;
1003
1004 hw = &adapter->hw;
1005 hw->back = adapter;
1006
1007 err = -EIO;
1008 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1009 if (!hw->hw_addr)
1010 goto err_ioremap;
1011
1012 if (adapter->need_ioport) {
1013 for (i = BAR_1; i <= BAR_5; i++) {
1014 if (pci_resource_len(pdev, i) == 0)
1015 continue;
1016 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1017 hw->io_base = pci_resource_start(pdev, i);
1018 break;
1019 }
1020 }
1021 }
1022
1023 netdev->netdev_ops = &e1000_netdev_ops;
1024 e1000_set_ethtool_ops(netdev);
1025 netdev->watchdog_timeo = 5 * HZ;
1026 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
1027
1028 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1029
1030 adapter->bd_number = cards_found;
1031
1032 /* setup the private structure */
1033
1034 err = e1000_sw_init(adapter);
1035 if (err)
1036 goto err_sw_init;
1037
1038 err = -EIO;
1039 /* Flash BAR mapping must happen after e1000_sw_init
1040 * because it depends on mac_type */
1041 if ((hw->mac_type == e1000_ich8lan) &&
1042 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1043 hw->flash_address = pci_ioremap_bar(pdev, 1);
1044 if (!hw->flash_address)
1045 goto err_flashmap;
1046 }
1047
1048 if (e1000_check_phy_reset_block(hw))
1049 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1050
1051 if (hw->mac_type >= e1000_82543) {
1052 netdev->features = NETIF_F_SG |
1053 NETIF_F_HW_CSUM |
1054 NETIF_F_HW_VLAN_TX |
1055 NETIF_F_HW_VLAN_RX |
1056 NETIF_F_HW_VLAN_FILTER;
1057 if (hw->mac_type == e1000_ich8lan)
1058 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1059 }
1060
1061 if ((hw->mac_type >= e1000_82544) &&
1062 (hw->mac_type != e1000_82547))
1063 netdev->features |= NETIF_F_TSO;
1064
1065 if (hw->mac_type > e1000_82547_rev_2)
1066 netdev->features |= NETIF_F_TSO6;
1067 if (pci_using_dac)
1068 netdev->features |= NETIF_F_HIGHDMA;
1069
1070 netdev->vlan_features |= NETIF_F_TSO;
1071 netdev->vlan_features |= NETIF_F_TSO6;
1072 netdev->vlan_features |= NETIF_F_HW_CSUM;
1073 netdev->vlan_features |= NETIF_F_SG;
1074
1075 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
1076
1077 /* initialize eeprom parameters */
1078 if (e1000_init_eeprom_params(hw)) {
1079 E1000_ERR("EEPROM initialization failed\n");
1080 goto err_eeprom;
1081 }
1082
1083 /* before reading the EEPROM, reset the controller to
1084 * put the device in a known good starting state */
1085
1086 e1000_reset_hw(hw);
1087
1088 /* make sure the EEPROM is good */
1089 if (e1000_validate_eeprom_checksum(hw) < 0) {
1090 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1091 e1000_dump_eeprom(adapter);
1092 /*
1093 * set MAC address to all zeroes to invalidate and temporary
1094 * disable this device for the user. This blocks regular
1095 * traffic while still permitting ethtool ioctls from reaching
1096 * the hardware as well as allowing the user to run the
1097 * interface after manually setting a hw addr using
1098 * `ip set address`
1099 */
1100 memset(hw->mac_addr, 0, netdev->addr_len);
1101 } else {
1102 /* copy the MAC address out of the EEPROM */
1103 if (e1000_read_mac_addr(hw))
1104 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1105 }
1106 /* don't block initalization here due to bad MAC address */
1107 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1108 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1109
1110 if (!is_valid_ether_addr(netdev->perm_addr))
1111 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1112
1113 e1000_get_bus_info(hw);
1114
1115 init_timer(&adapter->tx_fifo_stall_timer);
1116 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1117 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1118
1119 init_timer(&adapter->watchdog_timer);
1120 adapter->watchdog_timer.function = &e1000_watchdog;
1121 adapter->watchdog_timer.data = (unsigned long) adapter;
1122
1123 init_timer(&adapter->phy_info_timer);
1124 adapter->phy_info_timer.function = &e1000_update_phy_info;
1125 adapter->phy_info_timer.data = (unsigned long)adapter;
1126
1127 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1128
1129 e1000_check_options(adapter);
1130
1131 /* Initial Wake on LAN setting
1132 * If APM wake is enabled in the EEPROM,
1133 * enable the ACPI Magic Packet filter
1134 */
1135
1136 switch (hw->mac_type) {
1137 case e1000_82542_rev2_0:
1138 case e1000_82542_rev2_1:
1139 case e1000_82543:
1140 break;
1141 case e1000_82544:
1142 e1000_read_eeprom(hw,
1143 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1144 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1145 break;
1146 case e1000_ich8lan:
1147 e1000_read_eeprom(hw,
1148 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1149 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1150 break;
1151 case e1000_82546:
1152 case e1000_82546_rev_3:
1153 case e1000_82571:
1154 case e1000_80003es2lan:
1155 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1156 e1000_read_eeprom(hw,
1157 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1158 break;
1159 }
1160 /* Fall Through */
1161 default:
1162 e1000_read_eeprom(hw,
1163 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1164 break;
1165 }
1166 if (eeprom_data & eeprom_apme_mask)
1167 adapter->eeprom_wol |= E1000_WUFC_MAG;
1168
1169 /* now that we have the eeprom settings, apply the special cases
1170 * where the eeprom may be wrong or the board simply won't support
1171 * wake on lan on a particular port */
1172 switch (pdev->device) {
1173 case E1000_DEV_ID_82546GB_PCIE:
1174 adapter->eeprom_wol = 0;
1175 break;
1176 case E1000_DEV_ID_82546EB_FIBER:
1177 case E1000_DEV_ID_82546GB_FIBER:
1178 case E1000_DEV_ID_82571EB_FIBER:
1179 /* Wake events only supported on port A for dual fiber
1180 * regardless of eeprom setting */
1181 if (er32(STATUS) & E1000_STATUS_FUNC_1)
1182 adapter->eeprom_wol = 0;
1183 break;
1184 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1185 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1186 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1187 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1188 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1189 /* if quad port adapter, disable WoL on all but port A */
1190 if (global_quad_port_a != 0)
1191 adapter->eeprom_wol = 0;
1192 else
1193 adapter->quad_port_a = 1;
1194 /* Reset for multiple quad port adapters */
1195 if (++global_quad_port_a == 4)
1196 global_quad_port_a = 0;
1197 break;
1198 }
1199
1200 /* initialize the wol settings based on the eeprom settings */
1201 adapter->wol = adapter->eeprom_wol;
1202 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1203
1204 /* print bus type/speed/width info */
1205 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1206 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1207 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1208 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1209 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1210 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1211 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1212 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1213 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1214 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1215 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1216 "32-bit"));
1217
1218 printk("%pM\n", netdev->dev_addr);
1219
1220 if (hw->bus_type == e1000_bus_type_pci_express) {
1221 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1222 "longer be supported by this driver in the future.\n",
1223 pdev->vendor, pdev->device);
1224 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1225 "driver instead.\n");
1226 }
1227
1228 /* reset the hardware with the new settings */
1229 e1000_reset(adapter);
1230
1231 /* If the controller is 82573 and f/w is AMT, do not set
1232 * DRV_LOAD until the interface is up. For all other cases,
1233 * let the f/w know that the h/w is now under the control
1234 * of the driver. */
1235 if (hw->mac_type != e1000_82573 ||
1236 !e1000_check_mng_mode(hw))
1237 e1000_get_hw_control(adapter);
1238
1239 strcpy(netdev->name, "eth%d");
1240 err = register_netdev(netdev);
1241 if (err)
1242 goto err_register;
1243
1244 /* carrier off reporting is important to ethtool even BEFORE open */
1245 netif_carrier_off(netdev);
1246
1247 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1248
1249 cards_found++;
1250 return 0;
1251
1252 err_register:
1253 e1000_release_hw_control(adapter);
1254 err_eeprom:
1255 if (!e1000_check_phy_reset_block(hw))
1256 e1000_phy_hw_reset(hw);
1257
1258 if (hw->flash_address)
1259 iounmap(hw->flash_address);
1260 err_flashmap:
1261 kfree(adapter->tx_ring);
1262 kfree(adapter->rx_ring);
1263 err_sw_init:
1264 iounmap(hw->hw_addr);
1265 err_ioremap:
1266 free_netdev(netdev);
1267 err_alloc_etherdev:
1268 pci_release_selected_regions(pdev, bars);
1269 err_pci_reg:
1270 err_dma:
1271 pci_disable_device(pdev);
1272 return err;
1273 }
1274
1275 /**
1276 * e1000_remove - Device Removal Routine
1277 * @pdev: PCI device information struct
1278 *
1279 * e1000_remove is called by the PCI subsystem to alert the driver
1280 * that it should release a PCI device. The could be caused by a
1281 * Hot-Plug event, or because the driver is going to be removed from
1282 * memory.
1283 **/
1284
1285 static void __devexit e1000_remove(struct pci_dev *pdev)
1286 {
1287 struct net_device *netdev = pci_get_drvdata(pdev);
1288 struct e1000_adapter *adapter = netdev_priv(netdev);
1289 struct e1000_hw *hw = &adapter->hw;
1290
1291 cancel_work_sync(&adapter->reset_task);
1292
1293 e1000_release_manageability(adapter);
1294
1295 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1296 * would have already happened in close and is redundant. */
1297 e1000_release_hw_control(adapter);
1298
1299 unregister_netdev(netdev);
1300
1301 if (!e1000_check_phy_reset_block(hw))
1302 e1000_phy_hw_reset(hw);
1303
1304 kfree(adapter->tx_ring);
1305 kfree(adapter->rx_ring);
1306
1307 iounmap(hw->hw_addr);
1308 if (hw->flash_address)
1309 iounmap(hw->flash_address);
1310 pci_release_selected_regions(pdev, adapter->bars);
1311
1312 free_netdev(netdev);
1313
1314 pci_disable_device(pdev);
1315 }
1316
1317 /**
1318 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1319 * @adapter: board private structure to initialize
1320 *
1321 * e1000_sw_init initializes the Adapter private data structure.
1322 * Fields are initialized based on PCI device information and
1323 * OS network device settings (MTU size).
1324 **/
1325
1326 static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1327 {
1328 struct e1000_hw *hw = &adapter->hw;
1329 struct net_device *netdev = adapter->netdev;
1330 struct pci_dev *pdev = adapter->pdev;
1331
1332 /* PCI config space info */
1333
1334 hw->vendor_id = pdev->vendor;
1335 hw->device_id = pdev->device;
1336 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1337 hw->subsystem_id = pdev->subsystem_device;
1338 hw->revision_id = pdev->revision;
1339
1340 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1341
1342 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1343 hw->max_frame_size = netdev->mtu +
1344 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1345 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1346
1347 /* identify the MAC */
1348
1349 if (e1000_set_mac_type(hw)) {
1350 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1351 return -EIO;
1352 }
1353
1354 switch (hw->mac_type) {
1355 default:
1356 break;
1357 case e1000_82541:
1358 case e1000_82547:
1359 case e1000_82541_rev_2:
1360 case e1000_82547_rev_2:
1361 hw->phy_init_script = 1;
1362 break;
1363 }
1364
1365 e1000_set_media_type(hw);
1366
1367 hw->wait_autoneg_complete = false;
1368 hw->tbi_compatibility_en = true;
1369 hw->adaptive_ifs = true;
1370
1371 /* Copper options */
1372
1373 if (hw->media_type == e1000_media_type_copper) {
1374 hw->mdix = AUTO_ALL_MODES;
1375 hw->disable_polarity_correction = false;
1376 hw->master_slave = E1000_MASTER_SLAVE;
1377 }
1378
1379 adapter->num_tx_queues = 1;
1380 adapter->num_rx_queues = 1;
1381
1382 if (e1000_alloc_queues(adapter)) {
1383 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1384 return -ENOMEM;
1385 }
1386
1387 /* Explicitly disable IRQ since the NIC can be in any state. */
1388 e1000_irq_disable(adapter);
1389
1390 spin_lock_init(&adapter->stats_lock);
1391
1392 set_bit(__E1000_DOWN, &adapter->flags);
1393
1394 return 0;
1395 }
1396
1397 /**
1398 * e1000_alloc_queues - Allocate memory for all rings
1399 * @adapter: board private structure to initialize
1400 *
1401 * We allocate one ring per queue at run-time since we don't know the
1402 * number of queues at compile-time.
1403 **/
1404
1405 static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1406 {
1407 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1408 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1409 if (!adapter->tx_ring)
1410 return -ENOMEM;
1411
1412 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1413 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1414 if (!adapter->rx_ring) {
1415 kfree(adapter->tx_ring);
1416 return -ENOMEM;
1417 }
1418
1419 return E1000_SUCCESS;
1420 }
1421
1422 /**
1423 * e1000_open - Called when a network interface is made active
1424 * @netdev: network interface device structure
1425 *
1426 * Returns 0 on success, negative value on failure
1427 *
1428 * The open entry point is called when a network interface is made
1429 * active by the system (IFF_UP). At this point all resources needed
1430 * for transmit and receive operations are allocated, the interrupt
1431 * handler is registered with the OS, the watchdog timer is started,
1432 * and the stack is notified that the interface is ready.
1433 **/
1434
1435 static int e1000_open(struct net_device *netdev)
1436 {
1437 struct e1000_adapter *adapter = netdev_priv(netdev);
1438 struct e1000_hw *hw = &adapter->hw;
1439 int err;
1440
1441 /* disallow open during test */
1442 if (test_bit(__E1000_TESTING, &adapter->flags))
1443 return -EBUSY;
1444
1445 netif_carrier_off(netdev);
1446
1447 /* allocate transmit descriptors */
1448 err = e1000_setup_all_tx_resources(adapter);
1449 if (err)
1450 goto err_setup_tx;
1451
1452 /* allocate receive descriptors */
1453 err = e1000_setup_all_rx_resources(adapter);
1454 if (err)
1455 goto err_setup_rx;
1456
1457 e1000_power_up_phy(adapter);
1458
1459 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1460 if ((hw->mng_cookie.status &
1461 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1462 e1000_update_mng_vlan(adapter);
1463 }
1464
1465 /* If AMT is enabled, let the firmware know that the network
1466 * interface is now open */
1467 if (hw->mac_type == e1000_82573 &&
1468 e1000_check_mng_mode(hw))
1469 e1000_get_hw_control(adapter);
1470
1471 /* before we allocate an interrupt, we must be ready to handle it.
1472 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1473 * as soon as we call pci_request_irq, so we have to setup our
1474 * clean_rx handler before we do so. */
1475 e1000_configure(adapter);
1476
1477 err = e1000_request_irq(adapter);
1478 if (err)
1479 goto err_req_irq;
1480
1481 /* From here on the code is the same as e1000_up() */
1482 clear_bit(__E1000_DOWN, &adapter->flags);
1483
1484 napi_enable(&adapter->napi);
1485
1486 e1000_irq_enable(adapter);
1487
1488 netif_start_queue(netdev);
1489
1490 /* fire a link status change interrupt to start the watchdog */
1491 ew32(ICS, E1000_ICS_LSC);
1492
1493 return E1000_SUCCESS;
1494
1495 err_req_irq:
1496 e1000_release_hw_control(adapter);
1497 e1000_power_down_phy(adapter);
1498 e1000_free_all_rx_resources(adapter);
1499 err_setup_rx:
1500 e1000_free_all_tx_resources(adapter);
1501 err_setup_tx:
1502 e1000_reset(adapter);
1503
1504 return err;
1505 }
1506
1507 /**
1508 * e1000_close - Disables a network interface
1509 * @netdev: network interface device structure
1510 *
1511 * Returns 0, this is not allowed to fail
1512 *
1513 * The close entry point is called when an interface is de-activated
1514 * by the OS. The hardware is still under the drivers control, but
1515 * needs to be disabled. A global MAC reset is issued to stop the
1516 * hardware, and all transmit and receive resources are freed.
1517 **/
1518
1519 static int e1000_close(struct net_device *netdev)
1520 {
1521 struct e1000_adapter *adapter = netdev_priv(netdev);
1522 struct e1000_hw *hw = &adapter->hw;
1523
1524 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1525 e1000_down(adapter);
1526 e1000_power_down_phy(adapter);
1527 e1000_free_irq(adapter);
1528
1529 e1000_free_all_tx_resources(adapter);
1530 e1000_free_all_rx_resources(adapter);
1531
1532 /* kill manageability vlan ID if supported, but not if a vlan with
1533 * the same ID is registered on the host OS (let 8021q kill it) */
1534 if ((hw->mng_cookie.status &
1535 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1536 !(adapter->vlgrp &&
1537 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1538 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1539 }
1540
1541 /* If AMT is enabled, let the firmware know that the network
1542 * interface is now closed */
1543 if (hw->mac_type == e1000_82573 &&
1544 e1000_check_mng_mode(hw))
1545 e1000_release_hw_control(adapter);
1546
1547 return 0;
1548 }
1549
1550 /**
1551 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1552 * @adapter: address of board private structure
1553 * @start: address of beginning of memory
1554 * @len: length of memory
1555 **/
1556 static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1557 unsigned long len)
1558 {
1559 struct e1000_hw *hw = &adapter->hw;
1560 unsigned long begin = (unsigned long)start;
1561 unsigned long end = begin + len;
1562
1563 /* First rev 82545 and 82546 need to not allow any memory
1564 * write location to cross 64k boundary due to errata 23 */
1565 if (hw->mac_type == e1000_82545 ||
1566 hw->mac_type == e1000_82546) {
1567 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1568 }
1569
1570 return true;
1571 }
1572
1573 /**
1574 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1575 * @adapter: board private structure
1576 * @txdr: tx descriptor ring (for a specific queue) to setup
1577 *
1578 * Return 0 on success, negative on failure
1579 **/
1580
1581 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1582 struct e1000_tx_ring *txdr)
1583 {
1584 struct pci_dev *pdev = adapter->pdev;
1585 int size;
1586
1587 size = sizeof(struct e1000_buffer) * txdr->count;
1588 txdr->buffer_info = vmalloc(size);
1589 if (!txdr->buffer_info) {
1590 DPRINTK(PROBE, ERR,
1591 "Unable to allocate memory for the transmit descriptor ring\n");
1592 return -ENOMEM;
1593 }
1594 memset(txdr->buffer_info, 0, size);
1595
1596 /* round up to nearest 4K */
1597
1598 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1599 txdr->size = ALIGN(txdr->size, 4096);
1600
1601 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1602 if (!txdr->desc) {
1603 setup_tx_desc_die:
1604 vfree(txdr->buffer_info);
1605 DPRINTK(PROBE, ERR,
1606 "Unable to allocate memory for the transmit descriptor ring\n");
1607 return -ENOMEM;
1608 }
1609
1610 /* Fix for errata 23, can't cross 64kB boundary */
1611 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1612 void *olddesc = txdr->desc;
1613 dma_addr_t olddma = txdr->dma;
1614 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1615 "at %p\n", txdr->size, txdr->desc);
1616 /* Try again, without freeing the previous */
1617 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1618 /* Failed allocation, critical failure */
1619 if (!txdr->desc) {
1620 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1621 goto setup_tx_desc_die;
1622 }
1623
1624 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1625 /* give up */
1626 pci_free_consistent(pdev, txdr->size, txdr->desc,
1627 txdr->dma);
1628 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1629 DPRINTK(PROBE, ERR,
1630 "Unable to allocate aligned memory "
1631 "for the transmit descriptor ring\n");
1632 vfree(txdr->buffer_info);
1633 return -ENOMEM;
1634 } else {
1635 /* Free old allocation, new allocation was successful */
1636 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1637 }
1638 }
1639 memset(txdr->desc, 0, txdr->size);
1640
1641 txdr->next_to_use = 0;
1642 txdr->next_to_clean = 0;
1643
1644 return 0;
1645 }
1646
1647 /**
1648 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1649 * (Descriptors) for all queues
1650 * @adapter: board private structure
1651 *
1652 * Return 0 on success, negative on failure
1653 **/
1654
1655 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1656 {
1657 int i, err = 0;
1658
1659 for (i = 0; i < adapter->num_tx_queues; i++) {
1660 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1661 if (err) {
1662 DPRINTK(PROBE, ERR,
1663 "Allocation for Tx Queue %u failed\n", i);
1664 for (i-- ; i >= 0; i--)
1665 e1000_free_tx_resources(adapter,
1666 &adapter->tx_ring[i]);
1667 break;
1668 }
1669 }
1670
1671 return err;
1672 }
1673
1674 /**
1675 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1676 * @adapter: board private structure
1677 *
1678 * Configure the Tx unit of the MAC after a reset.
1679 **/
1680
1681 static void e1000_configure_tx(struct e1000_adapter *adapter)
1682 {
1683 u64 tdba;
1684 struct e1000_hw *hw = &adapter->hw;
1685 u32 tdlen, tctl, tipg, tarc;
1686 u32 ipgr1, ipgr2;
1687
1688 /* Setup the HW Tx Head and Tail descriptor pointers */
1689
1690 switch (adapter->num_tx_queues) {
1691 case 1:
1692 default:
1693 tdba = adapter->tx_ring[0].dma;
1694 tdlen = adapter->tx_ring[0].count *
1695 sizeof(struct e1000_tx_desc);
1696 ew32(TDLEN, tdlen);
1697 ew32(TDBAH, (tdba >> 32));
1698 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1699 ew32(TDT, 0);
1700 ew32(TDH, 0);
1701 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1702 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1703 break;
1704 }
1705
1706 /* Set the default values for the Tx Inter Packet Gap timer */
1707 if (hw->mac_type <= e1000_82547_rev_2 &&
1708 (hw->media_type == e1000_media_type_fiber ||
1709 hw->media_type == e1000_media_type_internal_serdes))
1710 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1711 else
1712 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1713
1714 switch (hw->mac_type) {
1715 case e1000_82542_rev2_0:
1716 case e1000_82542_rev2_1:
1717 tipg = DEFAULT_82542_TIPG_IPGT;
1718 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1719 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1720 break;
1721 case e1000_80003es2lan:
1722 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1723 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1724 break;
1725 default:
1726 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1727 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1728 break;
1729 }
1730 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1731 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1732 ew32(TIPG, tipg);
1733
1734 /* Set the Tx Interrupt Delay register */
1735
1736 ew32(TIDV, adapter->tx_int_delay);
1737 if (hw->mac_type >= e1000_82540)
1738 ew32(TADV, adapter->tx_abs_int_delay);
1739
1740 /* Program the Transmit Control Register */
1741
1742 tctl = er32(TCTL);
1743 tctl &= ~E1000_TCTL_CT;
1744 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1745 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1746
1747 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1748 tarc = er32(TARC0);
1749 /* set the speed mode bit, we'll clear it if we're not at
1750 * gigabit link later */
1751 tarc |= (1 << 21);
1752 ew32(TARC0, tarc);
1753 } else if (hw->mac_type == e1000_80003es2lan) {
1754 tarc = er32(TARC0);
1755 tarc |= 1;
1756 ew32(TARC0, tarc);
1757 tarc = er32(TARC1);
1758 tarc |= 1;
1759 ew32(TARC1, tarc);
1760 }
1761
1762 e1000_config_collision_dist(hw);
1763
1764 /* Setup Transmit Descriptor Settings for eop descriptor */
1765 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1766
1767 /* only set IDE if we are delaying interrupts using the timers */
1768 if (adapter->tx_int_delay)
1769 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1770
1771 if (hw->mac_type < e1000_82543)
1772 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1773 else
1774 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1775
1776 /* Cache if we're 82544 running in PCI-X because we'll
1777 * need this to apply a workaround later in the send path. */
1778 if (hw->mac_type == e1000_82544 &&
1779 hw->bus_type == e1000_bus_type_pcix)
1780 adapter->pcix_82544 = 1;
1781
1782 ew32(TCTL, tctl);
1783
1784 }
1785
1786 /**
1787 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1788 * @adapter: board private structure
1789 * @rxdr: rx descriptor ring (for a specific queue) to setup
1790 *
1791 * Returns 0 on success, negative on failure
1792 **/
1793
1794 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1795 struct e1000_rx_ring *rxdr)
1796 {
1797 struct e1000_hw *hw = &adapter->hw;
1798 struct pci_dev *pdev = adapter->pdev;
1799 int size, desc_len;
1800
1801 size = sizeof(struct e1000_buffer) * rxdr->count;
1802 rxdr->buffer_info = vmalloc(size);
1803 if (!rxdr->buffer_info) {
1804 DPRINTK(PROBE, ERR,
1805 "Unable to allocate memory for the receive descriptor ring\n");
1806 return -ENOMEM;
1807 }
1808 memset(rxdr->buffer_info, 0, size);
1809
1810 if (hw->mac_type <= e1000_82547_rev_2)
1811 desc_len = sizeof(struct e1000_rx_desc);
1812 else
1813 desc_len = sizeof(union e1000_rx_desc_packet_split);
1814
1815 /* Round up to nearest 4K */
1816
1817 rxdr->size = rxdr->count * desc_len;
1818 rxdr->size = ALIGN(rxdr->size, 4096);
1819
1820 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1821
1822 if (!rxdr->desc) {
1823 DPRINTK(PROBE, ERR,
1824 "Unable to allocate memory for the receive descriptor ring\n");
1825 setup_rx_desc_die:
1826 vfree(rxdr->buffer_info);
1827 return -ENOMEM;
1828 }
1829
1830 /* Fix for errata 23, can't cross 64kB boundary */
1831 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1832 void *olddesc = rxdr->desc;
1833 dma_addr_t olddma = rxdr->dma;
1834 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1835 "at %p\n", rxdr->size, rxdr->desc);
1836 /* Try again, without freeing the previous */
1837 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1838 /* Failed allocation, critical failure */
1839 if (!rxdr->desc) {
1840 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1841 DPRINTK(PROBE, ERR,
1842 "Unable to allocate memory "
1843 "for the receive descriptor ring\n");
1844 goto setup_rx_desc_die;
1845 }
1846
1847 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1848 /* give up */
1849 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1850 rxdr->dma);
1851 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1852 DPRINTK(PROBE, ERR,
1853 "Unable to allocate aligned memory "
1854 "for the receive descriptor ring\n");
1855 goto setup_rx_desc_die;
1856 } else {
1857 /* Free old allocation, new allocation was successful */
1858 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1859 }
1860 }
1861 memset(rxdr->desc, 0, rxdr->size);
1862
1863 rxdr->next_to_clean = 0;
1864 rxdr->next_to_use = 0;
1865
1866 return 0;
1867 }
1868
1869 /**
1870 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1871 * (Descriptors) for all queues
1872 * @adapter: board private structure
1873 *
1874 * Return 0 on success, negative on failure
1875 **/
1876
1877 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1878 {
1879 int i, err = 0;
1880
1881 for (i = 0; i < adapter->num_rx_queues; i++) {
1882 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1883 if (err) {
1884 DPRINTK(PROBE, ERR,
1885 "Allocation for Rx Queue %u failed\n", i);
1886 for (i-- ; i >= 0; i--)
1887 e1000_free_rx_resources(adapter,
1888 &adapter->rx_ring[i]);
1889 break;
1890 }
1891 }
1892
1893 return err;
1894 }
1895
1896 /**
1897 * e1000_setup_rctl - configure the receive control registers
1898 * @adapter: Board private structure
1899 **/
1900 static void e1000_setup_rctl(struct e1000_adapter *adapter)
1901 {
1902 struct e1000_hw *hw = &adapter->hw;
1903 u32 rctl;
1904
1905 rctl = er32(RCTL);
1906
1907 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1908
1909 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1910 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1911 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1912
1913 if (hw->tbi_compatibility_on == 1)
1914 rctl |= E1000_RCTL_SBP;
1915 else
1916 rctl &= ~E1000_RCTL_SBP;
1917
1918 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1919 rctl &= ~E1000_RCTL_LPE;
1920 else
1921 rctl |= E1000_RCTL_LPE;
1922
1923 /* Setup buffer sizes */
1924 rctl &= ~E1000_RCTL_SZ_4096;
1925 rctl |= E1000_RCTL_BSEX;
1926 switch (adapter->rx_buffer_len) {
1927 case E1000_RXBUFFER_256:
1928 rctl |= E1000_RCTL_SZ_256;
1929 rctl &= ~E1000_RCTL_BSEX;
1930 break;
1931 case E1000_RXBUFFER_512:
1932 rctl |= E1000_RCTL_SZ_512;
1933 rctl &= ~E1000_RCTL_BSEX;
1934 break;
1935 case E1000_RXBUFFER_1024:
1936 rctl |= E1000_RCTL_SZ_1024;
1937 rctl &= ~E1000_RCTL_BSEX;
1938 break;
1939 case E1000_RXBUFFER_2048:
1940 default:
1941 rctl |= E1000_RCTL_SZ_2048;
1942 rctl &= ~E1000_RCTL_BSEX;
1943 break;
1944 case E1000_RXBUFFER_4096:
1945 rctl |= E1000_RCTL_SZ_4096;
1946 break;
1947 case E1000_RXBUFFER_8192:
1948 rctl |= E1000_RCTL_SZ_8192;
1949 break;
1950 case E1000_RXBUFFER_16384:
1951 rctl |= E1000_RCTL_SZ_16384;
1952 break;
1953 }
1954
1955 ew32(RCTL, rctl);
1956 }
1957
1958 /**
1959 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1960 * @adapter: board private structure
1961 *
1962 * Configure the Rx unit of the MAC after a reset.
1963 **/
1964
1965 static void e1000_configure_rx(struct e1000_adapter *adapter)
1966 {
1967 u64 rdba;
1968 struct e1000_hw *hw = &adapter->hw;
1969 u32 rdlen, rctl, rxcsum, ctrl_ext;
1970
1971 rdlen = adapter->rx_ring[0].count *
1972 sizeof(struct e1000_rx_desc);
1973 adapter->clean_rx = e1000_clean_rx_irq;
1974 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1975
1976 /* disable receives while setting up the descriptors */
1977 rctl = er32(RCTL);
1978 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1979
1980 /* set the Receive Delay Timer Register */
1981 ew32(RDTR, adapter->rx_int_delay);
1982
1983 if (hw->mac_type >= e1000_82540) {
1984 ew32(RADV, adapter->rx_abs_int_delay);
1985 if (adapter->itr_setting != 0)
1986 ew32(ITR, 1000000000 / (adapter->itr * 256));
1987 }
1988
1989 if (hw->mac_type >= e1000_82571) {
1990 ctrl_ext = er32(CTRL_EXT);
1991 /* Reset delay timers after every interrupt */
1992 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1993 /* Auto-Mask interrupts upon ICR access */
1994 ctrl_ext |= E1000_CTRL_EXT_IAME;
1995 ew32(IAM, 0xffffffff);
1996 ew32(CTRL_EXT, ctrl_ext);
1997 E1000_WRITE_FLUSH();
1998 }
1999
2000 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2001 * the Base and Length of the Rx Descriptor Ring */
2002 switch (adapter->num_rx_queues) {
2003 case 1:
2004 default:
2005 rdba = adapter->rx_ring[0].dma;
2006 ew32(RDLEN, rdlen);
2007 ew32(RDBAH, (rdba >> 32));
2008 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
2009 ew32(RDT, 0);
2010 ew32(RDH, 0);
2011 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2012 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2013 break;
2014 }
2015
2016 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2017 if (hw->mac_type >= e1000_82543) {
2018 rxcsum = er32(RXCSUM);
2019 if (adapter->rx_csum)
2020 rxcsum |= E1000_RXCSUM_TUOFL;
2021 else
2022 /* don't need to clear IPPCSE as it defaults to 0 */
2023 rxcsum &= ~E1000_RXCSUM_TUOFL;
2024 ew32(RXCSUM, rxcsum);
2025 }
2026
2027 /* Enable Receives */
2028 ew32(RCTL, rctl);
2029 }
2030
2031 /**
2032 * e1000_free_tx_resources - Free Tx Resources per Queue
2033 * @adapter: board private structure
2034 * @tx_ring: Tx descriptor ring for a specific queue
2035 *
2036 * Free all transmit software resources
2037 **/
2038
2039 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2040 struct e1000_tx_ring *tx_ring)
2041 {
2042 struct pci_dev *pdev = adapter->pdev;
2043
2044 e1000_clean_tx_ring(adapter, tx_ring);
2045
2046 vfree(tx_ring->buffer_info);
2047 tx_ring->buffer_info = NULL;
2048
2049 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2050
2051 tx_ring->desc = NULL;
2052 }
2053
2054 /**
2055 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2056 * @adapter: board private structure
2057 *
2058 * Free all transmit software resources
2059 **/
2060
2061 void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2062 {
2063 int i;
2064
2065 for (i = 0; i < adapter->num_tx_queues; i++)
2066 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2067 }
2068
2069 static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2070 struct e1000_buffer *buffer_info)
2071 {
2072 buffer_info->dma = 0;
2073 if (buffer_info->skb) {
2074 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
2075 DMA_TO_DEVICE);
2076 dev_kfree_skb_any(buffer_info->skb);
2077 buffer_info->skb = NULL;
2078 }
2079 buffer_info->time_stamp = 0;
2080 /* buffer_info must be completely set up in the transmit path */
2081 }
2082
2083 /**
2084 * e1000_clean_tx_ring - Free Tx Buffers
2085 * @adapter: board private structure
2086 * @tx_ring: ring to be cleaned
2087 **/
2088
2089 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2090 struct e1000_tx_ring *tx_ring)
2091 {
2092 struct e1000_hw *hw = &adapter->hw;
2093 struct e1000_buffer *buffer_info;
2094 unsigned long size;
2095 unsigned int i;
2096
2097 /* Free all the Tx ring sk_buffs */
2098
2099 for (i = 0; i < tx_ring->count; i++) {
2100 buffer_info = &tx_ring->buffer_info[i];
2101 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2102 }
2103
2104 size = sizeof(struct e1000_buffer) * tx_ring->count;
2105 memset(tx_ring->buffer_info, 0, size);
2106
2107 /* Zero out the descriptor ring */
2108
2109 memset(tx_ring->desc, 0, tx_ring->size);
2110
2111 tx_ring->next_to_use = 0;
2112 tx_ring->next_to_clean = 0;
2113 tx_ring->last_tx_tso = 0;
2114
2115 writel(0, hw->hw_addr + tx_ring->tdh);
2116 writel(0, hw->hw_addr + tx_ring->tdt);
2117 }
2118
2119 /**
2120 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2121 * @adapter: board private structure
2122 **/
2123
2124 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2125 {
2126 int i;
2127
2128 for (i = 0; i < adapter->num_tx_queues; i++)
2129 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2130 }
2131
2132 /**
2133 * e1000_free_rx_resources - Free Rx Resources
2134 * @adapter: board private structure
2135 * @rx_ring: ring to clean the resources from
2136 *
2137 * Free all receive software resources
2138 **/
2139
2140 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2141 struct e1000_rx_ring *rx_ring)
2142 {
2143 struct pci_dev *pdev = adapter->pdev;
2144
2145 e1000_clean_rx_ring(adapter, rx_ring);
2146
2147 vfree(rx_ring->buffer_info);
2148 rx_ring->buffer_info = NULL;
2149
2150 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2151
2152 rx_ring->desc = NULL;
2153 }
2154
2155 /**
2156 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2157 * @adapter: board private structure
2158 *
2159 * Free all receive software resources
2160 **/
2161
2162 void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2163 {
2164 int i;
2165
2166 for (i = 0; i < adapter->num_rx_queues; i++)
2167 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2168 }
2169
2170 /**
2171 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2172 * @adapter: board private structure
2173 * @rx_ring: ring to free buffers from
2174 **/
2175
2176 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2177 struct e1000_rx_ring *rx_ring)
2178 {
2179 struct e1000_hw *hw = &adapter->hw;
2180 struct e1000_buffer *buffer_info;
2181 struct pci_dev *pdev = adapter->pdev;
2182 unsigned long size;
2183 unsigned int i;
2184
2185 /* Free all the Rx ring sk_buffs */
2186 for (i = 0; i < rx_ring->count; i++) {
2187 buffer_info = &rx_ring->buffer_info[i];
2188 if (buffer_info->dma) {
2189 pci_unmap_single(pdev,
2190 buffer_info->dma,
2191 buffer_info->length,
2192 PCI_DMA_FROMDEVICE);
2193 }
2194
2195 buffer_info->dma = 0;
2196
2197 if (buffer_info->skb) {
2198 dev_kfree_skb(buffer_info->skb);
2199 buffer_info->skb = NULL;
2200 }
2201 }
2202
2203 size = sizeof(struct e1000_buffer) * rx_ring->count;
2204 memset(rx_ring->buffer_info, 0, size);
2205
2206 /* Zero out the descriptor ring */
2207
2208 memset(rx_ring->desc, 0, rx_ring->size);
2209
2210 rx_ring->next_to_clean = 0;
2211 rx_ring->next_to_use = 0;
2212
2213 writel(0, hw->hw_addr + rx_ring->rdh);
2214 writel(0, hw->hw_addr + rx_ring->rdt);
2215 }
2216
2217 /**
2218 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2219 * @adapter: board private structure
2220 **/
2221
2222 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2223 {
2224 int i;
2225
2226 for (i = 0; i < adapter->num_rx_queues; i++)
2227 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2228 }
2229
2230 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2231 * and memory write and invalidate disabled for certain operations
2232 */
2233 static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
2234 {
2235 struct e1000_hw *hw = &adapter->hw;
2236 struct net_device *netdev = adapter->netdev;
2237 u32 rctl;
2238
2239 e1000_pci_clear_mwi(hw);
2240
2241 rctl = er32(RCTL);
2242 rctl |= E1000_RCTL_RST;
2243 ew32(RCTL, rctl);
2244 E1000_WRITE_FLUSH();
2245 mdelay(5);
2246
2247 if (netif_running(netdev))
2248 e1000_clean_all_rx_rings(adapter);
2249 }
2250
2251 static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
2252 {
2253 struct e1000_hw *hw = &adapter->hw;
2254 struct net_device *netdev = adapter->netdev;
2255 u32 rctl;
2256
2257 rctl = er32(RCTL);
2258 rctl &= ~E1000_RCTL_RST;
2259 ew32(RCTL, rctl);
2260 E1000_WRITE_FLUSH();
2261 mdelay(5);
2262
2263 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2264 e1000_pci_set_mwi(hw);
2265
2266 if (netif_running(netdev)) {
2267 /* No need to loop, because 82542 supports only 1 queue */
2268 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2269 e1000_configure_rx(adapter);
2270 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2271 }
2272 }
2273
2274 /**
2275 * e1000_set_mac - Change the Ethernet Address of the NIC
2276 * @netdev: network interface device structure
2277 * @p: pointer to an address structure
2278 *
2279 * Returns 0 on success, negative on failure
2280 **/
2281
2282 static int e1000_set_mac(struct net_device *netdev, void *p)
2283 {
2284 struct e1000_adapter *adapter = netdev_priv(netdev);
2285 struct e1000_hw *hw = &adapter->hw;
2286 struct sockaddr *addr = p;
2287
2288 if (!is_valid_ether_addr(addr->sa_data))
2289 return -EADDRNOTAVAIL;
2290
2291 /* 82542 2.0 needs to be in reset to write receive address registers */
2292
2293 if (hw->mac_type == e1000_82542_rev2_0)
2294 e1000_enter_82542_rst(adapter);
2295
2296 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2297 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
2298
2299 e1000_rar_set(hw, hw->mac_addr, 0);
2300
2301 /* With 82571 controllers, LAA may be overwritten (with the default)
2302 * due to controller reset from the other port. */
2303 if (hw->mac_type == e1000_82571) {
2304 /* activate the work around */
2305 hw->laa_is_present = 1;
2306
2307 /* Hold a copy of the LAA in RAR[14] This is done so that
2308 * between the time RAR[0] gets clobbered and the time it
2309 * gets fixed (in e1000_watchdog), the actual LAA is in one
2310 * of the RARs and no incoming packets directed to this port
2311 * are dropped. Eventaully the LAA will be in RAR[0] and
2312 * RAR[14] */
2313 e1000_rar_set(hw, hw->mac_addr,
2314 E1000_RAR_ENTRIES - 1);
2315 }
2316
2317 if (hw->mac_type == e1000_82542_rev2_0)
2318 e1000_leave_82542_rst(adapter);
2319
2320 return 0;
2321 }
2322
2323 /**
2324 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
2325 * @netdev: network interface device structure
2326 *
2327 * The set_rx_mode entry point is called whenever the unicast or multicast
2328 * address lists or the network interface flags are updated. This routine is
2329 * responsible for configuring the hardware for proper unicast, multicast,
2330 * promiscuous mode, and all-multi behavior.
2331 **/
2332
2333 static void e1000_set_rx_mode(struct net_device *netdev)
2334 {
2335 struct e1000_adapter *adapter = netdev_priv(netdev);
2336 struct e1000_hw *hw = &adapter->hw;
2337 struct netdev_hw_addr *ha;
2338 bool use_uc = false;
2339 struct dev_addr_list *mc_ptr;
2340 u32 rctl;
2341 u32 hash_value;
2342 int i, rar_entries = E1000_RAR_ENTRIES;
2343 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2344 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2345 E1000_NUM_MTA_REGISTERS;
2346 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2347
2348 if (!mcarray) {
2349 DPRINTK(PROBE, ERR, "memory allocation failed\n");
2350 return;
2351 }
2352
2353 if (hw->mac_type == e1000_ich8lan)
2354 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2355
2356 /* reserve RAR[14] for LAA over-write work-around */
2357 if (hw->mac_type == e1000_82571)
2358 rar_entries--;
2359
2360 /* Check for Promiscuous and All Multicast modes */
2361
2362 rctl = er32(RCTL);
2363
2364 if (netdev->flags & IFF_PROMISC) {
2365 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2366 rctl &= ~E1000_RCTL_VFE;
2367 } else {
2368 if (netdev->flags & IFF_ALLMULTI) {
2369 rctl |= E1000_RCTL_MPE;
2370 } else {
2371 rctl &= ~E1000_RCTL_MPE;
2372 }
2373 if (adapter->hw.mac_type != e1000_ich8lan)
2374 rctl |= E1000_RCTL_VFE;
2375 }
2376
2377 if (netdev->uc.count > rar_entries - 1) {
2378 rctl |= E1000_RCTL_UPE;
2379 } else if (!(netdev->flags & IFF_PROMISC)) {
2380 rctl &= ~E1000_RCTL_UPE;
2381 use_uc = true;
2382 }
2383
2384 ew32(RCTL, rctl);
2385
2386 /* 82542 2.0 needs to be in reset to write receive address registers */
2387
2388 if (hw->mac_type == e1000_82542_rev2_0)
2389 e1000_enter_82542_rst(adapter);
2390
2391 /* load the first 14 addresses into the exact filters 1-14. Unicast
2392 * addresses take precedence to avoid disabling unicast filtering
2393 * when possible.
2394 *
2395 * RAR 0 is used for the station MAC adddress
2396 * if there are not 14 addresses, go ahead and clear the filters
2397 * -- with 82571 controllers only 0-13 entries are filled here
2398 */
2399 i = 1;
2400 if (use_uc)
2401 list_for_each_entry(ha, &netdev->uc.list, list) {
2402 if (i == rar_entries)
2403 break;
2404 e1000_rar_set(hw, ha->addr, i++);
2405 }
2406
2407 WARN_ON(i == rar_entries);
2408
2409 mc_ptr = netdev->mc_list;
2410
2411 for (; i < rar_entries; i++) {
2412 if (mc_ptr) {
2413 e1000_rar_set(hw, mc_ptr->da_addr, i);
2414 mc_ptr = mc_ptr->next;
2415 } else {
2416 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2417 E1000_WRITE_FLUSH();
2418 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2419 E1000_WRITE_FLUSH();
2420 }
2421 }
2422
2423 /* load any remaining addresses into the hash table */
2424
2425 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2426 u32 hash_reg, hash_bit, mta;
2427 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
2428 hash_reg = (hash_value >> 5) & 0x7F;
2429 hash_bit = hash_value & 0x1F;
2430 mta = (1 << hash_bit);
2431 mcarray[hash_reg] |= mta;
2432 }
2433
2434 /* write the hash table completely, write from bottom to avoid
2435 * both stupid write combining chipsets, and flushing each write */
2436 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2437 /*
2438 * If we are on an 82544 has an errata where writing odd
2439 * offsets overwrites the previous even offset, but writing
2440 * backwards over the range solves the issue by always
2441 * writing the odd offset first
2442 */
2443 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2444 }
2445 E1000_WRITE_FLUSH();
2446
2447 if (hw->mac_type == e1000_82542_rev2_0)
2448 e1000_leave_82542_rst(adapter);
2449
2450 kfree(mcarray);
2451 }
2452
2453 /* Need to wait a few seconds after link up to get diagnostic information from
2454 * the phy */
2455
2456 static void e1000_update_phy_info(unsigned long data)
2457 {
2458 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
2459 struct e1000_hw *hw = &adapter->hw;
2460 e1000_phy_get_info(hw, &adapter->phy_info);
2461 }
2462
2463 /**
2464 * e1000_82547_tx_fifo_stall - Timer Call-back
2465 * @data: pointer to adapter cast into an unsigned long
2466 **/
2467
2468 static void e1000_82547_tx_fifo_stall(unsigned long data)
2469 {
2470 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
2471 struct e1000_hw *hw = &adapter->hw;
2472 struct net_device *netdev = adapter->netdev;
2473 u32 tctl;
2474
2475 if (atomic_read(&adapter->tx_fifo_stall)) {
2476 if ((er32(TDT) == er32(TDH)) &&
2477 (er32(TDFT) == er32(TDFH)) &&
2478 (er32(TDFTS) == er32(TDFHS))) {
2479 tctl = er32(TCTL);
2480 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2481 ew32(TDFT, adapter->tx_head_addr);
2482 ew32(TDFH, adapter->tx_head_addr);
2483 ew32(TDFTS, adapter->tx_head_addr);
2484 ew32(TDFHS, adapter->tx_head_addr);
2485 ew32(TCTL, tctl);
2486 E1000_WRITE_FLUSH();
2487
2488 adapter->tx_fifo_head = 0;
2489 atomic_set(&adapter->tx_fifo_stall, 0);
2490 netif_wake_queue(netdev);
2491 } else {
2492 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2493 }
2494 }
2495 }
2496
2497 /**
2498 * e1000_watchdog - Timer Call-back
2499 * @data: pointer to adapter cast into an unsigned long
2500 **/
2501 static void e1000_watchdog(unsigned long data)
2502 {
2503 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
2504 struct e1000_hw *hw = &adapter->hw;
2505 struct net_device *netdev = adapter->netdev;
2506 struct e1000_tx_ring *txdr = adapter->tx_ring;
2507 u32 link, tctl;
2508 s32 ret_val;
2509
2510 ret_val = e1000_check_for_link(hw);
2511 if ((ret_val == E1000_ERR_PHY) &&
2512 (hw->phy_type == e1000_phy_igp_3) &&
2513 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2514 /* See e1000_kumeran_lock_loss_workaround() */
2515 DPRINTK(LINK, INFO,
2516 "Gigabit has been disabled, downgrading speed\n");
2517 }
2518
2519 if (hw->mac_type == e1000_82573) {
2520 e1000_enable_tx_pkt_filtering(hw);
2521 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2522 e1000_update_mng_vlan(adapter);
2523 }
2524
2525 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2526 !(er32(TXCW) & E1000_TXCW_ANE))
2527 link = !hw->serdes_link_down;
2528 else
2529 link = er32(STATUS) & E1000_STATUS_LU;
2530
2531 if (link) {
2532 if (!netif_carrier_ok(netdev)) {
2533 u32 ctrl;
2534 bool txb2b = true;
2535 e1000_get_speed_and_duplex(hw,
2536 &adapter->link_speed,
2537 &adapter->link_duplex);
2538
2539 ctrl = er32(CTRL);
2540 printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, "
2541 "Flow Control: %s\n",
2542 netdev->name,
2543 adapter->link_speed,
2544 adapter->link_duplex == FULL_DUPLEX ?
2545 "Full Duplex" : "Half Duplex",
2546 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2547 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2548 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2549 E1000_CTRL_TFCE) ? "TX" : "None" )));
2550
2551 /* tweak tx_queue_len according to speed/duplex
2552 * and adjust the timeout factor */
2553 netdev->tx_queue_len = adapter->tx_queue_len;
2554 adapter->tx_timeout_factor = 1;
2555 switch (adapter->link_speed) {
2556 case SPEED_10:
2557 txb2b = false;
2558 netdev->tx_queue_len = 10;
2559 adapter->tx_timeout_factor = 8;
2560 break;
2561 case SPEED_100:
2562 txb2b = false;
2563 netdev->tx_queue_len = 100;
2564 /* maybe add some timeout factor ? */
2565 break;
2566 }
2567
2568 if ((hw->mac_type == e1000_82571 ||
2569 hw->mac_type == e1000_82572) &&
2570 !txb2b) {
2571 u32 tarc0;
2572 tarc0 = er32(TARC0);
2573 tarc0 &= ~(1 << 21);
2574 ew32(TARC0, tarc0);
2575 }
2576
2577 /* disable TSO for pcie and 10/100 speeds, to avoid
2578 * some hardware issues */
2579 if (!adapter->tso_force &&
2580 hw->bus_type == e1000_bus_type_pci_express){
2581 switch (adapter->link_speed) {
2582 case SPEED_10:
2583 case SPEED_100:
2584 DPRINTK(PROBE,INFO,
2585 "10/100 speed: disabling TSO\n");
2586 netdev->features &= ~NETIF_F_TSO;
2587 netdev->features &= ~NETIF_F_TSO6;
2588 break;
2589 case SPEED_1000:
2590 netdev->features |= NETIF_F_TSO;
2591 netdev->features |= NETIF_F_TSO6;
2592 break;
2593 default:
2594 /* oops */
2595 break;
2596 }
2597 }
2598
2599 /* enable transmits in the hardware, need to do this
2600 * after setting TARC0 */
2601 tctl = er32(TCTL);
2602 tctl |= E1000_TCTL_EN;
2603 ew32(TCTL, tctl);
2604
2605 netif_carrier_on(netdev);
2606 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2607 adapter->smartspeed = 0;
2608 } else {
2609 /* make sure the receive unit is started */
2610 if (hw->rx_needs_kicking) {
2611 u32 rctl = er32(RCTL);
2612 ew32(RCTL, rctl | E1000_RCTL_EN);
2613 }
2614 }
2615 } else {
2616 if (netif_carrier_ok(netdev)) {
2617 adapter->link_speed = 0;
2618 adapter->link_duplex = 0;
2619 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2620 netdev->name);
2621 netif_carrier_off(netdev);
2622 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2623
2624 /* 80003ES2LAN workaround--
2625 * For packet buffer work-around on link down event;
2626 * disable receives in the ISR and
2627 * reset device here in the watchdog
2628 */
2629 if (hw->mac_type == e1000_80003es2lan)
2630 /* reset device */
2631 schedule_work(&adapter->reset_task);
2632 }
2633
2634 e1000_smartspeed(adapter);
2635 }
2636
2637 e1000_update_stats(adapter);
2638
2639 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2640 adapter->tpt_old = adapter->stats.tpt;
2641 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
2642 adapter->colc_old = adapter->stats.colc;
2643
2644 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2645 adapter->gorcl_old = adapter->stats.gorcl;
2646 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2647 adapter->gotcl_old = adapter->stats.gotcl;
2648
2649 e1000_update_adaptive(hw);
2650
2651 if (!netif_carrier_ok(netdev)) {
2652 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2653 /* We've lost link, so the controller stops DMA,
2654 * but we've got queued Tx work that's never going
2655 * to get done, so reset controller to flush Tx.
2656 * (Do the reset outside of interrupt context). */
2657 adapter->tx_timeout_count++;
2658 schedule_work(&adapter->reset_task);
2659 /* return immediately since reset is imminent */
2660 return;
2661 }
2662 }
2663
2664 /* Cause software interrupt to ensure rx ring is cleaned */
2665 ew32(ICS, E1000_ICS_RXDMT0);
2666
2667 /* Force detection of hung controller every watchdog period */
2668 adapter->detect_tx_hung = true;
2669
2670 /* With 82571 controllers, LAA may be overwritten due to controller
2671 * reset from the other port. Set the appropriate LAA in RAR[0] */
2672 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2673 e1000_rar_set(hw, hw->mac_addr, 0);
2674
2675 /* Reset the timer */
2676 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2677 }
2678
2679 enum latency_range {
2680 lowest_latency = 0,
2681 low_latency = 1,
2682 bulk_latency = 2,
2683 latency_invalid = 255
2684 };
2685
2686 /**
2687 * e1000_update_itr - update the dynamic ITR value based on statistics
2688 * Stores a new ITR value based on packets and byte
2689 * counts during the last interrupt. The advantage of per interrupt
2690 * computation is faster updates and more accurate ITR for the current
2691 * traffic pattern. Constants in this function were computed
2692 * based on theoretical maximum wire speed and thresholds were set based
2693 * on testing data as well as attempting to minimize response time
2694 * while increasing bulk throughput.
2695 * this functionality is controlled by the InterruptThrottleRate module
2696 * parameter (see e1000_param.c)
2697 * @adapter: pointer to adapter
2698 * @itr_setting: current adapter->itr
2699 * @packets: the number of packets during this measurement interval
2700 * @bytes: the number of bytes during this measurement interval
2701 **/
2702 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2703 u16 itr_setting, int packets, int bytes)
2704 {
2705 unsigned int retval = itr_setting;
2706 struct e1000_hw *hw = &adapter->hw;
2707
2708 if (unlikely(hw->mac_type < e1000_82540))
2709 goto update_itr_done;
2710
2711 if (packets == 0)
2712 goto update_itr_done;
2713
2714 switch (itr_setting) {
2715 case lowest_latency:
2716 /* jumbo frames get bulk treatment*/
2717 if (bytes/packets > 8000)
2718 retval = bulk_latency;
2719 else if ((packets < 5) && (bytes > 512))
2720 retval = low_latency;
2721 break;
2722 case low_latency: /* 50 usec aka 20000 ints/s */
2723 if (bytes > 10000) {
2724 /* jumbo frames need bulk latency setting */
2725 if (bytes/packets > 8000)
2726 retval = bulk_latency;
2727 else if ((packets < 10) || ((bytes/packets) > 1200))
2728 retval = bulk_latency;
2729 else if ((packets > 35))
2730 retval = lowest_latency;
2731 } else if (bytes/packets > 2000)
2732 retval = bulk_latency;
2733 else if (packets <= 2 && bytes < 512)
2734 retval = lowest_latency;
2735 break;
2736 case bulk_latency: /* 250 usec aka 4000 ints/s */
2737 if (bytes > 25000) {
2738 if (packets > 35)
2739 retval = low_latency;
2740 } else if (bytes < 6000) {
2741 retval = low_latency;
2742 }
2743 break;
2744 }
2745
2746 update_itr_done:
2747 return retval;
2748 }
2749
2750 static void e1000_set_itr(struct e1000_adapter *adapter)
2751 {
2752 struct e1000_hw *hw = &adapter->hw;
2753 u16 current_itr;
2754 u32 new_itr = adapter->itr;
2755
2756 if (unlikely(hw->mac_type < e1000_82540))
2757 return;
2758
2759 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2760 if (unlikely(adapter->link_speed != SPEED_1000)) {
2761 current_itr = 0;
2762 new_itr = 4000;
2763 goto set_itr_now;
2764 }
2765
2766 adapter->tx_itr = e1000_update_itr(adapter,
2767 adapter->tx_itr,
2768 adapter->total_tx_packets,
2769 adapter->total_tx_bytes);
2770 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2771 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2772 adapter->tx_itr = low_latency;
2773
2774 adapter->rx_itr = e1000_update_itr(adapter,
2775 adapter->rx_itr,
2776 adapter->total_rx_packets,
2777 adapter->total_rx_bytes);
2778 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2779 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2780 adapter->rx_itr = low_latency;
2781
2782 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2783
2784 switch (current_itr) {
2785 /* counts and packets in update_itr are dependent on these numbers */
2786 case lowest_latency:
2787 new_itr = 70000;
2788 break;
2789 case low_latency:
2790 new_itr = 20000; /* aka hwitr = ~200 */
2791 break;
2792 case bulk_latency:
2793 new_itr = 4000;
2794 break;
2795 default:
2796 break;
2797 }
2798
2799 set_itr_now:
2800 if (new_itr != adapter->itr) {
2801 /* this attempts to bias the interrupt rate towards Bulk
2802 * by adding intermediate steps when interrupt rate is
2803 * increasing */
2804 new_itr = new_itr > adapter->itr ?
2805 min(adapter->itr + (new_itr >> 2), new_itr) :
2806 new_itr;
2807 adapter->itr = new_itr;
2808 ew32(ITR, 1000000000 / (new_itr * 256));
2809 }
2810
2811 return;
2812 }
2813
2814 #define E1000_TX_FLAGS_CSUM 0x00000001
2815 #define E1000_TX_FLAGS_VLAN 0x00000002
2816 #define E1000_TX_FLAGS_TSO 0x00000004
2817 #define E1000_TX_FLAGS_IPV4 0x00000008
2818 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2819 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2820
2821 static int e1000_tso(struct e1000_adapter *adapter,
2822 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
2823 {
2824 struct e1000_context_desc *context_desc;
2825 struct e1000_buffer *buffer_info;
2826 unsigned int i;
2827 u32 cmd_length = 0;
2828 u16 ipcse = 0, tucse, mss;
2829 u8 ipcss, ipcso, tucss, tucso, hdr_len;
2830 int err;
2831
2832 if (skb_is_gso(skb)) {
2833 if (skb_header_cloned(skb)) {
2834 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2835 if (err)
2836 return err;
2837 }
2838
2839 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2840 mss = skb_shinfo(skb)->gso_size;
2841 if (skb->protocol == htons(ETH_P_IP)) {
2842 struct iphdr *iph = ip_hdr(skb);
2843 iph->tot_len = 0;
2844 iph->check = 0;
2845 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2846 iph->daddr, 0,
2847 IPPROTO_TCP,
2848 0);
2849 cmd_length = E1000_TXD_CMD_IP;
2850 ipcse = skb_transport_offset(skb) - 1;
2851 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2852 ipv6_hdr(skb)->payload_len = 0;
2853 tcp_hdr(skb)->check =
2854 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2855 &ipv6_hdr(skb)->daddr,
2856 0, IPPROTO_TCP, 0);
2857 ipcse = 0;
2858 }
2859 ipcss = skb_network_offset(skb);
2860 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2861 tucss = skb_transport_offset(skb);
2862 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2863 tucse = 0;
2864
2865 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2866 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2867
2868 i = tx_ring->next_to_use;
2869 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2870 buffer_info = &tx_ring->buffer_info[i];
2871
2872 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2873 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2874 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2875 context_desc->upper_setup.tcp_fields.tucss = tucss;
2876 context_desc->upper_setup.tcp_fields.tucso = tucso;
2877 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2878 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2879 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2880 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2881
2882 buffer_info->time_stamp = jiffies;
2883 buffer_info->next_to_watch = i;
2884
2885 if (++i == tx_ring->count) i = 0;
2886 tx_ring->next_to_use = i;
2887
2888 return true;
2889 }
2890 return false;
2891 }
2892
2893 static bool e1000_tx_csum(struct e1000_adapter *adapter,
2894 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
2895 {
2896 struct e1000_context_desc *context_desc;
2897 struct e1000_buffer *buffer_info;
2898 unsigned int i;
2899 u8 css;
2900 u32 cmd_len = E1000_TXD_CMD_DEXT;
2901
2902 if (skb->ip_summed != CHECKSUM_PARTIAL)
2903 return false;
2904
2905 switch (skb->protocol) {
2906 case cpu_to_be16(ETH_P_IP):
2907 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2908 cmd_len |= E1000_TXD_CMD_TCP;
2909 break;
2910 case cpu_to_be16(ETH_P_IPV6):
2911 /* XXX not handling all IPV6 headers */
2912 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2913 cmd_len |= E1000_TXD_CMD_TCP;
2914 break;
2915 default:
2916 if (unlikely(net_ratelimit()))
2917 DPRINTK(DRV, WARNING,
2918 "checksum_partial proto=%x!\n", skb->protocol);
2919 break;
2920 }
2921
2922 css = skb_transport_offset(skb);
2923
2924 i = tx_ring->next_to_use;
2925 buffer_info = &tx_ring->buffer_info[i];
2926 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2927
2928 context_desc->lower_setup.ip_config = 0;
2929 context_desc->upper_setup.tcp_fields.tucss = css;
2930 context_desc->upper_setup.tcp_fields.tucso =
2931 css + skb->csum_offset;
2932 context_desc->upper_setup.tcp_fields.tucse = 0;
2933 context_desc->tcp_seg_setup.data = 0;
2934 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
2935
2936 buffer_info->time_stamp = jiffies;
2937 buffer_info->next_to_watch = i;
2938
2939 if (unlikely(++i == tx_ring->count)) i = 0;
2940 tx_ring->next_to_use = i;
2941
2942 return true;
2943 }
2944
2945 #define E1000_MAX_TXD_PWR 12
2946 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2947
2948 static int e1000_tx_map(struct e1000_adapter *adapter,
2949 struct e1000_tx_ring *tx_ring,
2950 struct sk_buff *skb, unsigned int first,
2951 unsigned int max_per_txd, unsigned int nr_frags,
2952 unsigned int mss)
2953 {
2954 struct e1000_hw *hw = &adapter->hw;
2955 struct e1000_buffer *buffer_info;
2956 unsigned int len = skb_headlen(skb);
2957 unsigned int offset, size, count = 0, i;
2958 unsigned int f;
2959 dma_addr_t *map;
2960
2961 i = tx_ring->next_to_use;
2962
2963 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
2964 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
2965 return 0;
2966 }
2967
2968 map = skb_shinfo(skb)->dma_maps;
2969 offset = 0;
2970
2971 while (len) {
2972 buffer_info = &tx_ring->buffer_info[i];
2973 size = min(len, max_per_txd);
2974 /* Workaround for Controller erratum --
2975 * descriptor for non-tso packet in a linear SKB that follows a
2976 * tso gets written back prematurely before the data is fully
2977 * DMA'd to the controller */
2978 if (!skb->data_len && tx_ring->last_tx_tso &&
2979 !skb_is_gso(skb)) {
2980 tx_ring->last_tx_tso = 0;
2981 size -= 4;
2982 }
2983
2984 /* Workaround for premature desc write-backs
2985 * in TSO mode. Append 4-byte sentinel desc */
2986 if (unlikely(mss && !nr_frags && size == len && size > 8))
2987 size -= 4;
2988 /* work-around for errata 10 and it applies
2989 * to all controllers in PCI-X mode
2990 * The fix is to make sure that the first descriptor of a
2991 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2992 */
2993 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
2994 (size > 2015) && count == 0))
2995 size = 2015;
2996
2997 /* Workaround for potential 82544 hang in PCI-X. Avoid
2998 * terminating buffers within evenly-aligned dwords. */
2999 if (unlikely(adapter->pcix_82544 &&
3000 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3001 size > 4))
3002 size -= 4;
3003
3004 buffer_info->length = size;
3005 buffer_info->dma = skb_shinfo(skb)->dma_head + offset;
3006 buffer_info->time_stamp = jiffies;
3007 buffer_info->next_to_watch = i;
3008
3009 len -= size;
3010 offset += size;
3011 count++;
3012 if (len) {
3013 i++;
3014 if (unlikely(i == tx_ring->count))
3015 i = 0;
3016 }
3017 }
3018
3019 for (f = 0; f < nr_frags; f++) {
3020 struct skb_frag_struct *frag;
3021
3022 frag = &skb_shinfo(skb)->frags[f];
3023 len = frag->size;
3024 offset = 0;
3025
3026 while (len) {
3027 i++;
3028 if (unlikely(i == tx_ring->count))
3029 i = 0;
3030
3031 buffer_info = &tx_ring->buffer_info[i];
3032 size = min(len, max_per_txd);
3033 /* Workaround for premature desc write-backs
3034 * in TSO mode. Append 4-byte sentinel desc */
3035 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3036 size -= 4;
3037 /* Workaround for potential 82544 hang in PCI-X.
3038 * Avoid terminating buffers within evenly-aligned
3039 * dwords. */
3040 if (unlikely(adapter->pcix_82544 &&
3041 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3042 size > 4))
3043 size -= 4;
3044
3045 buffer_info->length = size;
3046 buffer_info->dma = map[f] + offset;
3047 buffer_info->time_stamp = jiffies;
3048 buffer_info->next_to_watch = i;
3049
3050 len -= size;
3051 offset += size;
3052 count++;
3053 }
3054 }
3055
3056 tx_ring->buffer_info[i].skb = skb;
3057 tx_ring->buffer_info[first].next_to_watch = i;
3058
3059 return count;
3060 }
3061
3062 static void e1000_tx_queue(struct e1000_adapter *adapter,
3063 struct e1000_tx_ring *tx_ring, int tx_flags,
3064 int count)
3065 {
3066 struct e1000_hw *hw = &adapter->hw;
3067 struct e1000_tx_desc *tx_desc = NULL;
3068 struct e1000_buffer *buffer_info;
3069 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3070 unsigned int i;
3071
3072 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3073 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3074 E1000_TXD_CMD_TSE;
3075 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3076
3077 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3078 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3079 }
3080
3081 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3082 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3083 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3084 }
3085
3086 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3087 txd_lower |= E1000_TXD_CMD_VLE;
3088 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3089 }
3090
3091 i = tx_ring->next_to_use;
3092
3093 while (count--) {
3094 buffer_info = &tx_ring->buffer_info[i];
3095 tx_desc = E1000_TX_DESC(*tx_ring, i);
3096 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3097 tx_desc->lower.data =
3098 cpu_to_le32(txd_lower | buffer_info->length);
3099 tx_desc->upper.data = cpu_to_le32(txd_upper);
3100 if (unlikely(++i == tx_ring->count)) i = 0;
3101 }
3102
3103 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3104
3105 /* Force memory writes to complete before letting h/w
3106 * know there are new descriptors to fetch. (Only
3107 * applicable for weak-ordered memory model archs,
3108 * such as IA-64). */
3109 wmb();
3110
3111 tx_ring->next_to_use = i;
3112 writel(i, hw->hw_addr + tx_ring->tdt);
3113 /* we need this if more than one processor can write to our tail
3114 * at a time, it syncronizes IO on IA64/Altix systems */
3115 mmiowb();
3116 }
3117
3118 /**
3119 * 82547 workaround to avoid controller hang in half-duplex environment.
3120 * The workaround is to avoid queuing a large packet that would span
3121 * the internal Tx FIFO ring boundary by notifying the stack to resend
3122 * the packet at a later time. This gives the Tx FIFO an opportunity to
3123 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3124 * to the beginning of the Tx FIFO.
3125 **/
3126
3127 #define E1000_FIFO_HDR 0x10
3128 #define E1000_82547_PAD_LEN 0x3E0
3129
3130 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3131 struct sk_buff *skb)
3132 {
3133 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3134 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
3135
3136 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3137
3138 if (adapter->link_duplex != HALF_DUPLEX)
3139 goto no_fifo_stall_required;
3140
3141 if (atomic_read(&adapter->tx_fifo_stall))
3142 return 1;
3143
3144 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3145 atomic_set(&adapter->tx_fifo_stall, 1);
3146 return 1;
3147 }
3148
3149 no_fifo_stall_required:
3150 adapter->tx_fifo_head += skb_fifo_len;
3151 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3152 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3153 return 0;
3154 }
3155
3156 #define MINIMUM_DHCP_PACKET_SIZE 282
3157 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3158 struct sk_buff *skb)
3159 {
3160 struct e1000_hw *hw = &adapter->hw;
3161 u16 length, offset;
3162 if (vlan_tx_tag_present(skb)) {
3163 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3164 ( hw->mng_cookie.status &
3165 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3166 return 0;
3167 }
3168 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3169 struct ethhdr *eth = (struct ethhdr *)skb->data;
3170 if ((htons(ETH_P_IP) == eth->h_proto)) {
3171 const struct iphdr *ip =
3172 (struct iphdr *)((u8 *)skb->data+14);
3173 if (IPPROTO_UDP == ip->protocol) {
3174 struct udphdr *udp =
3175 (struct udphdr *)((u8 *)ip +
3176 (ip->ihl << 2));
3177 if (ntohs(udp->dest) == 67) {
3178 offset = (u8 *)udp + 8 - skb->data;
3179 length = skb->len - offset;
3180
3181 return e1000_mng_write_dhcp_info(hw,
3182 (u8 *)udp + 8,
3183 length);
3184 }
3185 }
3186 }
3187 }
3188 return 0;
3189 }
3190
3191 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3192 {
3193 struct e1000_adapter *adapter = netdev_priv(netdev);
3194 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3195
3196 netif_stop_queue(netdev);
3197 /* Herbert's original patch had:
3198 * smp_mb__after_netif_stop_queue();
3199 * but since that doesn't exist yet, just open code it. */
3200 smp_mb();
3201
3202 /* We need to check again in a case another CPU has just
3203 * made room available. */
3204 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3205 return -EBUSY;
3206
3207 /* A reprieve! */
3208 netif_start_queue(netdev);
3209 ++adapter->restart_queue;
3210 return 0;
3211 }
3212
3213 static int e1000_maybe_stop_tx(struct net_device *netdev,
3214 struct e1000_tx_ring *tx_ring, int size)
3215 {
3216 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3217 return 0;
3218 return __e1000_maybe_stop_tx(netdev, size);
3219 }
3220
3221 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3222 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3223 {
3224 struct e1000_adapter *adapter = netdev_priv(netdev);
3225 struct e1000_hw *hw = &adapter->hw;
3226 struct e1000_tx_ring *tx_ring;
3227 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3228 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3229 unsigned int tx_flags = 0;
3230 unsigned int len = skb->len - skb->data_len;
3231 unsigned int nr_frags;
3232 unsigned int mss;
3233 int count = 0;
3234 int tso;
3235 unsigned int f;
3236
3237 /* This goes back to the question of how to logically map a tx queue
3238 * to a flow. Right now, performance is impacted slightly negatively
3239 * if using multiple tx queues. If the stack breaks away from a
3240 * single qdisc implementation, we can look at this again. */
3241 tx_ring = adapter->tx_ring;
3242
3243 if (unlikely(skb->len <= 0)) {
3244 dev_kfree_skb_any(skb);
3245 return NETDEV_TX_OK;
3246 }
3247
3248 /* 82571 and newer doesn't need the workaround that limited descriptor
3249 * length to 4kB */
3250 if (hw->mac_type >= e1000_82571)
3251 max_per_txd = 8192;
3252
3253 mss = skb_shinfo(skb)->gso_size;
3254 /* The controller does a simple calculation to
3255 * make sure there is enough room in the FIFO before
3256 * initiating the DMA for each buffer. The calc is:
3257 * 4 = ceil(buffer len/mss). To make sure we don't
3258 * overrun the FIFO, adjust the max buffer len if mss
3259 * drops. */
3260 if (mss) {
3261 u8 hdr_len;
3262 max_per_txd = min(mss << 2, max_per_txd);
3263 max_txd_pwr = fls(max_per_txd) - 1;
3264
3265 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3266 * points to just header, pull a few bytes of payload from
3267 * frags into skb->data */
3268 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3269 if (skb->data_len && hdr_len == len) {
3270 switch (hw->mac_type) {
3271 unsigned int pull_size;
3272 case e1000_82544:
3273 /* Make sure we have room to chop off 4 bytes,
3274 * and that the end alignment will work out to
3275 * this hardware's requirements
3276 * NOTE: this is a TSO only workaround
3277 * if end byte alignment not correct move us
3278 * into the next dword */
3279 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3280 break;
3281 /* fall through */
3282 case e1000_82571:
3283 case e1000_82572:
3284 case e1000_82573:
3285 case e1000_ich8lan:
3286 pull_size = min((unsigned int)4, skb->data_len);
3287 if (!__pskb_pull_tail(skb, pull_size)) {
3288 DPRINTK(DRV, ERR,
3289 "__pskb_pull_tail failed.\n");
3290 dev_kfree_skb_any(skb);
3291 return NETDEV_TX_OK;
3292 }
3293 len = skb->len - skb->data_len;
3294 break;
3295 default:
3296 /* do nothing */
3297 break;
3298 }
3299 }
3300 }
3301
3302 /* reserve a descriptor for the offload context */
3303 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3304 count++;
3305 count++;
3306
3307 /* Controller Erratum workaround */
3308 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3309 count++;
3310
3311 count += TXD_USE_COUNT(len, max_txd_pwr);
3312
3313 if (adapter->pcix_82544)
3314 count++;
3315
3316 /* work-around for errata 10 and it applies to all controllers
3317 * in PCI-X mode, so add one more descriptor to the count
3318 */
3319 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
3320 (len > 2015)))
3321 count++;
3322
3323 nr_frags = skb_shinfo(skb)->nr_frags;
3324 for (f = 0; f < nr_frags; f++)
3325 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3326 max_txd_pwr);
3327 if (adapter->pcix_82544)
3328 count += nr_frags;
3329
3330
3331 if (hw->tx_pkt_filtering &&
3332 (hw->mac_type == e1000_82573))
3333 e1000_transfer_dhcp_info(adapter, skb);
3334
3335 /* need: count + 2 desc gap to keep tail from touching
3336 * head, otherwise try next time */
3337 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
3338 return NETDEV_TX_BUSY;
3339
3340 if (unlikely(hw->mac_type == e1000_82547)) {
3341 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3342 netif_stop_queue(netdev);
3343 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3344 return NETDEV_TX_BUSY;
3345 }
3346 }
3347
3348 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3349 tx_flags |= E1000_TX_FLAGS_VLAN;
3350 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3351 }
3352
3353 first = tx_ring->next_to_use;
3354
3355 tso = e1000_tso(adapter, tx_ring, skb);
3356 if (tso < 0) {
3357 dev_kfree_skb_any(skb);
3358 return NETDEV_TX_OK;
3359 }
3360
3361 if (likely(tso)) {
3362 tx_ring->last_tx_tso = 1;
3363 tx_flags |= E1000_TX_FLAGS_TSO;
3364 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3365 tx_flags |= E1000_TX_FLAGS_CSUM;
3366
3367 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3368 * 82571 hardware supports TSO capabilities for IPv6 as well...
3369 * no longer assume, we must. */
3370 if (likely(skb->protocol == htons(ETH_P_IP)))
3371 tx_flags |= E1000_TX_FLAGS_IPV4;
3372
3373 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3374 nr_frags, mss);
3375
3376 if (count) {
3377 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
3378 /* Make sure there is space in the ring for the next send. */
3379 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3380
3381 } else {
3382 dev_kfree_skb_any(skb);
3383 tx_ring->buffer_info[first].time_stamp = 0;
3384 tx_ring->next_to_use = first;
3385 }
3386
3387 return NETDEV_TX_OK;
3388 }
3389
3390 /**
3391 * e1000_tx_timeout - Respond to a Tx Hang
3392 * @netdev: network interface device structure
3393 **/
3394
3395 static void e1000_tx_timeout(struct net_device *netdev)
3396 {
3397 struct e1000_adapter *adapter = netdev_priv(netdev);
3398
3399 /* Do the reset outside of interrupt context */
3400 adapter->tx_timeout_count++;
3401 schedule_work(&adapter->reset_task);
3402 }
3403
3404 static void e1000_reset_task(struct work_struct *work)
3405 {
3406 struct e1000_adapter *adapter =
3407 container_of(work, struct e1000_adapter, reset_task);
3408
3409 e1000_reinit_locked(adapter);
3410 }
3411
3412 /**
3413 * e1000_get_stats - Get System Network Statistics
3414 * @netdev: network interface device structure
3415 *
3416 * Returns the address of the device statistics structure.
3417 * The statistics are actually updated from the timer callback.
3418 **/
3419
3420 static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
3421 {
3422 struct e1000_adapter *adapter = netdev_priv(netdev);
3423
3424 /* only return the current stats */
3425 return &adapter->net_stats;
3426 }
3427
3428 /**
3429 * e1000_change_mtu - Change the Maximum Transfer Unit
3430 * @netdev: network interface device structure
3431 * @new_mtu: new value for maximum frame size
3432 *
3433 * Returns 0 on success, negative on failure
3434 **/
3435
3436 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
3437 {
3438 struct e1000_adapter *adapter = netdev_priv(netdev);
3439 struct e1000_hw *hw = &adapter->hw;
3440 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3441 u16 eeprom_data = 0;
3442
3443 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3444 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3445 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3446 return -EINVAL;
3447 }
3448
3449 /* Adapter-specific max frame size limits. */
3450 switch (hw->mac_type) {
3451 case e1000_undefined ... e1000_82542_rev2_1:
3452 case e1000_ich8lan:
3453 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3454 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3455 return -EINVAL;
3456 }
3457 break;
3458 case e1000_82573:
3459 /* Jumbo Frames not supported if:
3460 * - this is not an 82573L device
3461 * - ASPM is enabled in any way (0x1A bits 3:2) */
3462 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
3463 &eeprom_data);
3464 if ((hw->device_id != E1000_DEV_ID_82573L) ||
3465 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3466 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3467 DPRINTK(PROBE, ERR,
3468 "Jumbo Frames not supported.\n");
3469 return -EINVAL;
3470 }
3471 break;
3472 }
3473 /* ERT will be enabled later to enable wire speed receives */
3474
3475 /* fall through to get support */
3476 case e1000_82571:
3477 case e1000_82572:
3478 case e1000_80003es2lan:
3479 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3480 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3481 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3482 return -EINVAL;
3483 }
3484 break;
3485 default:
3486 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3487 break;
3488 }
3489
3490 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3491 * means we reserve 2 more, this pushes us to allocate from the next
3492 * larger slab size
3493 * i.e. RXBUFFER_2048 --> size-4096 slab */
3494
3495 if (max_frame <= E1000_RXBUFFER_256)
3496 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3497 else if (max_frame <= E1000_RXBUFFER_512)
3498 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3499 else if (max_frame <= E1000_RXBUFFER_1024)
3500 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3501 else if (max_frame <= E1000_RXBUFFER_2048)
3502 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3503 else if (max_frame <= E1000_RXBUFFER_4096)
3504 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3505 else if (max_frame <= E1000_RXBUFFER_8192)
3506 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3507 else if (max_frame <= E1000_RXBUFFER_16384)
3508 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3509
3510 /* adjust allocation if LPE protects us, and we aren't using SBP */
3511 if (!hw->tbi_compatibility_on &&
3512 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3513 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3514 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3515
3516 netdev->mtu = new_mtu;
3517 hw->max_frame_size = max_frame;
3518
3519 if (netif_running(netdev))
3520 e1000_reinit_locked(adapter);
3521
3522 return 0;
3523 }
3524
3525 /**
3526 * e1000_update_stats - Update the board statistics counters
3527 * @adapter: board private structure
3528 **/
3529
3530 void e1000_update_stats(struct e1000_adapter *adapter)
3531 {
3532 struct e1000_hw *hw = &adapter->hw;
3533 struct pci_dev *pdev = adapter->pdev;
3534 unsigned long flags;
3535 u16 phy_tmp;
3536
3537 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3538
3539 /*
3540 * Prevent stats update while adapter is being reset, or if the pci
3541 * connection is down.
3542 */
3543 if (adapter->link_speed == 0)
3544 return;
3545 if (pci_channel_offline(pdev))
3546 return;
3547
3548 spin_lock_irqsave(&adapter->stats_lock, flags);
3549
3550 /* these counters are modified from e1000_tbi_adjust_stats,
3551 * called from the interrupt context, so they must only
3552 * be written while holding adapter->stats_lock
3553 */
3554
3555 adapter->stats.crcerrs += er32(CRCERRS);
3556 adapter->stats.gprc += er32(GPRC);
3557 adapter->stats.gorcl += er32(GORCL);
3558 adapter->stats.gorch += er32(GORCH);
3559 adapter->stats.bprc += er32(BPRC);
3560 adapter->stats.mprc += er32(MPRC);
3561 adapter->stats.roc += er32(ROC);
3562
3563 if (hw->mac_type != e1000_ich8lan) {
3564 adapter->stats.prc64 += er32(PRC64);
3565 adapter->stats.prc127 += er32(PRC127);
3566 adapter->stats.prc255 += er32(PRC255);
3567 adapter->stats.prc511 += er32(PRC511);
3568 adapter->stats.prc1023 += er32(PRC1023);
3569 adapter->stats.prc1522 += er32(PRC1522);
3570 }
3571
3572 adapter->stats.symerrs += er32(SYMERRS);
3573 adapter->stats.mpc += er32(MPC);
3574 adapter->stats.scc += er32(SCC);
3575 adapter->stats.ecol += er32(ECOL);
3576 adapter->stats.mcc += er32(MCC);
3577 adapter->stats.latecol += er32(LATECOL);
3578 adapter->stats.dc += er32(DC);
3579 adapter->stats.sec += er32(SEC);
3580 adapter->stats.rlec += er32(RLEC);
3581 adapter->stats.xonrxc += er32(XONRXC);
3582 adapter->stats.xontxc += er32(XONTXC);
3583 adapter->stats.xoffrxc += er32(XOFFRXC);
3584 adapter->stats.xofftxc += er32(XOFFTXC);
3585 adapter->stats.fcruc += er32(FCRUC);
3586 adapter->stats.gptc += er32(GPTC);
3587 adapter->stats.gotcl += er32(GOTCL);
3588 adapter->stats.gotch += er32(GOTCH);
3589 adapter->stats.rnbc += er32(RNBC);
3590 adapter->stats.ruc += er32(RUC);
3591 adapter->stats.rfc += er32(RFC);
3592 adapter->stats.rjc += er32(RJC);
3593 adapter->stats.torl += er32(TORL);
3594 adapter->stats.torh += er32(TORH);
3595 adapter->stats.totl += er32(TOTL);
3596 adapter->stats.toth += er32(TOTH);
3597 adapter->stats.tpr += er32(TPR);
3598
3599 if (hw->mac_type != e1000_ich8lan) {
3600 adapter->stats.ptc64 += er32(PTC64);
3601 adapter->stats.ptc127 += er32(PTC127);
3602 adapter->stats.ptc255 += er32(PTC255);
3603 adapter->stats.ptc511 += er32(PTC511);
3604 adapter->stats.ptc1023 += er32(PTC1023);
3605 adapter->stats.ptc1522 += er32(PTC1522);
3606 }
3607
3608 adapter->stats.mptc += er32(MPTC);
3609 adapter->stats.bptc += er32(BPTC);
3610
3611 /* used for adaptive IFS */
3612
3613 hw->tx_packet_delta = er32(TPT);
3614 adapter->stats.tpt += hw->tx_packet_delta;
3615 hw->collision_delta = er32(COLC);
3616 adapter->stats.colc += hw->collision_delta;
3617
3618 if (hw->mac_type >= e1000_82543) {
3619 adapter->stats.algnerrc += er32(ALGNERRC);
3620 adapter->stats.rxerrc += er32(RXERRC);
3621 adapter->stats.tncrs += er32(TNCRS);
3622 adapter->stats.cexterr += er32(CEXTERR);
3623 adapter->stats.tsctc += er32(TSCTC);
3624 adapter->stats.tsctfc += er32(TSCTFC);
3625 }
3626 if (hw->mac_type > e1000_82547_rev_2) {
3627 adapter->stats.iac += er32(IAC);
3628 adapter->stats.icrxoc += er32(ICRXOC);
3629
3630 if (hw->mac_type != e1000_ich8lan) {
3631 adapter->stats.icrxptc += er32(ICRXPTC);
3632 adapter->stats.icrxatc += er32(ICRXATC);
3633 adapter->stats.ictxptc += er32(ICTXPTC);
3634 adapter->stats.ictxatc += er32(ICTXATC);
3635 adapter->stats.ictxqec += er32(ICTXQEC);
3636 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3637 adapter->stats.icrxdmtc += er32(ICRXDMTC);
3638 }
3639 }
3640
3641 /* Fill out the OS statistics structure */
3642 adapter->net_stats.multicast = adapter->stats.mprc;
3643 adapter->net_stats.collisions = adapter->stats.colc;
3644
3645 /* Rx Errors */
3646
3647 /* RLEC on some newer hardware can be incorrect so build
3648 * our own version based on RUC and ROC */
3649 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3650 adapter->stats.crcerrs + adapter->stats.algnerrc +
3651 adapter->stats.ruc + adapter->stats.roc +
3652 adapter->stats.cexterr;
3653 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3654 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3655 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3656 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3657 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3658
3659 /* Tx Errors */
3660 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3661 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3662 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3663 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3664 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3665 if (hw->bad_tx_carr_stats_fd &&
3666 adapter->link_duplex == FULL_DUPLEX) {
3667 adapter->net_stats.tx_carrier_errors = 0;
3668 adapter->stats.tncrs = 0;
3669 }
3670
3671 /* Tx Dropped needs to be maintained elsewhere */
3672
3673 /* Phy Stats */
3674 if (hw->media_type == e1000_media_type_copper) {
3675 if ((adapter->link_speed == SPEED_1000) &&
3676 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3677 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3678 adapter->phy_stats.idle_errors += phy_tmp;
3679 }
3680
3681 if ((hw->mac_type <= e1000_82546) &&
3682 (hw->phy_type == e1000_phy_m88) &&
3683 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3684 adapter->phy_stats.receive_errors += phy_tmp;
3685 }
3686
3687 /* Management Stats */
3688 if (hw->has_smbus) {
3689 adapter->stats.mgptc += er32(MGTPTC);
3690 adapter->stats.mgprc += er32(MGTPRC);
3691 adapter->stats.mgpdc += er32(MGTPDC);
3692 }
3693
3694 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3695 }
3696
3697 /**
3698 * e1000_intr_msi - Interrupt Handler
3699 * @irq: interrupt number
3700 * @data: pointer to a network interface device structure
3701 **/
3702
3703 static irqreturn_t e1000_intr_msi(int irq, void *data)
3704 {
3705 struct net_device *netdev = data;
3706 struct e1000_adapter *adapter = netdev_priv(netdev);
3707 struct e1000_hw *hw = &adapter->hw;
3708 u32 icr = er32(ICR);
3709
3710 /* in NAPI mode read ICR disables interrupts using IAM */
3711
3712 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3713 hw->get_link_status = 1;
3714 /* 80003ES2LAN workaround-- For packet buffer work-around on
3715 * link down event; disable receives here in the ISR and reset
3716 * adapter in watchdog */
3717 if (netif_carrier_ok(netdev) &&
3718 (hw->mac_type == e1000_80003es2lan)) {
3719 /* disable receives */
3720 u32 rctl = er32(RCTL);
3721 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3722 }
3723 /* guard against interrupt when we're going down */
3724 if (!test_bit(__E1000_DOWN, &adapter->flags))
3725 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3726 }
3727
3728 if (likely(napi_schedule_prep(&adapter->napi))) {
3729 adapter->total_tx_bytes = 0;
3730 adapter->total_tx_packets = 0;
3731 adapter->total_rx_bytes = 0;
3732 adapter->total_rx_packets = 0;
3733 __napi_schedule(&adapter->napi);
3734 } else
3735 e1000_irq_enable(adapter);
3736
3737 return IRQ_HANDLED;
3738 }
3739
3740 /**
3741 * e1000_intr - Interrupt Handler
3742 * @irq: interrupt number
3743 * @data: pointer to a network interface device structure
3744 **/
3745
3746 static irqreturn_t e1000_intr(int irq, void *data)
3747 {
3748 struct net_device *netdev = data;
3749 struct e1000_adapter *adapter = netdev_priv(netdev);
3750 struct e1000_hw *hw = &adapter->hw;
3751 u32 rctl, icr = er32(ICR);
3752
3753 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags)))
3754 return IRQ_NONE; /* Not our interrupt */
3755
3756 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3757 * not set, then the adapter didn't send an interrupt */
3758 if (unlikely(hw->mac_type >= e1000_82571 &&
3759 !(icr & E1000_ICR_INT_ASSERTED)))
3760 return IRQ_NONE;
3761
3762 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3763 * need for the IMC write */
3764
3765 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3766 hw->get_link_status = 1;
3767 /* 80003ES2LAN workaround--
3768 * For packet buffer work-around on link down event;
3769 * disable receives here in the ISR and
3770 * reset adapter in watchdog
3771 */
3772 if (netif_carrier_ok(netdev) &&
3773 (hw->mac_type == e1000_80003es2lan)) {
3774 /* disable receives */
3775 rctl = er32(RCTL);
3776 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3777 }
3778 /* guard against interrupt when we're going down */
3779 if (!test_bit(__E1000_DOWN, &adapter->flags))
3780 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3781 }
3782
3783 if (unlikely(hw->mac_type < e1000_82571)) {
3784 /* disable interrupts, without the synchronize_irq bit */
3785 ew32(IMC, ~0);
3786 E1000_WRITE_FLUSH();
3787 }
3788 if (likely(napi_schedule_prep(&adapter->napi))) {
3789 adapter->total_tx_bytes = 0;
3790 adapter->total_tx_packets = 0;
3791 adapter->total_rx_bytes = 0;
3792 adapter->total_rx_packets = 0;
3793 __napi_schedule(&adapter->napi);
3794 } else {
3795 /* this really should not happen! if it does it is basically a
3796 * bug, but not a hard error, so enable ints and continue */
3797 if (!test_bit(__E1000_DOWN, &adapter->flags))
3798 e1000_irq_enable(adapter);
3799 }
3800
3801 return IRQ_HANDLED;
3802 }
3803
3804 /**
3805 * e1000_clean - NAPI Rx polling callback
3806 * @adapter: board private structure
3807 **/
3808 static int e1000_clean(struct napi_struct *napi, int budget)
3809 {
3810 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3811 struct net_device *poll_dev = adapter->netdev;
3812 int tx_cleaned = 0, work_done = 0;
3813
3814 adapter = netdev_priv(poll_dev);
3815
3816 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
3817
3818 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3819 &work_done, budget);
3820
3821 if (!tx_cleaned)
3822 work_done = budget;
3823
3824 /* If budget not fully consumed, exit the polling mode */
3825 if (work_done < budget) {
3826 if (likely(adapter->itr_setting & 3))
3827 e1000_set_itr(adapter);
3828 napi_complete(napi);
3829 if (!test_bit(__E1000_DOWN, &adapter->flags))
3830 e1000_irq_enable(adapter);
3831 }
3832
3833 return work_done;
3834 }
3835
3836 /**
3837 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3838 * @adapter: board private structure
3839 **/
3840 static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3841 struct e1000_tx_ring *tx_ring)
3842 {
3843 struct e1000_hw *hw = &adapter->hw;
3844 struct net_device *netdev = adapter->netdev;
3845 struct e1000_tx_desc *tx_desc, *eop_desc;
3846 struct e1000_buffer *buffer_info;
3847 unsigned int i, eop;
3848 unsigned int count = 0;
3849 unsigned int total_tx_bytes=0, total_tx_packets=0;
3850
3851 i = tx_ring->next_to_clean;
3852 eop = tx_ring->buffer_info[i].next_to_watch;
3853 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3854
3855 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3856 (count < tx_ring->count)) {
3857 bool cleaned = false;
3858 for ( ; !cleaned; count++) {
3859 tx_desc = E1000_TX_DESC(*tx_ring, i);
3860 buffer_info = &tx_ring->buffer_info[i];
3861 cleaned = (i == eop);
3862
3863 if (cleaned) {
3864 struct sk_buff *skb = buffer_info->skb;
3865 unsigned int segs, bytecount;
3866 segs = skb_shinfo(skb)->gso_segs ?: 1;
3867 /* multiply data chunks by size of headers */
3868 bytecount = ((segs - 1) * skb_headlen(skb)) +
3869 skb->len;
3870 total_tx_packets += segs;
3871 total_tx_bytes += bytecount;
3872 }
3873 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3874 tx_desc->upper.data = 0;
3875
3876 if (unlikely(++i == tx_ring->count)) i = 0;
3877 }
3878
3879 eop = tx_ring->buffer_info[i].next_to_watch;
3880 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3881 }
3882
3883 tx_ring->next_to_clean = i;
3884
3885 #define TX_WAKE_THRESHOLD 32
3886 if (unlikely(count && netif_carrier_ok(netdev) &&
3887 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3888 /* Make sure that anybody stopping the queue after this
3889 * sees the new next_to_clean.
3890 */
3891 smp_mb();
3892 if (netif_queue_stopped(netdev)) {
3893 netif_wake_queue(netdev);
3894 ++adapter->restart_queue;
3895 }
3896 }
3897
3898 if (adapter->detect_tx_hung) {
3899 /* Detect a transmit hang in hardware, this serializes the
3900 * check with the clearing of time_stamp and movement of i */
3901 adapter->detect_tx_hung = false;
3902 if (tx_ring->buffer_info[i].time_stamp &&
3903 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3904 (adapter->tx_timeout_factor * HZ))
3905 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
3906
3907 /* detected Tx unit hang */
3908 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3909 " Tx Queue <%lu>\n"
3910 " TDH <%x>\n"
3911 " TDT <%x>\n"
3912 " next_to_use <%x>\n"
3913 " next_to_clean <%x>\n"
3914 "buffer_info[next_to_clean]\n"
3915 " time_stamp <%lx>\n"
3916 " next_to_watch <%x>\n"
3917 " jiffies <%lx>\n"
3918 " next_to_watch.status <%x>\n",
3919 (unsigned long)((tx_ring - adapter->tx_ring) /
3920 sizeof(struct e1000_tx_ring)),
3921 readl(hw->hw_addr + tx_ring->tdh),
3922 readl(hw->hw_addr + tx_ring->tdt),
3923 tx_ring->next_to_use,
3924 tx_ring->next_to_clean,
3925 tx_ring->buffer_info[i].time_stamp,
3926 eop,
3927 jiffies,
3928 eop_desc->upper.fields.status);
3929 netif_stop_queue(netdev);
3930 }
3931 }
3932 adapter->total_tx_bytes += total_tx_bytes;
3933 adapter->total_tx_packets += total_tx_packets;
3934 adapter->net_stats.tx_bytes += total_tx_bytes;
3935 adapter->net_stats.tx_packets += total_tx_packets;
3936 return (count < tx_ring->count);
3937 }
3938
3939 /**
3940 * e1000_rx_checksum - Receive Checksum Offload for 82543
3941 * @adapter: board private structure
3942 * @status_err: receive descriptor status and error fields
3943 * @csum: receive descriptor csum field
3944 * @sk_buff: socket buffer with received data
3945 **/
3946
3947 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3948 u32 csum, struct sk_buff *skb)
3949 {
3950 struct e1000_hw *hw = &adapter->hw;
3951 u16 status = (u16)status_err;
3952 u8 errors = (u8)(status_err >> 24);
3953 skb->ip_summed = CHECKSUM_NONE;
3954
3955 /* 82543 or newer only */
3956 if (unlikely(hw->mac_type < e1000_82543)) return;
3957 /* Ignore Checksum bit is set */
3958 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3959 /* TCP/UDP checksum error bit is set */
3960 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3961 /* let the stack verify checksum errors */
3962 adapter->hw_csum_err++;
3963 return;
3964 }
3965 /* TCP/UDP Checksum has not been calculated */
3966 if (hw->mac_type <= e1000_82547_rev_2) {
3967 if (!(status & E1000_RXD_STAT_TCPCS))
3968 return;
3969 } else {
3970 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3971 return;
3972 }
3973 /* It must be a TCP or UDP packet with a valid checksum */
3974 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3975 /* TCP checksum is good */
3976 skb->ip_summed = CHECKSUM_UNNECESSARY;
3977 } else if (hw->mac_type > e1000_82547_rev_2) {
3978 /* IP fragment with UDP payload */
3979 /* Hardware complements the payload checksum, so we undo it
3980 * and then put the value in host order for further stack use.
3981 */
3982 __sum16 sum = (__force __sum16)htons(csum);
3983 skb->csum = csum_unfold(~sum);
3984 skb->ip_summed = CHECKSUM_COMPLETE;
3985 }
3986 adapter->hw_csum_good++;
3987 }
3988
3989 /**
3990 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3991 * @adapter: board private structure
3992 **/
3993 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3994 struct e1000_rx_ring *rx_ring,
3995 int *work_done, int work_to_do)
3996 {
3997 struct e1000_hw *hw = &adapter->hw;
3998 struct net_device *netdev = adapter->netdev;
3999 struct pci_dev *pdev = adapter->pdev;
4000 struct e1000_rx_desc *rx_desc, *next_rxd;
4001 struct e1000_buffer *buffer_info, *next_buffer;
4002 unsigned long flags;
4003 u32 length;
4004 u8 last_byte;
4005 unsigned int i;
4006 int cleaned_count = 0;
4007 bool cleaned = false;
4008 unsigned int total_rx_bytes=0, total_rx_packets=0;
4009
4010 i = rx_ring->next_to_clean;
4011 rx_desc = E1000_RX_DESC(*rx_ring, i);
4012 buffer_info = &rx_ring->buffer_info[i];
4013
4014 while (rx_desc->status & E1000_RXD_STAT_DD) {
4015 struct sk_buff *skb;
4016 u8 status;
4017
4018 if (*work_done >= work_to_do)
4019 break;
4020 (*work_done)++;
4021
4022 status = rx_desc->status;
4023 skb = buffer_info->skb;
4024 buffer_info->skb = NULL;
4025
4026 prefetch(skb->data - NET_IP_ALIGN);
4027
4028 if (++i == rx_ring->count) i = 0;
4029 next_rxd = E1000_RX_DESC(*rx_ring, i);
4030 prefetch(next_rxd);
4031
4032 next_buffer = &rx_ring->buffer_info[i];
4033
4034 cleaned = true;
4035 cleaned_count++;
4036 pci_unmap_single(pdev,
4037 buffer_info->dma,
4038 buffer_info->length,
4039 PCI_DMA_FROMDEVICE);
4040 buffer_info->dma = 0;
4041
4042 length = le16_to_cpu(rx_desc->length);
4043 /* !EOP means multiple descriptors were used to store a single
4044 * packet, also make sure the frame isn't just CRC only */
4045 if (unlikely(!(status & E1000_RXD_STAT_EOP) || (length <= 4))) {
4046 /* All receives must fit into a single buffer */
4047 E1000_DBG("%s: Receive packet consumed multiple"
4048 " buffers\n", netdev->name);
4049 /* recycle */
4050 buffer_info->skb = skb;
4051 goto next_desc;
4052 }
4053
4054 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4055 last_byte = *(skb->data + length - 1);
4056 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4057 last_byte)) {
4058 spin_lock_irqsave(&adapter->stats_lock, flags);
4059 e1000_tbi_adjust_stats(hw, &adapter->stats,
4060 length, skb->data);
4061 spin_unlock_irqrestore(&adapter->stats_lock,
4062 flags);
4063 length--;
4064 } else {
4065 /* recycle */
4066 buffer_info->skb = skb;
4067 goto next_desc;
4068 }
4069 }
4070
4071 /* adjust length to remove Ethernet CRC, this must be
4072 * done after the TBI_ACCEPT workaround above */
4073 length -= 4;
4074
4075 /* probably a little skewed due to removing CRC */
4076 total_rx_bytes += length;
4077 total_rx_packets++;
4078
4079 /* code added for copybreak, this should improve
4080 * performance for small packets with large amounts
4081 * of reassembly being done in the stack */
4082 if (length < copybreak) {
4083 struct sk_buff *new_skb =
4084 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4085 if (new_skb) {
4086 skb_reserve(new_skb, NET_IP_ALIGN);
4087 skb_copy_to_linear_data_offset(new_skb,
4088 -NET_IP_ALIGN,
4089 (skb->data -
4090 NET_IP_ALIGN),
4091 (length +
4092 NET_IP_ALIGN));
4093 /* save the skb in buffer_info as good */
4094 buffer_info->skb = skb;
4095 skb = new_skb;
4096 }
4097 /* else just continue with the old one */
4098 }
4099 /* end copybreak code */
4100 skb_put(skb, length);
4101
4102 /* Receive Checksum Offload */
4103 e1000_rx_checksum(adapter,
4104 (u32)(status) |
4105 ((u32)(rx_desc->errors) << 24),
4106 le16_to_cpu(rx_desc->csum), skb);
4107
4108 skb->protocol = eth_type_trans(skb, netdev);
4109
4110 if (unlikely(adapter->vlgrp &&
4111 (status & E1000_RXD_STAT_VP))) {
4112 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4113 le16_to_cpu(rx_desc->special));
4114 } else {
4115 netif_receive_skb(skb);
4116 }
4117
4118 next_desc:
4119 rx_desc->status = 0;
4120
4121 /* return some buffers to hardware, one at a time is too slow */
4122 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4123 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4124 cleaned_count = 0;
4125 }
4126
4127 /* use prefetched values */
4128 rx_desc = next_rxd;
4129 buffer_info = next_buffer;
4130 }
4131 rx_ring->next_to_clean = i;
4132
4133 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4134 if (cleaned_count)
4135 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4136
4137 adapter->total_rx_packets += total_rx_packets;
4138 adapter->total_rx_bytes += total_rx_bytes;
4139 adapter->net_stats.rx_bytes += total_rx_bytes;
4140 adapter->net_stats.rx_packets += total_rx_packets;
4141 return cleaned;
4142 }
4143
4144 /**
4145 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4146 * @adapter: address of board private structure
4147 **/
4148
4149 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4150 struct e1000_rx_ring *rx_ring,
4151 int cleaned_count)
4152 {
4153 struct e1000_hw *hw = &adapter->hw;
4154 struct net_device *netdev = adapter->netdev;
4155 struct pci_dev *pdev = adapter->pdev;
4156 struct e1000_rx_desc *rx_desc;
4157 struct e1000_buffer *buffer_info;
4158 struct sk_buff *skb;
4159 unsigned int i;
4160 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4161
4162 i = rx_ring->next_to_use;
4163 buffer_info = &rx_ring->buffer_info[i];
4164
4165 while (cleaned_count--) {
4166 skb = buffer_info->skb;
4167 if (skb) {
4168 skb_trim(skb, 0);
4169 goto map_skb;
4170 }
4171
4172 skb = netdev_alloc_skb(netdev, bufsz);
4173 if (unlikely(!skb)) {
4174 /* Better luck next round */
4175 adapter->alloc_rx_buff_failed++;
4176 break;
4177 }
4178
4179 /* Fix for errata 23, can't cross 64kB boundary */
4180 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4181 struct sk_buff *oldskb = skb;
4182 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4183 "at %p\n", bufsz, skb->data);
4184 /* Try again, without freeing the previous */
4185 skb = netdev_alloc_skb(netdev, bufsz);
4186 /* Failed allocation, critical failure */
4187 if (!skb) {
4188 dev_kfree_skb(oldskb);
4189 break;
4190 }
4191
4192 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4193 /* give up */
4194 dev_kfree_skb(skb);
4195 dev_kfree_skb(oldskb);
4196 break; /* while !buffer_info->skb */
4197 }
4198
4199 /* Use new allocation */
4200 dev_kfree_skb(oldskb);
4201 }
4202 /* Make buffer alignment 2 beyond a 16 byte boundary
4203 * this will result in a 16 byte aligned IP header after
4204 * the 14 byte MAC header is removed
4205 */
4206 skb_reserve(skb, NET_IP_ALIGN);
4207
4208 buffer_info->skb = skb;
4209 buffer_info->length = adapter->rx_buffer_len;
4210 map_skb:
4211 buffer_info->dma = pci_map_single(pdev,
4212 skb->data,
4213 adapter->rx_buffer_len,
4214 PCI_DMA_FROMDEVICE);
4215
4216 /* Fix for errata 23, can't cross 64kB boundary */
4217 if (!e1000_check_64k_bound(adapter,
4218 (void *)(unsigned long)buffer_info->dma,
4219 adapter->rx_buffer_len)) {
4220 DPRINTK(RX_ERR, ERR,
4221 "dma align check failed: %u bytes at %p\n",
4222 adapter->rx_buffer_len,
4223 (void *)(unsigned long)buffer_info->dma);
4224 dev_kfree_skb(skb);
4225 buffer_info->skb = NULL;
4226
4227 pci_unmap_single(pdev, buffer_info->dma,
4228 adapter->rx_buffer_len,
4229 PCI_DMA_FROMDEVICE);
4230 buffer_info->dma = 0;
4231
4232 break; /* while !buffer_info->skb */
4233 }
4234 rx_desc = E1000_RX_DESC(*rx_ring, i);
4235 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4236
4237 if (unlikely(++i == rx_ring->count))
4238 i = 0;
4239 buffer_info = &rx_ring->buffer_info[i];
4240 }
4241
4242 if (likely(rx_ring->next_to_use != i)) {
4243 rx_ring->next_to_use = i;
4244 if (unlikely(i-- == 0))
4245 i = (rx_ring->count - 1);
4246
4247 /* Force memory writes to complete before letting h/w
4248 * know there are new descriptors to fetch. (Only
4249 * applicable for weak-ordered memory model archs,
4250 * such as IA-64). */
4251 wmb();
4252 writel(i, hw->hw_addr + rx_ring->rdt);
4253 }
4254 }
4255
4256 /**
4257 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4258 * @adapter:
4259 **/
4260
4261 static void e1000_smartspeed(struct e1000_adapter *adapter)
4262 {
4263 struct e1000_hw *hw = &adapter->hw;
4264 u16 phy_status;
4265 u16 phy_ctrl;
4266
4267 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4268 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
4269 return;
4270
4271 if (adapter->smartspeed == 0) {
4272 /* If Master/Slave config fault is asserted twice,
4273 * we assume back-to-back */
4274 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
4275 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4276 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
4277 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4278 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
4279 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4280 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4281 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
4282 phy_ctrl);
4283 adapter->smartspeed++;
4284 if (!e1000_phy_setup_autoneg(hw) &&
4285 !e1000_read_phy_reg(hw, PHY_CTRL,
4286 &phy_ctrl)) {
4287 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4288 MII_CR_RESTART_AUTO_NEG);
4289 e1000_write_phy_reg(hw, PHY_CTRL,
4290 phy_ctrl);
4291 }
4292 }
4293 return;
4294 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4295 /* If still no link, perhaps using 2/3 pair cable */
4296 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
4297 phy_ctrl |= CR_1000T_MS_ENABLE;
4298 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4299 if (!e1000_phy_setup_autoneg(hw) &&
4300 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
4301 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4302 MII_CR_RESTART_AUTO_NEG);
4303 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
4304 }
4305 }
4306 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4307 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4308 adapter->smartspeed = 0;
4309 }
4310
4311 /**
4312 * e1000_ioctl -
4313 * @netdev:
4314 * @ifreq:
4315 * @cmd:
4316 **/
4317
4318 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4319 {
4320 switch (cmd) {
4321 case SIOCGMIIPHY:
4322 case SIOCGMIIREG:
4323 case SIOCSMIIREG:
4324 return e1000_mii_ioctl(netdev, ifr, cmd);
4325 default:
4326 return -EOPNOTSUPP;
4327 }
4328 }
4329
4330 /**
4331 * e1000_mii_ioctl -
4332 * @netdev:
4333 * @ifreq:
4334 * @cmd:
4335 **/
4336
4337 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4338 int cmd)
4339 {
4340 struct e1000_adapter *adapter = netdev_priv(netdev);
4341 struct e1000_hw *hw = &adapter->hw;
4342 struct mii_ioctl_data *data = if_mii(ifr);
4343 int retval;
4344 u16 mii_reg;
4345 u16 spddplx;
4346 unsigned long flags;
4347
4348 if (hw->media_type != e1000_media_type_copper)
4349 return -EOPNOTSUPP;
4350
4351 switch (cmd) {
4352 case SIOCGMIIPHY:
4353 data->phy_id = hw->phy_addr;
4354 break;
4355 case SIOCGMIIREG:
4356 if (!capable(CAP_NET_ADMIN))
4357 return -EPERM;
4358 spin_lock_irqsave(&adapter->stats_lock, flags);
4359 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
4360 &data->val_out)) {
4361 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4362 return -EIO;
4363 }
4364 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4365 break;
4366 case SIOCSMIIREG:
4367 if (!capable(CAP_NET_ADMIN))
4368 return -EPERM;
4369 if (data->reg_num & ~(0x1F))
4370 return -EFAULT;
4371 mii_reg = data->val_in;
4372 spin_lock_irqsave(&adapter->stats_lock, flags);
4373 if (e1000_write_phy_reg(hw, data->reg_num,
4374 mii_reg)) {
4375 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4376 return -EIO;
4377 }
4378 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4379 if (hw->media_type == e1000_media_type_copper) {
4380 switch (data->reg_num) {
4381 case PHY_CTRL:
4382 if (mii_reg & MII_CR_POWER_DOWN)
4383 break;
4384 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4385 hw->autoneg = 1;
4386 hw->autoneg_advertised = 0x2F;
4387 } else {
4388 if (mii_reg & 0x40)
4389 spddplx = SPEED_1000;
4390 else if (mii_reg & 0x2000)
4391 spddplx = SPEED_100;
4392 else
4393 spddplx = SPEED_10;
4394 spddplx += (mii_reg & 0x100)
4395 ? DUPLEX_FULL :
4396 DUPLEX_HALF;
4397 retval = e1000_set_spd_dplx(adapter,
4398 spddplx);
4399 if (retval)
4400 return retval;
4401 }
4402 if (netif_running(adapter->netdev))
4403 e1000_reinit_locked(adapter);
4404 else
4405 e1000_reset(adapter);
4406 break;
4407 case M88E1000_PHY_SPEC_CTRL:
4408 case M88E1000_EXT_PHY_SPEC_CTRL:
4409 if (e1000_phy_reset(hw))
4410 return -EIO;
4411 break;
4412 }
4413 } else {
4414 switch (data->reg_num) {
4415 case PHY_CTRL:
4416 if (mii_reg & MII_CR_POWER_DOWN)
4417 break;
4418 if (netif_running(adapter->netdev))
4419 e1000_reinit_locked(adapter);
4420 else
4421 e1000_reset(adapter);
4422 break;
4423 }
4424 }
4425 break;
4426 default:
4427 return -EOPNOTSUPP;
4428 }
4429 return E1000_SUCCESS;
4430 }
4431
4432 void e1000_pci_set_mwi(struct e1000_hw *hw)
4433 {
4434 struct e1000_adapter *adapter = hw->back;
4435 int ret_val = pci_set_mwi(adapter->pdev);
4436
4437 if (ret_val)
4438 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4439 }
4440
4441 void e1000_pci_clear_mwi(struct e1000_hw *hw)
4442 {
4443 struct e1000_adapter *adapter = hw->back;
4444
4445 pci_clear_mwi(adapter->pdev);
4446 }
4447
4448 int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
4449 {
4450 struct e1000_adapter *adapter = hw->back;
4451 return pcix_get_mmrbc(adapter->pdev);
4452 }
4453
4454 void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
4455 {
4456 struct e1000_adapter *adapter = hw->back;
4457 pcix_set_mmrbc(adapter->pdev, mmrbc);
4458 }
4459
4460 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
4461 {
4462 struct e1000_adapter *adapter = hw->back;
4463 u16 cap_offset;
4464
4465 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4466 if (!cap_offset)
4467 return -E1000_ERR_CONFIG;
4468
4469 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4470
4471 return E1000_SUCCESS;
4472 }
4473
4474 void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
4475 {
4476 outl(value, port);
4477 }
4478
4479 static void e1000_vlan_rx_register(struct net_device *netdev,
4480 struct vlan_group *grp)
4481 {
4482 struct e1000_adapter *adapter = netdev_priv(netdev);
4483 struct e1000_hw *hw = &adapter->hw;
4484 u32 ctrl, rctl;
4485
4486 if (!test_bit(__E1000_DOWN, &adapter->flags))
4487 e1000_irq_disable(adapter);
4488 adapter->vlgrp = grp;
4489
4490 if (grp) {
4491 /* enable VLAN tag insert/strip */
4492 ctrl = er32(CTRL);
4493 ctrl |= E1000_CTRL_VME;
4494 ew32(CTRL, ctrl);
4495
4496 if (adapter->hw.mac_type != e1000_ich8lan) {
4497 /* enable VLAN receive filtering */
4498 rctl = er32(RCTL);
4499 rctl &= ~E1000_RCTL_CFIEN;
4500 ew32(RCTL, rctl);
4501 e1000_update_mng_vlan(adapter);
4502 }
4503 } else {
4504 /* disable VLAN tag insert/strip */
4505 ctrl = er32(CTRL);
4506 ctrl &= ~E1000_CTRL_VME;
4507 ew32(CTRL, ctrl);
4508
4509 if (adapter->hw.mac_type != e1000_ich8lan) {
4510 if (adapter->mng_vlan_id !=
4511 (u16)E1000_MNG_VLAN_NONE) {
4512 e1000_vlan_rx_kill_vid(netdev,
4513 adapter->mng_vlan_id);
4514 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4515 }
4516 }
4517 }
4518
4519 if (!test_bit(__E1000_DOWN, &adapter->flags))
4520 e1000_irq_enable(adapter);
4521 }
4522
4523 static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4524 {
4525 struct e1000_adapter *adapter = netdev_priv(netdev);
4526 struct e1000_hw *hw = &adapter->hw;
4527 u32 vfta, index;
4528
4529 if ((hw->mng_cookie.status &
4530 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4531 (vid == adapter->mng_vlan_id))
4532 return;
4533 /* add VID to filter table */
4534 index = (vid >> 5) & 0x7F;
4535 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
4536 vfta |= (1 << (vid & 0x1F));
4537 e1000_write_vfta(hw, index, vfta);
4538 }
4539
4540 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4541 {
4542 struct e1000_adapter *adapter = netdev_priv(netdev);
4543 struct e1000_hw *hw = &adapter->hw;
4544 u32 vfta, index;
4545
4546 if (!test_bit(__E1000_DOWN, &adapter->flags))
4547 e1000_irq_disable(adapter);
4548 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4549 if (!test_bit(__E1000_DOWN, &adapter->flags))
4550 e1000_irq_enable(adapter);
4551
4552 if ((hw->mng_cookie.status &
4553 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4554 (vid == adapter->mng_vlan_id)) {
4555 /* release control to f/w */
4556 e1000_release_hw_control(adapter);
4557 return;
4558 }
4559
4560 /* remove VID from filter table */
4561 index = (vid >> 5) & 0x7F;
4562 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
4563 vfta &= ~(1 << (vid & 0x1F));
4564 e1000_write_vfta(hw, index, vfta);
4565 }
4566
4567 static void e1000_restore_vlan(struct e1000_adapter *adapter)
4568 {
4569 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4570
4571 if (adapter->vlgrp) {
4572 u16 vid;
4573 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4574 if (!vlan_group_get_device(adapter->vlgrp, vid))
4575 continue;
4576 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4577 }
4578 }
4579 }
4580
4581 int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
4582 {
4583 struct e1000_hw *hw = &adapter->hw;
4584
4585 hw->autoneg = 0;
4586
4587 /* Fiber NICs only allow 1000 gbps Full duplex */
4588 if ((hw->media_type == e1000_media_type_fiber) &&
4589 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4590 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4591 return -EINVAL;
4592 }
4593
4594 switch (spddplx) {
4595 case SPEED_10 + DUPLEX_HALF:
4596 hw->forced_speed_duplex = e1000_10_half;
4597 break;
4598 case SPEED_10 + DUPLEX_FULL:
4599 hw->forced_speed_duplex = e1000_10_full;
4600 break;
4601 case SPEED_100 + DUPLEX_HALF:
4602 hw->forced_speed_duplex = e1000_100_half;
4603 break;
4604 case SPEED_100 + DUPLEX_FULL:
4605 hw->forced_speed_duplex = e1000_100_full;
4606 break;
4607 case SPEED_1000 + DUPLEX_FULL:
4608 hw->autoneg = 1;
4609 hw->autoneg_advertised = ADVERTISE_1000_FULL;
4610 break;
4611 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4612 default:
4613 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4614 return -EINVAL;
4615 }
4616 return 0;
4617 }
4618
4619 static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
4620 {
4621 struct net_device *netdev = pci_get_drvdata(pdev);
4622 struct e1000_adapter *adapter = netdev_priv(netdev);
4623 struct e1000_hw *hw = &adapter->hw;
4624 u32 ctrl, ctrl_ext, rctl, status;
4625 u32 wufc = adapter->wol;
4626 #ifdef CONFIG_PM
4627 int retval = 0;
4628 #endif
4629
4630 netif_device_detach(netdev);
4631
4632 if (netif_running(netdev)) {
4633 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
4634 e1000_down(adapter);
4635 }
4636
4637 #ifdef CONFIG_PM
4638 retval = pci_save_state(pdev);
4639 if (retval)
4640 return retval;
4641 #endif
4642
4643 status = er32(STATUS);
4644 if (status & E1000_STATUS_LU)
4645 wufc &= ~E1000_WUFC_LNKC;
4646
4647 if (wufc) {
4648 e1000_setup_rctl(adapter);
4649 e1000_set_rx_mode(netdev);
4650
4651 /* turn on all-multi mode if wake on multicast is enabled */
4652 if (wufc & E1000_WUFC_MC) {
4653 rctl = er32(RCTL);
4654 rctl |= E1000_RCTL_MPE;
4655 ew32(RCTL, rctl);
4656 }
4657
4658 if (hw->mac_type >= e1000_82540) {
4659 ctrl = er32(CTRL);
4660 /* advertise wake from D3Cold */
4661 #define E1000_CTRL_ADVD3WUC 0x00100000
4662 /* phy power management enable */
4663 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4664 ctrl |= E1000_CTRL_ADVD3WUC |
4665 E1000_CTRL_EN_PHY_PWR_MGMT;
4666 ew32(CTRL, ctrl);
4667 }
4668
4669 if (hw->media_type == e1000_media_type_fiber ||
4670 hw->media_type == e1000_media_type_internal_serdes) {
4671 /* keep the laser running in D3 */
4672 ctrl_ext = er32(CTRL_EXT);
4673 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4674 ew32(CTRL_EXT, ctrl_ext);
4675 }
4676
4677 /* Allow time for pending master requests to run */
4678 e1000_disable_pciex_master(hw);
4679
4680 ew32(WUC, E1000_WUC_PME_EN);
4681 ew32(WUFC, wufc);
4682 } else {
4683 ew32(WUC, 0);
4684 ew32(WUFC, 0);
4685 }
4686
4687 e1000_release_manageability(adapter);
4688
4689 *enable_wake = !!wufc;
4690
4691 /* make sure adapter isn't asleep if manageability is enabled */
4692 if (adapter->en_mng_pt)
4693 *enable_wake = true;
4694
4695 if (hw->phy_type == e1000_phy_igp_3)
4696 e1000_phy_powerdown_workaround(hw);
4697
4698 if (netif_running(netdev))
4699 e1000_free_irq(adapter);
4700
4701 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4702 * would have already happened in close and is redundant. */
4703 e1000_release_hw_control(adapter);
4704
4705 pci_disable_device(pdev);
4706
4707 return 0;
4708 }
4709
4710 #ifdef CONFIG_PM
4711 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4712 {
4713 int retval;
4714 bool wake;
4715
4716 retval = __e1000_shutdown(pdev, &wake);
4717 if (retval)
4718 return retval;
4719
4720 if (wake) {
4721 pci_prepare_to_sleep(pdev);
4722 } else {
4723 pci_wake_from_d3(pdev, false);
4724 pci_set_power_state(pdev, PCI_D3hot);
4725 }
4726
4727 return 0;
4728 }
4729
4730 static int e1000_resume(struct pci_dev *pdev)
4731 {
4732 struct net_device *netdev = pci_get_drvdata(pdev);
4733 struct e1000_adapter *adapter = netdev_priv(netdev);
4734 struct e1000_hw *hw = &adapter->hw;
4735 u32 err;
4736
4737 pci_set_power_state(pdev, PCI_D0);
4738 pci_restore_state(pdev);
4739
4740 if (adapter->need_ioport)
4741 err = pci_enable_device(pdev);
4742 else
4743 err = pci_enable_device_mem(pdev);
4744 if (err) {
4745 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4746 return err;
4747 }
4748 pci_set_master(pdev);
4749
4750 pci_enable_wake(pdev, PCI_D3hot, 0);
4751 pci_enable_wake(pdev, PCI_D3cold, 0);
4752
4753 if (netif_running(netdev)) {
4754 err = e1000_request_irq(adapter);
4755 if (err)
4756 return err;
4757 }
4758
4759 e1000_power_up_phy(adapter);
4760 e1000_reset(adapter);
4761 ew32(WUS, ~0);
4762
4763 e1000_init_manageability(adapter);
4764
4765 if (netif_running(netdev))
4766 e1000_up(adapter);
4767
4768 netif_device_attach(netdev);
4769
4770 /* If the controller is 82573 and f/w is AMT, do not set
4771 * DRV_LOAD until the interface is up. For all other cases,
4772 * let the f/w know that the h/w is now under the control
4773 * of the driver. */
4774 if (hw->mac_type != e1000_82573 ||
4775 !e1000_check_mng_mode(hw))
4776 e1000_get_hw_control(adapter);
4777
4778 return 0;
4779 }
4780 #endif
4781
4782 static void e1000_shutdown(struct pci_dev *pdev)
4783 {
4784 bool wake;
4785
4786 __e1000_shutdown(pdev, &wake);
4787
4788 if (system_state == SYSTEM_POWER_OFF) {
4789 pci_wake_from_d3(pdev, wake);
4790 pci_set_power_state(pdev, PCI_D3hot);
4791 }
4792 }
4793
4794 #ifdef CONFIG_NET_POLL_CONTROLLER
4795 /*
4796 * Polling 'interrupt' - used by things like netconsole to send skbs
4797 * without having to re-enable interrupts. It's not called while
4798 * the interrupt routine is executing.
4799 */
4800 static void e1000_netpoll(struct net_device *netdev)
4801 {
4802 struct e1000_adapter *adapter = netdev_priv(netdev);
4803
4804 disable_irq(adapter->pdev->irq);
4805 e1000_intr(adapter->pdev->irq, netdev);
4806 enable_irq(adapter->pdev->irq);
4807 }
4808 #endif
4809
4810 /**
4811 * e1000_io_error_detected - called when PCI error is detected
4812 * @pdev: Pointer to PCI device
4813 * @state: The current pci conneection state
4814 *
4815 * This function is called after a PCI bus error affecting
4816 * this device has been detected.
4817 */
4818 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4819 pci_channel_state_t state)
4820 {
4821 struct net_device *netdev = pci_get_drvdata(pdev);
4822 struct e1000_adapter *adapter = netdev_priv(netdev);
4823
4824 netif_device_detach(netdev);
4825
4826 if (state == pci_channel_io_perm_failure)
4827 return PCI_ERS_RESULT_DISCONNECT;
4828
4829 if (netif_running(netdev))
4830 e1000_down(adapter);
4831 pci_disable_device(pdev);
4832
4833 /* Request a slot slot reset. */
4834 return PCI_ERS_RESULT_NEED_RESET;
4835 }
4836
4837 /**
4838 * e1000_io_slot_reset - called after the pci bus has been reset.
4839 * @pdev: Pointer to PCI device
4840 *
4841 * Restart the card from scratch, as if from a cold-boot. Implementation
4842 * resembles the first-half of the e1000_resume routine.
4843 */
4844 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4845 {
4846 struct net_device *netdev = pci_get_drvdata(pdev);
4847 struct e1000_adapter *adapter = netdev_priv(netdev);
4848 struct e1000_hw *hw = &adapter->hw;
4849 int err;
4850
4851 if (adapter->need_ioport)
4852 err = pci_enable_device(pdev);
4853 else
4854 err = pci_enable_device_mem(pdev);
4855 if (err) {
4856 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4857 return PCI_ERS_RESULT_DISCONNECT;
4858 }
4859 pci_set_master(pdev);
4860
4861 pci_enable_wake(pdev, PCI_D3hot, 0);
4862 pci_enable_wake(pdev, PCI_D3cold, 0);
4863
4864 e1000_reset(adapter);
4865 ew32(WUS, ~0);
4866
4867 return PCI_ERS_RESULT_RECOVERED;
4868 }
4869
4870 /**
4871 * e1000_io_resume - called when traffic can start flowing again.
4872 * @pdev: Pointer to PCI device
4873 *
4874 * This callback is called when the error recovery driver tells us that
4875 * its OK to resume normal operation. Implementation resembles the
4876 * second-half of the e1000_resume routine.
4877 */
4878 static void e1000_io_resume(struct pci_dev *pdev)
4879 {
4880 struct net_device *netdev = pci_get_drvdata(pdev);
4881 struct e1000_adapter *adapter = netdev_priv(netdev);
4882 struct e1000_hw *hw = &adapter->hw;
4883
4884 e1000_init_manageability(adapter);
4885
4886 if (netif_running(netdev)) {
4887 if (e1000_up(adapter)) {
4888 printk("e1000: can't bring device back up after reset\n");
4889 return;
4890 }
4891 }
4892
4893 netif_device_attach(netdev);
4894
4895 /* If the controller is 82573 and f/w is AMT, do not set
4896 * DRV_LOAD until the interface is up. For all other cases,
4897 * let the f/w know that the h/w is now under the control
4898 * of the driver. */
4899 if (hw->mac_type != e1000_82573 ||
4900 !e1000_check_mng_mode(hw))
4901 e1000_get_hw_control(adapter);
4902
4903 }
4904
4905 /* e1000_main.c */
Linus' kernel tree