?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
[PATCH] vt: Remove VT-specific declarations and definitions from tty.h
[linux-2.6.git] / drivers / video / offb.c
blobce5f3031b99b07b16f32dd899f58374d8bd03dfd
1 /*
2 * linux/drivers/video/offb.c -- Open Firmware based frame buffer device
3 *
4 * Copyright (C) 1997 Geert Uytterhoeven
5 *
6 * This driver is partly based on the PowerMac console driver:
7 *
8 * Copyright (C) 1996 Paul Mackerras
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
13 */
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/errno.h>
18 #include <linux/string.h>
19 #include <linux/mm.h>
20 #include <linux/slab.h>
21 #include <linux/vmalloc.h>
22 #include <linux/delay.h>
23 #include <linux/interrupt.h>
24 #include <linux/fb.h>
25 #include <linux/init.h>
26 #include <linux/ioport.h>
27 #include <linux/pci.h>
28 #include <asm/io.h>
29 #include <asm/prom.h>
30
31 #ifdef CONFIG_PPC64
32 #include <asm/pci-bridge.h>
33 #endif
34
35 #ifdef CONFIG_PPC32
36 #include <asm/bootx.h>
37 #endif
38
39 #include "macmodes.h"
40
41 /* Supported palette hacks */
42 enum {
43 cmap_unknown,
44 cmap_m64, /* ATI Mach64 */
45 cmap_r128, /* ATI Rage128 */
46 cmap_M3A, /* ATI Rage Mobility M3 Head A */
47 cmap_M3B, /* ATI Rage Mobility M3 Head B */
48 cmap_radeon, /* ATI Radeon */
49 cmap_gxt2000, /* IBM GXT2000 */
50 };
51
52 struct offb_par {
53 volatile void __iomem *cmap_adr;
54 volatile void __iomem *cmap_data;
55 int cmap_type;
56 int blanked;
57 };
58
59 struct offb_par default_par;
60
61 /*
62 * Interface used by the world
63 */
64
65 int offb_init(void);
66
67 static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
68 u_int transp, struct fb_info *info);
69 static int offb_blank(int blank, struct fb_info *info);
70
71 #ifdef CONFIG_PPC32
72 extern boot_infos_t *boot_infos;
73 #endif
74
75 static void offb_init_nodriver(struct device_node *);
76 static void offb_init_fb(const char *name, const char *full_name,
77 int width, int height, int depth, int pitch,
78 unsigned long address, struct device_node *dp);
79
80 static struct fb_ops offb_ops = {
81 .owner = THIS_MODULE,
82 .fb_setcolreg = offb_setcolreg,
83 .fb_blank = offb_blank,
84 .fb_fillrect = cfb_fillrect,
85 .fb_copyarea = cfb_copyarea,
86 .fb_imageblit = cfb_imageblit,
87 };
88
89 /*
90 * Set a single color register. The values supplied are already
91 * rounded down to the hardware's capabilities (according to the
92 * entries in the var structure). Return != 0 for invalid regno.
93 */
94
95 static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
96 u_int transp, struct fb_info *info)
97 {
98 struct offb_par *par = (struct offb_par *) info->par;
99 int i, depth;
100 u32 *pal = info->pseudo_palette;
101
102 depth = info->var.bits_per_pixel;
103 if (depth == 16)
104 depth = (info->var.green.length == 5) ? 15 : 16;
105
106 if (regno > 255 ||
107 (depth == 16 && regno > 63) ||
108 (depth == 15 && regno > 31))
109 return 1;
110
111 if (regno < 16) {
112 switch (depth) {
113 case 15:
114 pal[regno] = (regno << 10) | (regno << 5) | regno;
115 break;
116 case 16:
117 pal[regno] = (regno << 11) | (regno << 5) | regno;
118 break;
119 case 24:
120 pal[regno] = (regno << 16) | (regno << 8) | regno;
121 break;
122 case 32:
123 i = (regno << 8) | regno;
124 pal[regno] = (i << 16) | i;
125 break;
126 }
127 }
128
129 red >>= 8;
130 green >>= 8;
131 blue >>= 8;
132
133 if (!par->cmap_adr)
134 return 0;
135
136 switch (par->cmap_type) {
137 case cmap_m64:
138 writeb(regno, par->cmap_adr);
139 writeb(red, par->cmap_data);
140 writeb(green, par->cmap_data);
141 writeb(blue, par->cmap_data);
142 break;
143 case cmap_M3A:
144 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
145 out_le32(par->cmap_adr + 0x58,
146 in_le32(par->cmap_adr + 0x58) & ~0x20);
147 case cmap_r128:
148 /* Set palette index & data */
149 out_8(par->cmap_adr + 0xb0, regno);
150 out_le32(par->cmap_adr + 0xb4,
151 (red << 16 | green << 8 | blue));
152 break;
153 case cmap_M3B:
154 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
155 out_le32(par->cmap_adr + 0x58,
156 in_le32(par->cmap_adr + 0x58) | 0x20);
157 /* Set palette index & data */
158 out_8(par->cmap_adr + 0xb0, regno);
159 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
160 break;
161 case cmap_radeon:
162 /* Set palette index & data (could be smarter) */
163 out_8(par->cmap_adr + 0xb0, regno);
164 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
165 break;
166 case cmap_gxt2000:
167 out_le32((unsigned __iomem *) par->cmap_adr + regno,
168 (red << 16 | green << 8 | blue));
169 break;
170 }
171
172 return 0;
173 }
174
175 /*
176 * Blank the display.
177 */
178
179 static int offb_blank(int blank, struct fb_info *info)
180 {
181 struct offb_par *par = (struct offb_par *) info->par;
182 int i, j;
183
184 if (!par->cmap_adr)
185 return 0;
186
187 if (!par->blanked)
188 if (!blank)
189 return 0;
190
191 par->blanked = blank;
192
193 if (blank)
194 for (i = 0; i < 256; i++) {
195 switch (par->cmap_type) {
196 case cmap_m64:
197 writeb(i, par->cmap_adr);
198 for (j = 0; j < 3; j++)
199 writeb(0, par->cmap_data);
200 break;
201 case cmap_M3A:
202 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
203 out_le32(par->cmap_adr + 0x58,
204 in_le32(par->cmap_adr + 0x58) & ~0x20);
205 case cmap_r128:
206 /* Set palette index & data */
207 out_8(par->cmap_adr + 0xb0, i);
208 out_le32(par->cmap_adr + 0xb4, 0);
209 break;
210 case cmap_M3B:
211 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
212 out_le32(par->cmap_adr + 0x58,
213 in_le32(par->cmap_adr + 0x58) | 0x20);
214 /* Set palette index & data */
215 out_8(par->cmap_adr + 0xb0, i);
216 out_le32(par->cmap_adr + 0xb4, 0);
217 break;
218 case cmap_radeon:
219 out_8(par->cmap_adr + 0xb0, i);
220 out_le32(par->cmap_adr + 0xb4, 0);
221 break;
222 case cmap_gxt2000:
223 out_le32((unsigned __iomem *) par->cmap_adr + i,
224 0);
225 break;
226 }
227 } else
228 fb_set_cmap(&info->cmap, info);
229 return 0;
230 }
231
232 /*
233 * Initialisation
234 */
235
236 int __init offb_init(void)
237 {
238 struct device_node *dp = NULL, *boot_disp = NULL;
239
240 if (fb_get_options("offb", NULL))
241 return -ENODEV;
242
243 for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
244 if (get_property(dp, "linux,opened", NULL) &&
245 get_property(dp, "linux,boot-display", NULL)) {
246 boot_disp = dp;
247 offb_init_nodriver(dp);
248 }
249 }
250 for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
251 if (get_property(dp, "linux,opened", NULL) &&
252 dp != boot_disp)
253 offb_init_nodriver(dp);
254 }
255
256 return 0;
257 }
258
259
260 static void __init offb_init_nodriver(struct device_node *dp)
261 {
262 unsigned int len;
263 int i, width = 640, height = 480, depth = 8, pitch = 640;
264 unsigned int flags, rsize, addr_prop = 0;
265 unsigned long max_size = 0;
266 u64 rstart, address = OF_BAD_ADDR;
267 u32 *pp, *addrp, *up;
268 u64 asize;
269
270 pp = (u32 *)get_property(dp, "linux,bootx-depth", &len);
271 if (pp == NULL)
272 pp = (u32 *)get_property(dp, "depth", &len);
273 if (pp && len == sizeof(u32))
274 depth = *pp;
275
276 pp = (u32 *)get_property(dp, "linux,bootx-width", &len);
277 if (pp == NULL)
278 pp = (u32 *)get_property(dp, "width", &len);
279 if (pp && len == sizeof(u32))
280 width = *pp;
281
282 pp = (u32 *)get_property(dp, "linux,bootx-height", &len);
283 if (pp == NULL)
284 pp = (u32 *)get_property(dp, "height", &len);
285 if (pp && len == sizeof(u32))
286 height = *pp;
287
288 pp = (u32 *)get_property(dp, "linux,bootx-linebytes", &len);
289 if (pp == NULL)
290 pp = (u32 *)get_property(dp, "linebytes", &len);
291 if (pp && len == sizeof(u32))
292 pitch = *pp;
293 else
294 pitch = width * ((depth + 7) / 8);
295
296 rsize = (unsigned long)pitch * (unsigned long)height;
297
298 /* Ok, now we try to figure out the address of the framebuffer.
299 *
300 * Unfortunately, Open Firmware doesn't provide a standard way to do
301 * so. All we can do is a dodgy heuristic that happens to work in
302 * practice. On most machines, the "address" property contains what
303 * we need, though not on Matrox cards found in IBM machines. What I've
304 * found that appears to give good results is to go through the PCI
305 * ranges and pick one that is both big enough and if possible encloses
306 * the "address" property. If none match, we pick the biggest
307 */
308 up = (u32 *)get_property(dp, "linux,bootx-addr", &len);
309 if (up == NULL)
310 up = (u32 *)get_property(dp, "address", &len);
311 if (up && len == sizeof(u32))
312 addr_prop = *up;
313
314 for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
315 != NULL; i++) {
316 int match_addrp = 0;
317
318 if (!(flags & IORESOURCE_MEM))
319 continue;
320 if (asize < rsize)
321 continue;
322 rstart = of_translate_address(dp, addrp);
323 if (rstart == OF_BAD_ADDR)
324 continue;
325 if (addr_prop && (rstart <= addr_prop) &&
326 ((rstart + asize) >= (addr_prop + rsize)))
327 match_addrp = 1;
328 if (match_addrp) {
329 address = addr_prop;
330 break;
331 }
332 if (rsize > max_size) {
333 max_size = rsize;
334 address = OF_BAD_ADDR;
335 }
336
337 if (address == OF_BAD_ADDR)
338 address = rstart;
339 }
340 if (address == OF_BAD_ADDR && addr_prop)
341 address = (u64)addr_prop;
342 if (address != OF_BAD_ADDR) {
343 /* kludge for valkyrie */
344 if (strcmp(dp->name, "valkyrie") == 0)
345 address += 0x1000;
346 offb_init_fb(dp->name, dp->full_name, width, height, depth,
347 pitch, address, dp);
348 }
349 }
350
351 static void __init offb_init_fb(const char *name, const char *full_name,
352 int width, int height, int depth,
353 int pitch, unsigned long address,
354 struct device_node *dp)
355 {
356 unsigned long res_size = pitch * height * (depth + 7) / 8;
357 struct offb_par *par = &default_par;
358 unsigned long res_start = address;
359 struct fb_fix_screeninfo *fix;
360 struct fb_var_screeninfo *var;
361 struct fb_info *info;
362 int size;
363
364 if (!request_mem_region(res_start, res_size, "offb"))
365 return;
366
367 printk(KERN_INFO
368 "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
369 width, height, name, address, depth, pitch);
370 if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
371 printk(KERN_ERR "%s: can't use depth = %d\n", full_name,
372 depth);
373 release_mem_region(res_start, res_size);
374 return;
375 }
376
377 size = sizeof(struct fb_info) + sizeof(u32) * 17;
378
379 info = kmalloc(size, GFP_ATOMIC);
380
381 if (info == 0) {
382 release_mem_region(res_start, res_size);
383 return;
384 }
385 memset(info, 0, size);
386
387 fix = &info->fix;
388 var = &info->var;
389
390 strcpy(fix->id, "OFfb ");
391 strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
392 fix->id[sizeof(fix->id) - 1] = '\0';
393
394 var->xres = var->xres_virtual = width;
395 var->yres = var->yres_virtual = height;
396 fix->line_length = pitch;
397
398 fix->smem_start = address;
399 fix->smem_len = pitch * height;
400 fix->type = FB_TYPE_PACKED_PIXELS;
401 fix->type_aux = 0;
402
403 par->cmap_type = cmap_unknown;
404 if (depth == 8) {
405
406 /* Palette hacks disabled for now */
407 #if 0
408 if (dp && !strncmp(name, "ATY,Rage128", 11)) {
409 unsigned long regbase = dp->addrs[2].address;
410 par->cmap_adr = ioremap(regbase, 0x1FFF);
411 par->cmap_type = cmap_r128;
412 } else if (dp && (!strncmp(name, "ATY,RageM3pA", 12)
413 || !strncmp(name, "ATY,RageM3p12A", 14))) {
414 unsigned long regbase =
415 dp->parent->addrs[2].address;
416 par->cmap_adr = ioremap(regbase, 0x1FFF);
417 par->cmap_type = cmap_M3A;
418 } else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) {
419 unsigned long regbase =
420 dp->parent->addrs[2].address;
421 par->cmap_adr = ioremap(regbase, 0x1FFF);
422 par->cmap_type = cmap_M3B;
423 } else if (dp && !strncmp(name, "ATY,Rage6", 9)) {
424 unsigned long regbase = dp->addrs[1].address;
425 par->cmap_adr = ioremap(regbase, 0x1FFF);
426 par->cmap_type = cmap_radeon;
427 } else if (!strncmp(name, "ATY,", 4)) {
428 unsigned long base = address & 0xff000000UL;
429 par->cmap_adr =
430 ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
431 par->cmap_data = par->cmap_adr + 1;
432 par->cmap_type = cmap_m64;
433 } else if (device_is_compatible(dp, "pci1014,b7")) {
434 unsigned long regbase = dp->addrs[0].address;
435 par->cmap_adr = ioremap(regbase + 0x6000, 0x1000);
436 par->cmap_type = cmap_gxt2000;
437 }
438 #endif
439 fix->visual = par->cmap_adr ? FB_VISUAL_PSEUDOCOLOR
440 : FB_VISUAL_STATIC_PSEUDOCOLOR;
441 } else
442 fix->visual = /* par->cmap_adr ? FB_VISUAL_DIRECTCOLOR
443 : */ FB_VISUAL_TRUECOLOR;
444
445 var->xoffset = var->yoffset = 0;
446 switch (depth) {
447 case 8:
448 var->bits_per_pixel = 8;
449 var->red.offset = 0;
450 var->red.length = 8;
451 var->green.offset = 0;
452 var->green.length = 8;
453 var->blue.offset = 0;
454 var->blue.length = 8;
455 var->transp.offset = 0;
456 var->transp.length = 0;
457 break;
458 case 15: /* RGB 555 */
459 var->bits_per_pixel = 16;
460 var->red.offset = 10;
461 var->red.length = 5;
462 var->green.offset = 5;
463 var->green.length = 5;
464 var->blue.offset = 0;
465 var->blue.length = 5;
466 var->transp.offset = 0;
467 var->transp.length = 0;
468 break;
469 case 16: /* RGB 565 */
470 var->bits_per_pixel = 16;
471 var->red.offset = 11;
472 var->red.length = 5;
473 var->green.offset = 5;
474 var->green.length = 6;
475 var->blue.offset = 0;
476 var->blue.length = 5;
477 var->transp.offset = 0;
478 var->transp.length = 0;
479 break;
480 case 32: /* RGB 888 */
481 var->bits_per_pixel = 32;
482 var->red.offset = 16;
483 var->red.length = 8;
484 var->green.offset = 8;
485 var->green.length = 8;
486 var->blue.offset = 0;
487 var->blue.length = 8;
488 var->transp.offset = 24;
489 var->transp.length = 8;
490 break;
491 }
492 var->red.msb_right = var->green.msb_right = var->blue.msb_right =
493 var->transp.msb_right = 0;
494 var->grayscale = 0;
495 var->nonstd = 0;
496 var->activate = 0;
497 var->height = var->width = -1;
498 var->pixclock = 10000;
499 var->left_margin = var->right_margin = 16;
500 var->upper_margin = var->lower_margin = 16;
501 var->hsync_len = var->vsync_len = 8;
502 var->sync = 0;
503 var->vmode = FB_VMODE_NONINTERLACED;
504
505 info->fbops = &offb_ops;
506 info->screen_base = ioremap(address, fix->smem_len);
507 info->par = par;
508 info->pseudo_palette = (void *) (info + 1);
509 info->flags = FBINFO_DEFAULT;
510
511 fb_alloc_cmap(&info->cmap, 256, 0);
512
513 if (register_framebuffer(info) < 0) {
514 kfree(info);
515 release_mem_region(res_start, res_size);
516 return;
517 }
518
519 printk(KERN_INFO "fb%d: Open Firmware frame buffer device on %s\n",
520 info->node, full_name);
521 }
522
523 module_init(offb_init);
524 MODULE_LICENSE("GPL");
Linus' kernel tree