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drm: Move mode tables to drm_edid.c
[linux-2.6.git] / drivers / gpu / drm / drm_edid.c
blob6995d2fa46cfd3d515aeeba1924fd458664bca5a
1 /*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/i2c.h>
33 #include <linux/module.h>
34 #include <drm/drmP.h>
35 #include <drm/drm_edid.h>
36
37 #define version_greater(edid, maj, min) \
38 (((edid)->version > (maj)) || \
39 ((edid)->version == (maj) && (edid)->revision > (min)))
40
41 #define EDID_EST_TIMINGS 16
42 #define EDID_STD_TIMINGS 8
43 #define EDID_DETAILED_TIMINGS 4
44
45 /*
46 * EDID blocks out in the wild have a variety of bugs, try to collect
47 * them here (note that userspace may work around broken monitors first,
48 * but fixes should make their way here so that the kernel "just works"
49 * on as many displays as possible).
50 */
51
52 /* First detailed mode wrong, use largest 60Hz mode */
53 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
54 /* Reported 135MHz pixel clock is too high, needs adjustment */
55 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
56 /* Prefer the largest mode at 75 Hz */
57 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
58 /* Detail timing is in cm not mm */
59 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
60 /* Detailed timing descriptors have bogus size values, so just take the
61 * maximum size and use that.
62 */
63 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
64 /* Monitor forgot to set the first detailed is preferred bit. */
65 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
66 /* use +hsync +vsync for detailed mode */
67 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
68 /* Force reduced-blanking timings for detailed modes */
69 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
70
71 struct detailed_mode_closure {
72 struct drm_connector *connector;
73 struct edid *edid;
74 bool preferred;
75 u32 quirks;
76 int modes;
77 };
78
79 #define LEVEL_DMT 0
80 #define LEVEL_GTF 1
81 #define LEVEL_GTF2 2
82 #define LEVEL_CVT 3
83
84 static struct edid_quirk {
85 char vendor[4];
86 int product_id;
87 u32 quirks;
88 } edid_quirk_list[] = {
89 /* Acer AL1706 */
90 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
91 /* Acer F51 */
92 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
93 /* Unknown Acer */
94 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
95
96 /* Belinea 10 15 55 */
97 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
98 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
99
100 /* Envision Peripherals, Inc. EN-7100e */
101 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
102 /* Envision EN2028 */
103 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
104
105 /* Funai Electronics PM36B */
106 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
107 EDID_QUIRK_DETAILED_IN_CM },
108
109 /* LG Philips LCD LP154W01-A5 */
110 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
111 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
112
113 /* Philips 107p5 CRT */
114 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
115
116 /* Proview AY765C */
117 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
118
119 /* Samsung SyncMaster 205BW. Note: irony */
120 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
121 /* Samsung SyncMaster 22[5-6]BW */
122 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
123 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
124
125 /* ViewSonic VA2026w */
126 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
127 };
128
129 /*
130 * Autogenerated from the DMT spec.
131 * This table is copied from xfree86/modes/xf86EdidModes.c.
132 */
133 static const struct drm_display_mode drm_dmt_modes[] = {
134 /* 640x350@85Hz */
135 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
136 736, 832, 0, 350, 382, 385, 445, 0,
137 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
138 /* 640x400@85Hz */
139 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
140 736, 832, 0, 400, 401, 404, 445, 0,
141 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
142 /* 720x400@85Hz */
143 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
144 828, 936, 0, 400, 401, 404, 446, 0,
145 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
146 /* 640x480@60Hz */
147 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
148 752, 800, 0, 480, 489, 492, 525, 0,
149 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
150 /* 640x480@72Hz */
151 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
152 704, 832, 0, 480, 489, 492, 520, 0,
153 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
154 /* 640x480@75Hz */
155 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
156 720, 840, 0, 480, 481, 484, 500, 0,
157 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
158 /* 640x480@85Hz */
159 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
160 752, 832, 0, 480, 481, 484, 509, 0,
161 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
162 /* 800x600@56Hz */
163 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
164 896, 1024, 0, 600, 601, 603, 625, 0,
165 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
166 /* 800x600@60Hz */
167 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
168 968, 1056, 0, 600, 601, 605, 628, 0,
169 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
170 /* 800x600@72Hz */
171 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
172 976, 1040, 0, 600, 637, 643, 666, 0,
173 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
174 /* 800x600@75Hz */
175 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
176 896, 1056, 0, 600, 601, 604, 625, 0,
177 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
178 /* 800x600@85Hz */
179 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
180 896, 1048, 0, 600, 601, 604, 631, 0,
181 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
182 /* 800x600@120Hz RB */
183 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
184 880, 960, 0, 600, 603, 607, 636, 0,
185 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
186 /* 848x480@60Hz */
187 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
188 976, 1088, 0, 480, 486, 494, 517, 0,
189 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
190 /* 1024x768@43Hz, interlace */
191 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
192 1208, 1264, 0, 768, 768, 772, 817, 0,
193 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
194 DRM_MODE_FLAG_INTERLACE) },
195 /* 1024x768@60Hz */
196 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
197 1184, 1344, 0, 768, 771, 777, 806, 0,
198 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
199 /* 1024x768@70Hz */
200 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
201 1184, 1328, 0, 768, 771, 777, 806, 0,
202 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
203 /* 1024x768@75Hz */
204 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
205 1136, 1312, 0, 768, 769, 772, 800, 0,
206 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
207 /* 1024x768@85Hz */
208 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
209 1168, 1376, 0, 768, 769, 772, 808, 0,
210 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
211 /* 1024x768@120Hz RB */
212 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
213 1104, 1184, 0, 768, 771, 775, 813, 0,
214 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
215 /* 1152x864@75Hz */
216 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
217 1344, 1600, 0, 864, 865, 868, 900, 0,
218 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
219 /* 1280x768@60Hz RB */
220 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
221 1360, 1440, 0, 768, 771, 778, 790, 0,
222 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
223 /* 1280x768@60Hz */
224 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
225 1472, 1664, 0, 768, 771, 778, 798, 0,
226 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
227 /* 1280x768@75Hz */
228 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
229 1488, 1696, 0, 768, 771, 778, 805, 0,
230 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
231 /* 1280x768@85Hz */
232 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
233 1496, 1712, 0, 768, 771, 778, 809, 0,
234 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
235 /* 1280x768@120Hz RB */
236 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
237 1360, 1440, 0, 768, 771, 778, 813, 0,
238 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
239 /* 1280x800@60Hz RB */
240 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
241 1360, 1440, 0, 800, 803, 809, 823, 0,
242 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
243 /* 1280x800@60Hz */
244 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
245 1480, 1680, 0, 800, 803, 809, 831, 0,
246 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
247 /* 1280x800@75Hz */
248 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
249 1488, 1696, 0, 800, 803, 809, 838, 0,
250 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
251 /* 1280x800@85Hz */
252 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
253 1496, 1712, 0, 800, 803, 809, 843, 0,
254 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
255 /* 1280x800@120Hz RB */
256 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
257 1360, 1440, 0, 800, 803, 809, 847, 0,
258 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
259 /* 1280x960@60Hz */
260 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
261 1488, 1800, 0, 960, 961, 964, 1000, 0,
262 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
263 /* 1280x960@85Hz */
264 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
265 1504, 1728, 0, 960, 961, 964, 1011, 0,
266 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
267 /* 1280x960@120Hz RB */
268 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
269 1360, 1440, 0, 960, 963, 967, 1017, 0,
270 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
271 /* 1280x1024@60Hz */
272 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
273 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
274 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
275 /* 1280x1024@75Hz */
276 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
277 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
278 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
279 /* 1280x1024@85Hz */
280 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
281 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
282 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
283 /* 1280x1024@120Hz RB */
284 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
285 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
286 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
287 /* 1360x768@60Hz */
288 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
289 1536, 1792, 0, 768, 771, 777, 795, 0,
290 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
291 /* 1360x768@120Hz RB */
292 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
293 1440, 1520, 0, 768, 771, 776, 813, 0,
294 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
295 /* 1400x1050@60Hz RB */
296 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
297 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
298 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
299 /* 1400x1050@60Hz */
300 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
301 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
302 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
303 /* 1400x1050@75Hz */
304 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
305 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
306 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
307 /* 1400x1050@85Hz */
308 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
309 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
310 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
311 /* 1400x1050@120Hz RB */
312 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
313 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
314 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
315 /* 1440x900@60Hz RB */
316 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
317 1520, 1600, 0, 900, 903, 909, 926, 0,
318 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
319 /* 1440x900@60Hz */
320 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
321 1672, 1904, 0, 900, 903, 909, 934, 0,
322 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
323 /* 1440x900@75Hz */
324 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
325 1688, 1936, 0, 900, 903, 909, 942, 0,
326 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
327 /* 1440x900@85Hz */
328 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
329 1696, 1952, 0, 900, 903, 909, 948, 0,
330 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
331 /* 1440x900@120Hz RB */
332 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
333 1520, 1600, 0, 900, 903, 909, 953, 0,
334 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
335 /* 1600x1200@60Hz */
336 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
337 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
339 /* 1600x1200@65Hz */
340 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
341 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
342 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
343 /* 1600x1200@70Hz */
344 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
345 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
347 /* 1600x1200@75Hz */
348 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
349 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
350 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
351 /* 1600x1200@85Hz */
352 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
353 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
354 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
355 /* 1600x1200@120Hz RB */
356 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
357 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
358 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
359 /* 1680x1050@60Hz RB */
360 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
361 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
362 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
363 /* 1680x1050@60Hz */
364 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
365 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
366 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
367 /* 1680x1050@75Hz */
368 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
369 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
370 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
371 /* 1680x1050@85Hz */
372 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
373 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
374 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
375 /* 1680x1050@120Hz RB */
376 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
377 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
378 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
379 /* 1792x1344@60Hz */
380 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
381 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
382 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
383 /* 1792x1344@75Hz */
384 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
385 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
386 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
387 /* 1792x1344@120Hz RB */
388 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
389 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
390 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
391 /* 1856x1392@60Hz */
392 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
393 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
394 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
395 /* 1856x1392@75Hz */
396 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
397 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
398 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
399 /* 1856x1392@120Hz RB */
400 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
401 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
402 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
403 /* 1920x1200@60Hz RB */
404 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
405 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
406 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
407 /* 1920x1200@60Hz */
408 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
409 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
410 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
411 /* 1920x1200@75Hz */
412 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
413 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
414 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
415 /* 1920x1200@85Hz */
416 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
417 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
418 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
419 /* 1920x1200@120Hz RB */
420 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
421 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
422 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
423 /* 1920x1440@60Hz */
424 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
425 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
426 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
427 /* 1920x1440@75Hz */
428 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
429 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
430 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
431 /* 1920x1440@120Hz RB */
432 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
433 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
434 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
435 /* 2560x1600@60Hz RB */
436 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
437 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
438 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
439 /* 2560x1600@60Hz */
440 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
441 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
442 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
443 /* 2560x1600@75HZ */
444 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
445 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
447 /* 2560x1600@85HZ */
448 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
449 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
451 /* 2560x1600@120Hz RB */
452 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
453 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
454 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
455 };
456
457 static const struct drm_display_mode edid_est_modes[] = {
458 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
459 968, 1056, 0, 600, 601, 605, 628, 0,
460 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
461 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
462 896, 1024, 0, 600, 601, 603, 625, 0,
463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
464 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
465 720, 840, 0, 480, 481, 484, 500, 0,
466 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
467 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
468 704, 832, 0, 480, 489, 491, 520, 0,
469 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
470 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
471 768, 864, 0, 480, 483, 486, 525, 0,
472 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
473 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
474 752, 800, 0, 480, 490, 492, 525, 0,
475 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
476 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
477 846, 900, 0, 400, 421, 423, 449, 0,
478 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
479 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
480 846, 900, 0, 400, 412, 414, 449, 0,
481 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
482 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
483 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
485 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
486 1136, 1312, 0, 768, 769, 772, 800, 0,
487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
488 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
489 1184, 1328, 0, 768, 771, 777, 806, 0,
490 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
491 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
492 1184, 1344, 0, 768, 771, 777, 806, 0,
493 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
494 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
495 1208, 1264, 0, 768, 768, 776, 817, 0,
496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
497 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
498 928, 1152, 0, 624, 625, 628, 667, 0,
499 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
500 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
501 896, 1056, 0, 600, 601, 604, 625, 0,
502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
503 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
504 976, 1040, 0, 600, 637, 643, 666, 0,
505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
506 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
507 1344, 1600, 0, 864, 865, 868, 900, 0,
508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
509 };
510
511 struct minimode {
512 short w;
513 short h;
514 short r;
515 short rb;
516 };
517
518 static const struct minimode est3_modes[] = {
519 /* byte 6 */
520 { 640, 350, 85, 0 },
521 { 640, 400, 85, 0 },
522 { 720, 400, 85, 0 },
523 { 640, 480, 85, 0 },
524 { 848, 480, 60, 0 },
525 { 800, 600, 85, 0 },
526 { 1024, 768, 85, 0 },
527 { 1152, 864, 75, 0 },
528 /* byte 7 */
529 { 1280, 768, 60, 1 },
530 { 1280, 768, 60, 0 },
531 { 1280, 768, 75, 0 },
532 { 1280, 768, 85, 0 },
533 { 1280, 960, 60, 0 },
534 { 1280, 960, 85, 0 },
535 { 1280, 1024, 60, 0 },
536 { 1280, 1024, 85, 0 },
537 /* byte 8 */
538 { 1360, 768, 60, 0 },
539 { 1440, 900, 60, 1 },
540 { 1440, 900, 60, 0 },
541 { 1440, 900, 75, 0 },
542 { 1440, 900, 85, 0 },
543 { 1400, 1050, 60, 1 },
544 { 1400, 1050, 60, 0 },
545 { 1400, 1050, 75, 0 },
546 /* byte 9 */
547 { 1400, 1050, 85, 0 },
548 { 1680, 1050, 60, 1 },
549 { 1680, 1050, 60, 0 },
550 { 1680, 1050, 75, 0 },
551 { 1680, 1050, 85, 0 },
552 { 1600, 1200, 60, 0 },
553 { 1600, 1200, 65, 0 },
554 { 1600, 1200, 70, 0 },
555 /* byte 10 */
556 { 1600, 1200, 75, 0 },
557 { 1600, 1200, 85, 0 },
558 { 1792, 1344, 60, 0 },
559 { 1792, 1344, 85, 0 },
560 { 1856, 1392, 60, 0 },
561 { 1856, 1392, 75, 0 },
562 { 1920, 1200, 60, 1 },
563 { 1920, 1200, 60, 0 },
564 /* byte 11 */
565 { 1920, 1200, 75, 0 },
566 { 1920, 1200, 85, 0 },
567 { 1920, 1440, 60, 0 },
568 { 1920, 1440, 75, 0 },
569 };
570
571 static const struct minimode extra_modes[] = {
572 { 1024, 576, 60, 0 },
573 { 1366, 768, 60, 0 },
574 { 1600, 900, 60, 0 },
575 { 1680, 945, 60, 0 },
576 { 1920, 1080, 60, 0 },
577 { 2048, 1152, 60, 0 },
578 { 2048, 1536, 60, 0 },
579 };
580
581 /*
582 * Probably taken from CEA-861 spec.
583 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
584 */
585 static const struct drm_display_mode edid_cea_modes[] = {
586 /* 1 - 640x480@60Hz */
587 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
588 752, 800, 0, 480, 490, 492, 525, 0,
589 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
590 /* 2 - 720x480@60Hz */
591 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
592 798, 858, 0, 480, 489, 495, 525, 0,
593 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
594 /* 3 - 720x480@60Hz */
595 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
596 798, 858, 0, 480, 489, 495, 525, 0,
597 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
598 /* 4 - 1280x720@60Hz */
599 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
600 1430, 1650, 0, 720, 725, 730, 750, 0,
601 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
602 /* 5 - 1920x1080i@60Hz */
603 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
604 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
605 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
606 DRM_MODE_FLAG_INTERLACE) },
607 /* 6 - 1440x480i@60Hz */
608 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
609 1602, 1716, 0, 480, 488, 494, 525, 0,
610 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
611 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
612 /* 7 - 1440x480i@60Hz */
613 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
614 1602, 1716, 0, 480, 488, 494, 525, 0,
615 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
616 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
617 /* 8 - 1440x240@60Hz */
618 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
619 1602, 1716, 0, 240, 244, 247, 262, 0,
620 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
621 DRM_MODE_FLAG_DBLCLK) },
622 /* 9 - 1440x240@60Hz */
623 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
624 1602, 1716, 0, 240, 244, 247, 262, 0,
625 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
626 DRM_MODE_FLAG_DBLCLK) },
627 /* 10 - 2880x480i@60Hz */
628 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
629 3204, 3432, 0, 480, 488, 494, 525, 0,
630 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
631 DRM_MODE_FLAG_INTERLACE) },
632 /* 11 - 2880x480i@60Hz */
633 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
634 3204, 3432, 0, 480, 488, 494, 525, 0,
635 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
636 DRM_MODE_FLAG_INTERLACE) },
637 /* 12 - 2880x240@60Hz */
638 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
639 3204, 3432, 0, 240, 244, 247, 262, 0,
640 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
641 /* 13 - 2880x240@60Hz */
642 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
643 3204, 3432, 0, 240, 244, 247, 262, 0,
644 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
645 /* 14 - 1440x480@60Hz */
646 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
647 1596, 1716, 0, 480, 489, 495, 525, 0,
648 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
649 /* 15 - 1440x480@60Hz */
650 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
651 1596, 1716, 0, 480, 489, 495, 525, 0,
652 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
653 /* 16 - 1920x1080@60Hz */
654 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
655 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
656 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
657 /* 17 - 720x576@50Hz */
658 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
659 796, 864, 0, 576, 581, 586, 625, 0,
660 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
661 /* 18 - 720x576@50Hz */
662 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
663 796, 864, 0, 576, 581, 586, 625, 0,
664 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
665 /* 19 - 1280x720@50Hz */
666 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
667 1760, 1980, 0, 720, 725, 730, 750, 0,
668 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
669 /* 20 - 1920x1080i@50Hz */
670 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
671 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
672 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
673 DRM_MODE_FLAG_INTERLACE) },
674 /* 21 - 1440x576i@50Hz */
675 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
676 1590, 1728, 0, 576, 580, 586, 625, 0,
677 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
678 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
679 /* 22 - 1440x576i@50Hz */
680 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
681 1590, 1728, 0, 576, 580, 586, 625, 0,
682 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
683 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
684 /* 23 - 1440x288@50Hz */
685 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
686 1590, 1728, 0, 288, 290, 293, 312, 0,
687 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
688 DRM_MODE_FLAG_DBLCLK) },
689 /* 24 - 1440x288@50Hz */
690 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
691 1590, 1728, 0, 288, 290, 293, 312, 0,
692 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
693 DRM_MODE_FLAG_DBLCLK) },
694 /* 25 - 2880x576i@50Hz */
695 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
696 3180, 3456, 0, 576, 580, 586, 625, 0,
697 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
698 DRM_MODE_FLAG_INTERLACE) },
699 /* 26 - 2880x576i@50Hz */
700 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
701 3180, 3456, 0, 576, 580, 586, 625, 0,
702 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
703 DRM_MODE_FLAG_INTERLACE) },
704 /* 27 - 2880x288@50Hz */
705 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
706 3180, 3456, 0, 288, 290, 293, 312, 0,
707 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
708 /* 28 - 2880x288@50Hz */
709 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
710 3180, 3456, 0, 288, 290, 293, 312, 0,
711 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
712 /* 29 - 1440x576@50Hz */
713 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
714 1592, 1728, 0, 576, 581, 586, 625, 0,
715 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
716 /* 30 - 1440x576@50Hz */
717 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
718 1592, 1728, 0, 576, 581, 586, 625, 0,
719 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
720 /* 31 - 1920x1080@50Hz */
721 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
722 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
723 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
724 /* 32 - 1920x1080@24Hz */
725 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
726 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
727 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
728 /* 33 - 1920x1080@25Hz */
729 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
730 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
731 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
732 /* 34 - 1920x1080@30Hz */
733 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
734 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
735 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
736 /* 35 - 2880x480@60Hz */
737 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
738 3192, 3432, 0, 480, 489, 495, 525, 0,
739 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
740 /* 36 - 2880x480@60Hz */
741 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
742 3192, 3432, 0, 480, 489, 495, 525, 0,
743 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
744 /* 37 - 2880x576@50Hz */
745 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
746 3184, 3456, 0, 576, 581, 586, 625, 0,
747 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
748 /* 38 - 2880x576@50Hz */
749 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
750 3184, 3456, 0, 576, 581, 586, 625, 0,
751 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
752 /* 39 - 1920x1080i@50Hz */
753 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
754 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
755 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
756 DRM_MODE_FLAG_INTERLACE) },
757 /* 40 - 1920x1080i@100Hz */
758 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
759 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
760 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
761 DRM_MODE_FLAG_INTERLACE) },
762 /* 41 - 1280x720@100Hz */
763 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
764 1760, 1980, 0, 720, 725, 730, 750, 0,
765 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
766 /* 42 - 720x576@100Hz */
767 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
768 796, 864, 0, 576, 581, 586, 625, 0,
769 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
770 /* 43 - 720x576@100Hz */
771 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
772 796, 864, 0, 576, 581, 586, 625, 0,
773 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
774 /* 44 - 1440x576i@100Hz */
775 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
776 1590, 1728, 0, 576, 580, 586, 625, 0,
777 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
778 DRM_MODE_FLAG_DBLCLK) },
779 /* 45 - 1440x576i@100Hz */
780 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
781 1590, 1728, 0, 576, 580, 586, 625, 0,
782 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
783 DRM_MODE_FLAG_DBLCLK) },
784 /* 46 - 1920x1080i@120Hz */
785 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
786 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
787 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
788 DRM_MODE_FLAG_INTERLACE) },
789 /* 47 - 1280x720@120Hz */
790 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
791 1430, 1650, 0, 720, 725, 730, 750, 0,
792 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
793 /* 48 - 720x480@120Hz */
794 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
795 798, 858, 0, 480, 489, 495, 525, 0,
796 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
797 /* 49 - 720x480@120Hz */
798 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
799 798, 858, 0, 480, 489, 495, 525, 0,
800 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
801 /* 50 - 1440x480i@120Hz */
802 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
803 1602, 1716, 0, 480, 488, 494, 525, 0,
804 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
805 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
806 /* 51 - 1440x480i@120Hz */
807 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
808 1602, 1716, 0, 480, 488, 494, 525, 0,
809 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
810 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
811 /* 52 - 720x576@200Hz */
812 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
813 796, 864, 0, 576, 581, 586, 625, 0,
814 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
815 /* 53 - 720x576@200Hz */
816 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
817 796, 864, 0, 576, 581, 586, 625, 0,
818 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
819 /* 54 - 1440x576i@200Hz */
820 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
821 1590, 1728, 0, 576, 580, 586, 625, 0,
822 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
823 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
824 /* 55 - 1440x576i@200Hz */
825 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
826 1590, 1728, 0, 576, 580, 586, 625, 0,
827 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
828 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
829 /* 56 - 720x480@240Hz */
830 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
831 798, 858, 0, 480, 489, 495, 525, 0,
832 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
833 /* 57 - 720x480@240Hz */
834 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
835 798, 858, 0, 480, 489, 495, 525, 0,
836 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
837 /* 58 - 1440x480i@240 */
838 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
839 1602, 1716, 0, 480, 488, 494, 525, 0,
840 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
841 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
842 /* 59 - 1440x480i@240 */
843 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
844 1602, 1716, 0, 480, 488, 494, 525, 0,
845 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
846 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
847 /* 60 - 1280x720@24Hz */
848 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
849 3080, 3300, 0, 720, 725, 730, 750, 0,
850 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
851 /* 61 - 1280x720@25Hz */
852 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
853 3740, 3960, 0, 720, 725, 730, 750, 0,
854 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
855 /* 62 - 1280x720@30Hz */
856 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
857 3080, 3300, 0, 720, 725, 730, 750, 0,
858 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
859 /* 63 - 1920x1080@120Hz */
860 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
861 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
862 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
863 /* 64 - 1920x1080@100Hz */
864 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
865 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
866 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
867 };
868
869 /*** DDC fetch and block validation ***/
870
871 static const u8 edid_header[] = {
872 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
873 };
874
875 /*
876 * Sanity check the header of the base EDID block. Return 8 if the header
877 * is perfect, down to 0 if it's totally wrong.
878 */
879 int drm_edid_header_is_valid(const u8 *raw_edid)
880 {
881 int i, score = 0;
882
883 for (i = 0; i < sizeof(edid_header); i++)
884 if (raw_edid[i] == edid_header[i])
885 score++;
886
887 return score;
888 }
889 EXPORT_SYMBOL(drm_edid_header_is_valid);
890
891 static int edid_fixup __read_mostly = 6;
892 module_param_named(edid_fixup, edid_fixup, int, 0400);
893 MODULE_PARM_DESC(edid_fixup,
894 "Minimum number of valid EDID header bytes (0-8, default 6)");
895
896 /*
897 * Sanity check the EDID block (base or extension). Return 0 if the block
898 * doesn't check out, or 1 if it's valid.
899 */
900 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
901 {
902 int i;
903 u8 csum = 0;
904 struct edid *edid = (struct edid *)raw_edid;
905
906 if (edid_fixup > 8 || edid_fixup < 0)
907 edid_fixup = 6;
908
909 if (block == 0) {
910 int score = drm_edid_header_is_valid(raw_edid);
911 if (score == 8) ;
912 else if (score >= edid_fixup) {
913 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
914 memcpy(raw_edid, edid_header, sizeof(edid_header));
915 } else {
916 goto bad;
917 }
918 }
919
920 for (i = 0; i < EDID_LENGTH; i++)
921 csum += raw_edid[i];
922 if (csum) {
923 if (print_bad_edid) {
924 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
925 }
926
927 /* allow CEA to slide through, switches mangle this */
928 if (raw_edid[0] != 0x02)
929 goto bad;
930 }
931
932 /* per-block-type checks */
933 switch (raw_edid[0]) {
934 case 0: /* base */
935 if (edid->version != 1) {
936 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
937 goto bad;
938 }
939
940 if (edid->revision > 4)
941 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
942 break;
943
944 default:
945 break;
946 }
947
948 return 1;
949
950 bad:
951 if (raw_edid && print_bad_edid) {
952 printk(KERN_ERR "Raw EDID:\n");
953 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
954 raw_edid, EDID_LENGTH, false);
955 }
956 return 0;
957 }
958 EXPORT_SYMBOL(drm_edid_block_valid);
959
960 /**
961 * drm_edid_is_valid - sanity check EDID data
962 * @edid: EDID data
963 *
964 * Sanity-check an entire EDID record (including extensions)
965 */
966 bool drm_edid_is_valid(struct edid *edid)
967 {
968 int i;
969 u8 *raw = (u8 *)edid;
970
971 if (!edid)
972 return false;
973
974 for (i = 0; i <= edid->extensions; i++)
975 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
976 return false;
977
978 return true;
979 }
980 EXPORT_SYMBOL(drm_edid_is_valid);
981
982 #define DDC_SEGMENT_ADDR 0x30
983 /**
984 * Get EDID information via I2C.
985 *
986 * \param adapter : i2c device adaptor
987 * \param buf : EDID data buffer to be filled
988 * \param len : EDID data buffer length
989 * \return 0 on success or -1 on failure.
990 *
991 * Try to fetch EDID information by calling i2c driver function.
992 */
993 static int
994 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
995 int block, int len)
996 {
997 unsigned char start = block * EDID_LENGTH;
998 unsigned char segment = block >> 1;
999 unsigned char xfers = segment ? 3 : 2;
1000 int ret, retries = 5;
1001
1002 /* The core i2c driver will automatically retry the transfer if the
1003 * adapter reports EAGAIN. However, we find that bit-banging transfers
1004 * are susceptible to errors under a heavily loaded machine and
1005 * generate spurious NAKs and timeouts. Retrying the transfer
1006 * of the individual block a few times seems to overcome this.
1007 */
1008 do {
1009 struct i2c_msg msgs[] = {
1010 {
1011 .addr = DDC_SEGMENT_ADDR,
1012 .flags = 0,
1013 .len = 1,
1014 .buf = &segment,
1015 }, {
1016 .addr = DDC_ADDR,
1017 .flags = 0,
1018 .len = 1,
1019 .buf = &start,
1020 }, {
1021 .addr = DDC_ADDR,
1022 .flags = I2C_M_RD,
1023 .len = len,
1024 .buf = buf,
1025 }
1026 };
1027
1028 /*
1029 * Avoid sending the segment addr to not upset non-compliant ddc
1030 * monitors.
1031 */
1032 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1033
1034 if (ret == -ENXIO) {
1035 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1036 adapter->name);
1037 break;
1038 }
1039 } while (ret != xfers && --retries);
1040
1041 return ret == xfers ? 0 : -1;
1042 }
1043
1044 static bool drm_edid_is_zero(u8 *in_edid, int length)
1045 {
1046 if (memchr_inv(in_edid, 0, length))
1047 return false;
1048
1049 return true;
1050 }
1051
1052 static u8 *
1053 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
1054 {
1055 int i, j = 0, valid_extensions = 0;
1056 u8 *block, *new;
1057 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1058
1059 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1060 return NULL;
1061
1062 /* base block fetch */
1063 for (i = 0; i < 4; i++) {
1064 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
1065 goto out;
1066 if (drm_edid_block_valid(block, 0, print_bad_edid))
1067 break;
1068 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1069 connector->null_edid_counter++;
1070 goto carp;
1071 }
1072 }
1073 if (i == 4)
1074 goto carp;
1075
1076 /* if there's no extensions, we're done */
1077 if (block[0x7e] == 0)
1078 return block;
1079
1080 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1081 if (!new)
1082 goto out;
1083 block = new;
1084
1085 for (j = 1; j <= block[0x7e]; j++) {
1086 for (i = 0; i < 4; i++) {
1087 if (drm_do_probe_ddc_edid(adapter,
1088 block + (valid_extensions + 1) * EDID_LENGTH,
1089 j, EDID_LENGTH))
1090 goto out;
1091 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1092 valid_extensions++;
1093 break;
1094 }
1095 }
1096
1097 if (i == 4 && print_bad_edid) {
1098 dev_warn(connector->dev->dev,
1099 "%s: Ignoring invalid EDID block %d.\n",
1100 drm_get_connector_name(connector), j);
1101
1102 connector->bad_edid_counter++;
1103 }
1104 }
1105
1106 if (valid_extensions != block[0x7e]) {
1107 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1108 block[0x7e] = valid_extensions;
1109 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1110 if (!new)
1111 goto out;
1112 block = new;
1113 }
1114
1115 return block;
1116
1117 carp:
1118 if (print_bad_edid) {
1119 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1120 drm_get_connector_name(connector), j);
1121 }
1122 connector->bad_edid_counter++;
1123
1124 out:
1125 kfree(block);
1126 return NULL;
1127 }
1128
1129 /**
1130 * Probe DDC presence.
1131 *
1132 * \param adapter : i2c device adaptor
1133 * \return 1 on success
1134 */
1135 bool
1136 drm_probe_ddc(struct i2c_adapter *adapter)
1137 {
1138 unsigned char out;
1139
1140 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1141 }
1142 EXPORT_SYMBOL(drm_probe_ddc);
1143
1144 /**
1145 * drm_get_edid - get EDID data, if available
1146 * @connector: connector we're probing
1147 * @adapter: i2c adapter to use for DDC
1148 *
1149 * Poke the given i2c channel to grab EDID data if possible. If found,
1150 * attach it to the connector.
1151 *
1152 * Return edid data or NULL if we couldn't find any.
1153 */
1154 struct edid *drm_get_edid(struct drm_connector *connector,
1155 struct i2c_adapter *adapter)
1156 {
1157 struct edid *edid = NULL;
1158
1159 if (drm_probe_ddc(adapter))
1160 edid = (struct edid *)drm_do_get_edid(connector, adapter);
1161
1162 return edid;
1163 }
1164 EXPORT_SYMBOL(drm_get_edid);
1165
1166 /*** EDID parsing ***/
1167
1168 /**
1169 * edid_vendor - match a string against EDID's obfuscated vendor field
1170 * @edid: EDID to match
1171 * @vendor: vendor string
1172 *
1173 * Returns true if @vendor is in @edid, false otherwise
1174 */
1175 static bool edid_vendor(struct edid *edid, char *vendor)
1176 {
1177 char edid_vendor[3];
1178
1179 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1180 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1181 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1182 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1183
1184 return !strncmp(edid_vendor, vendor, 3);
1185 }
1186
1187 /**
1188 * edid_get_quirks - return quirk flags for a given EDID
1189 * @edid: EDID to process
1190 *
1191 * This tells subsequent routines what fixes they need to apply.
1192 */
1193 static u32 edid_get_quirks(struct edid *edid)
1194 {
1195 struct edid_quirk *quirk;
1196 int i;
1197
1198 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1199 quirk = &edid_quirk_list[i];
1200
1201 if (edid_vendor(edid, quirk->vendor) &&
1202 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1203 return quirk->quirks;
1204 }
1205
1206 return 0;
1207 }
1208
1209 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1210 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
1211
1212 /**
1213 * edid_fixup_preferred - set preferred modes based on quirk list
1214 * @connector: has mode list to fix up
1215 * @quirks: quirks list
1216 *
1217 * Walk the mode list for @connector, clearing the preferred status
1218 * on existing modes and setting it anew for the right mode ala @quirks.
1219 */
1220 static void edid_fixup_preferred(struct drm_connector *connector,
1221 u32 quirks)
1222 {
1223 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1224 int target_refresh = 0;
1225
1226 if (list_empty(&connector->probed_modes))
1227 return;
1228
1229 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1230 target_refresh = 60;
1231 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1232 target_refresh = 75;
1233
1234 preferred_mode = list_first_entry(&connector->probed_modes,
1235 struct drm_display_mode, head);
1236
1237 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1238 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1239
1240 if (cur_mode == preferred_mode)
1241 continue;
1242
1243 /* Largest mode is preferred */
1244 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1245 preferred_mode = cur_mode;
1246
1247 /* At a given size, try to get closest to target refresh */
1248 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1249 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
1250 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
1251 preferred_mode = cur_mode;
1252 }
1253 }
1254
1255 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1256 }
1257
1258 static bool
1259 mode_is_rb(const struct drm_display_mode *mode)
1260 {
1261 return (mode->htotal - mode->hdisplay == 160) &&
1262 (mode->hsync_end - mode->hdisplay == 80) &&
1263 (mode->hsync_end - mode->hsync_start == 32) &&
1264 (mode->vsync_start - mode->vdisplay == 3);
1265 }
1266
1267 /*
1268 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1269 * @dev: Device to duplicate against
1270 * @hsize: Mode width
1271 * @vsize: Mode height
1272 * @fresh: Mode refresh rate
1273 * @rb: Mode reduced-blanking-ness
1274 *
1275 * Walk the DMT mode list looking for a match for the given parameters.
1276 * Return a newly allocated copy of the mode, or NULL if not found.
1277 */
1278 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1279 int hsize, int vsize, int fresh,
1280 bool rb)
1281 {
1282 int i;
1283
1284 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1285 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1286 if (hsize != ptr->hdisplay)
1287 continue;
1288 if (vsize != ptr->vdisplay)
1289 continue;
1290 if (fresh != drm_mode_vrefresh(ptr))
1291 continue;
1292 if (rb != mode_is_rb(ptr))
1293 continue;
1294
1295 return drm_mode_duplicate(dev, ptr);
1296 }
1297
1298 return NULL;
1299 }
1300 EXPORT_SYMBOL(drm_mode_find_dmt);
1301
1302 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1303
1304 static void
1305 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1306 {
1307 int i, n = 0;
1308 u8 d = ext[0x02];
1309 u8 *det_base = ext + d;
1310
1311 n = (127 - d) / 18;
1312 for (i = 0; i < n; i++)
1313 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1314 }
1315
1316 static void
1317 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1318 {
1319 unsigned int i, n = min((int)ext[0x02], 6);
1320 u8 *det_base = ext + 5;
1321
1322 if (ext[0x01] != 1)
1323 return; /* unknown version */
1324
1325 for (i = 0; i < n; i++)
1326 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1327 }
1328
1329 static void
1330 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1331 {
1332 int i;
1333 struct edid *edid = (struct edid *)raw_edid;
1334
1335 if (edid == NULL)
1336 return;
1337
1338 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1339 cb(&(edid->detailed_timings[i]), closure);
1340
1341 for (i = 1; i <= raw_edid[0x7e]; i++) {
1342 u8 *ext = raw_edid + (i * EDID_LENGTH);
1343 switch (*ext) {
1344 case CEA_EXT:
1345 cea_for_each_detailed_block(ext, cb, closure);
1346 break;
1347 case VTB_EXT:
1348 vtb_for_each_detailed_block(ext, cb, closure);
1349 break;
1350 default:
1351 break;
1352 }
1353 }
1354 }
1355
1356 static void
1357 is_rb(struct detailed_timing *t, void *data)
1358 {
1359 u8 *r = (u8 *)t;
1360 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1361 if (r[15] & 0x10)
1362 *(bool *)data = true;
1363 }
1364
1365 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1366 static bool
1367 drm_monitor_supports_rb(struct edid *edid)
1368 {
1369 if (edid->revision >= 4) {
1370 bool ret = false;
1371 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1372 return ret;
1373 }
1374
1375 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1376 }
1377
1378 static void
1379 find_gtf2(struct detailed_timing *t, void *data)
1380 {
1381 u8 *r = (u8 *)t;
1382 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1383 *(u8 **)data = r;
1384 }
1385
1386 /* Secondary GTF curve kicks in above some break frequency */
1387 static int
1388 drm_gtf2_hbreak(struct edid *edid)
1389 {
1390 u8 *r = NULL;
1391 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1392 return r ? (r[12] * 2) : 0;
1393 }
1394
1395 static int
1396 drm_gtf2_2c(struct edid *edid)
1397 {
1398 u8 *r = NULL;
1399 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1400 return r ? r[13] : 0;
1401 }
1402
1403 static int
1404 drm_gtf2_m(struct edid *edid)
1405 {
1406 u8 *r = NULL;
1407 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1408 return r ? (r[15] << 8) + r[14] : 0;
1409 }
1410
1411 static int
1412 drm_gtf2_k(struct edid *edid)
1413 {
1414 u8 *r = NULL;
1415 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1416 return r ? r[16] : 0;
1417 }
1418
1419 static int
1420 drm_gtf2_2j(struct edid *edid)
1421 {
1422 u8 *r = NULL;
1423 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1424 return r ? r[17] : 0;
1425 }
1426
1427 /**
1428 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1429 * @edid: EDID block to scan
1430 */
1431 static int standard_timing_level(struct edid *edid)
1432 {
1433 if (edid->revision >= 2) {
1434 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1435 return LEVEL_CVT;
1436 if (drm_gtf2_hbreak(edid))
1437 return LEVEL_GTF2;
1438 return LEVEL_GTF;
1439 }
1440 return LEVEL_DMT;
1441 }
1442
1443 /*
1444 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1445 * monitors fill with ascii space (0x20) instead.
1446 */
1447 static int
1448 bad_std_timing(u8 a, u8 b)
1449 {
1450 return (a == 0x00 && b == 0x00) ||
1451 (a == 0x01 && b == 0x01) ||
1452 (a == 0x20 && b == 0x20);
1453 }
1454
1455 /**
1456 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1457 * @t: standard timing params
1458 * @timing_level: standard timing level
1459 *
1460 * Take the standard timing params (in this case width, aspect, and refresh)
1461 * and convert them into a real mode using CVT/GTF/DMT.
1462 */
1463 static struct drm_display_mode *
1464 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1465 struct std_timing *t, int revision)
1466 {
1467 struct drm_device *dev = connector->dev;
1468 struct drm_display_mode *m, *mode = NULL;
1469 int hsize, vsize;
1470 int vrefresh_rate;
1471 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1472 >> EDID_TIMING_ASPECT_SHIFT;
1473 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1474 >> EDID_TIMING_VFREQ_SHIFT;
1475 int timing_level = standard_timing_level(edid);
1476
1477 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1478 return NULL;
1479
1480 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1481 hsize = t->hsize * 8 + 248;
1482 /* vrefresh_rate = vfreq + 60 */
1483 vrefresh_rate = vfreq + 60;
1484 /* the vdisplay is calculated based on the aspect ratio */
1485 if (aspect_ratio == 0) {
1486 if (revision < 3)
1487 vsize = hsize;
1488 else
1489 vsize = (hsize * 10) / 16;
1490 } else if (aspect_ratio == 1)
1491 vsize = (hsize * 3) / 4;
1492 else if (aspect_ratio == 2)
1493 vsize = (hsize * 4) / 5;
1494 else
1495 vsize = (hsize * 9) / 16;
1496
1497 /* HDTV hack, part 1 */
1498 if (vrefresh_rate == 60 &&
1499 ((hsize == 1360 && vsize == 765) ||
1500 (hsize == 1368 && vsize == 769))) {
1501 hsize = 1366;
1502 vsize = 768;
1503 }
1504
1505 /*
1506 * If this connector already has a mode for this size and refresh
1507 * rate (because it came from detailed or CVT info), use that
1508 * instead. This way we don't have to guess at interlace or
1509 * reduced blanking.
1510 */
1511 list_for_each_entry(m, &connector->probed_modes, head)
1512 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1513 drm_mode_vrefresh(m) == vrefresh_rate)
1514 return NULL;
1515
1516 /* HDTV hack, part 2 */
1517 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1518 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1519 false);
1520 mode->hdisplay = 1366;
1521 mode->hsync_start = mode->hsync_start - 1;
1522 mode->hsync_end = mode->hsync_end - 1;
1523 return mode;
1524 }
1525
1526 /* check whether it can be found in default mode table */
1527 if (drm_monitor_supports_rb(edid)) {
1528 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1529 true);
1530 if (mode)
1531 return mode;
1532 }
1533 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1534 if (mode)
1535 return mode;
1536
1537 /* okay, generate it */
1538 switch (timing_level) {
1539 case LEVEL_DMT:
1540 break;
1541 case LEVEL_GTF:
1542 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1543 break;
1544 case LEVEL_GTF2:
1545 /*
1546 * This is potentially wrong if there's ever a monitor with
1547 * more than one ranges section, each claiming a different
1548 * secondary GTF curve. Please don't do that.
1549 */
1550 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1551 if (!mode)
1552 return NULL;
1553 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1554 drm_mode_destroy(dev, mode);
1555 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1556 vrefresh_rate, 0, 0,
1557 drm_gtf2_m(edid),
1558 drm_gtf2_2c(edid),
1559 drm_gtf2_k(edid),
1560 drm_gtf2_2j(edid));
1561 }
1562 break;
1563 case LEVEL_CVT:
1564 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1565 false);
1566 break;
1567 }
1568 return mode;
1569 }
1570
1571 /*
1572 * EDID is delightfully ambiguous about how interlaced modes are to be
1573 * encoded. Our internal representation is of frame height, but some
1574 * HDTV detailed timings are encoded as field height.
1575 *
1576 * The format list here is from CEA, in frame size. Technically we
1577 * should be checking refresh rate too. Whatever.
1578 */
1579 static void
1580 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1581 struct detailed_pixel_timing *pt)
1582 {
1583 int i;
1584 static const struct {
1585 int w, h;
1586 } cea_interlaced[] = {
1587 { 1920, 1080 },
1588 { 720, 480 },
1589 { 1440, 480 },
1590 { 2880, 480 },
1591 { 720, 576 },
1592 { 1440, 576 },
1593 { 2880, 576 },
1594 };
1595
1596 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1597 return;
1598
1599 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1600 if ((mode->hdisplay == cea_interlaced[i].w) &&
1601 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1602 mode->vdisplay *= 2;
1603 mode->vsync_start *= 2;
1604 mode->vsync_end *= 2;
1605 mode->vtotal *= 2;
1606 mode->vtotal |= 1;
1607 }
1608 }
1609
1610 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1611 }
1612
1613 /**
1614 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1615 * @dev: DRM device (needed to create new mode)
1616 * @edid: EDID block
1617 * @timing: EDID detailed timing info
1618 * @quirks: quirks to apply
1619 *
1620 * An EDID detailed timing block contains enough info for us to create and
1621 * return a new struct drm_display_mode.
1622 */
1623 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1624 struct edid *edid,
1625 struct detailed_timing *timing,
1626 u32 quirks)
1627 {
1628 struct drm_display_mode *mode;
1629 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1630 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1631 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1632 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1633 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1634 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1635 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1636 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
1637 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1638
1639 /* ignore tiny modes */
1640 if (hactive < 64 || vactive < 64)
1641 return NULL;
1642
1643 if (pt->misc & DRM_EDID_PT_STEREO) {
1644 printk(KERN_WARNING "stereo mode not supported\n");
1645 return NULL;
1646 }
1647 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1648 printk(KERN_WARNING "composite sync not supported\n");
1649 }
1650
1651 /* it is incorrect if hsync/vsync width is zero */
1652 if (!hsync_pulse_width || !vsync_pulse_width) {
1653 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1654 "Wrong Hsync/Vsync pulse width\n");
1655 return NULL;
1656 }
1657
1658 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1659 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1660 if (!mode)
1661 return NULL;
1662
1663 goto set_size;
1664 }
1665
1666 mode = drm_mode_create(dev);
1667 if (!mode)
1668 return NULL;
1669
1670 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1671 timing->pixel_clock = cpu_to_le16(1088);
1672
1673 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1674
1675 mode->hdisplay = hactive;
1676 mode->hsync_start = mode->hdisplay + hsync_offset;
1677 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1678 mode->htotal = mode->hdisplay + hblank;
1679
1680 mode->vdisplay = vactive;
1681 mode->vsync_start = mode->vdisplay + vsync_offset;
1682 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1683 mode->vtotal = mode->vdisplay + vblank;
1684
1685 /* Some EDIDs have bogus h/vtotal values */
1686 if (mode->hsync_end > mode->htotal)
1687 mode->htotal = mode->hsync_end + 1;
1688 if (mode->vsync_end > mode->vtotal)
1689 mode->vtotal = mode->vsync_end + 1;
1690
1691 drm_mode_do_interlace_quirk(mode, pt);
1692
1693 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1694 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1695 }
1696
1697 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1698 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1699 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1700 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1701
1702 set_size:
1703 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1704 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1705
1706 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1707 mode->width_mm *= 10;
1708 mode->height_mm *= 10;
1709 }
1710
1711 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1712 mode->width_mm = edid->width_cm * 10;
1713 mode->height_mm = edid->height_cm * 10;
1714 }
1715
1716 mode->type = DRM_MODE_TYPE_DRIVER;
1717 drm_mode_set_name(mode);
1718
1719 return mode;
1720 }
1721
1722 static bool
1723 mode_in_hsync_range(const struct drm_display_mode *mode,
1724 struct edid *edid, u8 *t)
1725 {
1726 int hsync, hmin, hmax;
1727
1728 hmin = t[7];
1729 if (edid->revision >= 4)
1730 hmin += ((t[4] & 0x04) ? 255 : 0);
1731 hmax = t[8];
1732 if (edid->revision >= 4)
1733 hmax += ((t[4] & 0x08) ? 255 : 0);
1734 hsync = drm_mode_hsync(mode);
1735
1736 return (hsync <= hmax && hsync >= hmin);
1737 }
1738
1739 static bool
1740 mode_in_vsync_range(const struct drm_display_mode *mode,
1741 struct edid *edid, u8 *t)
1742 {
1743 int vsync, vmin, vmax;
1744
1745 vmin = t[5];
1746 if (edid->revision >= 4)
1747 vmin += ((t[4] & 0x01) ? 255 : 0);
1748 vmax = t[6];
1749 if (edid->revision >= 4)
1750 vmax += ((t[4] & 0x02) ? 255 : 0);
1751 vsync = drm_mode_vrefresh(mode);
1752
1753 return (vsync <= vmax && vsync >= vmin);
1754 }
1755
1756 static u32
1757 range_pixel_clock(struct edid *edid, u8 *t)
1758 {
1759 /* unspecified */
1760 if (t[9] == 0 || t[9] == 255)
1761 return 0;
1762
1763 /* 1.4 with CVT support gives us real precision, yay */
1764 if (edid->revision >= 4 && t[10] == 0x04)
1765 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1766
1767 /* 1.3 is pathetic, so fuzz up a bit */
1768 return t[9] * 10000 + 5001;
1769 }
1770
1771 static bool
1772 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1773 struct detailed_timing *timing)
1774 {
1775 u32 max_clock;
1776 u8 *t = (u8 *)timing;
1777
1778 if (!mode_in_hsync_range(mode, edid, t))
1779 return false;
1780
1781 if (!mode_in_vsync_range(mode, edid, t))
1782 return false;
1783
1784 if ((max_clock = range_pixel_clock(edid, t)))
1785 if (mode->clock > max_clock)
1786 return false;
1787
1788 /* 1.4 max horizontal check */
1789 if (edid->revision >= 4 && t[10] == 0x04)
1790 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1791 return false;
1792
1793 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1794 return false;
1795
1796 return true;
1797 }
1798
1799 static bool valid_inferred_mode(const struct drm_connector *connector,
1800 const struct drm_display_mode *mode)
1801 {
1802 struct drm_display_mode *m;
1803 bool ok = false;
1804
1805 list_for_each_entry(m, &connector->probed_modes, head) {
1806 if (mode->hdisplay == m->hdisplay &&
1807 mode->vdisplay == m->vdisplay &&
1808 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1809 return false; /* duplicated */
1810 if (mode->hdisplay <= m->hdisplay &&
1811 mode->vdisplay <= m->vdisplay)
1812 ok = true;
1813 }
1814 return ok;
1815 }
1816
1817 static int
1818 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1819 struct detailed_timing *timing)
1820 {
1821 int i, modes = 0;
1822 struct drm_display_mode *newmode;
1823 struct drm_device *dev = connector->dev;
1824
1825 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1826 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1827 valid_inferred_mode(connector, drm_dmt_modes + i)) {
1828 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1829 if (newmode) {
1830 drm_mode_probed_add(connector, newmode);
1831 modes++;
1832 }
1833 }
1834 }
1835
1836 return modes;
1837 }
1838
1839 /* fix up 1366x768 mode from 1368x768;
1840 * GFT/CVT can't express 1366 width which isn't dividable by 8
1841 */
1842 static void fixup_mode_1366x768(struct drm_display_mode *mode)
1843 {
1844 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1845 mode->hdisplay = 1366;
1846 mode->hsync_start--;
1847 mode->hsync_end--;
1848 drm_mode_set_name(mode);
1849 }
1850 }
1851
1852 static int
1853 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1854 struct detailed_timing *timing)
1855 {
1856 int i, modes = 0;
1857 struct drm_display_mode *newmode;
1858 struct drm_device *dev = connector->dev;
1859
1860 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1861 const struct minimode *m = &extra_modes[i];
1862 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
1863 if (!newmode)
1864 return modes;
1865
1866 fixup_mode_1366x768(newmode);
1867 if (!mode_in_range(newmode, edid, timing) ||
1868 !valid_inferred_mode(connector, newmode)) {
1869 drm_mode_destroy(dev, newmode);
1870 continue;
1871 }
1872
1873 drm_mode_probed_add(connector, newmode);
1874 modes++;
1875 }
1876
1877 return modes;
1878 }
1879
1880 static int
1881 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1882 struct detailed_timing *timing)
1883 {
1884 int i, modes = 0;
1885 struct drm_display_mode *newmode;
1886 struct drm_device *dev = connector->dev;
1887 bool rb = drm_monitor_supports_rb(edid);
1888
1889 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1890 const struct minimode *m = &extra_modes[i];
1891 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
1892 if (!newmode)
1893 return modes;
1894
1895 fixup_mode_1366x768(newmode);
1896 if (!mode_in_range(newmode, edid, timing) ||
1897 !valid_inferred_mode(connector, newmode)) {
1898 drm_mode_destroy(dev, newmode);
1899 continue;
1900 }
1901
1902 drm_mode_probed_add(connector, newmode);
1903 modes++;
1904 }
1905
1906 return modes;
1907 }
1908
1909 static void
1910 do_inferred_modes(struct detailed_timing *timing, void *c)
1911 {
1912 struct detailed_mode_closure *closure = c;
1913 struct detailed_non_pixel *data = &timing->data.other_data;
1914 struct detailed_data_monitor_range *range = &data->data.range;
1915
1916 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1917 return;
1918
1919 closure->modes += drm_dmt_modes_for_range(closure->connector,
1920 closure->edid,
1921 timing);
1922
1923 if (!version_greater(closure->edid, 1, 1))
1924 return; /* GTF not defined yet */
1925
1926 switch (range->flags) {
1927 case 0x02: /* secondary gtf, XXX could do more */
1928 case 0x00: /* default gtf */
1929 closure->modes += drm_gtf_modes_for_range(closure->connector,
1930 closure->edid,
1931 timing);
1932 break;
1933 case 0x04: /* cvt, only in 1.4+ */
1934 if (!version_greater(closure->edid, 1, 3))
1935 break;
1936
1937 closure->modes += drm_cvt_modes_for_range(closure->connector,
1938 closure->edid,
1939 timing);
1940 break;
1941 case 0x01: /* just the ranges, no formula */
1942 default:
1943 break;
1944 }
1945 }
1946
1947 static int
1948 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1949 {
1950 struct detailed_mode_closure closure = {
1951 connector, edid, 0, 0, 0
1952 };
1953
1954 if (version_greater(edid, 1, 0))
1955 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1956 &closure);
1957
1958 return closure.modes;
1959 }
1960
1961 static int
1962 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1963 {
1964 int i, j, m, modes = 0;
1965 struct drm_display_mode *mode;
1966 u8 *est = ((u8 *)timing) + 5;
1967
1968 for (i = 0; i < 6; i++) {
1969 for (j = 7; j > 0; j--) {
1970 m = (i * 8) + (7 - j);
1971 if (m >= ARRAY_SIZE(est3_modes))
1972 break;
1973 if (est[i] & (1 << j)) {
1974 mode = drm_mode_find_dmt(connector->dev,
1975 est3_modes[m].w,
1976 est3_modes[m].h,
1977 est3_modes[m].r,
1978 est3_modes[m].rb);
1979 if (mode) {
1980 drm_mode_probed_add(connector, mode);
1981 modes++;
1982 }
1983 }
1984 }
1985 }
1986
1987 return modes;
1988 }
1989
1990 static void
1991 do_established_modes(struct detailed_timing *timing, void *c)
1992 {
1993 struct detailed_mode_closure *closure = c;
1994 struct detailed_non_pixel *data = &timing->data.other_data;
1995
1996 if (data->type == EDID_DETAIL_EST_TIMINGS)
1997 closure->modes += drm_est3_modes(closure->connector, timing);
1998 }
1999
2000 /**
2001 * add_established_modes - get est. modes from EDID and add them
2002 * @edid: EDID block to scan
2003 *
2004 * Each EDID block contains a bitmap of the supported "established modes" list
2005 * (defined above). Tease them out and add them to the global modes list.
2006 */
2007 static int
2008 add_established_modes(struct drm_connector *connector, struct edid *edid)
2009 {
2010 struct drm_device *dev = connector->dev;
2011 unsigned long est_bits = edid->established_timings.t1 |
2012 (edid->established_timings.t2 << 8) |
2013 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2014 int i, modes = 0;
2015 struct detailed_mode_closure closure = {
2016 connector, edid, 0, 0, 0
2017 };
2018
2019 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2020 if (est_bits & (1<<i)) {
2021 struct drm_display_mode *newmode;
2022 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2023 if (newmode) {
2024 drm_mode_probed_add(connector, newmode);
2025 modes++;
2026 }
2027 }
2028 }
2029
2030 if (version_greater(edid, 1, 0))
2031 drm_for_each_detailed_block((u8 *)edid,
2032 do_established_modes, &closure);
2033
2034 return modes + closure.modes;
2035 }
2036
2037 static void
2038 do_standard_modes(struct detailed_timing *timing, void *c)
2039 {
2040 struct detailed_mode_closure *closure = c;
2041 struct detailed_non_pixel *data = &timing->data.other_data;
2042 struct drm_connector *connector = closure->connector;
2043 struct edid *edid = closure->edid;
2044
2045 if (data->type == EDID_DETAIL_STD_MODES) {
2046 int i;
2047 for (i = 0; i < 6; i++) {
2048 struct std_timing *std;
2049 struct drm_display_mode *newmode;
2050
2051 std = &data->data.timings[i];
2052 newmode = drm_mode_std(connector, edid, std,
2053 edid->revision);
2054 if (newmode) {
2055 drm_mode_probed_add(connector, newmode);
2056 closure->modes++;
2057 }
2058 }
2059 }
2060 }
2061
2062 /**
2063 * add_standard_modes - get std. modes from EDID and add them
2064 * @edid: EDID block to scan
2065 *
2066 * Standard modes can be calculated using the appropriate standard (DMT,
2067 * GTF or CVT. Grab them from @edid and add them to the list.
2068 */
2069 static int
2070 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2071 {
2072 int i, modes = 0;
2073 struct detailed_mode_closure closure = {
2074 connector, edid, 0, 0, 0
2075 };
2076
2077 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2078 struct drm_display_mode *newmode;
2079
2080 newmode = drm_mode_std(connector, edid,
2081 &edid->standard_timings[i],
2082 edid->revision);
2083 if (newmode) {
2084 drm_mode_probed_add(connector, newmode);
2085 modes++;
2086 }
2087 }
2088
2089 if (version_greater(edid, 1, 0))
2090 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2091 &closure);
2092
2093 /* XXX should also look for standard codes in VTB blocks */
2094
2095 return modes + closure.modes;
2096 }
2097
2098 static int drm_cvt_modes(struct drm_connector *connector,
2099 struct detailed_timing *timing)
2100 {
2101 int i, j, modes = 0;
2102 struct drm_display_mode *newmode;
2103 struct drm_device *dev = connector->dev;
2104 struct cvt_timing *cvt;
2105 const int rates[] = { 60, 85, 75, 60, 50 };
2106 const u8 empty[3] = { 0, 0, 0 };
2107
2108 for (i = 0; i < 4; i++) {
2109 int uninitialized_var(width), height;
2110 cvt = &(timing->data.other_data.data.cvt[i]);
2111
2112 if (!memcmp(cvt->code, empty, 3))
2113 continue;
2114
2115 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2116 switch (cvt->code[1] & 0x0c) {
2117 case 0x00:
2118 width = height * 4 / 3;
2119 break;
2120 case 0x04:
2121 width = height * 16 / 9;
2122 break;
2123 case 0x08:
2124 width = height * 16 / 10;
2125 break;
2126 case 0x0c:
2127 width = height * 15 / 9;
2128 break;
2129 }
2130
2131 for (j = 1; j < 5; j++) {
2132 if (cvt->code[2] & (1 << j)) {
2133 newmode = drm_cvt_mode(dev, width, height,
2134 rates[j], j == 0,
2135 false, false);
2136 if (newmode) {
2137 drm_mode_probed_add(connector, newmode);
2138 modes++;
2139 }
2140 }
2141 }
2142 }
2143
2144 return modes;
2145 }
2146
2147 static void
2148 do_cvt_mode(struct detailed_timing *timing, void *c)
2149 {
2150 struct detailed_mode_closure *closure = c;
2151 struct detailed_non_pixel *data = &timing->data.other_data;
2152
2153 if (data->type == EDID_DETAIL_CVT_3BYTE)
2154 closure->modes += drm_cvt_modes(closure->connector, timing);
2155 }
2156
2157 static int
2158 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2159 {
2160 struct detailed_mode_closure closure = {
2161 connector, edid, 0, 0, 0
2162 };
2163
2164 if (version_greater(edid, 1, 2))
2165 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2166
2167 /* XXX should also look for CVT codes in VTB blocks */
2168
2169 return closure.modes;
2170 }
2171
2172 static void
2173 do_detailed_mode(struct detailed_timing *timing, void *c)
2174 {
2175 struct detailed_mode_closure *closure = c;
2176 struct drm_display_mode *newmode;
2177
2178 if (timing->pixel_clock) {
2179 newmode = drm_mode_detailed(closure->connector->dev,
2180 closure->edid, timing,
2181 closure->quirks);
2182 if (!newmode)
2183 return;
2184
2185 if (closure->preferred)
2186 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2187
2188 drm_mode_probed_add(closure->connector, newmode);
2189 closure->modes++;
2190 closure->preferred = 0;
2191 }
2192 }
2193
2194 /*
2195 * add_detailed_modes - Add modes from detailed timings
2196 * @connector: attached connector
2197 * @edid: EDID block to scan
2198 * @quirks: quirks to apply
2199 */
2200 static int
2201 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2202 u32 quirks)
2203 {
2204 struct detailed_mode_closure closure = {
2205 connector,
2206 edid,
2207 1,
2208 quirks,
2209 0
2210 };
2211
2212 if (closure.preferred && !version_greater(edid, 1, 3))
2213 closure.preferred =
2214 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2215
2216 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2217
2218 return closure.modes;
2219 }
2220
2221 #define HDMI_IDENTIFIER 0x000C03
2222 #define AUDIO_BLOCK 0x01
2223 #define VIDEO_BLOCK 0x02
2224 #define VENDOR_BLOCK 0x03
2225 #define SPEAKER_BLOCK 0x04
2226 #define VIDEO_CAPABILITY_BLOCK 0x07
2227 #define EDID_BASIC_AUDIO (1 << 6)
2228 #define EDID_CEA_YCRCB444 (1 << 5)
2229 #define EDID_CEA_YCRCB422 (1 << 4)
2230 #define EDID_CEA_VCDB_QS (1 << 6)
2231
2232 /**
2233 * Search EDID for CEA extension block.
2234 */
2235 u8 *drm_find_cea_extension(struct edid *edid)
2236 {
2237 u8 *edid_ext = NULL;
2238 int i;
2239
2240 /* No EDID or EDID extensions */
2241 if (edid == NULL || edid->extensions == 0)
2242 return NULL;
2243
2244 /* Find CEA extension */
2245 for (i = 0; i < edid->extensions; i++) {
2246 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2247 if (edid_ext[0] == CEA_EXT)
2248 break;
2249 }
2250
2251 if (i == edid->extensions)
2252 return NULL;
2253
2254 return edid_ext;
2255 }
2256 EXPORT_SYMBOL(drm_find_cea_extension);
2257
2258 /**
2259 * drm_match_cea_mode - look for a CEA mode matching given mode
2260 * @to_match: display mode
2261 *
2262 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2263 * mode.
2264 */
2265 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2266 {
2267 struct drm_display_mode *cea_mode;
2268 u8 mode;
2269
2270 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2271 cea_mode = (struct drm_display_mode *)&edid_cea_modes[mode];
2272
2273 if (drm_mode_equal(to_match, cea_mode))
2274 return mode + 1;
2275 }
2276 return 0;
2277 }
2278 EXPORT_SYMBOL(drm_match_cea_mode);
2279
2280
2281 static int
2282 do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
2283 {
2284 struct drm_device *dev = connector->dev;
2285 u8 * mode, cea_mode;
2286 int modes = 0;
2287
2288 for (mode = db; mode < db + len; mode++) {
2289 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
2290 if (cea_mode < ARRAY_SIZE(edid_cea_modes)) {
2291 struct drm_display_mode *newmode;
2292 newmode = drm_mode_duplicate(dev,
2293 &edid_cea_modes[cea_mode]);
2294 if (newmode) {
2295 drm_mode_probed_add(connector, newmode);
2296 modes++;
2297 }
2298 }
2299 }
2300
2301 return modes;
2302 }
2303
2304 static int
2305 cea_db_payload_len(const u8 *db)
2306 {
2307 return db[0] & 0x1f;
2308 }
2309
2310 static int
2311 cea_db_tag(const u8 *db)
2312 {
2313 return db[0] >> 5;
2314 }
2315
2316 static int
2317 cea_revision(const u8 *cea)
2318 {
2319 return cea[1];
2320 }
2321
2322 static int
2323 cea_db_offsets(const u8 *cea, int *start, int *end)
2324 {
2325 /* Data block offset in CEA extension block */
2326 *start = 4;
2327 *end = cea[2];
2328 if (*end == 0)
2329 *end = 127;
2330 if (*end < 4 || *end > 127)
2331 return -ERANGE;
2332 return 0;
2333 }
2334
2335 #define for_each_cea_db(cea, i, start, end) \
2336 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
2337
2338 static int
2339 add_cea_modes(struct drm_connector *connector, struct edid *edid)
2340 {
2341 u8 * cea = drm_find_cea_extension(edid);
2342 u8 * db, dbl;
2343 int modes = 0;
2344
2345 if (cea && cea_revision(cea) >= 3) {
2346 int i, start, end;
2347
2348 if (cea_db_offsets(cea, &start, &end))
2349 return 0;
2350
2351 for_each_cea_db(cea, i, start, end) {
2352 db = &cea[i];
2353 dbl = cea_db_payload_len(db);
2354
2355 if (cea_db_tag(db) == VIDEO_BLOCK)
2356 modes += do_cea_modes (connector, db+1, dbl);
2357 }
2358 }
2359
2360 return modes;
2361 }
2362
2363 static void
2364 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
2365 {
2366 u8 len = cea_db_payload_len(db);
2367
2368 if (len >= 6) {
2369 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
2370 connector->dvi_dual = db[6] & 1;
2371 }
2372 if (len >= 7)
2373 connector->max_tmds_clock = db[7] * 5;
2374 if (len >= 8) {
2375 connector->latency_present[0] = db[8] >> 7;
2376 connector->latency_present[1] = (db[8] >> 6) & 1;
2377 }
2378 if (len >= 9)
2379 connector->video_latency[0] = db[9];
2380 if (len >= 10)
2381 connector->audio_latency[0] = db[10];
2382 if (len >= 11)
2383 connector->video_latency[1] = db[11];
2384 if (len >= 12)
2385 connector->audio_latency[1] = db[12];
2386
2387 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
2388 "max TMDS clock %d, "
2389 "latency present %d %d, "
2390 "video latency %d %d, "
2391 "audio latency %d %d\n",
2392 connector->dvi_dual,
2393 connector->max_tmds_clock,
2394 (int) connector->latency_present[0],
2395 (int) connector->latency_present[1],
2396 connector->video_latency[0],
2397 connector->video_latency[1],
2398 connector->audio_latency[0],
2399 connector->audio_latency[1]);
2400 }
2401
2402 static void
2403 monitor_name(struct detailed_timing *t, void *data)
2404 {
2405 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
2406 *(u8 **)data = t->data.other_data.data.str.str;
2407 }
2408
2409 static bool cea_db_is_hdmi_vsdb(const u8 *db)
2410 {
2411 int hdmi_id;
2412
2413 if (cea_db_tag(db) != VENDOR_BLOCK)
2414 return false;
2415
2416 if (cea_db_payload_len(db) < 5)
2417 return false;
2418
2419 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
2420
2421 return hdmi_id == HDMI_IDENTIFIER;
2422 }
2423
2424 /**
2425 * drm_edid_to_eld - build ELD from EDID
2426 * @connector: connector corresponding to the HDMI/DP sink
2427 * @edid: EDID to parse
2428 *
2429 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
2430 * Some ELD fields are left to the graphics driver caller:
2431 * - Conn_Type
2432 * - HDCP
2433 * - Port_ID
2434 */
2435 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
2436 {
2437 uint8_t *eld = connector->eld;
2438 u8 *cea;
2439 u8 *name;
2440 u8 *db;
2441 int sad_count = 0;
2442 int mnl;
2443 int dbl;
2444
2445 memset(eld, 0, sizeof(connector->eld));
2446
2447 cea = drm_find_cea_extension(edid);
2448 if (!cea) {
2449 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
2450 return;
2451 }
2452
2453 name = NULL;
2454 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
2455 for (mnl = 0; name && mnl < 13; mnl++) {
2456 if (name[mnl] == 0x0a)
2457 break;
2458 eld[20 + mnl] = name[mnl];
2459 }
2460 eld[4] = (cea[1] << 5) | mnl;
2461 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
2462
2463 eld[0] = 2 << 3; /* ELD version: 2 */
2464
2465 eld[16] = edid->mfg_id[0];
2466 eld[17] = edid->mfg_id[1];
2467 eld[18] = edid->prod_code[0];
2468 eld[19] = edid->prod_code[1];
2469
2470 if (cea_revision(cea) >= 3) {
2471 int i, start, end;
2472
2473 if (cea_db_offsets(cea, &start, &end)) {
2474 start = 0;
2475 end = 0;
2476 }
2477
2478 for_each_cea_db(cea, i, start, end) {
2479 db = &cea[i];
2480 dbl = cea_db_payload_len(db);
2481
2482 switch (cea_db_tag(db)) {
2483 case AUDIO_BLOCK:
2484 /* Audio Data Block, contains SADs */
2485 sad_count = dbl / 3;
2486 if (dbl >= 1)
2487 memcpy(eld + 20 + mnl, &db[1], dbl);
2488 break;
2489 case SPEAKER_BLOCK:
2490 /* Speaker Allocation Data Block */
2491 if (dbl >= 1)
2492 eld[7] = db[1];
2493 break;
2494 case VENDOR_BLOCK:
2495 /* HDMI Vendor-Specific Data Block */
2496 if (cea_db_is_hdmi_vsdb(db))
2497 parse_hdmi_vsdb(connector, db);
2498 break;
2499 default:
2500 break;
2501 }
2502 }
2503 }
2504 eld[5] |= sad_count << 4;
2505 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
2506
2507 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
2508 }
2509 EXPORT_SYMBOL(drm_edid_to_eld);
2510
2511 /**
2512 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
2513 * @connector: connector associated with the HDMI/DP sink
2514 * @mode: the display mode
2515 */
2516 int drm_av_sync_delay(struct drm_connector *connector,
2517 struct drm_display_mode *mode)
2518 {
2519 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
2520 int a, v;
2521
2522 if (!connector->latency_present[0])
2523 return 0;
2524 if (!connector->latency_present[1])
2525 i = 0;
2526
2527 a = connector->audio_latency[i];
2528 v = connector->video_latency[i];
2529
2530 /*
2531 * HDMI/DP sink doesn't support audio or video?
2532 */
2533 if (a == 255 || v == 255)
2534 return 0;
2535
2536 /*
2537 * Convert raw EDID values to millisecond.
2538 * Treat unknown latency as 0ms.
2539 */
2540 if (a)
2541 a = min(2 * (a - 1), 500);
2542 if (v)
2543 v = min(2 * (v - 1), 500);
2544
2545 return max(v - a, 0);
2546 }
2547 EXPORT_SYMBOL(drm_av_sync_delay);
2548
2549 /**
2550 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
2551 * @encoder: the encoder just changed display mode
2552 * @mode: the adjusted display mode
2553 *
2554 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
2555 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
2556 */
2557 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
2558 struct drm_display_mode *mode)
2559 {
2560 struct drm_connector *connector;
2561 struct drm_device *dev = encoder->dev;
2562
2563 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
2564 if (connector->encoder == encoder && connector->eld[0])
2565 return connector;
2566
2567 return NULL;
2568 }
2569 EXPORT_SYMBOL(drm_select_eld);
2570
2571 /**
2572 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
2573 * @edid: monitor EDID information
2574 *
2575 * Parse the CEA extension according to CEA-861-B.
2576 * Return true if HDMI, false if not or unknown.
2577 */
2578 bool drm_detect_hdmi_monitor(struct edid *edid)
2579 {
2580 u8 *edid_ext;
2581 int i;
2582 int start_offset, end_offset;
2583
2584 edid_ext = drm_find_cea_extension(edid);
2585 if (!edid_ext)
2586 return false;
2587
2588 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
2589 return false;
2590
2591 /*
2592 * Because HDMI identifier is in Vendor Specific Block,
2593 * search it from all data blocks of CEA extension.
2594 */
2595 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
2596 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
2597 return true;
2598 }
2599
2600 return false;
2601 }
2602 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
2603
2604 /**
2605 * drm_detect_monitor_audio - check monitor audio capability
2606 *
2607 * Monitor should have CEA extension block.
2608 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
2609 * audio' only. If there is any audio extension block and supported
2610 * audio format, assume at least 'basic audio' support, even if 'basic
2611 * audio' is not defined in EDID.
2612 *
2613 */
2614 bool drm_detect_monitor_audio(struct edid *edid)
2615 {
2616 u8 *edid_ext;
2617 int i, j;
2618 bool has_audio = false;
2619 int start_offset, end_offset;
2620
2621 edid_ext = drm_find_cea_extension(edid);
2622 if (!edid_ext)
2623 goto end;
2624
2625 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
2626
2627 if (has_audio) {
2628 DRM_DEBUG_KMS("Monitor has basic audio support\n");
2629 goto end;
2630 }
2631
2632 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
2633 goto end;
2634
2635 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
2636 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
2637 has_audio = true;
2638 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
2639 DRM_DEBUG_KMS("CEA audio format %d\n",
2640 (edid_ext[i + j] >> 3) & 0xf);
2641 goto end;
2642 }
2643 }
2644 end:
2645 return has_audio;
2646 }
2647 EXPORT_SYMBOL(drm_detect_monitor_audio);
2648
2649 /**
2650 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
2651 *
2652 * Check whether the monitor reports the RGB quantization range selection
2653 * as supported. The AVI infoframe can then be used to inform the monitor
2654 * which quantization range (full or limited) is used.
2655 */
2656 bool drm_rgb_quant_range_selectable(struct edid *edid)
2657 {
2658 u8 *edid_ext;
2659 int i, start, end;
2660
2661 edid_ext = drm_find_cea_extension(edid);
2662 if (!edid_ext)
2663 return false;
2664
2665 if (cea_db_offsets(edid_ext, &start, &end))
2666 return false;
2667
2668 for_each_cea_db(edid_ext, i, start, end) {
2669 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
2670 cea_db_payload_len(&edid_ext[i]) == 2) {
2671 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
2672 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
2673 }
2674 }
2675
2676 return false;
2677 }
2678 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
2679
2680 /**
2681 * drm_add_display_info - pull display info out if present
2682 * @edid: EDID data
2683 * @info: display info (attached to connector)
2684 *
2685 * Grab any available display info and stuff it into the drm_display_info
2686 * structure that's part of the connector. Useful for tracking bpp and
2687 * color spaces.
2688 */
2689 static void drm_add_display_info(struct edid *edid,
2690 struct drm_display_info *info)
2691 {
2692 u8 *edid_ext;
2693
2694 info->width_mm = edid->width_cm * 10;
2695 info->height_mm = edid->height_cm * 10;
2696
2697 /* driver figures it out in this case */
2698 info->bpc = 0;
2699 info->color_formats = 0;
2700
2701 if (edid->revision < 3)
2702 return;
2703
2704 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
2705 return;
2706
2707 /* Get data from CEA blocks if present */
2708 edid_ext = drm_find_cea_extension(edid);
2709 if (edid_ext) {
2710 info->cea_rev = edid_ext[1];
2711
2712 /* The existence of a CEA block should imply RGB support */
2713 info->color_formats = DRM_COLOR_FORMAT_RGB444;
2714 if (edid_ext[3] & EDID_CEA_YCRCB444)
2715 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2716 if (edid_ext[3] & EDID_CEA_YCRCB422)
2717 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
2718 }
2719
2720 /* Only defined for 1.4 with digital displays */
2721 if (edid->revision < 4)
2722 return;
2723
2724 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
2725 case DRM_EDID_DIGITAL_DEPTH_6:
2726 info->bpc = 6;
2727 break;
2728 case DRM_EDID_DIGITAL_DEPTH_8:
2729 info->bpc = 8;
2730 break;
2731 case DRM_EDID_DIGITAL_DEPTH_10:
2732 info->bpc = 10;
2733 break;
2734 case DRM_EDID_DIGITAL_DEPTH_12:
2735 info->bpc = 12;
2736 break;
2737 case DRM_EDID_DIGITAL_DEPTH_14:
2738 info->bpc = 14;
2739 break;
2740 case DRM_EDID_DIGITAL_DEPTH_16:
2741 info->bpc = 16;
2742 break;
2743 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
2744 default:
2745 info->bpc = 0;
2746 break;
2747 }
2748
2749 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
2750 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
2751 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2752 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
2753 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
2754 }
2755
2756 /**
2757 * drm_add_edid_modes - add modes from EDID data, if available
2758 * @connector: connector we're probing
2759 * @edid: edid data
2760 *
2761 * Add the specified modes to the connector's mode list.
2762 *
2763 * Return number of modes added or 0 if we couldn't find any.
2764 */
2765 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
2766 {
2767 int num_modes = 0;
2768 u32 quirks;
2769
2770 if (edid == NULL) {
2771 return 0;
2772 }
2773 if (!drm_edid_is_valid(edid)) {
2774 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
2775 drm_get_connector_name(connector));
2776 return 0;
2777 }
2778
2779 quirks = edid_get_quirks(edid);
2780
2781 /*
2782 * EDID spec says modes should be preferred in this order:
2783 * - preferred detailed mode
2784 * - other detailed modes from base block
2785 * - detailed modes from extension blocks
2786 * - CVT 3-byte code modes
2787 * - standard timing codes
2788 * - established timing codes
2789 * - modes inferred from GTF or CVT range information
2790 *
2791 * We get this pretty much right.
2792 *
2793 * XXX order for additional mode types in extension blocks?
2794 */
2795 num_modes += add_detailed_modes(connector, edid, quirks);
2796 num_modes += add_cvt_modes(connector, edid);
2797 num_modes += add_standard_modes(connector, edid);
2798 num_modes += add_established_modes(connector, edid);
2799 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
2800 num_modes += add_inferred_modes(connector, edid);
2801 num_modes += add_cea_modes(connector, edid);
2802
2803 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
2804 edid_fixup_preferred(connector, quirks);
2805
2806 drm_add_display_info(edid, &connector->display_info);
2807
2808 return num_modes;
2809 }
2810 EXPORT_SYMBOL(drm_add_edid_modes);
2811
2812 /**
2813 * drm_add_modes_noedid - add modes for the connectors without EDID
2814 * @connector: connector we're probing
2815 * @hdisplay: the horizontal display limit
2816 * @vdisplay: the vertical display limit
2817 *
2818 * Add the specified modes to the connector's mode list. Only when the
2819 * hdisplay/vdisplay is not beyond the given limit, it will be added.
2820 *
2821 * Return number of modes added or 0 if we couldn't find any.
2822 */
2823 int drm_add_modes_noedid(struct drm_connector *connector,
2824 int hdisplay, int vdisplay)
2825 {
2826 int i, count, num_modes = 0;
2827 struct drm_display_mode *mode;
2828 struct drm_device *dev = connector->dev;
2829
2830 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
2831 if (hdisplay < 0)
2832 hdisplay = 0;
2833 if (vdisplay < 0)
2834 vdisplay = 0;
2835
2836 for (i = 0; i < count; i++) {
2837 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
2838 if (hdisplay && vdisplay) {
2839 /*
2840 * Only when two are valid, they will be used to check
2841 * whether the mode should be added to the mode list of
2842 * the connector.
2843 */
2844 if (ptr->hdisplay > hdisplay ||
2845 ptr->vdisplay > vdisplay)
2846 continue;
2847 }
2848 if (drm_mode_vrefresh(ptr) > 61)
2849 continue;
2850 mode = drm_mode_duplicate(dev, ptr);
2851 if (mode) {
2852 drm_mode_probed_add(connector, mode);
2853 num_modes++;
2854 }
2855 }
2856 return num_modes;
2857 }
2858 EXPORT_SYMBOL(drm_add_modes_noedid);
Linus' kernel tree