arch/arm/plat-mxc/devices/platform-ahci-imx.c

   1 /*
   2  * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
   3  */
   4
   5 /*
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 #include <linux/io.h>
  22 #include <linux/clk.h>
  23 #include <linux/err.h>
  24 #include <linux/device.h>
  25 #include <linux/dma-mapping.h>
  26 #include <asm/sizes.h>
  27 #include <mach/hardware.h>
  28 #include <mach/devices-common.h>
  29
  30 #define imx_ahci_imx_data_entry_single(soc, _devid)             \
  31         {                                                               \
  32                 .devid = _devid,                                        \
  33                 .iobase = soc ## _SATA_BASE_ADDR,                       \
  34                 .irq = soc ## _INT_SATA,                                \
  35         }
  36
  37 #ifdef CONFIG_SOC_IMX53
  38 const struct imx_ahci_imx_data imx53_ahci_imx_data __initconst =
  39         imx_ahci_imx_data_entry_single(MX53, "imx53-ahci");
  40 #endif
  41
  42 enum {
  43         HOST_CAP = 0x00,
  44         HOST_CAP_SSS = (1 << 27), /* Staggered Spin-up */
  45         HOST_PORTS_IMPL = 0x0c,
  46         HOST_TIMER1MS = 0xe0, /* Timer 1-ms */
  47 };
  48
  49 static struct clk *sata_clk, *sata_ref_clk;
  50
  51 /* AHCI module Initialization, if return 0, initialization is successful. */
  52 static int imx_sata_init(struct device *dev, void __iomem *addr)
  53 {
  54         u32 tmpdata;
  55         int ret = 0;
  56         struct clk *clk;
  57
  58         sata_clk = clk_get(dev, "ahci");
  59         if (IS_ERR(sata_clk)) {
  60                 dev_err(dev, "no sata clock.\n");
  61                 return PTR_ERR(sata_clk);
  62         }
  63         ret = clk_prepare_enable(sata_clk);
  64         if (ret) {
  65                 dev_err(dev, "can't prepare/enable sata clock.\n");
  66                 goto put_sata_clk;
  67         }
  68
  69         /* Get the AHCI SATA PHY CLK */
  70         sata_ref_clk = clk_get(dev, "ahci_phy");
  71         if (IS_ERR(sata_ref_clk)) {
  72                 dev_err(dev, "no sata ref clock.\n");
  73                 ret = PTR_ERR(sata_ref_clk);
  74                 goto release_sata_clk;
  75         }
  76         ret = clk_prepare_enable(sata_ref_clk);
  77         if (ret) {
  78                 dev_err(dev, "can't prepare/enable sata ref clock.\n");
  79                 goto put_sata_ref_clk;
  80         }
  81
  82         /* Get the AHB clock rate, and configure the TIMER1MS reg later */
  83         clk = clk_get(dev, "ahci_dma");
  84         if (IS_ERR(clk)) {
  85                 dev_err(dev, "no dma clock.\n");
  86                 ret = PTR_ERR(clk);
  87                 goto release_sata_ref_clk;
  88         }
  89         tmpdata = clk_get_rate(clk) / 1000;
  90         clk_put(clk);
  91
  92         writel(tmpdata, addr + HOST_TIMER1MS);
  93
  94         tmpdata = readl(addr + HOST_CAP);
  95         if (!(tmpdata & HOST_CAP_SSS)) {
  96                 tmpdata |= HOST_CAP_SSS;
  97                 writel(tmpdata, addr + HOST_CAP);
  98         }
  99
 100         if (!(readl(addr + HOST_PORTS_IMPL) & 0x1))
 101                 writel((readl(addr + HOST_PORTS_IMPL) | 0x1),
 102                         addr + HOST_PORTS_IMPL);
 103
 104         return 0;
 105
 106 release_sata_ref_clk:
 107         clk_disable_unprepare(sata_ref_clk);
 108 put_sata_ref_clk:
 109         clk_put(sata_ref_clk);
 110 release_sata_clk:
 111         clk_disable_unprepare(sata_clk);
 112 put_sata_clk:
 113         clk_put(sata_clk);
 114
 115         return ret;
 116 }
 117
 118 static void imx_sata_exit(struct device *dev)
 119 {
 120         clk_disable_unprepare(sata_ref_clk);
 121         clk_put(sata_ref_clk);
 122
 123         clk_disable_unprepare(sata_clk);
 124         clk_put(sata_clk);
 125
 126 }
 127 struct platform_device *__init imx_add_ahci_imx(
 128                 const struct imx_ahci_imx_data *data,
 129                 const struct ahci_platform_data *pdata)
 130 {
 131         struct resource res[] = {
 132                 {
 133                         .start = data->iobase,
 134                         .end = data->iobase + SZ_4K - 1,
 135                         .flags = IORESOURCE_MEM,
 136                 }, {
 137                         .start = data->irq,
 138                         .end = data->irq,
 139                         .flags = IORESOURCE_IRQ,
 140                 },
 141         };
 142
 143         return imx_add_platform_device_dmamask(data->devid, 0,
 144                         res, ARRAY_SIZE(res),
 145                         pdata, sizeof(*pdata),  DMA_BIT_MASK(32));
 146 }
 147
 148 struct platform_device *__init imx53_add_ahci_imx(void)
 149 {
 150         struct ahci_platform_data pdata = {
 151                 .init = imx_sata_init,
 152                 .exit = imx_sata_exit,
 153         };
 154
 155         return imx_add_ahci_imx(&imx53_ahci_imx_data, &pdata);
 156 }