2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-contiguous.h>
21 #include <linux/highmem.h>
22 #include <linux/memblock.h>
23 #include <linux/slab.h>
24 #include <linux/iommu.h>
26 #include <linux/vmalloc.h>
27 #include <linux/sizes.h>
29 #include <asm/memory.h>
30 #include <asm/highmem.h>
31 #include <asm/cacheflush.h>
32 #include <asm/tlbflush.h>
33 #include <asm/mach/arch.h>
34 #include <asm/dma-iommu.h>
35 #include <asm/mach/map.h>
36 #include <asm/system_info.h>
37 #include <asm/dma-contiguous.h>
42 * The DMA API is built upon the notion of "buffer ownership". A buffer
43 * is either exclusively owned by the CPU (and therefore may be accessed
44 * by it) or exclusively owned by the DMA device. These helper functions
45 * represent the transitions between these two ownership states.
47 * Note, however, that on later ARMs, this notion does not work due to
48 * speculative prefetches. We model our approach on the assumption that
49 * the CPU does do speculative prefetches, which means we clean caches
50 * before transfers and delay cache invalidation until transfer completion.
53 static void __dma_page_cpu_to_dev(struct page
*, unsigned long,
54 size_t, enum dma_data_direction
);
55 static void __dma_page_dev_to_cpu(struct page
*, unsigned long,
56 size_t, enum dma_data_direction
);
59 * arm_dma_map_page - map a portion of a page for streaming DMA
60 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
61 * @page: page that buffer resides in
62 * @offset: offset into page for start of buffer
63 * @size: size of buffer to map
64 * @dir: DMA transfer direction
66 * Ensure that any data held in the cache is appropriately discarded
69 * The device owns this memory once this call has completed. The CPU
70 * can regain ownership by calling dma_unmap_page().
72 static dma_addr_t
arm_dma_map_page(struct device
*dev
, struct page
*page
,
73 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
74 struct dma_attrs
*attrs
)
76 if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
77 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
78 return pfn_to_dma(dev
, page_to_pfn(page
)) + offset
;
82 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
83 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
84 * @handle: DMA address of buffer
85 * @size: size of buffer (same as passed to dma_map_page)
86 * @dir: DMA transfer direction (same as passed to dma_map_page)
88 * Unmap a page streaming mode DMA translation. The handle and size
89 * must match what was provided in the previous dma_map_page() call.
90 * All other usages are undefined.
92 * After this call, reads by the CPU to the buffer are guaranteed to see
93 * whatever the device wrote there.
95 static void arm_dma_unmap_page(struct device
*dev
, dma_addr_t handle
,
96 size_t size
, enum dma_data_direction dir
,
97 struct dma_attrs
*attrs
)
99 if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
100 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev
, handle
)),
101 handle
& ~PAGE_MASK
, size
, dir
);
104 static void arm_dma_sync_single_for_cpu(struct device
*dev
,
105 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
107 unsigned int offset
= handle
& (PAGE_SIZE
- 1);
108 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
-offset
));
109 if (!arch_is_coherent())
110 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
113 static void arm_dma_sync_single_for_device(struct device
*dev
,
114 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
116 unsigned int offset
= handle
& (PAGE_SIZE
- 1);
117 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
-offset
));
118 if (!arch_is_coherent())
119 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
122 static int arm_dma_set_mask(struct device
*dev
, u64 dma_mask
);
124 struct dma_map_ops arm_dma_ops
= {
125 .alloc
= arm_dma_alloc
,
126 .free
= arm_dma_free
,
127 .mmap
= arm_dma_mmap
,
128 .get_sgtable
= arm_dma_get_sgtable
,
129 .map_page
= arm_dma_map_page
,
130 .unmap_page
= arm_dma_unmap_page
,
131 .map_sg
= arm_dma_map_sg
,
132 .unmap_sg
= arm_dma_unmap_sg
,
133 .sync_single_for_cpu
= arm_dma_sync_single_for_cpu
,
134 .sync_single_for_device
= arm_dma_sync_single_for_device
,
135 .sync_sg_for_cpu
= arm_dma_sync_sg_for_cpu
,
136 .sync_sg_for_device
= arm_dma_sync_sg_for_device
,
137 .set_dma_mask
= arm_dma_set_mask
,
139 EXPORT_SYMBOL(arm_dma_ops
);
141 static u64
get_coherent_dma_mask(struct device
*dev
)
143 u64 mask
= (u64
)arm_dma_limit
;
146 mask
= dev
->coherent_dma_mask
;
149 * Sanity check the DMA mask - it must be non-zero, and
150 * must be able to be satisfied by a DMA allocation.
153 dev_warn(dev
, "coherent DMA mask is unset\n");
157 if ((~mask
) & (u64
)arm_dma_limit
) {
158 dev_warn(dev
, "coherent DMA mask %#llx is smaller "
159 "than system GFP_DMA mask %#llx\n",
160 mask
, (u64
)arm_dma_limit
);
168 static void __dma_clear_buffer(struct page
*page
, size_t size
)
172 * Ensure that the allocated pages are zeroed, and that any data
173 * lurking in the kernel direct-mapped region is invalidated.
175 ptr
= page_address(page
);
177 memset(ptr
, 0, size
);
178 dmac_flush_range(ptr
, ptr
+ size
);
179 outer_flush_range(__pa(ptr
), __pa(ptr
) + size
);
184 * Allocate a DMA buffer for 'dev' of size 'size' using the
185 * specified gfp mask. Note that 'size' must be page aligned.
187 static struct page
*__dma_alloc_buffer(struct device
*dev
, size_t size
, gfp_t gfp
)
189 unsigned long order
= get_order(size
);
190 struct page
*page
, *p
, *e
;
192 page
= alloc_pages(gfp
, order
);
197 * Now split the huge page and free the excess pages
199 split_page(page
, order
);
200 for (p
= page
+ (size
>> PAGE_SHIFT
), e
= page
+ (1 << order
); p
< e
; p
++)
203 __dma_clear_buffer(page
, size
);
209 * Free a DMA buffer. 'size' must be page aligned.
211 static void __dma_free_buffer(struct page
*page
, size_t size
)
213 struct page
*e
= page
+ (size
>> PAGE_SHIFT
);
222 #ifdef CONFIG_HUGETLB_PAGE
223 #error ARM Coherent DMA allocator does not (yet) support huge TLB
226 static void *__alloc_from_contiguous(struct device
*dev
, size_t size
,
227 pgprot_t prot
, struct page
**ret_page
);
229 static void *__alloc_remap_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
230 pgprot_t prot
, struct page
**ret_page
,
234 __dma_alloc_remap(struct page
*page
, size_t size
, gfp_t gfp
, pgprot_t prot
,
237 struct vm_struct
*area
;
241 * DMA allocation can be mapped to user space, so lets
242 * set VM_USERMAP flags too.
244 area
= get_vm_area_caller(size
, VM_ARM_DMA_CONSISTENT
| VM_USERMAP
,
248 addr
= (unsigned long)area
->addr
;
249 area
->phys_addr
= __pfn_to_phys(page_to_pfn(page
));
251 if (ioremap_page_range(addr
, addr
+ size
, area
->phys_addr
, prot
)) {
252 vunmap((void *)addr
);
258 static void __dma_free_remap(void *cpu_addr
, size_t size
)
260 unsigned int flags
= VM_ARM_DMA_CONSISTENT
| VM_USERMAP
;
261 struct vm_struct
*area
= find_vm_area(cpu_addr
);
262 if (!area
|| (area
->flags
& flags
) != flags
) {
263 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr
);
266 unmap_kernel_range((unsigned long)cpu_addr
, size
);
270 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
275 unsigned long *bitmap
;
276 unsigned long nr_pages
;
281 static struct dma_pool atomic_pool
= {
282 .size
= DEFAULT_DMA_COHERENT_POOL_SIZE
,
285 static int __init
early_coherent_pool(char *p
)
287 atomic_pool
.size
= memparse(p
, &p
);
290 early_param("coherent_pool", early_coherent_pool
);
292 void __init
init_dma_coherent_pool_size(unsigned long size
)
295 * Catch any attempt to set the pool size too late.
297 BUG_ON(atomic_pool
.vaddr
);
300 * Set architecture specific coherent pool size only if
301 * it has not been changed by kernel command line parameter.
303 if (atomic_pool
.size
== DEFAULT_DMA_COHERENT_POOL_SIZE
)
304 atomic_pool
.size
= size
;
308 * Initialise the coherent pool for atomic allocations.
310 static int __init
atomic_pool_init(void)
312 struct dma_pool
*pool
= &atomic_pool
;
313 pgprot_t prot
= pgprot_dmacoherent(pgprot_kernel
);
314 unsigned long nr_pages
= pool
->size
>> PAGE_SHIFT
;
315 unsigned long *bitmap
;
319 int bitmap_size
= BITS_TO_LONGS(nr_pages
) * sizeof(long);
321 bitmap
= kzalloc(bitmap_size
, GFP_KERNEL
);
325 pages
= kzalloc(nr_pages
* sizeof(struct page
*), GFP_KERNEL
);
329 if (IS_ENABLED(CONFIG_CMA
))
330 ptr
= __alloc_from_contiguous(NULL
, pool
->size
, prot
, &page
);
332 ptr
= __alloc_remap_buffer(NULL
, pool
->size
, GFP_KERNEL
, prot
,
337 for (i
= 0; i
< nr_pages
; i
++)
340 spin_lock_init(&pool
->lock
);
343 pool
->bitmap
= bitmap
;
344 pool
->nr_pages
= nr_pages
;
345 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
346 (unsigned)pool
->size
/ 1024);
352 pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
353 (unsigned)pool
->size
/ 1024);
357 * CMA is activated by core_initcall, so we must be called after it.
359 postcore_initcall(atomic_pool_init
);
361 struct dma_contig_early_reserve
{
366 static struct dma_contig_early_reserve dma_mmu_remap
[MAX_CMA_AREAS
] __initdata
;
368 static int dma_mmu_remap_num __initdata
;
370 void __init
dma_contiguous_early_fixup(phys_addr_t base
, unsigned long size
)
372 dma_mmu_remap
[dma_mmu_remap_num
].base
= base
;
373 dma_mmu_remap
[dma_mmu_remap_num
].size
= size
;
377 void __init
dma_contiguous_remap(void)
380 for (i
= 0; i
< dma_mmu_remap_num
; i
++) {
381 phys_addr_t start
= dma_mmu_remap
[i
].base
;
382 phys_addr_t end
= start
+ dma_mmu_remap
[i
].size
;
386 if (end
> arm_lowmem_limit
)
387 end
= arm_lowmem_limit
;
391 map
.pfn
= __phys_to_pfn(start
);
392 map
.virtual = __phys_to_virt(start
);
393 map
.length
= end
- start
;
394 map
.type
= MT_MEMORY_DMA_READY
;
397 * Clear previous low-memory mapping
399 for (addr
= __phys_to_virt(start
); addr
< __phys_to_virt(end
);
401 pmd_clear(pmd_off_k(addr
));
403 iotable_init(&map
, 1);
407 static int __dma_update_pte(pte_t
*pte
, pgtable_t token
, unsigned long addr
,
410 struct page
*page
= virt_to_page(addr
);
411 pgprot_t prot
= *(pgprot_t
*)data
;
413 set_pte_ext(pte
, mk_pte(page
, prot
), 0);
417 static void __dma_remap(struct page
*page
, size_t size
, pgprot_t prot
)
419 unsigned long start
= (unsigned long) page_address(page
);
420 unsigned end
= start
+ size
;
422 apply_to_page_range(&init_mm
, start
, size
, __dma_update_pte
, &prot
);
424 flush_tlb_kernel_range(start
, end
);
427 static void *__alloc_remap_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
428 pgprot_t prot
, struct page
**ret_page
,
433 page
= __dma_alloc_buffer(dev
, size
, gfp
);
437 ptr
= __dma_alloc_remap(page
, size
, gfp
, prot
, caller
);
439 __dma_free_buffer(page
, size
);
447 static void *__alloc_from_pool(size_t size
, struct page
**ret_page
)
449 struct dma_pool
*pool
= &atomic_pool
;
450 unsigned int count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
454 unsigned long align_mask
;
457 WARN(1, "coherent pool not initialised!\n");
462 * Align the region allocation - allocations from pool are rather
463 * small, so align them to their order in pages, minimum is a page
464 * size. This helps reduce fragmentation of the DMA space.
466 align_mask
= (1 << get_order(size
)) - 1;
468 spin_lock_irqsave(&pool
->lock
, flags
);
469 pageno
= bitmap_find_next_zero_area(pool
->bitmap
, pool
->nr_pages
,
470 0, count
, align_mask
);
471 if (pageno
< pool
->nr_pages
) {
472 bitmap_set(pool
->bitmap
, pageno
, count
);
473 ptr
= pool
->vaddr
+ PAGE_SIZE
* pageno
;
474 *ret_page
= pool
->pages
[pageno
];
476 pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
477 "Please increase it with coherent_pool= kernel parameter!\n",
478 (unsigned)pool
->size
/ 1024);
480 spin_unlock_irqrestore(&pool
->lock
, flags
);
485 static bool __in_atomic_pool(void *start
, size_t size
)
487 struct dma_pool
*pool
= &atomic_pool
;
488 void *end
= start
+ size
;
489 void *pool_start
= pool
->vaddr
;
490 void *pool_end
= pool
->vaddr
+ pool
->size
;
492 if (start
< pool_start
|| start
> pool_end
)
498 WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
499 start
, end
- 1, pool_start
, pool_end
- 1);
504 static int __free_from_pool(void *start
, size_t size
)
506 struct dma_pool
*pool
= &atomic_pool
;
507 unsigned long pageno
, count
;
510 if (!__in_atomic_pool(start
, size
))
513 pageno
= (start
- pool
->vaddr
) >> PAGE_SHIFT
;
514 count
= size
>> PAGE_SHIFT
;
516 spin_lock_irqsave(&pool
->lock
, flags
);
517 bitmap_clear(pool
->bitmap
, pageno
, count
);
518 spin_unlock_irqrestore(&pool
->lock
, flags
);
523 static void *__alloc_from_contiguous(struct device
*dev
, size_t size
,
524 pgprot_t prot
, struct page
**ret_page
)
526 unsigned long order
= get_order(size
);
527 size_t count
= size
>> PAGE_SHIFT
;
530 page
= dma_alloc_from_contiguous(dev
, count
, order
);
534 __dma_clear_buffer(page
, size
);
535 __dma_remap(page
, size
, prot
);
538 return page_address(page
);
541 static void __free_from_contiguous(struct device
*dev
, struct page
*page
,
544 __dma_remap(page
, size
, pgprot_kernel
);
545 dma_release_from_contiguous(dev
, page
, size
>> PAGE_SHIFT
);
548 static inline pgprot_t
__get_dma_pgprot(struct dma_attrs
*attrs
, pgprot_t prot
)
550 prot
= dma_get_attr(DMA_ATTR_WRITE_COMBINE
, attrs
) ?
551 pgprot_writecombine(prot
) :
552 pgprot_dmacoherent(prot
);
558 #else /* !CONFIG_MMU */
562 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
563 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL
564 #define __alloc_from_pool(size, ret_page) NULL
565 #define __alloc_from_contiguous(dev, size, prot, ret) NULL
566 #define __free_from_pool(cpu_addr, size) 0
567 #define __free_from_contiguous(dev, page, size) do { } while (0)
568 #define __dma_free_remap(cpu_addr, size) do { } while (0)
570 #endif /* CONFIG_MMU */
572 static void *__alloc_simple_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
573 struct page
**ret_page
)
576 page
= __dma_alloc_buffer(dev
, size
, gfp
);
581 return page_address(page
);
586 static void *__dma_alloc(struct device
*dev
, size_t size
, dma_addr_t
*handle
,
587 gfp_t gfp
, pgprot_t prot
, const void *caller
)
589 u64 mask
= get_coherent_dma_mask(dev
);
593 #ifdef CONFIG_DMA_API_DEBUG
594 u64 limit
= (mask
+ 1) & ~mask
;
595 if (limit
&& size
>= limit
) {
596 dev_warn(dev
, "coherent allocation too big (requested %#x mask %#llx)\n",
605 if (mask
< 0xffffffffULL
)
609 * Following is a work-around (a.k.a. hack) to prevent pages
610 * with __GFP_COMP being passed to split_page() which cannot
611 * handle them. The real problem is that this flag probably
612 * should be 0 on ARM as it is not supported on this
613 * platform; see CONFIG_HUGETLBFS.
615 gfp
&= ~(__GFP_COMP
);
617 *handle
= DMA_ERROR_CODE
;
618 size
= PAGE_ALIGN(size
);
620 if (arch_is_coherent() || nommu())
621 addr
= __alloc_simple_buffer(dev
, size
, gfp
, &page
);
622 else if (gfp
& GFP_ATOMIC
)
623 addr
= __alloc_from_pool(size
, &page
);
624 else if (!IS_ENABLED(CONFIG_CMA
))
625 addr
= __alloc_remap_buffer(dev
, size
, gfp
, prot
, &page
, caller
);
627 addr
= __alloc_from_contiguous(dev
, size
, prot
, &page
);
630 *handle
= pfn_to_dma(dev
, page_to_pfn(page
));
636 * Allocate DMA-coherent memory space and return both the kernel remapped
637 * virtual and bus address for that space.
639 void *arm_dma_alloc(struct device
*dev
, size_t size
, dma_addr_t
*handle
,
640 gfp_t gfp
, struct dma_attrs
*attrs
)
642 pgprot_t prot
= __get_dma_pgprot(attrs
, pgprot_kernel
);
645 if (dma_alloc_from_coherent(dev
, size
, handle
, &memory
))
648 return __dma_alloc(dev
, size
, handle
, gfp
, prot
,
649 __builtin_return_address(0));
653 * Create userspace mapping for the DMA-coherent memory.
655 int arm_dma_mmap(struct device
*dev
, struct vm_area_struct
*vma
,
656 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
657 struct dma_attrs
*attrs
)
661 unsigned long nr_vma_pages
= (vma
->vm_end
- vma
->vm_start
) >> PAGE_SHIFT
;
662 unsigned long nr_pages
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
663 unsigned long pfn
= dma_to_pfn(dev
, dma_addr
);
664 unsigned long off
= vma
->vm_pgoff
;
666 vma
->vm_page_prot
= __get_dma_pgprot(attrs
, vma
->vm_page_prot
);
668 if (dma_mmap_from_coherent(dev
, vma
, cpu_addr
, size
, &ret
))
671 if (off
< nr_pages
&& nr_vma_pages
<= (nr_pages
- off
)) {
672 ret
= remap_pfn_range(vma
, vma
->vm_start
,
674 vma
->vm_end
- vma
->vm_start
,
677 #endif /* CONFIG_MMU */
683 * Free a buffer as defined by the above mapping.
685 void arm_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
686 dma_addr_t handle
, struct dma_attrs
*attrs
)
688 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
));
690 if (dma_release_from_coherent(dev
, get_order(size
), cpu_addr
))
693 size
= PAGE_ALIGN(size
);
695 if (arch_is_coherent() || nommu()) {
696 __dma_free_buffer(page
, size
);
697 } else if (__free_from_pool(cpu_addr
, size
)) {
699 } else if (!IS_ENABLED(CONFIG_CMA
)) {
700 __dma_free_remap(cpu_addr
, size
);
701 __dma_free_buffer(page
, size
);
704 * Non-atomic allocations cannot be freed with IRQs disabled
706 WARN_ON(irqs_disabled());
707 __free_from_contiguous(dev
, page
, size
);
711 int arm_dma_get_sgtable(struct device
*dev
, struct sg_table
*sgt
,
712 void *cpu_addr
, dma_addr_t handle
, size_t size
,
713 struct dma_attrs
*attrs
)
715 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
));
718 ret
= sg_alloc_table(sgt
, 1, GFP_KERNEL
);
722 sg_set_page(sgt
->sgl
, page
, PAGE_ALIGN(size
), 0);
726 static void dma_cache_maint_page(struct page
*page
, unsigned long offset
,
727 size_t size
, enum dma_data_direction dir
,
728 void (*op
)(const void *, size_t, int))
731 * A single sg entry may refer to multiple physically contiguous
732 * pages. But we still need to process highmem pages individually.
733 * If highmem is not configured then the bulk of this loop gets
741 if (PageHighMem(page
)) {
742 if (len
+ offset
> PAGE_SIZE
) {
743 if (offset
>= PAGE_SIZE
) {
744 page
+= offset
/ PAGE_SIZE
;
747 len
= PAGE_SIZE
- offset
;
749 vaddr
= kmap_high_get(page
);
754 } else if (cache_is_vipt()) {
755 /* unmapped pages might still be cached */
756 vaddr
= kmap_atomic(page
);
757 op(vaddr
+ offset
, len
, dir
);
758 kunmap_atomic(vaddr
);
761 vaddr
= page_address(page
) + offset
;
771 * Make an area consistent for devices.
772 * Note: Drivers should NOT use this function directly, as it will break
773 * platforms with CONFIG_DMABOUNCE.
774 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
776 static void __dma_page_cpu_to_dev(struct page
*page
, unsigned long off
,
777 size_t size
, enum dma_data_direction dir
)
781 dma_cache_maint_page(page
, off
, size
, dir
, dmac_map_area
);
783 paddr
= page_to_phys(page
) + off
;
784 if (dir
== DMA_FROM_DEVICE
) {
785 outer_inv_range(paddr
, paddr
+ size
);
787 outer_clean_range(paddr
, paddr
+ size
);
789 /* FIXME: non-speculating: flush on bidirectional mappings? */
792 static void __dma_page_dev_to_cpu(struct page
*page
, unsigned long off
,
793 size_t size
, enum dma_data_direction dir
)
795 unsigned long paddr
= page_to_phys(page
) + off
;
797 /* FIXME: non-speculating: not required */
798 /* don't bother invalidating if DMA to device */
799 if (dir
!= DMA_TO_DEVICE
)
800 outer_inv_range(paddr
, paddr
+ size
);
802 dma_cache_maint_page(page
, off
, size
, dir
, dmac_unmap_area
);
805 * Mark the D-cache clean for this page to avoid extra flushing.
807 if (dir
!= DMA_TO_DEVICE
&& off
== 0 && size
>= PAGE_SIZE
)
808 set_bit(PG_dcache_clean
, &page
->flags
);
812 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
813 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
814 * @sg: list of buffers
815 * @nents: number of buffers to map
816 * @dir: DMA transfer direction
818 * Map a set of buffers described by scatterlist in streaming mode for DMA.
819 * This is the scatter-gather version of the dma_map_single interface.
820 * Here the scatter gather list elements are each tagged with the
821 * appropriate dma address and length. They are obtained via
822 * sg_dma_{address,length}.
824 * Device ownership issues as mentioned for dma_map_single are the same
827 int arm_dma_map_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
828 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
830 struct dma_map_ops
*ops
= get_dma_ops(dev
);
831 struct scatterlist
*s
;
834 for_each_sg(sg
, s
, nents
, i
) {
835 #ifdef CONFIG_NEED_SG_DMA_LENGTH
836 s
->dma_length
= s
->length
;
838 s
->dma_address
= ops
->map_page(dev
, sg_page(s
), s
->offset
,
839 s
->length
, dir
, attrs
);
840 if (dma_mapping_error(dev
, s
->dma_address
))
846 for_each_sg(sg
, s
, i
, j
)
847 ops
->unmap_page(dev
, sg_dma_address(s
), sg_dma_len(s
), dir
, attrs
);
852 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
853 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
854 * @sg: list of buffers
855 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
856 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
858 * Unmap a set of streaming mode DMA translations. Again, CPU access
859 * rules concerning calls here are the same as for dma_unmap_single().
861 void arm_dma_unmap_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
862 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
864 struct dma_map_ops
*ops
= get_dma_ops(dev
);
865 struct scatterlist
*s
;
869 for_each_sg(sg
, s
, nents
, i
)
870 ops
->unmap_page(dev
, sg_dma_address(s
), sg_dma_len(s
), dir
, attrs
);
874 * arm_dma_sync_sg_for_cpu
875 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
876 * @sg: list of buffers
877 * @nents: number of buffers to map (returned from dma_map_sg)
878 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
880 void arm_dma_sync_sg_for_cpu(struct device
*dev
, struct scatterlist
*sg
,
881 int nents
, enum dma_data_direction dir
)
883 struct dma_map_ops
*ops
= get_dma_ops(dev
);
884 struct scatterlist
*s
;
887 for_each_sg(sg
, s
, nents
, i
)
888 ops
->sync_single_for_cpu(dev
, sg_dma_address(s
), s
->length
,
893 * arm_dma_sync_sg_for_device
894 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
895 * @sg: list of buffers
896 * @nents: number of buffers to map (returned from dma_map_sg)
897 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
899 void arm_dma_sync_sg_for_device(struct device
*dev
, struct scatterlist
*sg
,
900 int nents
, enum dma_data_direction dir
)
902 struct dma_map_ops
*ops
= get_dma_ops(dev
);
903 struct scatterlist
*s
;
906 for_each_sg(sg
, s
, nents
, i
)
907 ops
->sync_single_for_device(dev
, sg_dma_address(s
), s
->length
,
912 * Return whether the given device DMA address mask can be supported
913 * properly. For example, if your device can only drive the low 24-bits
914 * during bus mastering, then you would pass 0x00ffffff as the mask
917 int dma_supported(struct device
*dev
, u64 mask
)
919 if (mask
< (u64
)arm_dma_limit
)
923 EXPORT_SYMBOL(dma_supported
);
925 static int arm_dma_set_mask(struct device
*dev
, u64 dma_mask
)
927 if (!dev
->dma_mask
|| !dma_supported(dev
, dma_mask
))
930 *dev
->dma_mask
= dma_mask
;
935 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
937 static int __init
dma_debug_do_init(void)
939 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES
);
942 fs_initcall(dma_debug_do_init
);
944 #ifdef CONFIG_ARM_DMA_USE_IOMMU
948 static inline dma_addr_t
__alloc_iova(struct dma_iommu_mapping
*mapping
,
951 unsigned int order
= get_order(size
);
952 unsigned int align
= 0;
953 unsigned int count
, start
;
956 count
= ((PAGE_ALIGN(size
) >> PAGE_SHIFT
) +
957 (1 << mapping
->order
) - 1) >> mapping
->order
;
959 if (order
> mapping
->order
)
960 align
= (1 << (order
- mapping
->order
)) - 1;
962 spin_lock_irqsave(&mapping
->lock
, flags
);
963 start
= bitmap_find_next_zero_area(mapping
->bitmap
, mapping
->bits
, 0,
965 if (start
> mapping
->bits
) {
966 spin_unlock_irqrestore(&mapping
->lock
, flags
);
967 return DMA_ERROR_CODE
;
970 bitmap_set(mapping
->bitmap
, start
, count
);
971 spin_unlock_irqrestore(&mapping
->lock
, flags
);
973 return mapping
->base
+ (start
<< (mapping
->order
+ PAGE_SHIFT
));
976 static inline void __free_iova(struct dma_iommu_mapping
*mapping
,
977 dma_addr_t addr
, size_t size
)
979 unsigned int start
= (addr
- mapping
->base
) >>
980 (mapping
->order
+ PAGE_SHIFT
);
981 unsigned int count
= ((size
>> PAGE_SHIFT
) +
982 (1 << mapping
->order
) - 1) >> mapping
->order
;
985 spin_lock_irqsave(&mapping
->lock
, flags
);
986 bitmap_clear(mapping
->bitmap
, start
, count
);
987 spin_unlock_irqrestore(&mapping
->lock
, flags
);
990 static struct page
**__iommu_alloc_buffer(struct device
*dev
, size_t size
, gfp_t gfp
)
993 int count
= size
>> PAGE_SHIFT
;
994 int array_size
= count
* sizeof(struct page
*);
997 if (array_size
<= PAGE_SIZE
)
998 pages
= kzalloc(array_size
, gfp
);
1000 pages
= vzalloc(array_size
);
1005 int j
, order
= __fls(count
);
1007 pages
[i
] = alloc_pages(gfp
| __GFP_NOWARN
, order
);
1008 while (!pages
[i
] && order
)
1009 pages
[i
] = alloc_pages(gfp
| __GFP_NOWARN
, --order
);
1014 split_page(pages
[i
], order
);
1017 pages
[i
+ j
] = pages
[i
] + j
;
1019 __dma_clear_buffer(pages
[i
], PAGE_SIZE
<< order
);
1021 count
-= 1 << order
;
1028 __free_pages(pages
[i
], 0);
1029 if (array_size
<= PAGE_SIZE
)
1036 static int __iommu_free_buffer(struct device
*dev
, struct page
**pages
, size_t size
)
1038 int count
= size
>> PAGE_SHIFT
;
1039 int array_size
= count
* sizeof(struct page
*);
1041 for (i
= 0; i
< count
; i
++)
1043 __free_pages(pages
[i
], 0);
1044 if (array_size
<= PAGE_SIZE
)
1052 * Create a CPU mapping for a specified pages
1055 __iommu_alloc_remap(struct page
**pages
, size_t size
, gfp_t gfp
, pgprot_t prot
,
1058 unsigned int i
, nr_pages
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1059 struct vm_struct
*area
;
1062 area
= get_vm_area_caller(size
, VM_ARM_DMA_CONSISTENT
| VM_USERMAP
,
1067 area
->pages
= pages
;
1068 area
->nr_pages
= nr_pages
;
1069 p
= (unsigned long)area
->addr
;
1071 for (i
= 0; i
< nr_pages
; i
++) {
1072 phys_addr_t phys
= __pfn_to_phys(page_to_pfn(pages
[i
]));
1073 if (ioremap_page_range(p
, p
+ PAGE_SIZE
, phys
, prot
))
1079 unmap_kernel_range((unsigned long)area
->addr
, size
);
1085 * Create a mapping in device IO address space for specified pages
1088 __iommu_create_mapping(struct device
*dev
, struct page
**pages
, size_t size
)
1090 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1091 unsigned int count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1092 dma_addr_t dma_addr
, iova
;
1093 int i
, ret
= DMA_ERROR_CODE
;
1095 dma_addr
= __alloc_iova(mapping
, size
);
1096 if (dma_addr
== DMA_ERROR_CODE
)
1100 for (i
= 0; i
< count
; ) {
1101 unsigned int next_pfn
= page_to_pfn(pages
[i
]) + 1;
1102 phys_addr_t phys
= page_to_phys(pages
[i
]);
1103 unsigned int len
, j
;
1105 for (j
= i
+ 1; j
< count
; j
++, next_pfn
++)
1106 if (page_to_pfn(pages
[j
]) != next_pfn
)
1109 len
= (j
- i
) << PAGE_SHIFT
;
1110 ret
= iommu_map(mapping
->domain
, iova
, phys
, len
, 0);
1118 iommu_unmap(mapping
->domain
, dma_addr
, iova
-dma_addr
);
1119 __free_iova(mapping
, dma_addr
, size
);
1120 return DMA_ERROR_CODE
;
1123 static int __iommu_remove_mapping(struct device
*dev
, dma_addr_t iova
, size_t size
)
1125 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1128 * add optional in-page offset from iova to size and align
1129 * result to page size
1131 size
= PAGE_ALIGN((iova
& ~PAGE_MASK
) + size
);
1134 iommu_unmap(mapping
->domain
, iova
, size
);
1135 __free_iova(mapping
, iova
, size
);
1139 static struct page
**__atomic_get_pages(void *addr
)
1141 struct dma_pool
*pool
= &atomic_pool
;
1142 struct page
**pages
= pool
->pages
;
1143 int offs
= (addr
- pool
->vaddr
) >> PAGE_SHIFT
;
1145 return pages
+ offs
;
1148 static struct page
**__iommu_get_pages(void *cpu_addr
, struct dma_attrs
*attrs
)
1150 struct vm_struct
*area
;
1152 if (__in_atomic_pool(cpu_addr
, PAGE_SIZE
))
1153 return __atomic_get_pages(cpu_addr
);
1155 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
))
1158 area
= find_vm_area(cpu_addr
);
1159 if (area
&& (area
->flags
& VM_ARM_DMA_CONSISTENT
))
1164 static void *__iommu_alloc_atomic(struct device
*dev
, size_t size
,
1170 addr
= __alloc_from_pool(size
, &page
);
1174 *handle
= __iommu_create_mapping(dev
, &page
, size
);
1175 if (*handle
== DMA_ERROR_CODE
)
1181 __free_from_pool(addr
, size
);
1185 static void __iommu_free_atomic(struct device
*dev
, struct page
**pages
,
1186 dma_addr_t handle
, size_t size
)
1188 __iommu_remove_mapping(dev
, handle
, size
);
1189 __free_from_pool(page_address(pages
[0]), size
);
1192 static void *arm_iommu_alloc_attrs(struct device
*dev
, size_t size
,
1193 dma_addr_t
*handle
, gfp_t gfp
, struct dma_attrs
*attrs
)
1195 pgprot_t prot
= __get_dma_pgprot(attrs
, pgprot_kernel
);
1196 struct page
**pages
;
1199 *handle
= DMA_ERROR_CODE
;
1200 size
= PAGE_ALIGN(size
);
1202 if (gfp
& GFP_ATOMIC
)
1203 return __iommu_alloc_atomic(dev
, size
, handle
);
1205 pages
= __iommu_alloc_buffer(dev
, size
, gfp
);
1209 *handle
= __iommu_create_mapping(dev
, pages
, size
);
1210 if (*handle
== DMA_ERROR_CODE
)
1213 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
))
1216 addr
= __iommu_alloc_remap(pages
, size
, gfp
, prot
,
1217 __builtin_return_address(0));
1224 __iommu_remove_mapping(dev
, *handle
, size
);
1226 __iommu_free_buffer(dev
, pages
, size
);
1230 static int arm_iommu_mmap_attrs(struct device
*dev
, struct vm_area_struct
*vma
,
1231 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
1232 struct dma_attrs
*attrs
)
1234 unsigned long uaddr
= vma
->vm_start
;
1235 unsigned long usize
= vma
->vm_end
- vma
->vm_start
;
1236 struct page
**pages
= __iommu_get_pages(cpu_addr
, attrs
);
1238 vma
->vm_page_prot
= __get_dma_pgprot(attrs
, vma
->vm_page_prot
);
1244 int ret
= vm_insert_page(vma
, uaddr
, *pages
++);
1246 pr_err("Remapping memory failed: %d\n", ret
);
1251 } while (usize
> 0);
1257 * free a page as defined by the above mapping.
1258 * Must not be called with IRQs disabled.
1260 void arm_iommu_free_attrs(struct device
*dev
, size_t size
, void *cpu_addr
,
1261 dma_addr_t handle
, struct dma_attrs
*attrs
)
1263 struct page
**pages
= __iommu_get_pages(cpu_addr
, attrs
);
1264 size
= PAGE_ALIGN(size
);
1267 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr
);
1271 if (__in_atomic_pool(cpu_addr
, size
)) {
1272 __iommu_free_atomic(dev
, pages
, handle
, size
);
1276 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
)) {
1277 unmap_kernel_range((unsigned long)cpu_addr
, size
);
1281 __iommu_remove_mapping(dev
, handle
, size
);
1282 __iommu_free_buffer(dev
, pages
, size
);
1285 static int arm_iommu_get_sgtable(struct device
*dev
, struct sg_table
*sgt
,
1286 void *cpu_addr
, dma_addr_t dma_addr
,
1287 size_t size
, struct dma_attrs
*attrs
)
1289 unsigned int count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1290 struct page
**pages
= __iommu_get_pages(cpu_addr
, attrs
);
1295 return sg_alloc_table_from_pages(sgt
, pages
, count
, 0, size
,
1300 * Map a part of the scatter-gather list into contiguous io address space
1302 static int __map_sg_chunk(struct device
*dev
, struct scatterlist
*sg
,
1303 size_t size
, dma_addr_t
*handle
,
1304 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1306 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1307 dma_addr_t iova
, iova_base
;
1310 struct scatterlist
*s
;
1312 size
= PAGE_ALIGN(size
);
1313 *handle
= DMA_ERROR_CODE
;
1315 iova_base
= iova
= __alloc_iova(mapping
, size
);
1316 if (iova
== DMA_ERROR_CODE
)
1319 for (count
= 0, s
= sg
; count
< (size
>> PAGE_SHIFT
); s
= sg_next(s
)) {
1320 phys_addr_t phys
= page_to_phys(sg_page(s
));
1321 unsigned int len
= PAGE_ALIGN(s
->offset
+ s
->length
);
1323 if (!arch_is_coherent() &&
1324 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1325 __dma_page_cpu_to_dev(sg_page(s
), s
->offset
, s
->length
, dir
);
1327 ret
= iommu_map(mapping
->domain
, iova
, phys
, len
, 0);
1330 count
+= len
>> PAGE_SHIFT
;
1333 *handle
= iova_base
;
1337 iommu_unmap(mapping
->domain
, iova_base
, count
* PAGE_SIZE
);
1338 __free_iova(mapping
, iova_base
, size
);
1343 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1344 * @dev: valid struct device pointer
1345 * @sg: list of buffers
1346 * @nents: number of buffers to map
1347 * @dir: DMA transfer direction
1349 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1350 * The scatter gather list elements are merged together (if possible) and
1351 * tagged with the appropriate dma address and length. They are obtained via
1352 * sg_dma_{address,length}.
1354 int arm_iommu_map_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
1355 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1357 struct scatterlist
*s
= sg
, *dma
= sg
, *start
= sg
;
1359 unsigned int offset
= s
->offset
;
1360 unsigned int size
= s
->offset
+ s
->length
;
1361 unsigned int max
= dma_get_max_seg_size(dev
);
1363 for (i
= 1; i
< nents
; i
++) {
1366 s
->dma_address
= DMA_ERROR_CODE
;
1369 if (s
->offset
|| (size
& ~PAGE_MASK
) || size
+ s
->length
> max
) {
1370 if (__map_sg_chunk(dev
, start
, size
, &dma
->dma_address
,
1374 dma
->dma_address
+= offset
;
1375 dma
->dma_length
= size
- offset
;
1377 size
= offset
= s
->offset
;
1384 if (__map_sg_chunk(dev
, start
, size
, &dma
->dma_address
, dir
, attrs
) < 0)
1387 dma
->dma_address
+= offset
;
1388 dma
->dma_length
= size
- offset
;
1393 for_each_sg(sg
, s
, count
, i
)
1394 __iommu_remove_mapping(dev
, sg_dma_address(s
), sg_dma_len(s
));
1399 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1400 * @dev: valid struct device pointer
1401 * @sg: list of buffers
1402 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1403 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1405 * Unmap a set of streaming mode DMA translations. Again, CPU access
1406 * rules concerning calls here are the same as for dma_unmap_single().
1408 void arm_iommu_unmap_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
1409 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1411 struct scatterlist
*s
;
1414 for_each_sg(sg
, s
, nents
, i
) {
1416 __iommu_remove_mapping(dev
, sg_dma_address(s
),
1418 if (!arch_is_coherent() &&
1419 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1420 __dma_page_dev_to_cpu(sg_page(s
), s
->offset
,
1426 * arm_iommu_sync_sg_for_cpu
1427 * @dev: valid struct device pointer
1428 * @sg: list of buffers
1429 * @nents: number of buffers to map (returned from dma_map_sg)
1430 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1432 void arm_iommu_sync_sg_for_cpu(struct device
*dev
, struct scatterlist
*sg
,
1433 int nents
, enum dma_data_direction dir
)
1435 struct scatterlist
*s
;
1438 for_each_sg(sg
, s
, nents
, i
)
1439 if (!arch_is_coherent())
1440 __dma_page_dev_to_cpu(sg_page(s
), s
->offset
, s
->length
, dir
);
1445 * arm_iommu_sync_sg_for_device
1446 * @dev: valid struct device pointer
1447 * @sg: list of buffers
1448 * @nents: number of buffers to map (returned from dma_map_sg)
1449 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1451 void arm_iommu_sync_sg_for_device(struct device
*dev
, struct scatterlist
*sg
,
1452 int nents
, enum dma_data_direction dir
)
1454 struct scatterlist
*s
;
1457 for_each_sg(sg
, s
, nents
, i
)
1458 if (!arch_is_coherent())
1459 __dma_page_cpu_to_dev(sg_page(s
), s
->offset
, s
->length
, dir
);
1464 * arm_iommu_map_page
1465 * @dev: valid struct device pointer
1466 * @page: page that buffer resides in
1467 * @offset: offset into page for start of buffer
1468 * @size: size of buffer to map
1469 * @dir: DMA transfer direction
1471 * IOMMU aware version of arm_dma_map_page()
1473 static dma_addr_t
arm_iommu_map_page(struct device
*dev
, struct page
*page
,
1474 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
1475 struct dma_attrs
*attrs
)
1477 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1478 dma_addr_t dma_addr
;
1479 int ret
, len
= PAGE_ALIGN(size
+ offset
);
1481 if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1482 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
1484 dma_addr
= __alloc_iova(mapping
, len
);
1485 if (dma_addr
== DMA_ERROR_CODE
)
1488 ret
= iommu_map(mapping
->domain
, dma_addr
, page_to_phys(page
), len
, 0);
1492 return dma_addr
+ offset
;
1494 __free_iova(mapping
, dma_addr
, len
);
1495 return DMA_ERROR_CODE
;
1499 * arm_iommu_unmap_page
1500 * @dev: valid struct device pointer
1501 * @handle: DMA address of buffer
1502 * @size: size of buffer (same as passed to dma_map_page)
1503 * @dir: DMA transfer direction (same as passed to dma_map_page)
1505 * IOMMU aware version of arm_dma_unmap_page()
1507 static void arm_iommu_unmap_page(struct device
*dev
, dma_addr_t handle
,
1508 size_t size
, enum dma_data_direction dir
,
1509 struct dma_attrs
*attrs
)
1511 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1512 dma_addr_t iova
= handle
& PAGE_MASK
;
1513 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1514 int offset
= handle
& ~PAGE_MASK
;
1515 int len
= PAGE_ALIGN(size
+ offset
);
1520 if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1521 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
1523 iommu_unmap(mapping
->domain
, iova
, len
);
1524 __free_iova(mapping
, iova
, len
);
1527 static void arm_iommu_sync_single_for_cpu(struct device
*dev
,
1528 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
1530 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1531 dma_addr_t iova
= handle
& PAGE_MASK
;
1532 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1533 unsigned int offset
= handle
& ~PAGE_MASK
;
1538 if (!arch_is_coherent())
1539 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
1542 static void arm_iommu_sync_single_for_device(struct device
*dev
,
1543 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
1545 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1546 dma_addr_t iova
= handle
& PAGE_MASK
;
1547 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1548 unsigned int offset
= handle
& ~PAGE_MASK
;
1553 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
1556 struct dma_map_ops iommu_ops
= {
1557 .alloc
= arm_iommu_alloc_attrs
,
1558 .free
= arm_iommu_free_attrs
,
1559 .mmap
= arm_iommu_mmap_attrs
,
1560 .get_sgtable
= arm_iommu_get_sgtable
,
1562 .map_page
= arm_iommu_map_page
,
1563 .unmap_page
= arm_iommu_unmap_page
,
1564 .sync_single_for_cpu
= arm_iommu_sync_single_for_cpu
,
1565 .sync_single_for_device
= arm_iommu_sync_single_for_device
,
1567 .map_sg
= arm_iommu_map_sg
,
1568 .unmap_sg
= arm_iommu_unmap_sg
,
1569 .sync_sg_for_cpu
= arm_iommu_sync_sg_for_cpu
,
1570 .sync_sg_for_device
= arm_iommu_sync_sg_for_device
,
1574 * arm_iommu_create_mapping
1575 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1576 * @base: start address of the valid IO address space
1577 * @size: size of the valid IO address space
1578 * @order: accuracy of the IO addresses allocations
1580 * Creates a mapping structure which holds information about used/unused
1581 * IO address ranges, which is required to perform memory allocation and
1582 * mapping with IOMMU aware functions.
1584 * The client device need to be attached to the mapping with
1585 * arm_iommu_attach_device function.
1587 struct dma_iommu_mapping
*
1588 arm_iommu_create_mapping(struct bus_type
*bus
, dma_addr_t base
, size_t size
,
1591 unsigned int count
= size
>> (PAGE_SHIFT
+ order
);
1592 unsigned int bitmap_size
= BITS_TO_LONGS(count
) * sizeof(long);
1593 struct dma_iommu_mapping
*mapping
;
1597 return ERR_PTR(-EINVAL
);
1599 mapping
= kzalloc(sizeof(struct dma_iommu_mapping
), GFP_KERNEL
);
1603 mapping
->bitmap
= kzalloc(bitmap_size
, GFP_KERNEL
);
1604 if (!mapping
->bitmap
)
1607 mapping
->base
= base
;
1608 mapping
->bits
= BITS_PER_BYTE
* bitmap_size
;
1609 mapping
->order
= order
;
1610 spin_lock_init(&mapping
->lock
);
1612 mapping
->domain
= iommu_domain_alloc(bus
);
1613 if (!mapping
->domain
)
1616 kref_init(&mapping
->kref
);
1619 kfree(mapping
->bitmap
);
1623 return ERR_PTR(err
);
1626 static void release_iommu_mapping(struct kref
*kref
)
1628 struct dma_iommu_mapping
*mapping
=
1629 container_of(kref
, struct dma_iommu_mapping
, kref
);
1631 iommu_domain_free(mapping
->domain
);
1632 kfree(mapping
->bitmap
);
1636 void arm_iommu_release_mapping(struct dma_iommu_mapping
*mapping
)
1639 kref_put(&mapping
->kref
, release_iommu_mapping
);
1643 * arm_iommu_attach_device
1644 * @dev: valid struct device pointer
1645 * @mapping: io address space mapping structure (returned from
1646 * arm_iommu_create_mapping)
1648 * Attaches specified io address space mapping to the provided device,
1649 * this replaces the dma operations (dma_map_ops pointer) with the
1650 * IOMMU aware version. More than one client might be attached to
1651 * the same io address space mapping.
1653 int arm_iommu_attach_device(struct device
*dev
,
1654 struct dma_iommu_mapping
*mapping
)
1658 err
= iommu_attach_device(mapping
->domain
, dev
);
1662 kref_get(&mapping
->kref
);
1663 dev
->archdata
.mapping
= mapping
;
1664 set_dma_ops(dev
, &iommu_ops
);
1666 pr_info("Attached IOMMU controller to %s device.\n", dev_name(dev
));