5 * SoftDog 0.05: A Software Watchdog Device
7 * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
8 * Thomas Mingarelli <thomas.mingarelli@hp.com>
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation
16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18 #include <linux/device.h>
20 #include <linux/init.h>
22 #include <linux/bitops.h>
23 #include <linux/kernel.h>
24 #include <linux/miscdevice.h>
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/pci.h>
28 #include <linux/pci_ids.h>
29 #include <linux/types.h>
30 #include <linux/uaccess.h>
31 #include <linux/watchdog.h>
32 #ifdef CONFIG_HPWDT_NMI_DECODING
33 #include <linux/dmi.h>
34 #include <linux/spinlock.h>
35 #include <linux/nmi.h>
36 #include <linux/kdebug.h>
37 #include <linux/notifier.h>
38 #include <asm/cacheflush.h>
39 #endif /* CONFIG_HPWDT_NMI_DECODING */
42 #define HPWDT_VERSION "1.3.2"
43 #define SECS_TO_TICKS(secs) ((secs) * 1000 / 128)
44 #define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000)
45 #define HPWDT_MAX_TIMER TICKS_TO_SECS(65535)
46 #define DEFAULT_MARGIN 30
48 static unsigned int soft_margin
= DEFAULT_MARGIN
; /* in seconds */
49 static unsigned int reload
; /* the computed soft_margin */
50 static bool nowayout
= WATCHDOG_NOWAYOUT
;
51 static char expect_release
;
52 static unsigned long hpwdt_is_open
;
54 static void __iomem
*pci_mem_addr
; /* the PCI-memory address */
55 static unsigned long __iomem
*hpwdt_timer_reg
;
56 static unsigned long __iomem
*hpwdt_timer_con
;
58 static DEFINE_PCI_DEVICE_TABLE(hpwdt_devices
) = {
59 { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ
, 0xB203) }, /* iLO2 */
60 { PCI_DEVICE(PCI_VENDOR_ID_HP
, 0x3306) }, /* iLO3 */
61 {0}, /* terminate list */
63 MODULE_DEVICE_TABLE(pci
, hpwdt_devices
);
65 #ifdef CONFIG_HPWDT_NMI_DECODING
66 #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
67 #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
68 #define PCI_BIOS32_PARAGRAPH_LEN 16
69 #define PCI_ROM_BASE1 0x000F0000
70 #define ROM_SIZE 0x10000
72 struct bios32_service_dir
{
82 struct smbios_cru64_info
{
91 #define SMBIOS_CRU64_INFORMATION 212
94 struct smbios_proliant_info
{
103 #define SMBIOS_ICRU_INFORMATION 219
106 struct cmn_registers
{
146 } __attribute__((packed
));
148 static unsigned int hpwdt_nmi_decoding
;
149 static unsigned int allow_kdump
= 1;
150 static unsigned int is_icru
;
151 static unsigned int is_uefi
;
152 static DEFINE_SPINLOCK(rom_lock
);
153 static void *cru_rom_addr
;
154 static struct cmn_registers cmn_regs
;
156 extern asmlinkage
void asminline_call(struct cmn_registers
*pi86Regs
,
157 unsigned long *pRomEntry
);
160 /* --32 Bit Bios------------------------------------------------------------ */
162 #define HPWDT_ARCH 32
166 ".globl asminline_call \n"
167 "asminline_call: \n\t"
169 "movl %esp, %ebp \n\t"
175 "movl 8(%ebp),%eax \n\t"
176 "movl 4(%eax),%ebx \n\t"
177 "movl 8(%eax),%ecx \n\t"
178 "movl 12(%eax),%edx \n\t"
179 "movl 16(%eax),%esi \n\t"
180 "movl 20(%eax),%edi \n\t"
181 "movl (%eax),%eax \n\t"
183 "call *12(%ebp) \n\t"
186 "movl 8(%ebp),%eax \n\t"
187 "movl %ebx,4(%eax) \n\t"
188 "movl %ecx,8(%eax) \n\t"
189 "movl %edx,12(%eax) \n\t"
190 "movl %esi,16(%eax) \n\t"
191 "movl %edi,20(%eax) \n\t"
192 "movw %ds,24(%eax) \n\t"
193 "movw %es,26(%eax) \n\t"
195 "movl %ebx,(%eax) \n\t"
197 "movl %ebx,28(%eax) \n\t"
209 * Routine Description:
210 * This function uses the 32-bit BIOS Service Directory record to
211 * search for a $CRU record.
217 static int cru_detect(unsigned long map_entry
,
218 unsigned long map_offset
)
221 unsigned long *bios32_entrypoint
;
222 unsigned long cru_physical_address
;
223 unsigned long cru_length
;
224 unsigned long physical_bios_base
= 0;
225 unsigned long physical_bios_offset
= 0;
226 int retval
= -ENODEV
;
228 bios32_map
= ioremap(map_entry
, (2 * PAGE_SIZE
));
230 if (bios32_map
== NULL
)
233 bios32_entrypoint
= bios32_map
+ map_offset
;
235 cmn_regs
.u1
.reax
= CRU_BIOS_SIGNATURE_VALUE
;
237 set_memory_x((unsigned long)bios32_map
, 2);
238 asminline_call(&cmn_regs
, bios32_entrypoint
);
240 if (cmn_regs
.u1
.ral
!= 0) {
241 pr_warn("Call succeeded but with an error: 0x%x\n",
244 physical_bios_base
= cmn_regs
.u2
.rebx
;
245 physical_bios_offset
= cmn_regs
.u4
.redx
;
246 cru_length
= cmn_regs
.u3
.recx
;
247 cru_physical_address
=
248 physical_bios_base
+ physical_bios_offset
;
250 /* If the values look OK, then map it in. */
251 if ((physical_bios_base
+ physical_bios_offset
)) {
253 ioremap(cru_physical_address
, cru_length
);
255 set_memory_x((unsigned long)cru_rom_addr
& PAGE_MASK
,
256 (cru_length
+ PAGE_SIZE
- 1) >> PAGE_SHIFT
);
261 pr_debug("CRU Base Address: 0x%lx\n", physical_bios_base
);
262 pr_debug("CRU Offset Address: 0x%lx\n", physical_bios_offset
);
263 pr_debug("CRU Length: 0x%lx\n", cru_length
);
264 pr_debug("CRU Mapped Address: %p\n", &cru_rom_addr
);
273 static int bios_checksum(const char __iomem
*ptr
, int len
)
279 * calculate checksum of size bytes. This should add up
280 * to zero if we have a valid header.
282 for (i
= 0; i
< len
; i
++)
285 return ((sum
== 0) && (len
> 0));
291 * Routine Description:
292 * This function finds the 32-bit BIOS Service Directory
298 static int bios32_present(const char __iomem
*p
)
300 struct bios32_service_dir
*bios_32_ptr
;
302 unsigned long map_entry
, map_offset
;
304 bios_32_ptr
= (struct bios32_service_dir
*) p
;
307 * Search for signature by checking equal to the swizzled value
308 * instead of calling another routine to perform a strcmp.
310 if (bios_32_ptr
->signature
== PCI_BIOS32_SD_VALUE
) {
311 length
= bios_32_ptr
->length
* PCI_BIOS32_PARAGRAPH_LEN
;
312 if (bios_checksum(p
, length
)) {
314 * According to the spec, we're looking for the
315 * first 4KB-aligned address below the entrypoint
316 * listed in the header. The Service Directory code
317 * is guaranteed to occupy no more than 2 4KB pages.
319 map_entry
= bios_32_ptr
->entry_point
& ~(PAGE_SIZE
- 1);
320 map_offset
= bios_32_ptr
->entry_point
- map_entry
;
322 return cru_detect(map_entry
, map_offset
);
328 static int detect_cru_service(void)
334 * Search from 0x0f0000 through 0x0fffff, inclusive.
336 p
= ioremap(PCI_ROM_BASE1
, ROM_SIZE
);
340 for (q
= p
; q
< p
+ ROM_SIZE
; q
+= 16) {
341 rc
= bios32_present(q
);
348 /* ------------------------------------------------------------------------- */
349 #endif /* CONFIG_X86_32 */
351 /* --64 Bit Bios------------------------------------------------------------ */
353 #define HPWDT_ARCH 64
357 ".globl asminline_call \n"
358 "asminline_call: \n\t"
360 "movq %rsp, %rbp \n\t"
366 "movq %rsi, %r12 \n\t"
367 "movq %rdi, %r9 \n\t"
368 "movl 4(%r9),%ebx \n\t"
369 "movl 8(%r9),%ecx \n\t"
370 "movl 12(%r9),%edx \n\t"
371 "movl 16(%r9),%esi \n\t"
372 "movl 20(%r9),%edi \n\t"
373 "movl (%r9),%eax \n\t"
377 "movl %eax, (%r9) \n\t"
378 "movl %ebx, 4(%r9) \n\t"
379 "movl %ecx, 8(%r9) \n\t"
380 "movl %edx, 12(%r9) \n\t"
381 "movl %esi, 16(%r9) \n\t"
382 "movl %edi, 20(%r9) \n\t"
383 "movq %r12, %rax \n\t"
384 "movl %eax, 28(%r9) \n\t"
397 * Routine Description:
398 * This function checks whether or not a SMBIOS/DMI record is
399 * the 64bit CRU info or not
401 static void dmi_find_cru(const struct dmi_header
*dm
, void *dummy
)
403 struct smbios_cru64_info
*smbios_cru64_ptr
;
404 unsigned long cru_physical_address
;
406 if (dm
->type
== SMBIOS_CRU64_INFORMATION
) {
407 smbios_cru64_ptr
= (struct smbios_cru64_info
*) dm
;
408 if (smbios_cru64_ptr
->signature
== CRU_BIOS_SIGNATURE_VALUE
) {
409 cru_physical_address
=
410 smbios_cru64_ptr
->physical_address
+
411 smbios_cru64_ptr
->double_offset
;
412 cru_rom_addr
= ioremap(cru_physical_address
,
413 smbios_cru64_ptr
->double_length
);
414 set_memory_x((unsigned long)cru_rom_addr
& PAGE_MASK
,
415 smbios_cru64_ptr
->double_length
>> PAGE_SHIFT
);
420 static int detect_cru_service(void)
424 dmi_walk(dmi_find_cru
, NULL
);
426 /* if cru_rom_addr has been set then we found a CRU service */
427 return ((cru_rom_addr
!= NULL
) ? 0 : -ENODEV
);
429 /* ------------------------------------------------------------------------- */
430 #endif /* CONFIG_X86_64 */
431 #endif /* CONFIG_HPWDT_NMI_DECODING */
434 * Watchdog operations
436 static void hpwdt_start(void)
438 reload
= SECS_TO_TICKS(soft_margin
);
439 iowrite16(reload
, hpwdt_timer_reg
);
440 iowrite8(0x85, hpwdt_timer_con
);
443 static void hpwdt_stop(void)
447 data
= ioread8(hpwdt_timer_con
);
449 iowrite8(data
, hpwdt_timer_con
);
452 static void hpwdt_ping(void)
454 iowrite16(reload
, hpwdt_timer_reg
);
457 static int hpwdt_change_timer(int new_margin
)
459 if (new_margin
< 1 || new_margin
> HPWDT_MAX_TIMER
) {
460 pr_warn("New value passed in is invalid: %d seconds\n",
465 soft_margin
= new_margin
;
466 pr_debug("New timer passed in is %d seconds\n", new_margin
);
467 reload
= SECS_TO_TICKS(soft_margin
);
472 static int hpwdt_time_left(void)
474 return TICKS_TO_SECS(ioread16(hpwdt_timer_reg
));
477 #ifdef CONFIG_HPWDT_NMI_DECODING
481 static int hpwdt_pretimeout(unsigned int ulReason
, struct pt_regs
*regs
)
483 unsigned long rom_pl
;
484 static int die_nmi_called
;
486 if (!hpwdt_nmi_decoding
)
489 spin_lock_irqsave(&rom_lock
, rom_pl
);
490 if (!die_nmi_called
&& !is_icru
&& !is_uefi
)
491 asminline_call(&cmn_regs
, cru_rom_addr
);
493 spin_unlock_irqrestore(&rom_lock
, rom_pl
);
498 if (!is_icru
&& !is_uefi
) {
499 if (cmn_regs
.u1
.ral
== 0) {
500 panic("An NMI occurred, "
501 "but unable to determine source.\n");
504 panic("An NMI occurred, please see the Integrated "
505 "Management Log for details.\n");
510 #endif /* CONFIG_HPWDT_NMI_DECODING */
513 * /dev/watchdog handling
515 static int hpwdt_open(struct inode
*inode
, struct file
*file
)
517 /* /dev/watchdog can only be opened once */
518 if (test_and_set_bit(0, &hpwdt_is_open
))
521 /* Start the watchdog */
525 return nonseekable_open(inode
, file
);
528 static int hpwdt_release(struct inode
*inode
, struct file
*file
)
530 /* Stop the watchdog */
531 if (expect_release
== 42) {
534 pr_crit("Unexpected close, not stopping watchdog!\n");
540 /* /dev/watchdog is being closed, make sure it can be re-opened */
541 clear_bit(0, &hpwdt_is_open
);
546 static ssize_t
hpwdt_write(struct file
*file
, const char __user
*data
,
547 size_t len
, loff_t
*ppos
)
549 /* See if we got the magic character 'V' and reload the timer */
554 /* note: just in case someone wrote the magic character
555 * five months ago... */
558 /* scan to see whether or not we got the magic char. */
559 for (i
= 0; i
!= len
; i
++) {
561 if (get_user(c
, data
+ i
))
568 /* someone wrote to us, we should reload the timer */
575 static const struct watchdog_info ident
= {
576 .options
= WDIOF_SETTIMEOUT
|
577 WDIOF_KEEPALIVEPING
|
579 .identity
= "HP iLO2+ HW Watchdog Timer",
582 static long hpwdt_ioctl(struct file
*file
, unsigned int cmd
,
585 void __user
*argp
= (void __user
*)arg
;
586 int __user
*p
= argp
;
591 case WDIOC_GETSUPPORT
:
593 if (copy_to_user(argp
, &ident
, sizeof(ident
)))
597 case WDIOC_GETSTATUS
:
598 case WDIOC_GETBOOTSTATUS
:
599 ret
= put_user(0, p
);
602 case WDIOC_KEEPALIVE
:
607 case WDIOC_SETTIMEOUT
:
608 ret
= get_user(new_margin
, p
);
612 ret
= hpwdt_change_timer(new_margin
);
618 case WDIOC_GETTIMEOUT
:
619 ret
= put_user(soft_margin
, p
);
622 case WDIOC_GETTIMELEFT
:
623 ret
= put_user(hpwdt_time_left(), p
);
632 static const struct file_operations hpwdt_fops
= {
633 .owner
= THIS_MODULE
,
635 .write
= hpwdt_write
,
636 .unlocked_ioctl
= hpwdt_ioctl
,
638 .release
= hpwdt_release
,
641 static struct miscdevice hpwdt_miscdev
= {
642 .minor
= WATCHDOG_MINOR
,
651 #ifdef CONFIG_HPWDT_NMI_DECODING
652 #ifdef CONFIG_X86_LOCAL_APIC
653 static void hpwdt_check_nmi_decoding(struct pci_dev
*dev
)
656 * If nmi_watchdog is turned off then we can turn on
657 * our nmi decoding capability.
659 hpwdt_nmi_decoding
= 1;
662 static void hpwdt_check_nmi_decoding(struct pci_dev
*dev
)
664 dev_warn(&dev
->dev
, "NMI decoding is disabled. "
665 "Your kernel does not support a NMI Watchdog.\n");
667 #endif /* CONFIG_X86_LOCAL_APIC */
672 * Routine Description:
673 * This function checks whether or not we are on an iCRU-based server.
674 * This check is independent of architecture and needs to be made for
675 * any ProLiant system.
677 static void dmi_find_icru(const struct dmi_header
*dm
, void *dummy
)
679 struct smbios_proliant_info
*smbios_proliant_ptr
;
681 if (dm
->type
== SMBIOS_ICRU_INFORMATION
) {
682 smbios_proliant_ptr
= (struct smbios_proliant_info
*) dm
;
683 if (smbios_proliant_ptr
->misc_features
& 0x01)
685 if (smbios_proliant_ptr
->misc_features
& 0x408)
690 static int hpwdt_init_nmi_decoding(struct pci_dev
*dev
)
695 * On typical CRU-based systems we need to map that service in
696 * the BIOS. For 32 bit Operating Systems we need to go through
697 * the 32 Bit BIOS Service Directory. For 64 bit Operating
698 * Systems we get that service through SMBIOS.
700 * On systems that support the new iCRU service all we need to
701 * do is call dmi_walk to get the supported flag value and skip
702 * the old cru detect code.
704 dmi_walk(dmi_find_icru
, NULL
);
705 if (!is_icru
&& !is_uefi
) {
708 * We need to map the ROM to get the CRU service.
709 * For 32 bit Operating Systems we need to go through the 32 Bit
710 * BIOS Service Directory
711 * For 64 bit Operating Systems we get that service through SMBIOS.
713 retval
= detect_cru_service();
716 "Unable to detect the %d Bit CRU Service.\n",
722 * We know this is the only CRU call we need to make so lets keep as
723 * few instructions as possible once the NMI comes in.
725 cmn_regs
.u1
.rah
= 0x0D;
726 cmn_regs
.u1
.ral
= 0x02;
730 * Only one function can register for NMI_UNKNOWN
732 retval
= register_nmi_handler(NMI_UNKNOWN
, hpwdt_pretimeout
, 0, "hpwdt");
735 retval
= register_nmi_handler(NMI_SERR
, hpwdt_pretimeout
, 0, "hpwdt");
738 retval
= register_nmi_handler(NMI_IO_CHECK
, hpwdt_pretimeout
, 0, "hpwdt");
743 "HP Watchdog Timer Driver: NMI decoding initialized"
744 ", allow kernel dump: %s (default = 0/OFF)\n",
745 (allow_kdump
== 0) ? "OFF" : "ON");
749 unregister_nmi_handler(NMI_SERR
, "hpwdt");
751 unregister_nmi_handler(NMI_UNKNOWN
, "hpwdt");
754 "Unable to register a die notifier (err=%d).\n",
757 iounmap(cru_rom_addr
);
761 static void hpwdt_exit_nmi_decoding(void)
763 unregister_nmi_handler(NMI_UNKNOWN
, "hpwdt");
764 unregister_nmi_handler(NMI_SERR
, "hpwdt");
765 unregister_nmi_handler(NMI_IO_CHECK
, "hpwdt");
767 iounmap(cru_rom_addr
);
769 #else /* !CONFIG_HPWDT_NMI_DECODING */
770 static void hpwdt_check_nmi_decoding(struct pci_dev
*dev
)
774 static int hpwdt_init_nmi_decoding(struct pci_dev
*dev
)
779 static void hpwdt_exit_nmi_decoding(void)
782 #endif /* CONFIG_HPWDT_NMI_DECODING */
784 static int hpwdt_init_one(struct pci_dev
*dev
,
785 const struct pci_device_id
*ent
)
790 * Check if we can do NMI decoding or not
792 hpwdt_check_nmi_decoding(dev
);
795 * First let's find out if we are on an iLO2+ server. We will
796 * not run on a legacy ASM box.
797 * So we only support the G5 ProLiant servers and higher.
799 if (dev
->subsystem_vendor
!= PCI_VENDOR_ID_HP
) {
801 "This server does not have an iLO2+ ASIC.\n");
806 * Ignore all auxilary iLO devices with the following PCI ID
808 if (dev
->subsystem_device
== 0x1979)
811 if (pci_enable_device(dev
)) {
813 "Not possible to enable PCI Device: 0x%x:0x%x.\n",
814 ent
->vendor
, ent
->device
);
818 pci_mem_addr
= pci_iomap(dev
, 1, 0x80);
821 "Unable to detect the iLO2+ server memory.\n");
823 goto error_pci_iomap
;
825 hpwdt_timer_reg
= pci_mem_addr
+ 0x70;
826 hpwdt_timer_con
= pci_mem_addr
+ 0x72;
828 /* Make sure that timer is disabled until /dev/watchdog is opened */
831 /* Make sure that we have a valid soft_margin */
832 if (hpwdt_change_timer(soft_margin
))
833 hpwdt_change_timer(DEFAULT_MARGIN
);
835 /* Initialize NMI Decoding functionality */
836 retval
= hpwdt_init_nmi_decoding(dev
);
838 goto error_init_nmi_decoding
;
840 retval
= misc_register(&hpwdt_miscdev
);
843 "Unable to register miscdev on minor=%d (err=%d).\n",
844 WATCHDOG_MINOR
, retval
);
845 goto error_misc_register
;
848 dev_info(&dev
->dev
, "HP Watchdog Timer Driver: %s"
849 ", timer margin: %d seconds (nowayout=%d).\n",
850 HPWDT_VERSION
, soft_margin
, nowayout
);
854 hpwdt_exit_nmi_decoding();
855 error_init_nmi_decoding
:
856 pci_iounmap(dev
, pci_mem_addr
);
858 pci_disable_device(dev
);
862 static void hpwdt_exit(struct pci_dev
*dev
)
867 misc_deregister(&hpwdt_miscdev
);
868 hpwdt_exit_nmi_decoding();
869 pci_iounmap(dev
, pci_mem_addr
);
870 pci_disable_device(dev
);
873 static struct pci_driver hpwdt_driver
= {
875 .id_table
= hpwdt_devices
,
876 .probe
= hpwdt_init_one
,
877 .remove
= hpwdt_exit
,
880 MODULE_AUTHOR("Tom Mingarelli");
881 MODULE_DESCRIPTION("hp watchdog driver");
882 MODULE_LICENSE("GPL");
883 MODULE_VERSION(HPWDT_VERSION
);
885 module_param(soft_margin
, int, 0);
886 MODULE_PARM_DESC(soft_margin
, "Watchdog timeout in seconds");
888 module_param(nowayout
, bool, 0);
889 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started (default="
890 __MODULE_STRING(WATCHDOG_NOWAYOUT
) ")");
892 #ifdef CONFIG_HPWDT_NMI_DECODING
893 module_param(allow_kdump
, int, 0);
894 MODULE_PARM_DESC(allow_kdump
, "Start a kernel dump after NMI occurs");
895 #endif /* !CONFIG_HPWDT_NMI_DECODING */
897 module_pci_driver(hpwdt_driver
);