2 * Enhanced Host Controller Interface (EHCI) driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * Copyright (c) 2000-2004 by David Brownell
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/vmalloc.h>
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/hrtimer.h>
34 #include <linux/list.h>
35 #include <linux/interrupt.h>
36 #include <linux/usb.h>
37 #include <linux/usb/hcd.h>
38 #include <linux/moduleparam.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/debugfs.h>
41 #include <linux/slab.h>
43 #include <asm/byteorder.h>
46 #include <asm/unaligned.h>
48 #if defined(CONFIG_PPC_PS3)
49 #include <asm/firmware.h>
52 /*-------------------------------------------------------------------------*/
55 * EHCI hc_driver implementation ... experimental, incomplete.
56 * Based on the final 1.0 register interface specification.
58 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
59 * First was PCMCIA, like ISA; then CardBus, which is PCI.
60 * Next comes "CardBay", using USB 2.0 signals.
62 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
63 * Special thanks to Intel and VIA for providing host controllers to
64 * test this driver on, and Cypress (including In-System Design) for
65 * providing early devices for those host controllers to talk to!
68 #define DRIVER_AUTHOR "David Brownell"
69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
71 static const char hcd_name
[] = "ehci_hcd";
77 /* magic numbers that can affect system performance */
78 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
79 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
80 #define EHCI_TUNE_RL_TT 0
81 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
82 #define EHCI_TUNE_MULT_TT 1
84 * Some drivers think it's safe to schedule isochronous transfers more than
85 * 256 ms into the future (partly as a result of an old bug in the scheduling
86 * code). In an attempt to avoid trouble, we will use a minimum scheduling
87 * length of 512 frames instead of 256.
89 #define EHCI_TUNE_FLS 1 /* (medium) 512-frame schedule */
91 /* Initial IRQ latency: faster than hw default */
92 static int log2_irq_thresh
= 0; // 0 to 6
93 module_param (log2_irq_thresh
, int, S_IRUGO
);
94 MODULE_PARM_DESC (log2_irq_thresh
, "log2 IRQ latency, 1-64 microframes");
96 /* initial park setting: slower than hw default */
97 static unsigned park
= 0;
98 module_param (park
, uint
, S_IRUGO
);
99 MODULE_PARM_DESC (park
, "park setting; 1-3 back-to-back async packets");
101 /* for flakey hardware, ignore overcurrent indicators */
102 static bool ignore_oc
= 0;
103 module_param (ignore_oc
, bool, S_IRUGO
);
104 MODULE_PARM_DESC (ignore_oc
, "ignore bogus hardware overcurrent indications");
106 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
108 /*-------------------------------------------------------------------------*/
111 #include "pci-quirks.h"
113 static void compute_tt_budget(u8 budget_table
[EHCI_BANDWIDTH_SIZE
],
117 * The MosChip MCS9990 controller updates its microframe counter
118 * a little before the frame counter, and occasionally we will read
119 * the invalid intermediate value. Avoid problems by checking the
120 * microframe number (the low-order 3 bits); if they are 0 then
121 * re-read the register to get the correct value.
123 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd
*ehci
)
127 uf
= ehci_readl(ehci
, &ehci
->regs
->frame_index
);
128 if (unlikely((uf
& 7) == 0))
129 uf
= ehci_readl(ehci
, &ehci
->regs
->frame_index
);
133 static inline unsigned ehci_read_frame_index(struct ehci_hcd
*ehci
)
135 if (ehci
->frame_index_bug
)
136 return ehci_moschip_read_frame_index(ehci
);
137 return ehci_readl(ehci
, &ehci
->regs
->frame_index
);
140 #include "ehci-dbg.c"
142 /*-------------------------------------------------------------------------*/
145 * ehci_handshake - spin reading hc until handshake completes or fails
146 * @ptr: address of hc register to be read
147 * @mask: bits to look at in result of read
148 * @done: value of those bits when handshake succeeds
149 * @usec: timeout in microseconds
151 * Returns negative errno, or zero on success
153 * Success happens when the "mask" bits have the specified value (hardware
154 * handshake done). There are two failure modes: "usec" have passed (major
155 * hardware flakeout), or the register reads as all-ones (hardware removed).
157 * That last failure should_only happen in cases like physical cardbus eject
158 * before driver shutdown. But it also seems to be caused by bugs in cardbus
159 * bridge shutdown: shutting down the bridge before the devices using it.
161 int ehci_handshake(struct ehci_hcd
*ehci
, void __iomem
*ptr
,
162 u32 mask
, u32 done
, int usec
)
167 result
= ehci_readl(ehci
, ptr
);
168 if (result
== ~(u32
)0) /* card removed */
178 EXPORT_SYMBOL_GPL(ehci_handshake
);
180 /* check TDI/ARC silicon is in host mode */
181 static int tdi_in_host_mode (struct ehci_hcd
*ehci
)
185 tmp
= ehci_readl(ehci
, &ehci
->regs
->usbmode
);
186 return (tmp
& 3) == USBMODE_CM_HC
;
190 * Force HC to halt state from unknown (EHCI spec section 2.3).
191 * Must be called with interrupts enabled and the lock not held.
193 static int ehci_halt (struct ehci_hcd
*ehci
)
197 spin_lock_irq(&ehci
->lock
);
199 /* disable any irqs left enabled by previous code */
200 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
202 if (ehci_is_TDI(ehci
) && !tdi_in_host_mode(ehci
)) {
203 spin_unlock_irq(&ehci
->lock
);
208 * This routine gets called during probe before ehci->command
209 * has been initialized, so we can't rely on its value.
211 ehci
->command
&= ~CMD_RUN
;
212 temp
= ehci_readl(ehci
, &ehci
->regs
->command
);
213 temp
&= ~(CMD_RUN
| CMD_IAAD
);
214 ehci_writel(ehci
, temp
, &ehci
->regs
->command
);
216 spin_unlock_irq(&ehci
->lock
);
217 synchronize_irq(ehci_to_hcd(ehci
)->irq
);
219 return ehci_handshake(ehci
, &ehci
->regs
->status
,
220 STS_HALT
, STS_HALT
, 16 * 125);
223 /* put TDI/ARC silicon into EHCI mode */
224 static void tdi_reset (struct ehci_hcd
*ehci
)
228 tmp
= ehci_readl(ehci
, &ehci
->regs
->usbmode
);
229 tmp
|= USBMODE_CM_HC
;
230 /* The default byte access to MMR space is LE after
231 * controller reset. Set the required endian mode
232 * for transfer buffers to match the host microprocessor
234 if (ehci_big_endian_mmio(ehci
))
236 ehci_writel(ehci
, tmp
, &ehci
->regs
->usbmode
);
240 * Reset a non-running (STS_HALT == 1) controller.
241 * Must be called with interrupts enabled and the lock not held.
243 static int ehci_reset (struct ehci_hcd
*ehci
)
246 u32 command
= ehci_readl(ehci
, &ehci
->regs
->command
);
248 /* If the EHCI debug controller is active, special care must be
249 * taken before and after a host controller reset */
250 if (ehci
->debug
&& !dbgp_reset_prep(ehci_to_hcd(ehci
)))
253 command
|= CMD_RESET
;
254 dbg_cmd (ehci
, "reset", command
);
255 ehci_writel(ehci
, command
, &ehci
->regs
->command
);
256 ehci
->rh_state
= EHCI_RH_HALTED
;
257 ehci
->next_statechange
= jiffies
;
258 retval
= ehci_handshake(ehci
, &ehci
->regs
->command
,
259 CMD_RESET
, 0, 250 * 1000);
261 if (ehci
->has_hostpc
) {
262 ehci_writel(ehci
, USBMODE_EX_HC
| USBMODE_EX_VBPS
,
263 &ehci
->regs
->usbmode_ex
);
264 ehci_writel(ehci
, TXFIFO_DEFAULT
, &ehci
->regs
->txfill_tuning
);
269 if (ehci_is_TDI(ehci
))
273 dbgp_external_startup(ehci_to_hcd(ehci
));
275 ehci
->port_c_suspend
= ehci
->suspended_ports
=
276 ehci
->resuming_ports
= 0;
281 * Idle the controller (turn off the schedules).
282 * Must be called with interrupts enabled and the lock not held.
284 static void ehci_quiesce (struct ehci_hcd
*ehci
)
288 if (ehci
->rh_state
!= EHCI_RH_RUNNING
)
291 /* wait for any schedule enables/disables to take effect */
292 temp
= (ehci
->command
<< 10) & (STS_ASS
| STS_PSS
);
293 ehci_handshake(ehci
, &ehci
->regs
->status
, STS_ASS
| STS_PSS
, temp
,
296 /* then disable anything that's still active */
297 spin_lock_irq(&ehci
->lock
);
298 ehci
->command
&= ~(CMD_ASE
| CMD_PSE
);
299 ehci_writel(ehci
, ehci
->command
, &ehci
->regs
->command
);
300 spin_unlock_irq(&ehci
->lock
);
302 /* hardware can take 16 microframes to turn off ... */
303 ehci_handshake(ehci
, &ehci
->regs
->status
, STS_ASS
| STS_PSS
, 0,
307 /*-------------------------------------------------------------------------*/
309 static void end_unlink_async(struct ehci_hcd
*ehci
);
310 static void unlink_empty_async(struct ehci_hcd
*ehci
);
311 static void unlink_empty_async_suspended(struct ehci_hcd
*ehci
);
312 static void ehci_work(struct ehci_hcd
*ehci
);
313 static void start_unlink_intr(struct ehci_hcd
*ehci
, struct ehci_qh
*qh
);
314 static void end_unlink_intr(struct ehci_hcd
*ehci
, struct ehci_qh
*qh
);
316 #include "ehci-timer.c"
317 #include "ehci-hub.c"
318 #include "ehci-mem.c"
320 #include "ehci-sched.c"
321 #include "ehci-sysfs.c"
323 /*-------------------------------------------------------------------------*/
325 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
326 * The firmware seems to think that powering off is a wakeup event!
327 * This routine turns off remote wakeup and everything else, on all ports.
329 static void ehci_turn_off_all_ports(struct ehci_hcd
*ehci
)
331 int port
= HCS_N_PORTS(ehci
->hcs_params
);
334 ehci_writel(ehci
, PORT_RWC_BITS
,
335 &ehci
->regs
->port_status
[port
]);
339 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
340 * Must be called with interrupts enabled and the lock not held.
342 static void ehci_silence_controller(struct ehci_hcd
*ehci
)
346 spin_lock_irq(&ehci
->lock
);
347 ehci
->rh_state
= EHCI_RH_HALTED
;
348 ehci_turn_off_all_ports(ehci
);
350 /* make BIOS/etc use companion controller during reboot */
351 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
353 /* unblock posted writes */
354 ehci_readl(ehci
, &ehci
->regs
->configured_flag
);
355 spin_unlock_irq(&ehci
->lock
);
358 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
359 * This forcibly disables dma and IRQs, helping kexec and other cases
360 * where the next system software may expect clean state.
362 static void ehci_shutdown(struct usb_hcd
*hcd
)
364 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
366 spin_lock_irq(&ehci
->lock
);
367 ehci
->shutdown
= true;
368 ehci
->rh_state
= EHCI_RH_STOPPING
;
369 ehci
->enabled_hrtimer_events
= 0;
370 spin_unlock_irq(&ehci
->lock
);
372 ehci_silence_controller(ehci
);
374 hrtimer_cancel(&ehci
->hrtimer
);
377 /*-------------------------------------------------------------------------*/
380 * ehci_work is called from some interrupts, timers, and so on.
381 * it calls driver completion functions, after dropping ehci->lock.
383 static void ehci_work (struct ehci_hcd
*ehci
)
385 /* another CPU may drop ehci->lock during a schedule scan while
386 * it reports urb completions. this flag guards against bogus
387 * attempts at re-entrant schedule scanning.
389 if (ehci
->scanning
) {
390 ehci
->need_rescan
= true;
393 ehci
->scanning
= true;
396 ehci
->need_rescan
= false;
397 if (ehci
->async_count
)
399 if (ehci
->intr_count
> 0)
401 if (ehci
->isoc_count
> 0)
403 if (ehci
->need_rescan
)
405 ehci
->scanning
= false;
407 /* the IO watchdog guards against hardware or driver bugs that
408 * misplace IRQs, and should let us run completely without IRQs.
409 * such lossage has been observed on both VT6202 and VT8235.
411 turn_on_io_watchdog(ehci
);
415 * Called when the ehci_hcd module is removed.
417 static void ehci_stop (struct usb_hcd
*hcd
)
419 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
421 ehci_dbg (ehci
, "stop\n");
423 /* no more interrupts ... */
425 spin_lock_irq(&ehci
->lock
);
426 ehci
->enabled_hrtimer_events
= 0;
427 spin_unlock_irq(&ehci
->lock
);
430 ehci_silence_controller(ehci
);
433 hrtimer_cancel(&ehci
->hrtimer
);
434 remove_sysfs_files(ehci
);
435 remove_debug_files (ehci
);
437 /* root hub is shut down separately (first, when possible) */
438 spin_lock_irq (&ehci
->lock
);
440 spin_unlock_irq (&ehci
->lock
);
441 ehci_mem_cleanup (ehci
);
443 if (ehci
->amd_pll_fix
== 1)
446 dbg_status (ehci
, "ehci_stop completed",
447 ehci_readl(ehci
, &ehci
->regs
->status
));
450 /* one-time init, only for memory state */
451 static int ehci_init(struct usb_hcd
*hcd
)
453 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
457 struct ehci_qh_hw
*hw
;
459 spin_lock_init(&ehci
->lock
);
462 * keep io watchdog by default, those good HCDs could turn off it later
464 ehci
->need_io_watchdog
= 1;
466 hrtimer_init(&ehci
->hrtimer
, CLOCK_MONOTONIC
, HRTIMER_MODE_ABS
);
467 ehci
->hrtimer
.function
= ehci_hrtimer_func
;
468 ehci
->next_hrtimer_event
= EHCI_HRTIMER_NO_EVENT
;
470 hcc_params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
473 * by default set standard 80% (== 100 usec/uframe) max periodic
474 * bandwidth as required by USB 2.0
476 ehci
->uframe_periodic_max
= 100;
479 * hw default: 1K periodic list heads, one per frame.
480 * periodic_size can shrink by USBCMD update if hcc_params allows.
482 ehci
->periodic_size
= DEFAULT_I_TDPS
;
483 INIT_LIST_HEAD(&ehci
->async_unlink
);
484 INIT_LIST_HEAD(&ehci
->async_idle
);
485 INIT_LIST_HEAD(&ehci
->intr_unlink_wait
);
486 INIT_LIST_HEAD(&ehci
->intr_unlink
);
487 INIT_LIST_HEAD(&ehci
->intr_qh_list
);
488 INIT_LIST_HEAD(&ehci
->cached_itd_list
);
489 INIT_LIST_HEAD(&ehci
->cached_sitd_list
);
490 INIT_LIST_HEAD(&ehci
->tt_list
);
492 if (HCC_PGM_FRAMELISTLEN(hcc_params
)) {
493 /* periodic schedule size can be smaller than default */
494 switch (EHCI_TUNE_FLS
) {
495 case 0: ehci
->periodic_size
= 1024; break;
496 case 1: ehci
->periodic_size
= 512; break;
497 case 2: ehci
->periodic_size
= 256; break;
501 if ((retval
= ehci_mem_init(ehci
, GFP_KERNEL
)) < 0)
504 /* controllers may cache some of the periodic schedule ... */
505 if (HCC_ISOC_CACHE(hcc_params
)) // full frame cache
507 else // N microframes cached
508 ehci
->i_thresh
= 2 + HCC_ISOC_THRES(hcc_params
);
511 * dedicate a qh for the async ring head, since we couldn't unlink
512 * a 'real' qh without stopping the async schedule [4.8]. use it
513 * as the 'reclamation list head' too.
514 * its dummy is used in hw_alt_next of many tds, to prevent the qh
515 * from automatically advancing to the next td after short reads.
517 ehci
->async
->qh_next
.qh
= NULL
;
518 hw
= ehci
->async
->hw
;
519 hw
->hw_next
= QH_NEXT(ehci
, ehci
->async
->qh_dma
);
520 hw
->hw_info1
= cpu_to_hc32(ehci
, QH_HEAD
);
521 #if defined(CONFIG_PPC_PS3)
522 hw
->hw_info1
|= cpu_to_hc32(ehci
, QH_INACTIVATE
);
524 hw
->hw_token
= cpu_to_hc32(ehci
, QTD_STS_HALT
);
525 hw
->hw_qtd_next
= EHCI_LIST_END(ehci
);
526 ehci
->async
->qh_state
= QH_STATE_LINKED
;
527 hw
->hw_alt_next
= QTD_NEXT(ehci
, ehci
->async
->dummy
->qtd_dma
);
529 /* clear interrupt enables, set irq latency */
530 if (log2_irq_thresh
< 0 || log2_irq_thresh
> 6)
532 temp
= 1 << (16 + log2_irq_thresh
);
533 if (HCC_PER_PORT_CHANGE_EVENT(hcc_params
)) {
535 ehci_dbg(ehci
, "enable per-port change event\n");
538 if (HCC_CANPARK(hcc_params
)) {
539 /* HW default park == 3, on hardware that supports it (like
540 * NVidia and ALI silicon), maximizes throughput on the async
541 * schedule by avoiding QH fetches between transfers.
543 * With fast usb storage devices and NForce2, "park" seems to
544 * make problems: throughput reduction (!), data errors...
547 park
= min(park
, (unsigned) 3);
551 ehci_dbg(ehci
, "park %d\n", park
);
553 if (HCC_PGM_FRAMELISTLEN(hcc_params
)) {
554 /* periodic schedule size can be smaller than default */
556 temp
|= (EHCI_TUNE_FLS
<< 2);
558 ehci
->command
= temp
;
560 /* Accept arbitrarily long scatter-gather lists */
561 if (!(hcd
->driver
->flags
& HCD_LOCAL_MEM
))
562 hcd
->self
.sg_tablesize
= ~0;
566 /* start HC running; it's halted, ehci_init() has been run (once) */
567 static int ehci_run (struct usb_hcd
*hcd
)
569 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
573 hcd
->uses_new_polling
= 1;
575 /* EHCI spec section 4.1 */
577 ehci_writel(ehci
, ehci
->periodic_dma
, &ehci
->regs
->frame_list
);
578 ehci_writel(ehci
, (u32
)ehci
->async
->qh_dma
, &ehci
->regs
->async_next
);
581 * hcc_params controls whether ehci->regs->segment must (!!!)
582 * be used; it constrains QH/ITD/SITD and QTD locations.
583 * pci_pool consistent memory always uses segment zero.
584 * streaming mappings for I/O buffers, like pci_map_single(),
585 * can return segments above 4GB, if the device allows.
587 * NOTE: the dma mask is visible through dma_supported(), so
588 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
589 * Scsi_Host.highmem_io, and so forth. It's readonly to all
590 * host side drivers though.
592 hcc_params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
593 if (HCC_64BIT_ADDR(hcc_params
)) {
594 ehci_writel(ehci
, 0, &ehci
->regs
->segment
);
596 // this is deeply broken on almost all architectures
597 if (!dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64)))
598 ehci_info(ehci
, "enabled 64bit DMA\n");
603 // Philips, Intel, and maybe others need CMD_RUN before the
604 // root hub will detect new devices (why?); NEC doesn't
605 ehci
->command
&= ~(CMD_LRESET
|CMD_IAAD
|CMD_PSE
|CMD_ASE
|CMD_RESET
);
606 ehci
->command
|= CMD_RUN
;
607 ehci_writel(ehci
, ehci
->command
, &ehci
->regs
->command
);
608 dbg_cmd (ehci
, "init", ehci
->command
);
611 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
612 * are explicitly handed to companion controller(s), so no TT is
613 * involved with the root hub. (Except where one is integrated,
614 * and there's no companion controller unless maybe for USB OTG.)
616 * Turning on the CF flag will transfer ownership of all ports
617 * from the companions to the EHCI controller. If any of the
618 * companions are in the middle of a port reset at the time, it
619 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
620 * guarantees that no resets are in progress. After we set CF,
621 * a short delay lets the hardware catch up; new resets shouldn't
622 * be started before the port switching actions could complete.
624 down_write(&ehci_cf_port_reset_rwsem
);
625 ehci
->rh_state
= EHCI_RH_RUNNING
;
626 ehci_writel(ehci
, FLAG_CF
, &ehci
->regs
->configured_flag
);
627 ehci_readl(ehci
, &ehci
->regs
->command
); /* unblock posted writes */
629 up_write(&ehci_cf_port_reset_rwsem
);
630 ehci
->last_periodic_enable
= ktime_get_real();
632 temp
= HC_VERSION(ehci
, ehci_readl(ehci
, &ehci
->caps
->hc_capbase
));
634 "USB %x.%x started, EHCI %x.%02x%s\n",
635 ((ehci
->sbrn
& 0xf0)>>4), (ehci
->sbrn
& 0x0f),
636 temp
>> 8, temp
& 0xff,
637 ignore_oc
? ", overcurrent ignored" : "");
639 ehci_writel(ehci
, INTR_MASK
,
640 &ehci
->regs
->intr_enable
); /* Turn On Interrupts */
642 /* GRR this is run-once init(), being done every time the HC starts.
643 * So long as they're part of class devices, we can't do it init()
644 * since the class device isn't created that early.
646 create_debug_files(ehci
);
647 create_sysfs_files(ehci
);
652 int ehci_setup(struct usb_hcd
*hcd
)
654 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
657 ehci
->regs
= (void __iomem
*)ehci
->caps
+
658 HC_LENGTH(ehci
, ehci_readl(ehci
, &ehci
->caps
->hc_capbase
));
659 dbg_hcs_params(ehci
, "reset");
660 dbg_hcc_params(ehci
, "reset");
662 /* cache this readonly data; minimize chip reads */
663 ehci
->hcs_params
= ehci_readl(ehci
, &ehci
->caps
->hcs_params
);
665 ehci
->sbrn
= HCD_USB2
;
667 /* data structure init */
668 retval
= ehci_init(hcd
);
672 retval
= ehci_halt(ehci
);
680 EXPORT_SYMBOL_GPL(ehci_setup
);
682 /*-------------------------------------------------------------------------*/
684 static irqreturn_t
ehci_irq (struct usb_hcd
*hcd
)
686 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
687 u32 status
, masked_status
, pcd_status
= 0, cmd
;
690 spin_lock (&ehci
->lock
);
692 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
694 /* e.g. cardbus physical eject */
695 if (status
== ~(u32
) 0) {
696 ehci_dbg (ehci
, "device removed\n");
701 * We don't use STS_FLR, but some controllers don't like it to
702 * remain on, so mask it out along with the other status bits.
704 masked_status
= status
& (INTR_MASK
| STS_FLR
);
707 if (!masked_status
|| unlikely(ehci
->rh_state
== EHCI_RH_HALTED
)) {
708 spin_unlock(&ehci
->lock
);
712 /* clear (just) interrupts */
713 ehci_writel(ehci
, masked_status
, &ehci
->regs
->status
);
714 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
);
718 /* unrequested/ignored: Frame List Rollover */
719 dbg_status (ehci
, "irq", status
);
722 /* INT, ERR, and IAA interrupt rates can be throttled */
724 /* normal [4.15.1.2] or error [4.15.1.1] completion */
725 if (likely ((status
& (STS_INT
|STS_ERR
)) != 0)) {
726 if (likely ((status
& STS_ERR
) == 0))
727 COUNT (ehci
->stats
.normal
);
729 COUNT (ehci
->stats
.error
);
733 /* complete the unlinking of some qh [4.15.2.3] */
734 if (status
& STS_IAA
) {
736 /* Turn off the IAA watchdog */
737 ehci
->enabled_hrtimer_events
&= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG
);
740 * Mild optimization: Allow another IAAD to reset the
741 * hrtimer, if one occurs before the next expiration.
742 * In theory we could always cancel the hrtimer, but
743 * tests show that about half the time it will be reset
744 * for some other event anyway.
746 if (ehci
->next_hrtimer_event
== EHCI_HRTIMER_IAA_WATCHDOG
)
747 ++ehci
->next_hrtimer_event
;
749 /* guard against (alleged) silicon errata */
751 ehci_dbg(ehci
, "IAA with IAAD still set?\n");
752 if (ehci
->iaa_in_progress
)
753 COUNT(ehci
->stats
.iaa
);
754 end_unlink_async(ehci
);
757 /* remote wakeup [4.3.1] */
758 if (status
& STS_PCD
) {
759 unsigned i
= HCS_N_PORTS (ehci
->hcs_params
);
762 /* kick root hub later */
765 /* resume root hub? */
766 if (ehci
->rh_state
== EHCI_RH_SUSPENDED
)
767 usb_hcd_resume_root_hub(hcd
);
769 /* get per-port change detect bits */
776 /* leverage per-port change bits feature */
777 if (!(ppcd
& (1 << i
)))
779 pstatus
= ehci_readl(ehci
,
780 &ehci
->regs
->port_status
[i
]);
782 if (pstatus
& PORT_OWNER
)
784 if (!(test_bit(i
, &ehci
->suspended_ports
) &&
785 ((pstatus
& PORT_RESUME
) ||
786 !(pstatus
& PORT_SUSPEND
)) &&
787 (pstatus
& PORT_PE
) &&
788 ehci
->reset_done
[i
] == 0))
791 /* start 20 msec resume signaling from this port,
792 * and make khubd collect PORT_STAT_C_SUSPEND to
793 * stop that signaling. Use 5 ms extra for safety,
794 * like usb_port_resume() does.
796 ehci
->reset_done
[i
] = jiffies
+ msecs_to_jiffies(25);
797 set_bit(i
, &ehci
->resuming_ports
);
798 ehci_dbg (ehci
, "port %d remote wakeup\n", i
+ 1);
799 usb_hcd_start_port_resume(&hcd
->self
, i
);
800 mod_timer(&hcd
->rh_timer
, ehci
->reset_done
[i
]);
804 /* PCI errors [4.15.2.4] */
805 if (unlikely ((status
& STS_FATAL
) != 0)) {
806 ehci_err(ehci
, "fatal error\n");
807 dbg_cmd(ehci
, "fatal", cmd
);
808 dbg_status(ehci
, "fatal", status
);
812 /* Don't let the controller do anything more */
813 ehci
->shutdown
= true;
814 ehci
->rh_state
= EHCI_RH_STOPPING
;
815 ehci
->command
&= ~(CMD_RUN
| CMD_ASE
| CMD_PSE
);
816 ehci_writel(ehci
, ehci
->command
, &ehci
->regs
->command
);
817 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
818 ehci_handle_controller_death(ehci
);
820 /* Handle completions when the controller stops */
826 spin_unlock (&ehci
->lock
);
828 usb_hcd_poll_rh_status(hcd
);
832 /*-------------------------------------------------------------------------*/
835 * non-error returns are a promise to giveback() the urb later
836 * we drop ownership so next owner (or urb unlink) can get it
838 * urb + dev is in hcd.self.controller.urb_list
839 * we're queueing TDs onto software and hardware lists
841 * hcd-specific init for hcpriv hasn't been done yet
843 * NOTE: control, bulk, and interrupt share the same code to append TDs
844 * to a (possibly active) QH, and the same QH scanning code.
846 static int ehci_urb_enqueue (
851 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
852 struct list_head qtd_list
;
854 INIT_LIST_HEAD (&qtd_list
);
856 switch (usb_pipetype (urb
->pipe
)) {
858 /* qh_completions() code doesn't handle all the fault cases
859 * in multi-TD control transfers. Even 1KB is rare anyway.
861 if (urb
->transfer_buffer_length
> (16 * 1024))
864 /* case PIPE_BULK: */
866 if (!qh_urb_transaction (ehci
, urb
, &qtd_list
, mem_flags
))
868 return submit_async(ehci
, urb
, &qtd_list
, mem_flags
);
871 if (!qh_urb_transaction (ehci
, urb
, &qtd_list
, mem_flags
))
873 return intr_submit(ehci
, urb
, &qtd_list
, mem_flags
);
875 case PIPE_ISOCHRONOUS
:
876 if (urb
->dev
->speed
== USB_SPEED_HIGH
)
877 return itd_submit (ehci
, urb
, mem_flags
);
879 return sitd_submit (ehci
, urb
, mem_flags
);
883 /* remove from hardware lists
884 * completions normally happen asynchronously
887 static int ehci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
889 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
894 spin_lock_irqsave (&ehci
->lock
, flags
);
895 rc
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
899 if (usb_pipetype(urb
->pipe
) == PIPE_ISOCHRONOUS
) {
901 * We don't expedite dequeue for isochronous URBs.
902 * Just wait until they complete normally or their
906 qh
= (struct ehci_qh
*) urb
->hcpriv
;
908 switch (qh
->qh_state
) {
909 case QH_STATE_LINKED
:
910 if (usb_pipetype(urb
->pipe
) == PIPE_INTERRUPT
)
911 start_unlink_intr(ehci
, qh
);
913 start_unlink_async(ehci
, qh
);
915 case QH_STATE_COMPLETING
:
916 qh
->dequeue_during_giveback
= 1;
918 case QH_STATE_UNLINK
:
919 case QH_STATE_UNLINK_WAIT
:
920 /* already started */
923 /* QH might be waiting for a Clear-TT-Buffer */
924 qh_completions(ehci
, qh
);
929 spin_unlock_irqrestore (&ehci
->lock
, flags
);
933 /*-------------------------------------------------------------------------*/
935 // bulk qh holds the data toggle
938 ehci_endpoint_disable (struct usb_hcd
*hcd
, struct usb_host_endpoint
*ep
)
940 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
944 /* ASSERT: any requests/urbs are being unlinked */
945 /* ASSERT: nobody can be submitting urbs for this any more */
948 spin_lock_irqsave (&ehci
->lock
, flags
);
953 /* endpoints can be iso streams. for now, we don't
954 * accelerate iso completions ... so spin a while.
956 if (qh
->hw
== NULL
) {
957 struct ehci_iso_stream
*stream
= ep
->hcpriv
;
959 if (!list_empty(&stream
->td_list
))
962 /* BUG_ON(!list_empty(&stream->free_list)); */
963 reserve_release_iso_bandwidth(ehci
, stream
, -1);
969 if (ehci
->rh_state
< EHCI_RH_RUNNING
)
970 qh
->qh_state
= QH_STATE_IDLE
;
971 switch (qh
->qh_state
) {
972 case QH_STATE_LINKED
:
973 WARN_ON(!list_empty(&qh
->qtd_list
));
974 if (usb_endpoint_type(&ep
->desc
) != USB_ENDPOINT_XFER_INT
)
975 start_unlink_async(ehci
, qh
);
977 start_unlink_intr(ehci
, qh
);
979 case QH_STATE_COMPLETING
: /* already in unlinking */
980 case QH_STATE_UNLINK
: /* wait for hw to finish? */
981 case QH_STATE_UNLINK_WAIT
:
983 spin_unlock_irqrestore (&ehci
->lock
, flags
);
984 schedule_timeout_uninterruptible(1);
986 case QH_STATE_IDLE
: /* fully unlinked */
989 if (list_empty (&qh
->qtd_list
)) {
990 if (qh
->ps
.bw_uperiod
)
991 reserve_release_intr_bandwidth(ehci
, qh
, -1);
992 qh_destroy(ehci
, qh
);
995 /* else FALL THROUGH */
997 /* caller was supposed to have unlinked any requests;
998 * that's not our job. just leak this memory.
1000 ehci_err (ehci
, "qh %p (#%02x) state %d%s\n",
1001 qh
, ep
->desc
.bEndpointAddress
, qh
->qh_state
,
1002 list_empty (&qh
->qtd_list
) ? "" : "(has tds)");
1007 spin_unlock_irqrestore (&ehci
->lock
, flags
);
1011 ehci_endpoint_reset(struct usb_hcd
*hcd
, struct usb_host_endpoint
*ep
)
1013 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
1015 int eptype
= usb_endpoint_type(&ep
->desc
);
1016 int epnum
= usb_endpoint_num(&ep
->desc
);
1017 int is_out
= usb_endpoint_dir_out(&ep
->desc
);
1018 unsigned long flags
;
1020 if (eptype
!= USB_ENDPOINT_XFER_BULK
&& eptype
!= USB_ENDPOINT_XFER_INT
)
1023 spin_lock_irqsave(&ehci
->lock
, flags
);
1026 /* For Bulk and Interrupt endpoints we maintain the toggle state
1027 * in the hardware; the toggle bits in udev aren't used at all.
1028 * When an endpoint is reset by usb_clear_halt() we must reset
1029 * the toggle bit in the QH.
1032 if (!list_empty(&qh
->qtd_list
)) {
1033 WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1035 /* The toggle value in the QH can't be updated
1036 * while the QH is active. Unlink it now;
1037 * re-linking will call qh_refresh().
1039 usb_settoggle(qh
->ps
.udev
, epnum
, is_out
, 0);
1041 if (eptype
== USB_ENDPOINT_XFER_BULK
)
1042 start_unlink_async(ehci
, qh
);
1044 start_unlink_intr(ehci
, qh
);
1047 spin_unlock_irqrestore(&ehci
->lock
, flags
);
1050 static int ehci_get_frame (struct usb_hcd
*hcd
)
1052 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
1053 return (ehci_read_frame_index(ehci
) >> 3) % ehci
->periodic_size
;
1056 /*-------------------------------------------------------------------------*/
1058 /* Device addition and removal */
1060 static void ehci_remove_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
1062 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
1064 spin_lock_irq(&ehci
->lock
);
1066 spin_unlock_irq(&ehci
->lock
);
1069 /*-------------------------------------------------------------------------*/
1073 /* suspend/resume, section 4.3 */
1075 /* These routines handle the generic parts of controller suspend/resume */
1077 int ehci_suspend(struct usb_hcd
*hcd
, bool do_wakeup
)
1079 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
1081 if (time_before(jiffies
, ehci
->next_statechange
))
1085 * Root hub was already suspended. Disable IRQ emission and
1086 * mark HW unaccessible. The PM and USB cores make sure that
1087 * the root hub is either suspended or stopped.
1089 ehci_prepare_ports_for_controller_suspend(ehci
, do_wakeup
);
1091 spin_lock_irq(&ehci
->lock
);
1092 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
1093 (void) ehci_readl(ehci
, &ehci
->regs
->intr_enable
);
1095 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
1096 spin_unlock_irq(&ehci
->lock
);
1098 synchronize_irq(hcd
->irq
);
1100 /* Check for race with a wakeup request */
1101 if (do_wakeup
&& HCD_WAKEUP_PENDING(hcd
)) {
1102 ehci_resume(hcd
, false);
1108 EXPORT_SYMBOL_GPL(ehci_suspend
);
1110 /* Returns 0 if power was preserved, 1 if power was lost */
1111 int ehci_resume(struct usb_hcd
*hcd
, bool hibernated
)
1113 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
1115 if (time_before(jiffies
, ehci
->next_statechange
))
1118 /* Mark hardware accessible again as we are back to full power by now */
1119 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
1122 return 0; /* Controller is dead */
1125 * If CF is still set and we aren't resuming from hibernation
1126 * then we maintained suspend power.
1127 * Just undo the effect of ehci_suspend().
1129 if (ehci_readl(ehci
, &ehci
->regs
->configured_flag
) == FLAG_CF
&&
1131 int mask
= INTR_MASK
;
1133 ehci_prepare_ports_for_controller_resume(ehci
);
1135 spin_lock_irq(&ehci
->lock
);
1139 if (!hcd
->self
.root_hub
->do_remote_wakeup
)
1141 ehci_writel(ehci
, mask
, &ehci
->regs
->intr_enable
);
1142 ehci_readl(ehci
, &ehci
->regs
->intr_enable
);
1144 spin_unlock_irq(&ehci
->lock
);
1149 * Else reset, to cope with power loss or resume from hibernation
1150 * having let the firmware kick in during reboot.
1152 usb_root_hub_lost_power(hcd
->self
.root_hub
);
1153 (void) ehci_halt(ehci
);
1154 (void) ehci_reset(ehci
);
1156 spin_lock_irq(&ehci
->lock
);
1160 ehci_writel(ehci
, ehci
->command
, &ehci
->regs
->command
);
1161 ehci_writel(ehci
, FLAG_CF
, &ehci
->regs
->configured_flag
);
1162 ehci_readl(ehci
, &ehci
->regs
->command
); /* unblock posted writes */
1164 ehci
->rh_state
= EHCI_RH_SUSPENDED
;
1165 spin_unlock_irq(&ehci
->lock
);
1169 EXPORT_SYMBOL_GPL(ehci_resume
);
1173 /*-------------------------------------------------------------------------*/
1176 * Generic structure: This gets copied for platform drivers so that
1177 * individual entries can be overridden as needed.
1180 static const struct hc_driver ehci_hc_driver
= {
1181 .description
= hcd_name
,
1182 .product_desc
= "EHCI Host Controller",
1183 .hcd_priv_size
= sizeof(struct ehci_hcd
),
1186 * generic hardware linkage
1189 .flags
= HCD_MEMORY
| HCD_USB2
| HCD_BH
,
1192 * basic lifecycle operations
1194 .reset
= ehci_setup
,
1197 .shutdown
= ehci_shutdown
,
1200 * managing i/o requests and associated device resources
1202 .urb_enqueue
= ehci_urb_enqueue
,
1203 .urb_dequeue
= ehci_urb_dequeue
,
1204 .endpoint_disable
= ehci_endpoint_disable
,
1205 .endpoint_reset
= ehci_endpoint_reset
,
1206 .clear_tt_buffer_complete
= ehci_clear_tt_buffer_complete
,
1209 * scheduling support
1211 .get_frame_number
= ehci_get_frame
,
1216 .hub_status_data
= ehci_hub_status_data
,
1217 .hub_control
= ehci_hub_control
,
1218 .bus_suspend
= ehci_bus_suspend
,
1219 .bus_resume
= ehci_bus_resume
,
1220 .relinquish_port
= ehci_relinquish_port
,
1221 .port_handed_over
= ehci_port_handed_over
,
1226 .free_dev
= ehci_remove_device
,
1229 void ehci_init_driver(struct hc_driver
*drv
,
1230 const struct ehci_driver_overrides
*over
)
1232 /* Copy the generic table to drv and then apply the overrides */
1233 *drv
= ehci_hc_driver
;
1236 drv
->hcd_priv_size
+= over
->extra_priv_size
;
1238 drv
->reset
= over
->reset
;
1241 EXPORT_SYMBOL_GPL(ehci_init_driver
);
1243 /*-------------------------------------------------------------------------*/
1245 MODULE_DESCRIPTION(DRIVER_DESC
);
1246 MODULE_AUTHOR (DRIVER_AUTHOR
);
1247 MODULE_LICENSE ("GPL");
1249 #ifdef CONFIG_USB_EHCI_FSL
1250 #include "ehci-fsl.c"
1251 #define PLATFORM_DRIVER ehci_fsl_driver
1254 #ifdef CONFIG_USB_EHCI_SH
1255 #include "ehci-sh.c"
1256 #define PLATFORM_DRIVER ehci_hcd_sh_driver
1259 #ifdef CONFIG_PPC_PS3
1260 #include "ehci-ps3.c"
1261 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1264 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1265 #include "ehci-ppc-of.c"
1266 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1269 #ifdef CONFIG_XPS_USB_HCD_XILINX
1270 #include "ehci-xilinx-of.c"
1271 #define XILINX_OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver
1274 #ifdef CONFIG_USB_OCTEON_EHCI
1275 #include "ehci-octeon.c"
1276 #define PLATFORM_DRIVER ehci_octeon_driver
1279 #ifdef CONFIG_TILE_USB
1280 #include "ehci-tilegx.c"
1281 #define PLATFORM_DRIVER ehci_hcd_tilegx_driver
1284 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1285 #include "ehci-pmcmsp.c"
1286 #define PLATFORM_DRIVER ehci_hcd_msp_driver
1289 #ifdef CONFIG_SPARC_LEON
1290 #include "ehci-grlib.c"
1291 #define PLATFORM_DRIVER ehci_grlib_driver
1294 #ifdef CONFIG_USB_EHCI_MV
1295 #include "ehci-mv.c"
1296 #define PLATFORM_DRIVER ehci_mv_driver
1299 #ifdef CONFIG_MIPS_SEAD3
1300 #include "ehci-sead3.c"
1301 #define PLATFORM_DRIVER ehci_hcd_sead3_driver
1304 static int __init
ehci_hcd_init(void)
1311 printk(KERN_INFO
"%s: " DRIVER_DESC
"\n", hcd_name
);
1312 set_bit(USB_EHCI_LOADED
, &usb_hcds_loaded
);
1313 if (test_bit(USB_UHCI_LOADED
, &usb_hcds_loaded
) ||
1314 test_bit(USB_OHCI_LOADED
, &usb_hcds_loaded
))
1315 printk(KERN_WARNING
"Warning! ehci_hcd should always be loaded"
1316 " before uhci_hcd and ohci_hcd, not after\n");
1318 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1320 sizeof(struct ehci_qh
), sizeof(struct ehci_qtd
),
1321 sizeof(struct ehci_itd
), sizeof(struct ehci_sitd
));
1323 #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
1324 ehci_debug_root
= debugfs_create_dir("ehci", usb_debug_root
);
1325 if (!ehci_debug_root
) {
1331 #ifdef PLATFORM_DRIVER
1332 retval
= platform_driver_register(&PLATFORM_DRIVER
);
1337 #ifdef PS3_SYSTEM_BUS_DRIVER
1338 retval
= ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER
);
1343 #ifdef OF_PLATFORM_DRIVER
1344 retval
= platform_driver_register(&OF_PLATFORM_DRIVER
);
1349 #ifdef XILINX_OF_PLATFORM_DRIVER
1350 retval
= platform_driver_register(&XILINX_OF_PLATFORM_DRIVER
);
1356 #ifdef XILINX_OF_PLATFORM_DRIVER
1357 /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1360 #ifdef OF_PLATFORM_DRIVER
1361 platform_driver_unregister(&OF_PLATFORM_DRIVER
);
1364 #ifdef PS3_SYSTEM_BUS_DRIVER
1365 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1368 #ifdef PLATFORM_DRIVER
1369 platform_driver_unregister(&PLATFORM_DRIVER
);
1372 #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
1373 debugfs_remove(ehci_debug_root
);
1374 ehci_debug_root
= NULL
;
1377 clear_bit(USB_EHCI_LOADED
, &usb_hcds_loaded
);
1380 module_init(ehci_hcd_init
);
1382 static void __exit
ehci_hcd_cleanup(void)
1384 #ifdef XILINX_OF_PLATFORM_DRIVER
1385 platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER
);
1387 #ifdef OF_PLATFORM_DRIVER
1388 platform_driver_unregister(&OF_PLATFORM_DRIVER
);
1390 #ifdef PLATFORM_DRIVER
1391 platform_driver_unregister(&PLATFORM_DRIVER
);
1393 #ifdef PS3_SYSTEM_BUS_DRIVER
1394 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1396 #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
1397 debugfs_remove(ehci_debug_root
);
1399 clear_bit(USB_EHCI_LOADED
, &usb_hcds_loaded
);
1401 module_exit(ehci_hcd_cleanup
);