2 * Handles the Intel 27x USB Device Controller (UDC)
4 * Inspired by original driver by Frank Becker, David Brownell, and others.
5 * Copyright (C) 2008 Robert Jarzmik
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/errno.h>
16 #include <linux/err.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/list.h>
20 #include <linux/interrupt.h>
21 #include <linux/proc_fs.h>
22 #include <linux/clk.h>
23 #include <linux/irq.h>
24 #include <linux/gpio.h>
25 #include <linux/slab.h>
26 #include <linux/prefetch.h>
27 #include <linux/byteorder/generic.h>
28 #include <linux/platform_data/pxa2xx_udc.h>
30 #include <linux/usb.h>
31 #include <linux/usb/ch9.h>
32 #include <linux/usb/gadget.h>
34 #include "pxa27x_udc.h"
37 * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
40 * Such controller drivers work with a gadget driver. The gadget driver
41 * returns descriptors, implements configuration and data protocols used
42 * by the host to interact with this device, and allocates endpoints to
43 * the different protocol interfaces. The controller driver virtualizes
44 * usb hardware so that the gadget drivers will be more portable.
46 * This UDC hardware wants to implement a bit too much USB protocol. The
47 * biggest issues are: that the endpoints have to be set up before the
48 * controller can be enabled (minor, and not uncommon); and each endpoint
49 * can only have one configuration, interface and alternative interface
50 * number (major, and very unusual). Once set up, these cannot be changed
51 * without a controller reset.
53 * The workaround is to setup all combinations necessary for the gadgets which
54 * will work with this driver. This is done in pxa_udc structure, statically.
55 * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
56 * (You could modify this if needed. Some drivers have a "fifo_mode" module
57 * parameter to facilitate such changes.)
59 * The combinations have been tested with these gadgets :
61 * - file storage gadget
64 * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
65 * made of UDC's double buffering either. USB "On-The-Go" is not implemented.
67 * All the requests are handled the same way :
68 * - the drivers tries to handle the request directly to the IO
69 * - if the IO fifo is not big enough, the remaining is send/received in
73 #define DRIVER_VERSION "2008-04-18"
74 #define DRIVER_DESC "PXA 27x USB Device Controller driver"
76 static const char driver_name
[] = "pxa27x_udc";
77 static struct pxa_udc
*the_controller
;
79 static void handle_ep(struct pxa_ep
*ep
);
84 #ifdef CONFIG_USB_GADGET_DEBUG_FS
86 #include <linux/debugfs.h>
87 #include <linux/uaccess.h>
88 #include <linux/seq_file.h>
90 static int state_dbg_show(struct seq_file
*s
, void *p
)
92 struct pxa_udc
*udc
= s
->private;
100 /* basic device status */
101 pos
+= seq_printf(s
, DRIVER_DESC
"\n"
102 "%s version: %s\nGadget driver: %s\n",
103 driver_name
, DRIVER_VERSION
,
104 udc
->driver
? udc
->driver
->driver
.name
: "(none)");
106 tmp
= udc_readl(udc
, UDCCR
);
108 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
109 "con=%d,inter=%d,altinter=%d\n", tmp
,
110 (tmp
& UDCCR_OEN
) ? " oen":"",
111 (tmp
& UDCCR_AALTHNP
) ? " aalthnp":"",
112 (tmp
& UDCCR_AHNP
) ? " rem" : "",
113 (tmp
& UDCCR_BHNP
) ? " rstir" : "",
114 (tmp
& UDCCR_DWRE
) ? " dwre" : "",
115 (tmp
& UDCCR_SMAC
) ? " smac" : "",
116 (tmp
& UDCCR_EMCE
) ? " emce" : "",
117 (tmp
& UDCCR_UDR
) ? " udr" : "",
118 (tmp
& UDCCR_UDA
) ? " uda" : "",
119 (tmp
& UDCCR_UDE
) ? " ude" : "",
120 (tmp
& UDCCR_ACN
) >> UDCCR_ACN_S
,
121 (tmp
& UDCCR_AIN
) >> UDCCR_AIN_S
,
122 (tmp
& UDCCR_AAISN
) >> UDCCR_AAISN_S
);
123 /* registers for device and ep0 */
124 pos
+= seq_printf(s
, "udcicr0=0x%08x udcicr1=0x%08x\n",
125 udc_readl(udc
, UDCICR0
), udc_readl(udc
, UDCICR1
));
126 pos
+= seq_printf(s
, "udcisr0=0x%08x udcisr1=0x%08x\n",
127 udc_readl(udc
, UDCISR0
), udc_readl(udc
, UDCISR1
));
128 pos
+= seq_printf(s
, "udcfnr=%d\n", udc_readl(udc
, UDCFNR
));
129 pos
+= seq_printf(s
, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
131 udc
->stats
.irqs_reset
, udc
->stats
.irqs_suspend
,
132 udc
->stats
.irqs_resume
, udc
->stats
.irqs_reconfig
);
139 static int queues_dbg_show(struct seq_file
*s
, void *p
)
141 struct pxa_udc
*udc
= s
->private;
143 struct pxa27x_request
*req
;
144 int pos
= 0, i
, maxpkt
, ret
;
150 /* dump endpoint queues */
151 for (i
= 0; i
< NR_PXA_ENDPOINTS
; i
++) {
152 ep
= &udc
->pxa_ep
[i
];
153 maxpkt
= ep
->fifo_size
;
154 pos
+= seq_printf(s
, "%-12s max_pkt=%d %s\n",
155 EPNAME(ep
), maxpkt
, "pio");
157 if (list_empty(&ep
->queue
)) {
158 pos
+= seq_printf(s
, "\t(nothing queued)\n");
162 list_for_each_entry(req
, &ep
->queue
, queue
) {
163 pos
+= seq_printf(s
, "\treq %p len %d/%d buf %p\n",
164 &req
->req
, req
->req
.actual
,
165 req
->req
.length
, req
->req
.buf
);
174 static int eps_dbg_show(struct seq_file
*s
, void *p
)
176 struct pxa_udc
*udc
= s
->private;
185 ep
= &udc
->pxa_ep
[0];
186 tmp
= udc_ep_readl(ep
, UDCCSR
);
187 pos
+= seq_printf(s
, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp
,
188 (tmp
& UDCCSR0_SA
) ? " sa" : "",
189 (tmp
& UDCCSR0_RNE
) ? " rne" : "",
190 (tmp
& UDCCSR0_FST
) ? " fst" : "",
191 (tmp
& UDCCSR0_SST
) ? " sst" : "",
192 (tmp
& UDCCSR0_DME
) ? " dme" : "",
193 (tmp
& UDCCSR0_IPR
) ? " ipr" : "",
194 (tmp
& UDCCSR0_OPC
) ? " opc" : "");
195 for (i
= 0; i
< NR_PXA_ENDPOINTS
; i
++) {
196 ep
= &udc
->pxa_ep
[i
];
197 tmp
= i
? udc_ep_readl(ep
, UDCCR
) : udc_readl(udc
, UDCCR
);
198 pos
+= seq_printf(s
, "%-12s: "
199 "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
200 "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
203 ep
->stats
.in_bytes
, ep
->stats
.in_ops
,
204 ep
->stats
.out_bytes
, ep
->stats
.out_ops
,
206 tmp
, udc_ep_readl(ep
, UDCCSR
),
207 udc_ep_readl(ep
, UDCBCR
));
215 static int eps_dbg_open(struct inode
*inode
, struct file
*file
)
217 return single_open(file
, eps_dbg_show
, inode
->i_private
);
220 static int queues_dbg_open(struct inode
*inode
, struct file
*file
)
222 return single_open(file
, queues_dbg_show
, inode
->i_private
);
225 static int state_dbg_open(struct inode
*inode
, struct file
*file
)
227 return single_open(file
, state_dbg_show
, inode
->i_private
);
230 static const struct file_operations state_dbg_fops
= {
231 .owner
= THIS_MODULE
,
232 .open
= state_dbg_open
,
235 .release
= single_release
,
238 static const struct file_operations queues_dbg_fops
= {
239 .owner
= THIS_MODULE
,
240 .open
= queues_dbg_open
,
243 .release
= single_release
,
246 static const struct file_operations eps_dbg_fops
= {
247 .owner
= THIS_MODULE
,
248 .open
= eps_dbg_open
,
251 .release
= single_release
,
254 static void pxa_init_debugfs(struct pxa_udc
*udc
)
256 struct dentry
*root
, *state
, *queues
, *eps
;
258 root
= debugfs_create_dir(udc
->gadget
.name
, NULL
);
259 if (IS_ERR(root
) || !root
)
262 state
= debugfs_create_file("udcstate", 0400, root
, udc
,
266 queues
= debugfs_create_file("queues", 0400, root
, udc
,
270 eps
= debugfs_create_file("epstate", 0400, root
, udc
,
275 udc
->debugfs_root
= root
;
276 udc
->debugfs_state
= state
;
277 udc
->debugfs_queues
= queues
;
278 udc
->debugfs_eps
= eps
;
283 debugfs_remove(queues
);
285 debugfs_remove(root
);
287 dev_err(udc
->dev
, "debugfs is not available\n");
290 static void pxa_cleanup_debugfs(struct pxa_udc
*udc
)
292 debugfs_remove(udc
->debugfs_eps
);
293 debugfs_remove(udc
->debugfs_queues
);
294 debugfs_remove(udc
->debugfs_state
);
295 debugfs_remove(udc
->debugfs_root
);
296 udc
->debugfs_eps
= NULL
;
297 udc
->debugfs_queues
= NULL
;
298 udc
->debugfs_state
= NULL
;
299 udc
->debugfs_root
= NULL
;
303 static inline void pxa_init_debugfs(struct pxa_udc
*udc
)
307 static inline void pxa_cleanup_debugfs(struct pxa_udc
*udc
)
313 * is_match_usb_pxa - check if usb_ep and pxa_ep match
314 * @udc_usb_ep: usb endpoint
316 * @config: configuration required in pxa_ep
317 * @interface: interface required in pxa_ep
318 * @altsetting: altsetting required in pxa_ep
320 * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
322 static int is_match_usb_pxa(struct udc_usb_ep
*udc_usb_ep
, struct pxa_ep
*ep
,
323 int config
, int interface
, int altsetting
)
325 if (usb_endpoint_num(&udc_usb_ep
->desc
) != ep
->addr
)
327 if (usb_endpoint_dir_in(&udc_usb_ep
->desc
) != ep
->dir_in
)
329 if (usb_endpoint_type(&udc_usb_ep
->desc
) != ep
->type
)
331 if ((ep
->config
!= config
) || (ep
->interface
!= interface
)
332 || (ep
->alternate
!= altsetting
))
338 * find_pxa_ep - find pxa_ep structure matching udc_usb_ep
340 * @udc_usb_ep: udc_usb_ep structure
342 * Match udc_usb_ep and all pxa_ep available, to see if one matches.
343 * This is necessary because of the strong pxa hardware restriction requiring
344 * that once pxa endpoints are initialized, their configuration is freezed, and
345 * no change can be made to their address, direction, or in which configuration,
346 * interface or altsetting they are active ... which differs from more usual
347 * models which have endpoints be roughly just addressable fifos, and leave
348 * configuration events up to gadget drivers (like all control messages).
350 * Note that there is still a blurred point here :
351 * - we rely on UDCCR register "active interface" and "active altsetting".
352 * This is a nonsense in regard of USB spec, where multiple interfaces are
353 * active at the same time.
354 * - if we knew for sure that the pxa can handle multiple interface at the
355 * same time, assuming Intel's Developer Guide is wrong, this function
356 * should be reviewed, and a cache of couples (iface, altsetting) should
357 * be kept in the pxa_udc structure. In this case this function would match
358 * against the cache of couples instead of the "last altsetting" set up.
360 * Returns the matched pxa_ep structure or NULL if none found
362 static struct pxa_ep
*find_pxa_ep(struct pxa_udc
*udc
,
363 struct udc_usb_ep
*udc_usb_ep
)
367 int cfg
= udc
->config
;
368 int iface
= udc
->last_interface
;
369 int alt
= udc
->last_alternate
;
371 if (udc_usb_ep
== &udc
->udc_usb_ep
[0])
372 return &udc
->pxa_ep
[0];
374 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++) {
375 ep
= &udc
->pxa_ep
[i
];
376 if (is_match_usb_pxa(udc_usb_ep
, ep
, cfg
, iface
, alt
))
383 * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
386 * Context: in_interrupt()
388 * Updates all pxa_ep fields in udc_usb_ep structures, if this field was
389 * previously set up (and is not NULL). The update is necessary is a
390 * configuration change or altsetting change was issued by the USB host.
392 static void update_pxa_ep_matches(struct pxa_udc
*udc
)
395 struct udc_usb_ep
*udc_usb_ep
;
397 for (i
= 1; i
< NR_USB_ENDPOINTS
; i
++) {
398 udc_usb_ep
= &udc
->udc_usb_ep
[i
];
399 if (udc_usb_ep
->pxa_ep
)
400 udc_usb_ep
->pxa_ep
= find_pxa_ep(udc
, udc_usb_ep
);
405 * pio_irq_enable - Enables irq generation for one endpoint
408 static void pio_irq_enable(struct pxa_ep
*ep
)
410 struct pxa_udc
*udc
= ep
->dev
;
411 int index
= EPIDX(ep
);
412 u32 udcicr0
= udc_readl(udc
, UDCICR0
);
413 u32 udcicr1
= udc_readl(udc
, UDCICR1
);
416 udc_writel(udc
, UDCICR0
, udcicr0
| (3 << (index
* 2)));
418 udc_writel(udc
, UDCICR1
, udcicr1
| (3 << ((index
- 16) * 2)));
422 * pio_irq_disable - Disables irq generation for one endpoint
425 static void pio_irq_disable(struct pxa_ep
*ep
)
427 struct pxa_udc
*udc
= ep
->dev
;
428 int index
= EPIDX(ep
);
429 u32 udcicr0
= udc_readl(udc
, UDCICR0
);
430 u32 udcicr1
= udc_readl(udc
, UDCICR1
);
433 udc_writel(udc
, UDCICR0
, udcicr0
& ~(3 << (index
* 2)));
435 udc_writel(udc
, UDCICR1
, udcicr1
& ~(3 << ((index
- 16) * 2)));
439 * udc_set_mask_UDCCR - set bits in UDCCR
441 * @mask: bits to set in UDCCR
443 * Sets bits in UDCCR, leaving DME and FST bits as they were.
445 static inline void udc_set_mask_UDCCR(struct pxa_udc
*udc
, int mask
)
447 u32 udccr
= udc_readl(udc
, UDCCR
);
448 udc_writel(udc
, UDCCR
,
449 (udccr
& UDCCR_MASK_BITS
) | (mask
& UDCCR_MASK_BITS
));
453 * udc_clear_mask_UDCCR - clears bits in UDCCR
455 * @mask: bit to clear in UDCCR
457 * Clears bits in UDCCR, leaving DME and FST bits as they were.
459 static inline void udc_clear_mask_UDCCR(struct pxa_udc
*udc
, int mask
)
461 u32 udccr
= udc_readl(udc
, UDCCR
);
462 udc_writel(udc
, UDCCR
,
463 (udccr
& UDCCR_MASK_BITS
) & ~(mask
& UDCCR_MASK_BITS
));
467 * ep_write_UDCCSR - set bits in UDCCSR
469 * @mask: bits to set in UDCCR
471 * Sets bits in UDCCSR (UDCCSR0 and UDCCSR*).
473 * A specific case is applied to ep0 : the ACM bit is always set to 1, for
474 * SET_INTERFACE and SET_CONFIGURATION.
476 static inline void ep_write_UDCCSR(struct pxa_ep
*ep
, int mask
)
480 udc_ep_writel(ep
, UDCCSR
, mask
);
484 * ep_count_bytes_remain - get how many bytes in udc endpoint
487 * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
489 static int ep_count_bytes_remain(struct pxa_ep
*ep
)
493 return udc_ep_readl(ep
, UDCBCR
) & 0x3ff;
497 * ep_is_empty - checks if ep has byte ready for reading
500 * If endpoint is the control endpoint, checks if there are bytes in the
501 * control endpoint fifo. If endpoint is a data endpoint, checks if bytes
502 * are ready for reading on OUT endpoint.
504 * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
506 static int ep_is_empty(struct pxa_ep
*ep
)
510 if (!is_ep0(ep
) && ep
->dir_in
)
513 ret
= !(udc_ep_readl(ep
, UDCCSR
) & UDCCSR0_RNE
);
515 ret
= !(udc_ep_readl(ep
, UDCCSR
) & UDCCSR_BNE
);
520 * ep_is_full - checks if ep has place to write bytes
523 * If endpoint is not the control endpoint and is an IN endpoint, checks if
524 * there is place to write bytes into the endpoint.
526 * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
528 static int ep_is_full(struct pxa_ep
*ep
)
531 return (udc_ep_readl(ep
, UDCCSR
) & UDCCSR0_IPR
);
534 return (!(udc_ep_readl(ep
, UDCCSR
) & UDCCSR_BNF
));
538 * epout_has_pkt - checks if OUT endpoint fifo has a packet available
541 * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
543 static int epout_has_pkt(struct pxa_ep
*ep
)
545 if (!is_ep0(ep
) && ep
->dir_in
)
548 return (udc_ep_readl(ep
, UDCCSR
) & UDCCSR0_OPC
);
549 return (udc_ep_readl(ep
, UDCCSR
) & UDCCSR_PC
);
553 * set_ep0state - Set ep0 automata state
557 static void set_ep0state(struct pxa_udc
*udc
, int state
)
559 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
560 char *old_stname
= EP0_STNAME(udc
);
562 udc
->ep0state
= state
;
563 ep_dbg(ep
, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname
,
564 EP0_STNAME(udc
), udc_ep_readl(ep
, UDCCSR
),
565 udc_ep_readl(ep
, UDCBCR
));
569 * ep0_idle - Put control endpoint into idle state
572 static void ep0_idle(struct pxa_udc
*dev
)
574 set_ep0state(dev
, WAIT_FOR_SETUP
);
578 * inc_ep_stats_reqs - Update ep stats counts
579 * @ep: physical endpoint
581 * @is_in: ep direction (USB_DIR_IN or 0)
584 static void inc_ep_stats_reqs(struct pxa_ep
*ep
, int is_in
)
593 * inc_ep_stats_bytes - Update ep stats counts
594 * @ep: physical endpoint
595 * @count: bytes transferred on endpoint
596 * @is_in: ep direction (USB_DIR_IN or 0)
598 static void inc_ep_stats_bytes(struct pxa_ep
*ep
, int count
, int is_in
)
601 ep
->stats
.in_bytes
+= count
;
603 ep
->stats
.out_bytes
+= count
;
607 * pxa_ep_setup - Sets up an usb physical endpoint
608 * @ep: pxa27x physical endpoint
610 * Find the physical pxa27x ep, and setup its UDCCR
612 static void pxa_ep_setup(struct pxa_ep
*ep
)
616 new_udccr
= ((ep
->config
<< UDCCONR_CN_S
) & UDCCONR_CN
)
617 | ((ep
->interface
<< UDCCONR_IN_S
) & UDCCONR_IN
)
618 | ((ep
->alternate
<< UDCCONR_AISN_S
) & UDCCONR_AISN
)
619 | ((EPADDR(ep
) << UDCCONR_EN_S
) & UDCCONR_EN
)
620 | ((EPXFERTYPE(ep
) << UDCCONR_ET_S
) & UDCCONR_ET
)
621 | ((ep
->dir_in
) ? UDCCONR_ED
: 0)
622 | ((ep
->fifo_size
<< UDCCONR_MPS_S
) & UDCCONR_MPS
)
625 udc_ep_writel(ep
, UDCCR
, new_udccr
);
629 * pxa_eps_setup - Sets up all usb physical endpoints
632 * Setup all pxa physical endpoints, except ep0
634 static void pxa_eps_setup(struct pxa_udc
*dev
)
638 dev_dbg(dev
->dev
, "%s: dev=%p\n", __func__
, dev
);
640 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++)
641 pxa_ep_setup(&dev
->pxa_ep
[i
]);
645 * pxa_ep_alloc_request - Allocate usb request
649 * For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers
650 * must still pass correctly initialized endpoints, since other controller
651 * drivers may care about how it's currently set up (dma issues etc).
653 static struct usb_request
*
654 pxa_ep_alloc_request(struct usb_ep
*_ep
, gfp_t gfp_flags
)
656 struct pxa27x_request
*req
;
658 req
= kzalloc(sizeof *req
, gfp_flags
);
662 INIT_LIST_HEAD(&req
->queue
);
664 req
->udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
670 * pxa_ep_free_request - Free usb request
674 * Wrapper around kfree to free _req
676 static void pxa_ep_free_request(struct usb_ep
*_ep
, struct usb_request
*_req
)
678 struct pxa27x_request
*req
;
680 req
= container_of(_req
, struct pxa27x_request
, req
);
681 WARN_ON(!list_empty(&req
->queue
));
686 * ep_add_request - add a request to the endpoint's queue
690 * Context: ep->lock held
692 * Queues the request in the endpoint's queue, and enables the interrupts
695 static void ep_add_request(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
699 ep_vdbg(ep
, "req:%p, lg=%d, udccsr=0x%03x\n", req
,
700 req
->req
.length
, udc_ep_readl(ep
, UDCCSR
));
703 list_add_tail(&req
->queue
, &ep
->queue
);
708 * ep_del_request - removes a request from the endpoint's queue
712 * Context: ep->lock held
714 * Unqueue the request from the endpoint's queue. If there are no more requests
715 * on the endpoint, and if it's not the control endpoint, interrupts are
716 * disabled on the endpoint.
718 static void ep_del_request(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
722 ep_vdbg(ep
, "req:%p, lg=%d, udccsr=0x%03x\n", req
,
723 req
->req
.length
, udc_ep_readl(ep
, UDCCSR
));
725 list_del_init(&req
->queue
);
727 if (!is_ep0(ep
) && list_empty(&ep
->queue
))
732 * req_done - Complete an usb request
733 * @ep: pxa physical endpoint
735 * @status: usb request status sent to gadget API
736 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
738 * Context: ep->lock held if flags not NULL, else ep->lock released
740 * Retire a pxa27x usb request. Endpoint must be locked.
742 static void req_done(struct pxa_ep
*ep
, struct pxa27x_request
*req
, int status
,
743 unsigned long *pflags
)
747 ep_del_request(ep
, req
);
748 if (likely(req
->req
.status
== -EINPROGRESS
))
749 req
->req
.status
= status
;
751 status
= req
->req
.status
;
753 if (status
&& status
!= -ESHUTDOWN
)
754 ep_dbg(ep
, "complete req %p stat %d len %u/%u\n",
756 req
->req
.actual
, req
->req
.length
);
759 spin_unlock_irqrestore(&ep
->lock
, *pflags
);
760 local_irq_save(flags
);
761 req
->req
.complete(&req
->udc_usb_ep
->usb_ep
, &req
->req
);
762 local_irq_restore(flags
);
764 spin_lock_irqsave(&ep
->lock
, *pflags
);
768 * ep_end_out_req - Ends endpoint OUT request
769 * @ep: physical endpoint
771 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
773 * Context: ep->lock held or released (see req_done())
775 * Ends endpoint OUT request (completes usb request).
777 static void ep_end_out_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
778 unsigned long *pflags
)
780 inc_ep_stats_reqs(ep
, !USB_DIR_IN
);
781 req_done(ep
, req
, 0, pflags
);
785 * ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
786 * @ep: physical endpoint
788 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
790 * Context: ep->lock held or released (see req_done())
792 * Ends control endpoint OUT request (completes usb request), and puts
793 * control endpoint into idle state
795 static void ep0_end_out_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
796 unsigned long *pflags
)
798 set_ep0state(ep
->dev
, OUT_STATUS_STAGE
);
799 ep_end_out_req(ep
, req
, pflags
);
804 * ep_end_in_req - Ends endpoint IN request
805 * @ep: physical endpoint
807 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
809 * Context: ep->lock held or released (see req_done())
811 * Ends endpoint IN request (completes usb request).
813 static void ep_end_in_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
814 unsigned long *pflags
)
816 inc_ep_stats_reqs(ep
, USB_DIR_IN
);
817 req_done(ep
, req
, 0, pflags
);
821 * ep0_end_in_req - Ends control endpoint IN request (ends data stage)
822 * @ep: physical endpoint
824 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
826 * Context: ep->lock held or released (see req_done())
828 * Ends control endpoint IN request (completes usb request), and puts
829 * control endpoint into status state
831 static void ep0_end_in_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
832 unsigned long *pflags
)
834 set_ep0state(ep
->dev
, IN_STATUS_STAGE
);
835 ep_end_in_req(ep
, req
, pflags
);
839 * nuke - Dequeue all requests
841 * @status: usb request status
843 * Context: ep->lock released
845 * Dequeues all requests on an endpoint. As a side effect, interrupts will be
846 * disabled on that endpoint (because no more requests).
848 static void nuke(struct pxa_ep
*ep
, int status
)
850 struct pxa27x_request
*req
;
853 spin_lock_irqsave(&ep
->lock
, flags
);
854 while (!list_empty(&ep
->queue
)) {
855 req
= list_entry(ep
->queue
.next
, struct pxa27x_request
, queue
);
856 req_done(ep
, req
, status
, &flags
);
858 spin_unlock_irqrestore(&ep
->lock
, flags
);
862 * read_packet - transfer 1 packet from an OUT endpoint into request
863 * @ep: pxa physical endpoint
866 * Takes bytes from OUT endpoint and transfers them info the usb request.
867 * If there is less space in request than bytes received in OUT endpoint,
868 * bytes are left in the OUT endpoint.
870 * Returns how many bytes were actually transferred
872 static int read_packet(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
875 int bytes_ep
, bufferspace
, count
, i
;
877 bytes_ep
= ep_count_bytes_remain(ep
);
878 bufferspace
= req
->req
.length
- req
->req
.actual
;
880 buf
= (u32
*)(req
->req
.buf
+ req
->req
.actual
);
883 if (likely(!ep_is_empty(ep
)))
884 count
= min(bytes_ep
, bufferspace
);
888 for (i
= count
; i
> 0; i
-= 4)
889 *buf
++ = udc_ep_readl(ep
, UDCDR
);
890 req
->req
.actual
+= count
;
892 ep_write_UDCCSR(ep
, UDCCSR_PC
);
898 * write_packet - transfer 1 packet from request into an IN endpoint
899 * @ep: pxa physical endpoint
901 * @max: max bytes that fit into endpoint
903 * Takes bytes from usb request, and transfers them into the physical
904 * endpoint. If there are no bytes to transfer, doesn't write anything
905 * to physical endpoint.
907 * Returns how many bytes were actually transferred.
909 static int write_packet(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
912 int length
, count
, remain
, i
;
916 buf
= (u32
*)(req
->req
.buf
+ req
->req
.actual
);
919 length
= min(req
->req
.length
- req
->req
.actual
, max
);
920 req
->req
.actual
+= length
;
922 remain
= length
& 0x3;
923 count
= length
& ~(0x3);
924 for (i
= count
; i
> 0 ; i
-= 4)
925 udc_ep_writel(ep
, UDCDR
, *buf
++);
928 for (i
= remain
; i
> 0; i
--)
929 udc_ep_writeb(ep
, UDCDR
, *buf_8
++);
931 ep_vdbg(ep
, "length=%d+%d, udccsr=0x%03x\n", count
, remain
,
932 udc_ep_readl(ep
, UDCCSR
));
938 * read_fifo - Transfer packets from OUT endpoint into usb request
939 * @ep: pxa physical endpoint
942 * Context: callable when in_interrupt()
944 * Unload as many packets as possible from the fifo we use for usb OUT
945 * transfers and put them into the request. Caller should have made sure
946 * there's at least one packet ready.
947 * Doesn't complete the request, that's the caller's job
949 * Returns 1 if the request completed, 0 otherwise
951 static int read_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
953 int count
, is_short
, completed
= 0;
955 while (epout_has_pkt(ep
)) {
956 count
= read_packet(ep
, req
);
957 inc_ep_stats_bytes(ep
, count
, !USB_DIR_IN
);
959 is_short
= (count
< ep
->fifo_size
);
960 ep_dbg(ep
, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
961 udc_ep_readl(ep
, UDCCSR
), count
, is_short
? "/S" : "",
962 &req
->req
, req
->req
.actual
, req
->req
.length
);
965 if (is_short
|| req
->req
.actual
== req
->req
.length
) {
969 /* finished that packet. the next one may be waiting... */
975 * write_fifo - transfer packets from usb request into an IN endpoint
976 * @ep: pxa physical endpoint
977 * @req: pxa usb request
979 * Write to an IN endpoint fifo, as many packets as possible.
980 * irqs will use this to write the rest later.
981 * caller guarantees at least one packet buffer is ready (or a zlp).
982 * Doesn't complete the request, that's the caller's job
984 * Returns 1 if request fully transferred, 0 if partial transfer
986 static int write_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
989 int count
, is_short
, is_last
= 0, completed
= 0, totcount
= 0;
996 udccsr
= udc_ep_readl(ep
, UDCCSR
);
997 if (udccsr
& UDCCSR_PC
) {
998 ep_vdbg(ep
, "Clearing Transmit Complete, udccsr=%x\n",
1000 ep_write_UDCCSR(ep
, UDCCSR_PC
);
1002 if (udccsr
& UDCCSR_TRN
) {
1003 ep_vdbg(ep
, "Clearing Underrun on, udccsr=%x\n",
1005 ep_write_UDCCSR(ep
, UDCCSR_TRN
);
1008 count
= write_packet(ep
, req
, max
);
1009 inc_ep_stats_bytes(ep
, count
, USB_DIR_IN
);
1012 /* last packet is usually short (or a zlp) */
1013 if (unlikely(count
< max
)) {
1017 if (likely(req
->req
.length
> req
->req
.actual
)
1022 /* interrupt/iso maxpacket may not fill the fifo */
1023 is_short
= unlikely(max
< ep
->fifo_size
);
1027 ep_write_UDCCSR(ep
, UDCCSR_SP
);
1029 /* requests complete when all IN data is in the FIFO */
1034 } while (!ep_is_full(ep
));
1036 ep_dbg(ep
, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1037 totcount
, is_last
? "/L" : "", is_short
? "/S" : "",
1038 req
->req
.length
- req
->req
.actual
, &req
->req
);
1044 * read_ep0_fifo - Transfer packets from control endpoint into usb request
1045 * @ep: control endpoint
1046 * @req: pxa usb request
1048 * Special ep0 version of the above read_fifo. Reads as many bytes from control
1049 * endpoint as can be read, and stores them into usb request (limited by request
1052 * Returns 0 if usb request only partially filled, 1 if fully filled
1054 static int read_ep0_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
1056 int count
, is_short
, completed
= 0;
1058 while (epout_has_pkt(ep
)) {
1059 count
= read_packet(ep
, req
);
1060 ep_write_UDCCSR(ep
, UDCCSR0_OPC
);
1061 inc_ep_stats_bytes(ep
, count
, !USB_DIR_IN
);
1063 is_short
= (count
< ep
->fifo_size
);
1064 ep_dbg(ep
, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1065 udc_ep_readl(ep
, UDCCSR
), count
, is_short
? "/S" : "",
1066 &req
->req
, req
->req
.actual
, req
->req
.length
);
1068 if (is_short
|| req
->req
.actual
>= req
->req
.length
) {
1078 * write_ep0_fifo - Send a request to control endpoint (ep0 in)
1079 * @ep: control endpoint
1082 * Context: callable when in_interrupt()
1084 * Sends a request (or a part of the request) to the control endpoint (ep0 in).
1085 * If the request doesn't fit, the remaining part will be sent from irq.
1086 * The request is considered fully written only if either :
1087 * - last write transferred all remaining bytes, but fifo was not fully filled
1088 * - last write was a 0 length write
1090 * Returns 1 if request fully written, 0 if request only partially sent
1092 static int write_ep0_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
1095 int is_last
, is_short
;
1097 count
= write_packet(ep
, req
, EP0_FIFO_SIZE
);
1098 inc_ep_stats_bytes(ep
, count
, USB_DIR_IN
);
1100 is_short
= (count
< EP0_FIFO_SIZE
);
1101 is_last
= ((count
== 0) || (count
< EP0_FIFO_SIZE
));
1103 /* Sends either a short packet or a 0 length packet */
1104 if (unlikely(is_short
))
1105 ep_write_UDCCSR(ep
, UDCCSR0_IPR
);
1107 ep_dbg(ep
, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1108 count
, is_short
? "/S" : "", is_last
? "/L" : "",
1109 req
->req
.length
- req
->req
.actual
,
1110 &req
->req
, udc_ep_readl(ep
, UDCCSR
));
1116 * pxa_ep_queue - Queue a request into an IN endpoint
1117 * @_ep: usb endpoint
1118 * @_req: usb request
1121 * Context: normally called when !in_interrupt, but callable when in_interrupt()
1122 * in the special case of ep0 setup :
1123 * (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue)
1125 * Returns 0 if succedeed, error otherwise
1127 static int pxa_ep_queue(struct usb_ep
*_ep
, struct usb_request
*_req
,
1130 struct udc_usb_ep
*udc_usb_ep
;
1132 struct pxa27x_request
*req
;
1133 struct pxa_udc
*dev
;
1134 unsigned long flags
;
1138 int recursion_detected
;
1140 req
= container_of(_req
, struct pxa27x_request
, req
);
1141 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1143 if (unlikely(!_req
|| !_req
->complete
|| !_req
->buf
))
1149 dev
= udc_usb_ep
->dev
;
1150 ep
= udc_usb_ep
->pxa_ep
;
1155 if (unlikely(!dev
->driver
|| dev
->gadget
.speed
== USB_SPEED_UNKNOWN
)) {
1156 ep_dbg(ep
, "bogus device state\n");
1160 /* iso is always one packet per request, that's the only way
1161 * we can report per-packet status. that also helps with dma.
1163 if (unlikely(EPXFERTYPE_is_ISO(ep
)
1164 && req
->req
.length
> ep
->fifo_size
))
1167 spin_lock_irqsave(&ep
->lock
, flags
);
1168 recursion_detected
= ep
->in_handle_ep
;
1170 is_first_req
= list_empty(&ep
->queue
);
1171 ep_dbg(ep
, "queue req %p(first=%s), len %d buf %p\n",
1172 _req
, is_first_req
? "yes" : "no",
1173 _req
->length
, _req
->buf
);
1176 _req
->status
= -ESHUTDOWN
;
1182 ep_err(ep
, "refusing to queue req %p (already queued)\n", req
);
1186 length
= _req
->length
;
1187 _req
->status
= -EINPROGRESS
;
1190 ep_add_request(ep
, req
);
1191 spin_unlock_irqrestore(&ep
->lock
, flags
);
1194 switch (dev
->ep0state
) {
1195 case WAIT_ACK_SET_CONF_INTERF
:
1197 ep_end_in_req(ep
, req
, NULL
);
1199 ep_err(ep
, "got a request of %d bytes while"
1200 "in state WAIT_ACK_SET_CONF_INTERF\n",
1202 ep_del_request(ep
, req
);
1208 if (!ep_is_full(ep
))
1209 if (write_ep0_fifo(ep
, req
))
1210 ep0_end_in_req(ep
, req
, NULL
);
1212 case OUT_DATA_STAGE
:
1213 if ((length
== 0) || !epout_has_pkt(ep
))
1214 if (read_ep0_fifo(ep
, req
))
1215 ep0_end_out_req(ep
, req
, NULL
);
1218 ep_err(ep
, "odd state %s to send me a request\n",
1219 EP0_STNAME(ep
->dev
));
1220 ep_del_request(ep
, req
);
1225 if (!recursion_detected
)
1232 spin_unlock_irqrestore(&ep
->lock
, flags
);
1237 * pxa_ep_dequeue - Dequeue one request
1238 * @_ep: usb endpoint
1239 * @_req: usb request
1241 * Return 0 if no error, -EINVAL or -ECONNRESET otherwise
1243 static int pxa_ep_dequeue(struct usb_ep
*_ep
, struct usb_request
*_req
)
1246 struct udc_usb_ep
*udc_usb_ep
;
1247 struct pxa27x_request
*req
;
1248 unsigned long flags
;
1253 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1254 ep
= udc_usb_ep
->pxa_ep
;
1255 if (!ep
|| is_ep0(ep
))
1258 spin_lock_irqsave(&ep
->lock
, flags
);
1260 /* make sure it's actually queued on this endpoint */
1261 list_for_each_entry(req
, &ep
->queue
, queue
) {
1262 if (&req
->req
== _req
) {
1268 spin_unlock_irqrestore(&ep
->lock
, flags
);
1270 req_done(ep
, req
, -ECONNRESET
, NULL
);
1275 * pxa_ep_set_halt - Halts operations on one endpoint
1276 * @_ep: usb endpoint
1279 * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise
1281 static int pxa_ep_set_halt(struct usb_ep
*_ep
, int value
)
1284 struct udc_usb_ep
*udc_usb_ep
;
1285 unsigned long flags
;
1291 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1292 ep
= udc_usb_ep
->pxa_ep
;
1293 if (!ep
|| is_ep0(ep
))
1298 * This path (reset toggle+halt) is needed to implement
1299 * SET_INTERFACE on normal hardware. but it can't be
1300 * done from software on the PXA UDC, and the hardware
1301 * forgets to do it as part of SET_INTERFACE automagic.
1303 ep_dbg(ep
, "only host can clear halt\n");
1307 spin_lock_irqsave(&ep
->lock
, flags
);
1310 if (ep
->dir_in
&& (ep_is_full(ep
) || !list_empty(&ep
->queue
)))
1313 /* FST, FEF bits are the same for control and non control endpoints */
1315 ep_write_UDCCSR(ep
, UDCCSR_FST
| UDCCSR_FEF
);
1317 set_ep0state(ep
->dev
, STALL
);
1320 spin_unlock_irqrestore(&ep
->lock
, flags
);
1325 * pxa_ep_fifo_status - Get how many bytes in physical endpoint
1326 * @_ep: usb endpoint
1328 * Returns number of bytes in OUT fifos. Broken for IN fifos.
1330 static int pxa_ep_fifo_status(struct usb_ep
*_ep
)
1333 struct udc_usb_ep
*udc_usb_ep
;
1337 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1338 ep
= udc_usb_ep
->pxa_ep
;
1339 if (!ep
|| is_ep0(ep
))
1344 if (ep
->dev
->gadget
.speed
== USB_SPEED_UNKNOWN
|| ep_is_empty(ep
))
1347 return ep_count_bytes_remain(ep
) + 1;
1351 * pxa_ep_fifo_flush - Flushes one endpoint
1352 * @_ep: usb endpoint
1354 * Discards all data in one endpoint(IN or OUT), except control endpoint.
1356 static void pxa_ep_fifo_flush(struct usb_ep
*_ep
)
1359 struct udc_usb_ep
*udc_usb_ep
;
1360 unsigned long flags
;
1364 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1365 ep
= udc_usb_ep
->pxa_ep
;
1366 if (!ep
|| is_ep0(ep
))
1369 spin_lock_irqsave(&ep
->lock
, flags
);
1371 if (unlikely(!list_empty(&ep
->queue
)))
1372 ep_dbg(ep
, "called while queue list not empty\n");
1373 ep_dbg(ep
, "called\n");
1375 /* for OUT, just read and discard the FIFO contents. */
1377 while (!ep_is_empty(ep
))
1378 udc_ep_readl(ep
, UDCDR
);
1380 /* most IN status is the same, but ISO can't stall */
1382 UDCCSR_PC
| UDCCSR_FEF
| UDCCSR_TRN
1383 | (EPXFERTYPE_is_ISO(ep
) ? 0 : UDCCSR_SST
));
1386 spin_unlock_irqrestore(&ep
->lock
, flags
);
1390 * pxa_ep_enable - Enables usb endpoint
1391 * @_ep: usb endpoint
1392 * @desc: usb endpoint descriptor
1394 * Nothing much to do here, as ep configuration is done once and for all
1395 * before udc is enabled. After udc enable, no physical endpoint configuration
1397 * Function makes sanity checks and flushes the endpoint.
1399 static int pxa_ep_enable(struct usb_ep
*_ep
,
1400 const struct usb_endpoint_descriptor
*desc
)
1403 struct udc_usb_ep
*udc_usb_ep
;
1404 struct pxa_udc
*udc
;
1409 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1410 if (udc_usb_ep
->pxa_ep
) {
1411 ep
= udc_usb_ep
->pxa_ep
;
1412 ep_warn(ep
, "usb_ep %s already enabled, doing nothing\n",
1415 ep
= find_pxa_ep(udc_usb_ep
->dev
, udc_usb_ep
);
1418 if (!ep
|| is_ep0(ep
)) {
1419 dev_err(udc_usb_ep
->dev
->dev
,
1420 "unable to match pxa_ep for ep %s\n",
1425 if ((desc
->bDescriptorType
!= USB_DT_ENDPOINT
)
1426 || (ep
->type
!= usb_endpoint_type(desc
))) {
1427 ep_err(ep
, "type mismatch\n");
1431 if (ep
->fifo_size
< usb_endpoint_maxp(desc
)) {
1432 ep_err(ep
, "bad maxpacket\n");
1436 udc_usb_ep
->pxa_ep
= ep
;
1439 if (!udc
->driver
|| udc
->gadget
.speed
== USB_SPEED_UNKNOWN
) {
1440 ep_err(ep
, "bogus device state\n");
1446 /* flush fifo (mostly for OUT buffers) */
1447 pxa_ep_fifo_flush(_ep
);
1449 ep_dbg(ep
, "enabled\n");
1454 * pxa_ep_disable - Disable usb endpoint
1455 * @_ep: usb endpoint
1457 * Same as for pxa_ep_enable, no physical endpoint configuration can be
1459 * Function flushes the endpoint and related requests.
1461 static int pxa_ep_disable(struct usb_ep
*_ep
)
1464 struct udc_usb_ep
*udc_usb_ep
;
1469 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1470 ep
= udc_usb_ep
->pxa_ep
;
1471 if (!ep
|| is_ep0(ep
) || !list_empty(&ep
->queue
))
1475 nuke(ep
, -ESHUTDOWN
);
1477 pxa_ep_fifo_flush(_ep
);
1478 udc_usb_ep
->pxa_ep
= NULL
;
1480 ep_dbg(ep
, "disabled\n");
1484 static struct usb_ep_ops pxa_ep_ops
= {
1485 .enable
= pxa_ep_enable
,
1486 .disable
= pxa_ep_disable
,
1488 .alloc_request
= pxa_ep_alloc_request
,
1489 .free_request
= pxa_ep_free_request
,
1491 .queue
= pxa_ep_queue
,
1492 .dequeue
= pxa_ep_dequeue
,
1494 .set_halt
= pxa_ep_set_halt
,
1495 .fifo_status
= pxa_ep_fifo_status
,
1496 .fifo_flush
= pxa_ep_fifo_flush
,
1500 * dplus_pullup - Connect or disconnect pullup resistor to D+ pin
1502 * @on: 0 if disconnect pullup resistor, 1 otherwise
1505 * Handle D+ pullup resistor, make the device visible to the usb bus, and
1506 * declare it as a full speed usb device
1508 static void dplus_pullup(struct pxa_udc
*udc
, int on
)
1511 if (gpio_is_valid(udc
->mach
->gpio_pullup
))
1512 gpio_set_value(udc
->mach
->gpio_pullup
,
1513 !udc
->mach
->gpio_pullup_inverted
);
1514 if (udc
->mach
->udc_command
)
1515 udc
->mach
->udc_command(PXA2XX_UDC_CMD_CONNECT
);
1517 if (gpio_is_valid(udc
->mach
->gpio_pullup
))
1518 gpio_set_value(udc
->mach
->gpio_pullup
,
1519 udc
->mach
->gpio_pullup_inverted
);
1520 if (udc
->mach
->udc_command
)
1521 udc
->mach
->udc_command(PXA2XX_UDC_CMD_DISCONNECT
);
1523 udc
->pullup_on
= on
;
1527 * pxa_udc_get_frame - Returns usb frame number
1528 * @_gadget: usb gadget
1530 static int pxa_udc_get_frame(struct usb_gadget
*_gadget
)
1532 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1534 return (udc_readl(udc
, UDCFNR
) & 0x7ff);
1538 * pxa_udc_wakeup - Force udc device out of suspend
1539 * @_gadget: usb gadget
1541 * Returns 0 if successful, error code otherwise
1543 static int pxa_udc_wakeup(struct usb_gadget
*_gadget
)
1545 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1547 /* host may not have enabled remote wakeup */
1548 if ((udc_readl(udc
, UDCCR
) & UDCCR_DWRE
) == 0)
1549 return -EHOSTUNREACH
;
1550 udc_set_mask_UDCCR(udc
, UDCCR_UDR
);
1554 static void udc_enable(struct pxa_udc
*udc
);
1555 static void udc_disable(struct pxa_udc
*udc
);
1558 * should_enable_udc - Tells if UDC should be enabled
1562 * The UDC should be enabled if :
1564 * - the pullup resistor is connected
1565 * - and a gadget driver is bound
1566 * - and vbus is sensed (or no vbus sense is available)
1568 * Returns 1 if UDC should be enabled, 0 otherwise
1570 static int should_enable_udc(struct pxa_udc
*udc
)
1574 put_on
= ((udc
->pullup_on
) && (udc
->driver
));
1575 put_on
&= ((udc
->vbus_sensed
) || (IS_ERR_OR_NULL(udc
->transceiver
)));
1580 * should_disable_udc - Tells if UDC should be disabled
1584 * The UDC should be disabled if :
1585 * - the pullup resistor is not connected
1586 * - or no gadget driver is bound
1587 * - or no vbus is sensed (when vbus sesing is available)
1589 * Returns 1 if UDC should be disabled
1591 static int should_disable_udc(struct pxa_udc
*udc
)
1595 put_off
= ((!udc
->pullup_on
) || (!udc
->driver
));
1596 put_off
|= ((!udc
->vbus_sensed
) && (!IS_ERR_OR_NULL(udc
->transceiver
)));
1601 * pxa_udc_pullup - Offer manual D+ pullup control
1602 * @_gadget: usb gadget using the control
1603 * @is_active: 0 if disconnect, else connect D+ pullup resistor
1604 * Context: !in_interrupt()
1606 * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
1608 static int pxa_udc_pullup(struct usb_gadget
*_gadget
, int is_active
)
1610 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1612 if (!gpio_is_valid(udc
->mach
->gpio_pullup
) && !udc
->mach
->udc_command
)
1615 dplus_pullup(udc
, is_active
);
1617 if (should_enable_udc(udc
))
1619 if (should_disable_udc(udc
))
1624 static void udc_enable(struct pxa_udc
*udc
);
1625 static void udc_disable(struct pxa_udc
*udc
);
1628 * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
1629 * @_gadget: usb gadget
1630 * @is_active: 0 if should disable the udc, 1 if should enable
1632 * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the
1633 * udc, and deactivates D+ pullup resistor.
1637 static int pxa_udc_vbus_session(struct usb_gadget
*_gadget
, int is_active
)
1639 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1641 udc
->vbus_sensed
= is_active
;
1642 if (should_enable_udc(udc
))
1644 if (should_disable_udc(udc
))
1651 * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed
1652 * @_gadget: usb gadget
1653 * @mA: current drawn
1655 * Context: !in_interrupt()
1657 * Called after a configuration was chosen by a USB host, to inform how much
1658 * current can be drawn by the device from VBus line.
1660 * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc
1662 static int pxa_udc_vbus_draw(struct usb_gadget
*_gadget
, unsigned mA
)
1664 struct pxa_udc
*udc
;
1666 udc
= to_gadget_udc(_gadget
);
1667 if (!IS_ERR_OR_NULL(udc
->transceiver
))
1668 return usb_phy_set_power(udc
->transceiver
, mA
);
1672 static int pxa27x_udc_start(struct usb_gadget
*g
,
1673 struct usb_gadget_driver
*driver
);
1674 static int pxa27x_udc_stop(struct usb_gadget
*g
,
1675 struct usb_gadget_driver
*driver
);
1677 static const struct usb_gadget_ops pxa_udc_ops
= {
1678 .get_frame
= pxa_udc_get_frame
,
1679 .wakeup
= pxa_udc_wakeup
,
1680 .pullup
= pxa_udc_pullup
,
1681 .vbus_session
= pxa_udc_vbus_session
,
1682 .vbus_draw
= pxa_udc_vbus_draw
,
1683 .udc_start
= pxa27x_udc_start
,
1684 .udc_stop
= pxa27x_udc_stop
,
1688 * udc_disable - disable udc device controller
1692 * Disables the udc device : disables clocks, udc interrupts, control endpoint
1695 static void udc_disable(struct pxa_udc
*udc
)
1700 udc_writel(udc
, UDCICR0
, 0);
1701 udc_writel(udc
, UDCICR1
, 0);
1703 udc_clear_mask_UDCCR(udc
, UDCCR_UDE
);
1704 clk_disable(udc
->clk
);
1707 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1713 * udc_init_data - Initialize udc device data structures
1716 * Initializes gadget endpoint list, endpoints locks. No action is taken
1719 static void udc_init_data(struct pxa_udc
*dev
)
1724 /* device/ep0 records init */
1725 INIT_LIST_HEAD(&dev
->gadget
.ep_list
);
1726 INIT_LIST_HEAD(&dev
->gadget
.ep0
->ep_list
);
1727 dev
->udc_usb_ep
[0].pxa_ep
= &dev
->pxa_ep
[0];
1730 /* PXA endpoints init */
1731 for (i
= 0; i
< NR_PXA_ENDPOINTS
; i
++) {
1732 ep
= &dev
->pxa_ep
[i
];
1734 ep
->enabled
= is_ep0(ep
);
1735 INIT_LIST_HEAD(&ep
->queue
);
1736 spin_lock_init(&ep
->lock
);
1739 /* USB endpoints init */
1740 for (i
= 1; i
< NR_USB_ENDPOINTS
; i
++)
1741 list_add_tail(&dev
->udc_usb_ep
[i
].usb_ep
.ep_list
,
1742 &dev
->gadget
.ep_list
);
1746 * udc_enable - Enables the udc device
1749 * Enables the udc device : enables clocks, udc interrupts, control endpoint
1750 * interrupts, sets usb as UDC client and setups endpoints.
1752 static void udc_enable(struct pxa_udc
*udc
)
1757 udc_writel(udc
, UDCICR0
, 0);
1758 udc_writel(udc
, UDCICR1
, 0);
1759 udc_clear_mask_UDCCR(udc
, UDCCR_UDE
);
1761 clk_enable(udc
->clk
);
1764 udc
->gadget
.speed
= USB_SPEED_FULL
;
1765 memset(&udc
->stats
, 0, sizeof(udc
->stats
));
1767 udc_set_mask_UDCCR(udc
, UDCCR_UDE
);
1768 ep_write_UDCCSR(&udc
->pxa_ep
[0], UDCCSR0_ACM
);
1770 if (udc_readl(udc
, UDCCR
) & UDCCR_EMCE
)
1771 dev_err(udc
->dev
, "Configuration errors, udc disabled\n");
1774 * Caller must be able to sleep in order to cope with startup transients
1778 /* enable suspend/resume and reset irqs */
1779 udc_writel(udc
, UDCICR1
,
1780 UDCICR1_IECC
| UDCICR1_IERU
1781 | UDCICR1_IESU
| UDCICR1_IERS
);
1783 /* enable ep0 irqs */
1784 pio_irq_enable(&udc
->pxa_ep
[0]);
1790 * pxa27x_start - Register gadget driver
1791 * @driver: gadget driver
1792 * @bind: bind function
1794 * When a driver is successfully registered, it will receive control requests
1795 * including set_configuration(), which enables non-control requests. Then
1796 * usb traffic follows until a disconnect is reported. Then a host may connect
1797 * again, or the driver might get unbound.
1799 * Note that the udc is not automatically enabled. Check function
1800 * should_enable_udc().
1802 * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
1804 static int pxa27x_udc_start(struct usb_gadget
*g
,
1805 struct usb_gadget_driver
*driver
)
1807 struct pxa_udc
*udc
= to_pxa(g
);
1810 /* first hook up the driver ... */
1811 udc
->driver
= driver
;
1812 dplus_pullup(udc
, 1);
1814 if (!IS_ERR_OR_NULL(udc
->transceiver
)) {
1815 retval
= otg_set_peripheral(udc
->transceiver
->otg
,
1818 dev_err(udc
->dev
, "can't bind to transceiver\n");
1823 if (should_enable_udc(udc
))
1833 * stop_activity - Stops udc endpoints
1835 * @driver: gadget driver
1837 * Disables all udc endpoints (even control endpoint), report disconnect to
1840 static void stop_activity(struct pxa_udc
*udc
, struct usb_gadget_driver
*driver
)
1844 /* don't disconnect drivers more than once */
1845 if (udc
->gadget
.speed
== USB_SPEED_UNKNOWN
)
1847 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1849 for (i
= 0; i
< NR_USB_ENDPOINTS
; i
++)
1850 pxa_ep_disable(&udc
->udc_usb_ep
[i
].usb_ep
);
1854 * pxa27x_udc_stop - Unregister the gadget driver
1855 * @driver: gadget driver
1857 * Returns 0 if no error, -ENODEV, -EINVAL otherwise
1859 static int pxa27x_udc_stop(struct usb_gadget
*g
,
1860 struct usb_gadget_driver
*driver
)
1862 struct pxa_udc
*udc
= to_pxa(g
);
1864 stop_activity(udc
, driver
);
1866 dplus_pullup(udc
, 0);
1870 if (!IS_ERR_OR_NULL(udc
->transceiver
))
1871 return otg_set_peripheral(udc
->transceiver
->otg
, NULL
);
1876 * handle_ep0_ctrl_req - handle control endpoint control request
1878 * @req: control request
1880 static void handle_ep0_ctrl_req(struct pxa_udc
*udc
,
1881 struct pxa27x_request
*req
)
1883 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
1885 struct usb_ctrlrequest r
;
1889 int have_extrabytes
= 0;
1890 unsigned long flags
;
1893 spin_lock_irqsave(&ep
->lock
, flags
);
1896 * In the PXA320 manual, in the section about Back-to-Back setup
1897 * packets, it describes this situation. The solution is to set OPC to
1898 * get rid of the status packet, and then continue with the setup
1899 * packet. Generalize to pxa27x CPUs.
1901 if (epout_has_pkt(ep
) && (ep_count_bytes_remain(ep
) == 0))
1902 ep_write_UDCCSR(ep
, UDCCSR0_OPC
);
1904 /* read SETUP packet */
1905 for (i
= 0; i
< 2; i
++) {
1906 if (unlikely(ep_is_empty(ep
)))
1908 u
.word
[i
] = udc_ep_readl(ep
, UDCDR
);
1911 have_extrabytes
= !ep_is_empty(ep
);
1912 while (!ep_is_empty(ep
)) {
1913 i
= udc_ep_readl(ep
, UDCDR
);
1914 ep_err(ep
, "wrong to have extra bytes for setup : 0x%08x\n", i
);
1917 ep_dbg(ep
, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1918 u
.r
.bRequestType
, u
.r
.bRequest
,
1919 le16_to_cpu(u
.r
.wValue
), le16_to_cpu(u
.r
.wIndex
),
1920 le16_to_cpu(u
.r
.wLength
));
1921 if (unlikely(have_extrabytes
))
1924 if (u
.r
.bRequestType
& USB_DIR_IN
)
1925 set_ep0state(udc
, IN_DATA_STAGE
);
1927 set_ep0state(udc
, OUT_DATA_STAGE
);
1929 /* Tell UDC to enter Data Stage */
1930 ep_write_UDCCSR(ep
, UDCCSR0_SA
| UDCCSR0_OPC
);
1932 spin_unlock_irqrestore(&ep
->lock
, flags
);
1933 i
= udc
->driver
->setup(&udc
->gadget
, &u
.r
);
1934 spin_lock_irqsave(&ep
->lock
, flags
);
1938 spin_unlock_irqrestore(&ep
->lock
, flags
);
1941 ep_dbg(ep
, "protocol STALL, udccsr0=%03x err %d\n",
1942 udc_ep_readl(ep
, UDCCSR
), i
);
1943 ep_write_UDCCSR(ep
, UDCCSR0_FST
| UDCCSR0_FTF
);
1944 set_ep0state(udc
, STALL
);
1949 * handle_ep0 - Handle control endpoint data transfers
1951 * @fifo_irq: 1 if triggered by fifo service type irq
1952 * @opc_irq: 1 if triggered by output packet complete type irq
1954 * Context : when in_interrupt() or with ep->lock held
1956 * Tries to transfer all pending request data into the endpoint and/or
1957 * transfer all pending data in the endpoint into usb requests.
1958 * Handles states of ep0 automata.
1960 * PXA27x hardware handles several standard usb control requests without
1961 * driver notification. The requests fully handled by hardware are :
1962 * SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE,
1964 * The requests handled by hardware, but with irq notification are :
1965 * SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE
1966 * The remaining standard requests really handled by handle_ep0 are :
1967 * GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests.
1968 * Requests standardized outside of USB 2.0 chapter 9 are handled more
1969 * uniformly, by gadget drivers.
1971 * The control endpoint state machine is _not_ USB spec compliant, it's even
1972 * hardly compliant with Intel PXA270 developers guide.
1973 * The key points which inferred this state machine are :
1974 * - on every setup token, bit UDCCSR0_SA is raised and held until cleared by
1976 * - on every OUT packet received, UDCCSR0_OPC is raised and held until
1977 * cleared by software.
1978 * - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it
1979 * before reading ep0.
1980 * This is true only for PXA27x. This is not true anymore for PXA3xx family
1981 * (check Back-to-Back setup packet in developers guide).
1982 * - irq can be called on a "packet complete" event (opc_irq=1), while
1983 * UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
1984 * from experimentation).
1985 * - as UDCCSR0_SA can be activated while in irq handling, and clearing
1986 * UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC
1987 * => we never actually read the "status stage" packet of an IN data stage
1988 * => this is not documented in Intel documentation
1989 * - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA
1990 * STAGE. The driver add STATUS STAGE to send last zero length packet in
1992 * - special attention was needed for IN_STATUS_STAGE. If a packet complete
1993 * event is detected, we terminate the status stage without ackowledging the
1994 * packet (not to risk to loose a potential SETUP packet)
1996 static void handle_ep0(struct pxa_udc
*udc
, int fifo_irq
, int opc_irq
)
1999 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
2000 struct pxa27x_request
*req
= NULL
;
2003 if (!list_empty(&ep
->queue
))
2004 req
= list_entry(ep
->queue
.next
, struct pxa27x_request
, queue
);
2006 udccsr0
= udc_ep_readl(ep
, UDCCSR
);
2007 ep_dbg(ep
, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
2008 EP0_STNAME(udc
), req
, udccsr0
, udc_ep_readl(ep
, UDCBCR
),
2009 (fifo_irq
<< 1 | opc_irq
));
2011 if (udccsr0
& UDCCSR0_SST
) {
2012 ep_dbg(ep
, "clearing stall status\n");
2014 ep_write_UDCCSR(ep
, UDCCSR0_SST
);
2018 if (udccsr0
& UDCCSR0_SA
) {
2020 set_ep0state(udc
, SETUP_STAGE
);
2023 switch (udc
->ep0state
) {
2024 case WAIT_FOR_SETUP
:
2026 * Hardware bug : beware, we cannot clear OPC, since we would
2027 * miss a potential OPC irq for a setup packet.
2028 * So, we only do ... nothing, and hope for a next irq with
2033 udccsr0
&= UDCCSR0_CTRL_REQ_MASK
;
2034 if (likely(udccsr0
== UDCCSR0_CTRL_REQ_MASK
))
2035 handle_ep0_ctrl_req(udc
, req
);
2037 case IN_DATA_STAGE
: /* GET_DESCRIPTOR */
2038 if (epout_has_pkt(ep
))
2039 ep_write_UDCCSR(ep
, UDCCSR0_OPC
);
2040 if (req
&& !ep_is_full(ep
))
2041 completed
= write_ep0_fifo(ep
, req
);
2043 ep0_end_in_req(ep
, req
, NULL
);
2045 case OUT_DATA_STAGE
: /* SET_DESCRIPTOR */
2046 if (epout_has_pkt(ep
) && req
)
2047 completed
= read_ep0_fifo(ep
, req
);
2049 ep0_end_out_req(ep
, req
, NULL
);
2052 ep_write_UDCCSR(ep
, UDCCSR0_FST
);
2054 case IN_STATUS_STAGE
:
2056 * Hardware bug : beware, we cannot clear OPC, since we would
2057 * miss a potential PC irq for a setup packet.
2058 * So, we only put the ep0 into WAIT_FOR_SETUP state.
2063 case OUT_STATUS_STAGE
:
2064 case WAIT_ACK_SET_CONF_INTERF
:
2065 ep_warn(ep
, "should never get in %s state here!!!\n",
2066 EP0_STNAME(ep
->dev
));
2073 * handle_ep - Handle endpoint data tranfers
2074 * @ep: pxa physical endpoint
2076 * Tries to transfer all pending request data into the endpoint and/or
2077 * transfer all pending data in the endpoint into usb requests.
2079 * Is always called when in_interrupt() and with ep->lock released.
2081 static void handle_ep(struct pxa_ep
*ep
)
2083 struct pxa27x_request
*req
;
2086 int is_in
= ep
->dir_in
;
2088 unsigned long flags
;
2090 spin_lock_irqsave(&ep
->lock
, flags
);
2091 if (ep
->in_handle_ep
)
2092 goto recursion_detected
;
2093 ep
->in_handle_ep
= 1;
2097 udccsr
= udc_ep_readl(ep
, UDCCSR
);
2099 if (likely(!list_empty(&ep
->queue
)))
2100 req
= list_entry(ep
->queue
.next
,
2101 struct pxa27x_request
, queue
);
2105 ep_dbg(ep
, "req:%p, udccsr 0x%03x loop=%d\n",
2106 req
, udccsr
, loop
++);
2108 if (unlikely(udccsr
& (UDCCSR_SST
| UDCCSR_TRN
)))
2109 udc_ep_writel(ep
, UDCCSR
,
2110 udccsr
& (UDCCSR_SST
| UDCCSR_TRN
));
2114 if (unlikely(is_in
)) {
2115 if (likely(!ep_is_full(ep
)))
2116 completed
= write_fifo(ep
, req
);
2118 if (likely(epout_has_pkt(ep
)))
2119 completed
= read_fifo(ep
, req
);
2124 ep_end_in_req(ep
, req
, &flags
);
2126 ep_end_out_req(ep
, req
, &flags
);
2128 } while (completed
);
2130 ep
->in_handle_ep
= 0;
2132 spin_unlock_irqrestore(&ep
->lock
, flags
);
2136 * pxa27x_change_configuration - Handle SET_CONF usb request notification
2138 * @config: usb configuration
2140 * Post the request to upper level.
2141 * Don't use any pxa specific harware configuration capabilities
2143 static void pxa27x_change_configuration(struct pxa_udc
*udc
, int config
)
2145 struct usb_ctrlrequest req
;
2147 dev_dbg(udc
->dev
, "config=%d\n", config
);
2149 udc
->config
= config
;
2150 udc
->last_interface
= 0;
2151 udc
->last_alternate
= 0;
2153 req
.bRequestType
= 0;
2154 req
.bRequest
= USB_REQ_SET_CONFIGURATION
;
2155 req
.wValue
= config
;
2159 set_ep0state(udc
, WAIT_ACK_SET_CONF_INTERF
);
2160 udc
->driver
->setup(&udc
->gadget
, &req
);
2161 ep_write_UDCCSR(&udc
->pxa_ep
[0], UDCCSR0_AREN
);
2165 * pxa27x_change_interface - Handle SET_INTERF usb request notification
2167 * @iface: interface number
2168 * @alt: alternate setting number
2170 * Post the request to upper level.
2171 * Don't use any pxa specific harware configuration capabilities
2173 static void pxa27x_change_interface(struct pxa_udc
*udc
, int iface
, int alt
)
2175 struct usb_ctrlrequest req
;
2177 dev_dbg(udc
->dev
, "interface=%d, alternate setting=%d\n", iface
, alt
);
2179 udc
->last_interface
= iface
;
2180 udc
->last_alternate
= alt
;
2182 req
.bRequestType
= USB_RECIP_INTERFACE
;
2183 req
.bRequest
= USB_REQ_SET_INTERFACE
;
2188 set_ep0state(udc
, WAIT_ACK_SET_CONF_INTERF
);
2189 udc
->driver
->setup(&udc
->gadget
, &req
);
2190 ep_write_UDCCSR(&udc
->pxa_ep
[0], UDCCSR0_AREN
);
2194 * irq_handle_data - Handle data transfer
2195 * @irq: irq IRQ number
2196 * @udc: dev pxa_udc device structure
2198 * Called from irq handler, transferts data to or from endpoint to queue
2200 static void irq_handle_data(int irq
, struct pxa_udc
*udc
)
2204 u32 udcisr0
= udc_readl(udc
, UDCISR0
) & UDCCISR0_EP_MASK
;
2205 u32 udcisr1
= udc_readl(udc
, UDCISR1
) & UDCCISR1_EP_MASK
;
2207 if (udcisr0
& UDCISR_INT_MASK
) {
2208 udc
->pxa_ep
[0].stats
.irqs
++;
2209 udc_writel(udc
, UDCISR0
, UDCISR_INT(0, UDCISR_INT_MASK
));
2210 handle_ep0(udc
, !!(udcisr0
& UDCICR_FIFOERR
),
2211 !!(udcisr0
& UDCICR_PKTCOMPL
));
2215 for (i
= 1; udcisr0
!= 0 && i
< 16; udcisr0
>>= 2, i
++) {
2216 if (!(udcisr0
& UDCISR_INT_MASK
))
2219 udc_writel(udc
, UDCISR0
, UDCISR_INT(i
, UDCISR_INT_MASK
));
2221 WARN_ON(i
>= ARRAY_SIZE(udc
->pxa_ep
));
2222 if (i
< ARRAY_SIZE(udc
->pxa_ep
)) {
2223 ep
= &udc
->pxa_ep
[i
];
2229 for (i
= 16; udcisr1
!= 0 && i
< 24; udcisr1
>>= 2, i
++) {
2230 udc_writel(udc
, UDCISR1
, UDCISR_INT(i
- 16, UDCISR_INT_MASK
));
2231 if (!(udcisr1
& UDCISR_INT_MASK
))
2234 WARN_ON(i
>= ARRAY_SIZE(udc
->pxa_ep
));
2235 if (i
< ARRAY_SIZE(udc
->pxa_ep
)) {
2236 ep
= &udc
->pxa_ep
[i
];
2245 * irq_udc_suspend - Handle IRQ "UDC Suspend"
2248 static void irq_udc_suspend(struct pxa_udc
*udc
)
2250 udc_writel(udc
, UDCISR1
, UDCISR1_IRSU
);
2251 udc
->stats
.irqs_suspend
++;
2253 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
2254 && udc
->driver
&& udc
->driver
->suspend
)
2255 udc
->driver
->suspend(&udc
->gadget
);
2260 * irq_udc_resume - Handle IRQ "UDC Resume"
2263 static void irq_udc_resume(struct pxa_udc
*udc
)
2265 udc_writel(udc
, UDCISR1
, UDCISR1_IRRU
);
2266 udc
->stats
.irqs_resume
++;
2268 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
2269 && udc
->driver
&& udc
->driver
->resume
)
2270 udc
->driver
->resume(&udc
->gadget
);
2274 * irq_udc_reconfig - Handle IRQ "UDC Change Configuration"
2277 static void irq_udc_reconfig(struct pxa_udc
*udc
)
2279 unsigned config
, interface
, alternate
, config_change
;
2280 u32 udccr
= udc_readl(udc
, UDCCR
);
2282 udc_writel(udc
, UDCISR1
, UDCISR1_IRCC
);
2283 udc
->stats
.irqs_reconfig
++;
2285 config
= (udccr
& UDCCR_ACN
) >> UDCCR_ACN_S
;
2286 config_change
= (config
!= udc
->config
);
2287 pxa27x_change_configuration(udc
, config
);
2289 interface
= (udccr
& UDCCR_AIN
) >> UDCCR_AIN_S
;
2290 alternate
= (udccr
& UDCCR_AAISN
) >> UDCCR_AAISN_S
;
2291 pxa27x_change_interface(udc
, interface
, alternate
);
2294 update_pxa_ep_matches(udc
);
2295 udc_set_mask_UDCCR(udc
, UDCCR_SMAC
);
2299 * irq_udc_reset - Handle IRQ "UDC Reset"
2302 static void irq_udc_reset(struct pxa_udc
*udc
)
2304 u32 udccr
= udc_readl(udc
, UDCCR
);
2305 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
2307 dev_info(udc
->dev
, "USB reset\n");
2308 udc_writel(udc
, UDCISR1
, UDCISR1_IRRS
);
2309 udc
->stats
.irqs_reset
++;
2311 if ((udccr
& UDCCR_UDA
) == 0) {
2312 dev_dbg(udc
->dev
, "USB reset start\n");
2313 stop_activity(udc
, udc
->driver
);
2315 udc
->gadget
.speed
= USB_SPEED_FULL
;
2316 memset(&udc
->stats
, 0, sizeof udc
->stats
);
2319 ep_write_UDCCSR(ep
, UDCCSR0_FTF
| UDCCSR0_OPC
);
2324 * pxa_udc_irq - Main irq handler
2328 * Handles all udc interrupts
2330 static irqreturn_t
pxa_udc_irq(int irq
, void *_dev
)
2332 struct pxa_udc
*udc
= _dev
;
2333 u32 udcisr0
= udc_readl(udc
, UDCISR0
);
2334 u32 udcisr1
= udc_readl(udc
, UDCISR1
);
2335 u32 udccr
= udc_readl(udc
, UDCCR
);
2338 dev_vdbg(udc
->dev
, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2339 "UDCCR:0x%08x\n", udcisr0
, udcisr1
, udccr
);
2341 udcisr1_spec
= udcisr1
& 0xf8000000;
2342 if (unlikely(udcisr1_spec
& UDCISR1_IRSU
))
2343 irq_udc_suspend(udc
);
2344 if (unlikely(udcisr1_spec
& UDCISR1_IRRU
))
2345 irq_udc_resume(udc
);
2346 if (unlikely(udcisr1_spec
& UDCISR1_IRCC
))
2347 irq_udc_reconfig(udc
);
2348 if (unlikely(udcisr1_spec
& UDCISR1_IRRS
))
2351 if ((udcisr0
& UDCCISR0_EP_MASK
) | (udcisr1
& UDCCISR1_EP_MASK
))
2352 irq_handle_data(irq
, udc
);
2357 static struct pxa_udc memory
= {
2359 .ops
= &pxa_udc_ops
,
2360 .ep0
= &memory
.udc_usb_ep
[0].usb_ep
,
2361 .name
= driver_name
,
2363 .init_name
= "gadget",
2378 /* Endpoints for gadget zero */
2379 PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2380 PXA_EP_IN_BULK(2, 2, 3, 0, 0),
2381 /* Endpoints for ether gadget, file storage gadget */
2382 PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2383 PXA_EP_IN_BULK(4, 2, 1, 0, 0),
2384 PXA_EP_IN_ISO(5, 3, 1, 0, 0),
2385 PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
2386 PXA_EP_IN_INT(7, 5, 1, 0, 0),
2387 /* Endpoints for RNDIS, serial */
2388 PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2389 PXA_EP_IN_BULK(9, 2, 2, 0, 0),
2390 PXA_EP_IN_INT(10, 5, 2, 0, 0),
2392 * All the following endpoints are only for completion. They
2393 * won't never work, as multiple interfaces are really broken on
2396 PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2397 PXA_EP_IN_BULK(12, 2, 2, 1, 0),
2398 /* Endpoint for CDC Ether */
2399 PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2400 PXA_EP_IN_BULK(14, 2, 1, 1, 1),
2405 * pxa_udc_probe - probes the udc device
2406 * @_dev: platform device
2408 * Perform basic init : allocates udc clock, creates sysfs files, requests
2411 static int pxa_udc_probe(struct platform_device
*pdev
)
2413 struct resource
*regs
;
2414 struct pxa_udc
*udc
= &memory
;
2415 int retval
= 0, gpio
;
2417 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2420 udc
->irq
= platform_get_irq(pdev
, 0);
2424 udc
->dev
= &pdev
->dev
;
2425 udc
->mach
= dev_get_platdata(&pdev
->dev
);
2426 udc
->transceiver
= usb_get_phy(USB_PHY_TYPE_USB2
);
2428 gpio
= udc
->mach
->gpio_pullup
;
2429 if (gpio_is_valid(gpio
)) {
2430 retval
= gpio_request(gpio
, "USB D+ pullup");
2432 gpio_direction_output(gpio
,
2433 udc
->mach
->gpio_pullup_inverted
);
2436 dev_err(&pdev
->dev
, "Couldn't request gpio %d : %d\n",
2441 udc
->clk
= clk_get(&pdev
->dev
, NULL
);
2442 if (IS_ERR(udc
->clk
)) {
2443 retval
= PTR_ERR(udc
->clk
);
2448 udc
->regs
= ioremap(regs
->start
, resource_size(regs
));
2450 dev_err(&pdev
->dev
, "Unable to map UDC I/O memory\n");
2454 udc
->vbus_sensed
= 0;
2456 the_controller
= udc
;
2457 platform_set_drvdata(pdev
, udc
);
2461 /* irq setup after old hardware state is cleaned up */
2462 retval
= request_irq(udc
->irq
, pxa_udc_irq
,
2463 IRQF_SHARED
, driver_name
, udc
);
2465 dev_err(udc
->dev
, "%s: can't get irq %i, err %d\n",
2466 driver_name
, udc
->irq
, retval
);
2470 retval
= usb_add_gadget_udc(&pdev
->dev
, &udc
->gadget
);
2474 pxa_init_debugfs(udc
);
2479 free_irq(udc
->irq
, udc
);
2490 * pxa_udc_remove - removes the udc device driver
2491 * @_dev: platform device
2493 static int pxa_udc_remove(struct platform_device
*_dev
)
2495 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2496 int gpio
= udc
->mach
->gpio_pullup
;
2498 usb_del_gadget_udc(&udc
->gadget
);
2499 usb_gadget_unregister_driver(udc
->driver
);
2500 free_irq(udc
->irq
, udc
);
2501 pxa_cleanup_debugfs(udc
);
2502 if (gpio_is_valid(gpio
))
2505 usb_put_phy(udc
->transceiver
);
2507 udc
->transceiver
= NULL
;
2508 the_controller
= NULL
;
2515 static void pxa_udc_shutdown(struct platform_device
*_dev
)
2517 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2519 if (udc_readl(udc
, UDCCR
) & UDCCR_UDE
)
2523 #ifdef CONFIG_PXA27x
2524 extern void pxa27x_clear_otgph(void);
2526 #define pxa27x_clear_otgph() do {} while (0)
2531 * pxa_udc_suspend - Suspend udc device
2532 * @_dev: platform device
2533 * @state: suspend state
2535 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2538 static int pxa_udc_suspend(struct platform_device
*_dev
, pm_message_t state
)
2541 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2544 ep
= &udc
->pxa_ep
[0];
2545 udc
->udccsr0
= udc_ep_readl(ep
, UDCCSR
);
2546 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++) {
2547 ep
= &udc
->pxa_ep
[i
];
2548 ep
->udccsr_value
= udc_ep_readl(ep
, UDCCSR
);
2549 ep
->udccr_value
= udc_ep_readl(ep
, UDCCR
);
2550 ep_dbg(ep
, "udccsr:0x%03x, udccr:0x%x\n",
2551 ep
->udccsr_value
, ep
->udccr_value
);
2555 udc
->pullup_resume
= udc
->pullup_on
;
2556 dplus_pullup(udc
, 0);
2562 * pxa_udc_resume - Resume udc device
2563 * @_dev: platform device
2565 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
2568 static int pxa_udc_resume(struct platform_device
*_dev
)
2571 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2574 ep
= &udc
->pxa_ep
[0];
2575 udc_ep_writel(ep
, UDCCSR
, udc
->udccsr0
& (UDCCSR0_FST
| UDCCSR0_DME
));
2576 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++) {
2577 ep
= &udc
->pxa_ep
[i
];
2578 udc_ep_writel(ep
, UDCCSR
, ep
->udccsr_value
);
2579 udc_ep_writel(ep
, UDCCR
, ep
->udccr_value
);
2580 ep_dbg(ep
, "udccsr:0x%03x, udccr:0x%x\n",
2581 ep
->udccsr_value
, ep
->udccr_value
);
2584 dplus_pullup(udc
, udc
->pullup_resume
);
2585 if (should_enable_udc(udc
))
2588 * We do not handle OTG yet.
2590 * OTGPH bit is set when sleep mode is entered.
2591 * it indicates that OTG pad is retaining its state.
2592 * Upon exit from sleep mode and before clearing OTGPH,
2593 * Software must configure the USB OTG pad, UDC, and UHC
2594 * to the state they were in before entering sleep mode.
2596 pxa27x_clear_otgph();
2602 /* work with hotplug and coldplug */
2603 MODULE_ALIAS("platform:pxa27x-udc");
2605 static struct platform_driver udc_driver
= {
2607 .name
= "pxa27x-udc",
2608 .owner
= THIS_MODULE
,
2610 .probe
= pxa_udc_probe
,
2611 .remove
= pxa_udc_remove
,
2612 .shutdown
= pxa_udc_shutdown
,
2614 .suspend
= pxa_udc_suspend
,
2615 .resume
= pxa_udc_resume
2619 module_platform_driver(udc_driver
);
2621 MODULE_DESCRIPTION(DRIVER_DESC
);
2622 MODULE_AUTHOR("Robert Jarzmik");
2623 MODULE_LICENSE("GPL");