drivers/staging/imx-drm/imx-ldb.c

   1 /*
   2  * i.MX drm driver - LVDS display bridge
   3  *
   4  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  18  * MA 02110-1301, USA.
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/clk.h>
  23 #include <drm/drmP.h>
  24 #include <drm/drm_fb_helper.h>
  25 #include <drm/drm_crtc_helper.h>
  26 #include <linux/mfd/syscon.h>
  27 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  28 #include <linux/of_address.h>
  29 #include <linux/of_device.h>
  30 #include <video/of_videomode.h>
  31 #include <linux/regmap.h>
  32 #include <linux/videodev2.h>
  33
  34 #include "imx-drm.h"
  35
  36 #define DRIVER_NAME "imx-ldb"
  37
  38 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  39 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  40 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  41 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  42 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  43 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  44 #define LDB_SPLIT_MODE_EN               (1 << 4)
  45 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  46 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  47 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  48 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  49 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  50 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  51 #define LDB_BGREF_RMODE_INT             (1 << 15)
  52
  53 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
  54 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
  55
  56 struct imx_ldb;
  57
  58 struct imx_ldb_channel {
  59         struct imx_ldb *ldb;
  60         struct drm_connector connector;
  61         struct imx_drm_connector *imx_drm_connector;
  62         struct drm_encoder encoder;
  63         struct imx_drm_encoder *imx_drm_encoder;
  64         int chno;
  65         void *edid;
  66         int edid_len;
  67         struct drm_display_mode mode;
  68         int mode_valid;
  69 };
  70
  71 struct bus_mux {
  72         int reg;
  73         int shift;
  74         int mask;
  75 };
  76
  77 struct imx_ldb {
  78         struct regmap *regmap;
  79         struct device *dev;
  80         struct imx_ldb_channel channel[2];
  81         struct clk *clk[2]; /* our own clock */
  82         struct clk *clk_sel[4]; /* parent of display clock */
  83         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  84         u32 ldb_ctrl;
  85         const struct bus_mux *lvds_mux;
  86 };
  87
  88 static enum drm_connector_status imx_ldb_connector_detect(
  89                 struct drm_connector *connector, bool force)
  90 {
  91         return connector_status_connected;
  92 }
  93
  94 static void imx_ldb_connector_destroy(struct drm_connector *connector)
  95 {
  96         /* do not free here */
  97 }
  98
  99 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
 100 {
 101         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 102         int num_modes = 0;
 103
 104         if (imx_ldb_ch->edid) {
 105                 drm_mode_connector_update_edid_property(connector,
 106                                                         imx_ldb_ch->edid);
 107                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 108         }
 109
 110         if (imx_ldb_ch->mode_valid) {
 111                 struct drm_display_mode *mode;
 112
 113                 mode = drm_mode_create(connector->dev);
 114                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 115                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 116                 drm_mode_probed_add(connector, mode);
 117                 num_modes++;
 118         }
 119
 120         return num_modes;
 121 }
 122
 123 static int imx_ldb_connector_mode_valid(struct drm_connector *connector,
 124                           struct drm_display_mode *mode)
 125 {
 126         return 0;
 127 }
 128
 129 static struct drm_encoder *imx_ldb_connector_best_encoder(
 130                 struct drm_connector *connector)
 131 {
 132         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 133
 134         return &imx_ldb_ch->encoder;
 135 }
 136
 137 static void imx_ldb_encoder_dpms(struct drm_encoder *encoder, int mode)
 138 {
 139 }
 140
 141 static bool imx_ldb_encoder_mode_fixup(struct drm_encoder *encoder,
 142                            const struct drm_display_mode *mode,
 143                            struct drm_display_mode *adjusted_mode)
 144 {
 145         return true;
 146 }
 147
 148 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 149                 unsigned long serial_clk, unsigned long di_clk)
 150 {
 151         int ret;
 152
 153         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 154                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 155         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 156
 157         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 158                         clk_get_rate(ldb->clk_pll[chno]));
 159
 160         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 161                         clk_get_rate(ldb->clk[chno]),
 162                         (long int)di_clk);
 163         clk_set_rate(ldb->clk[chno], di_clk);
 164
 165         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 166                         clk_get_rate(ldb->clk[chno]));
 167
 168         /* set display clock mux to LDB input clock */
 169         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 170         if (ret) {
 171                 dev_err(ldb->dev, "unable to set di%d parent clock to ldb_di%d\n", mux, chno);
 172         }
 173 }
 174
 175 static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
 176 {
 177         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 178         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 179         struct drm_display_mode *mode = &encoder->crtc->mode;
 180         u32 pixel_fmt;
 181         unsigned long serial_clk;
 182         unsigned long di_clk = mode->clock * 1000;
 183         int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->imx_drm_encoder,
 184                                              encoder->crtc);
 185
 186         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 187                 /* dual channel LVDS mode */
 188                 serial_clk = 3500UL * mode->clock;
 189                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 190                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 191         } else {
 192                 serial_clk = 7000UL * mode->clock;
 193                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk, di_clk);
 194         }
 195
 196         switch (imx_ldb_ch->chno) {
 197         case 0:
 198                 pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH0_24) ?
 199                         V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
 200                 break;
 201         case 1:
 202                 pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH1_24) ?
 203                         V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
 204                 break;
 205         default:
 206                 dev_err(ldb->dev, "unable to config di%d panel format\n",
 207                         imx_ldb_ch->chno);
 208                 pixel_fmt = V4L2_PIX_FMT_RGB24;
 209         }
 210
 211         imx_drm_crtc_panel_format(encoder->crtc, DRM_MODE_ENCODER_LVDS,
 212                         pixel_fmt);
 213 }
 214
 215 static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
 216 {
 217         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 218         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 219         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 220         int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->imx_drm_encoder,
 221                                              encoder->crtc);
 222
 223         if (dual) {
 224                 clk_prepare_enable(ldb->clk[0]);
 225                 clk_prepare_enable(ldb->clk[1]);
 226         }
 227
 228         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 229                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 230                 if (mux == 0 || ldb->lvds_mux)
 231                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 232                 else if (mux == 1)
 233                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 234         }
 235         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 236                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 237                 if (mux == 1 || ldb->lvds_mux)
 238                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 239                 else if (mux == 0)
 240                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 241         }
 242
 243         if (ldb->lvds_mux) {
 244                 const struct bus_mux *lvds_mux = NULL;
 245
 246                 if (imx_ldb_ch == &ldb->channel[0])
 247                         lvds_mux = &ldb->lvds_mux[0];
 248                 else if (imx_ldb_ch == &ldb->channel[1])
 249                         lvds_mux = &ldb->lvds_mux[1];
 250
 251                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 252                                    mux << lvds_mux->shift);
 253         }
 254
 255         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 256 }
 257
 258 static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
 259                          struct drm_display_mode *mode,
 260                          struct drm_display_mode *adjusted_mode)
 261 {
 262         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 263         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 264         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 265
 266         if (mode->clock > 170000) {
 267                 dev_warn(ldb->dev,
 268                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 269         }
 270         if (mode->clock > 85000 && !dual) {
 271                 dev_warn(ldb->dev,
 272                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 273         }
 274
 275         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 276         if (imx_ldb_ch == &ldb->channel[0]) {
 277                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 278                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 279                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 280                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 281         }
 282         if (imx_ldb_ch == &ldb->channel[1]) {
 283                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 284                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 285                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 286                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 287         }
 288 }
 289
 290 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 291 {
 292         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 293         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 294
 295         /*
 296          * imx_ldb_encoder_disable is called by
 297          * drm_helper_disable_unused_functions without
 298          * the encoder being enabled before.
 299          */
 300         if (imx_ldb_ch == &ldb->channel[0] &&
 301             (ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
 302                 return;
 303         else if (imx_ldb_ch == &ldb->channel[1] &&
 304                  (ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
 305                 return;
 306
 307         if (imx_ldb_ch == &ldb->channel[0])
 308                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 309         else if (imx_ldb_ch == &ldb->channel[1])
 310                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 311
 312         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 313
 314         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 315                 clk_disable_unprepare(ldb->clk[0]);
 316                 clk_disable_unprepare(ldb->clk[1]);
 317         }
 318 }
 319
 320 static void imx_ldb_encoder_destroy(struct drm_encoder *encoder)
 321 {
 322         /* do not free here */
 323 }
 324
 325 static struct drm_connector_funcs imx_ldb_connector_funcs = {
 326         .dpms = drm_helper_connector_dpms,
 327         .fill_modes = drm_helper_probe_single_connector_modes,
 328         .detect = imx_ldb_connector_detect,
 329         .destroy = imx_ldb_connector_destroy,
 330 };
 331
 332 static struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 333         .get_modes = imx_ldb_connector_get_modes,
 334         .best_encoder = imx_ldb_connector_best_encoder,
 335         .mode_valid = imx_ldb_connector_mode_valid,
 336 };
 337
 338 static struct drm_encoder_funcs imx_ldb_encoder_funcs = {
 339         .destroy = imx_ldb_encoder_destroy,
 340 };
 341
 342 static struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 343         .dpms = imx_ldb_encoder_dpms,
 344         .mode_fixup = imx_ldb_encoder_mode_fixup,
 345         .prepare = imx_ldb_encoder_prepare,
 346         .commit = imx_ldb_encoder_commit,
 347         .mode_set = imx_ldb_encoder_mode_set,
 348         .disable = imx_ldb_encoder_disable,
 349 };
 350
 351 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 352 {
 353         char clkname[16];
 354
 355         sprintf(clkname, "di%d", chno);
 356         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 357         if (IS_ERR(ldb->clk[chno]))
 358                 return PTR_ERR(ldb->clk[chno]);
 359
 360         sprintf(clkname, "di%d_pll", chno);
 361         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 362
 363         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 364 }
 365
 366 static int imx_ldb_register(struct imx_ldb_channel *imx_ldb_ch)
 367 {
 368         int ret;
 369         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 370
 371         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 372         if (ret)
 373                 return ret;
 374         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 375                 ret |= imx_ldb_get_clk(ldb, 1);
 376                 if (ret)
 377                         return ret;
 378         }
 379
 380         imx_ldb_ch->connector.funcs = &imx_ldb_connector_funcs;
 381         imx_ldb_ch->encoder.funcs = &imx_ldb_encoder_funcs;
 382
 383         imx_ldb_ch->encoder.encoder_type = DRM_MODE_ENCODER_LVDS;
 384         imx_ldb_ch->connector.connector_type = DRM_MODE_CONNECTOR_LVDS;
 385
 386         drm_encoder_helper_add(&imx_ldb_ch->encoder,
 387                         &imx_ldb_encoder_helper_funcs);
 388         ret = imx_drm_add_encoder(&imx_ldb_ch->encoder,
 389                         &imx_ldb_ch->imx_drm_encoder, THIS_MODULE);
 390         if (ret) {
 391                 dev_err(ldb->dev, "adding encoder failed with %d\n", ret);
 392                 return ret;
 393         }
 394
 395         drm_connector_helper_add(&imx_ldb_ch->connector,
 396                         &imx_ldb_connector_helper_funcs);
 397
 398         ret = imx_drm_add_connector(&imx_ldb_ch->connector,
 399                         &imx_ldb_ch->imx_drm_connector, THIS_MODULE);
 400         if (ret) {
 401                 imx_drm_remove_encoder(imx_ldb_ch->imx_drm_encoder);
 402                 dev_err(ldb->dev, "adding connector failed with %d\n", ret);
 403                 return ret;
 404         }
 405
 406         drm_mode_connector_attach_encoder(&imx_ldb_ch->connector,
 407                         &imx_ldb_ch->encoder);
 408
 409         return 0;
 410 }
 411
 412 enum {
 413         LVDS_BIT_MAP_SPWG,
 414         LVDS_BIT_MAP_JEIDA
 415 };
 416
 417 static const char *imx_ldb_bit_mappings[] = {
 418         [LVDS_BIT_MAP_SPWG]  = "spwg",
 419         [LVDS_BIT_MAP_JEIDA] = "jeida",
 420 };
 421
 422 static const int of_get_data_mapping(struct device_node *np)
 423 {
 424         const char *bm;
 425         int ret, i;
 426
 427         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 428         if (ret < 0)
 429                 return ret;
 430
 431         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++)
 432                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i]))
 433                         return i;
 434
 435         return -EINVAL;
 436 }
 437
 438 static struct bus_mux imx6q_lvds_mux[2] = {
 439         {
 440                 .reg = IOMUXC_GPR3,
 441                 .shift = 6,
 442                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 443         }, {
 444                 .reg = IOMUXC_GPR3,
 445                 .shift = 8,
 446                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 447         }
 448 };
 449
 450 /*
 451  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 452  * of_match_device will walk through this list and take the first entry
 453  * matching any of its compatible values. Therefore, the more generic
 454  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 455  */
 456 static const struct of_device_id imx_ldb_dt_ids[] = {
 457         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 458         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 459         { }
 460 };
 461 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 462
 463 static int imx_ldb_probe(struct platform_device *pdev)
 464 {
 465         struct device_node *np = pdev->dev.of_node;
 466         const struct of_device_id *of_id =
 467                         of_match_device(imx_ldb_dt_ids, &pdev->dev);
 468         struct device_node *child;
 469         const u8 *edidp;
 470         struct imx_ldb *imx_ldb;
 471         int datawidth;
 472         int mapping;
 473         int dual;
 474         int ret;
 475         int i;
 476
 477         imx_ldb = devm_kzalloc(&pdev->dev, sizeof(*imx_ldb), GFP_KERNEL);
 478         if (!imx_ldb)
 479                 return -ENOMEM;
 480
 481         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 482         if (IS_ERR(imx_ldb->regmap)) {
 483                 dev_err(&pdev->dev, "failed to get parent regmap\n");
 484                 return PTR_ERR(imx_ldb->regmap);
 485         }
 486
 487         imx_ldb->dev = &pdev->dev;
 488
 489         if (of_id)
 490                 imx_ldb->lvds_mux = of_id->data;
 491
 492         dual = of_property_read_bool(np, "fsl,dual-channel");
 493         if (dual)
 494                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 495
 496         /*
 497          * There are three different possible clock mux configurations:
 498          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 499          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 500          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 501          * Map them all to di0_sel...di3_sel.
 502          */
 503         for (i = 0; i < 4; i++) {
 504                 char clkname[16];
 505
 506                 sprintf(clkname, "di%d_sel", i);
 507                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 508                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 509                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 510                         imx_ldb->clk_sel[i] = NULL;
 511                         break;
 512                 }
 513         }
 514         if (i == 0)
 515                 return ret;
 516
 517         for_each_child_of_node(np, child) {
 518                 struct imx_ldb_channel *channel;
 519
 520                 ret = of_property_read_u32(child, "reg", &i);
 521                 if (ret || i < 0 || i > 1)
 522                         return -EINVAL;
 523
 524                 if (dual && i > 0) {
 525                         dev_warn(&pdev->dev, "dual-channel mode, ignoring second output\n");
 526                         continue;
 527                 }
 528
 529                 if (!of_device_is_available(child))
 530                         continue;
 531
 532                 channel = &imx_ldb->channel[i];
 533                 channel->ldb = imx_ldb;
 534                 channel->chno = i;
 535
 536                 edidp = of_get_property(child, "edid", &channel->edid_len);
 537                 if (edidp) {
 538                         channel->edid = kmemdup(edidp, channel->edid_len,
 539                                                 GFP_KERNEL);
 540                 } else {
 541                         ret = of_get_drm_display_mode(child, &channel->mode, 0);
 542                         if (!ret)
 543                                 channel->mode_valid = 1;
 544                 }
 545
 546                 ret = of_property_read_u32(child, "fsl,data-width", &datawidth);
 547                 if (ret)
 548                         datawidth = 0;
 549                 else if (datawidth != 18 && datawidth != 24)
 550                         return -EINVAL;
 551
 552                 mapping = of_get_data_mapping(child);
 553                 switch (mapping) {
 554                 case LVDS_BIT_MAP_SPWG:
 555                         if (datawidth == 24) {
 556                                 if (i == 0 || dual)
 557                                         imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 558                                 if (i == 1 || dual)
 559                                         imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 560                         }
 561                         break;
 562                 case LVDS_BIT_MAP_JEIDA:
 563                         if (datawidth == 18) {
 564                                 dev_err(&pdev->dev, "JEIDA standard only supported in 24 bit\n");
 565                                 return -EINVAL;
 566                         }
 567                         if (i == 0 || dual)
 568                                 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 | LDB_BIT_MAP_CH0_JEIDA;
 569                         if (i == 1 || dual)
 570                                 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 | LDB_BIT_MAP_CH1_JEIDA;
 571                         break;
 572                 default:
 573                         dev_err(&pdev->dev, "data mapping not specified or invalid\n");
 574                         return -EINVAL;
 575                 }
 576
 577                 ret = imx_ldb_register(channel);
 578                 if (ret)
 579                         return ret;
 580
 581                 imx_drm_encoder_add_possible_crtcs(channel->imx_drm_encoder, child);
 582         }
 583
 584         platform_set_drvdata(pdev, imx_ldb);
 585
 586         return 0;
 587 }
 588
 589 static int imx_ldb_remove(struct platform_device *pdev)
 590 {
 591         struct imx_ldb *imx_ldb = platform_get_drvdata(pdev);
 592         int i;
 593
 594         for (i = 0; i < 2; i++) {
 595                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 596                 struct drm_connector *connector = &channel->connector;
 597                 struct drm_encoder *encoder = &channel->encoder;
 598
 599                 drm_mode_connector_detach_encoder(connector, encoder);
 600
 601                 imx_drm_remove_connector(channel->imx_drm_connector);
 602                 imx_drm_remove_encoder(channel->imx_drm_encoder);
 603         }
 604
 605         return 0;
 606 }
 607
 608 static struct platform_driver imx_ldb_driver = {
 609         .probe          = imx_ldb_probe,
 610         .remove         = imx_ldb_remove,
 611         .driver         = {
 612                 .of_match_table = imx_ldb_dt_ids,
 613                 .name   = DRIVER_NAME,
 614                 .owner  = THIS_MODULE,
 615         },
 616 };
 617
 618 module_platform_driver(imx_ldb_driver);
 619
 620 MODULE_DESCRIPTION("i.MX LVDS driver");
 621 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 622 MODULE_LICENSE("GPL");
 623 MODULE_ALIAS("platform:" DRIVER_NAME);