3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2003-2012, Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/kernel.h>
22 #include <linux/device.h>
24 #include <linux/errno.h>
25 #include <linux/types.h>
26 #include <linux/fcntl.h>
27 #include <linux/aio.h>
28 #include <linux/pci.h>
29 #include <linux/poll.h>
30 #include <linux/init.h>
31 #include <linux/ioctl.h>
32 #include <linux/cdev.h>
33 #include <linux/sched.h>
34 #include <linux/uuid.h>
35 #include <linux/compat.h>
36 #include <linux/jiffies.h>
37 #include <linux/interrupt.h>
38 #include <linux/miscdevice.h>
40 #include <linux/mei.h>
46 /* mei_pci_tbl - PCI Device ID Table */
47 static DEFINE_PCI_DEVICE_TABLE(mei_me_pci_tbl
) = {
48 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_82946GZ
)},
49 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_82G35
)},
50 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_82Q965
)},
51 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_82G965
)},
52 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_82GM965
)},
53 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_82GME965
)},
54 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9_82Q35
)},
55 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9_82G33
)},
56 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9_82Q33
)},
57 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9_82X38
)},
58 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9_3200
)},
59 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9_6
)},
60 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9_7
)},
61 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9_8
)},
62 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9_9
)},
63 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9_10
)},
64 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9M_1
)},
65 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9M_2
)},
66 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9M_3
)},
67 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH9M_4
)},
68 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH10_1
)},
69 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH10_2
)},
70 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH10_3
)},
71 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_ICH10_4
)},
72 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_IBXPK_1
)},
73 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_IBXPK_2
)},
74 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_CPT_1
)},
75 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_PBG_1
)},
76 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_PPT_1
)},
77 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_PPT_2
)},
78 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_PPT_3
)},
79 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_LPT
)},
80 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_LPT_W
)},
81 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, MEI_DEV_ID_LPT_LP
)},
83 /* required last entry */
87 MODULE_DEVICE_TABLE(pci
, mei_me_pci_tbl
);
90 * mei_quirk_probe - probe for devices that doesn't valid ME interface
92 * @pdev: PCI device structure
93 * @ent: entry into pci_device_table
95 * returns true if ME Interface is valid, false otherwise
97 static bool mei_me_quirk_probe(struct pci_dev
*pdev
,
98 const struct pci_device_id
*ent
)
101 if (ent
->device
== MEI_DEV_ID_PBG_1
) {
102 pci_read_config_dword(pdev
, 0x48, ®
);
103 /* make sure that bit 9 is up and bit 10 is down */
104 if ((reg
& 0x600) == 0x200) {
105 dev_info(&pdev
->dev
, "Device doesn't have valid ME Interface\n");
112 * mei_probe - Device Initialization Routine
114 * @pdev: PCI device structure
115 * @ent: entry in kcs_pci_tbl
117 * returns 0 on success, <0 on failure.
119 static int mei_me_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
121 struct mei_device
*dev
;
122 struct mei_me_hw
*hw
;
126 if (!mei_me_quirk_probe(pdev
, ent
)) {
132 err
= pci_enable_device(pdev
);
134 dev_err(&pdev
->dev
, "failed to enable pci device.\n");
137 /* set PCI host mastering */
138 pci_set_master(pdev
);
139 /* pci request regions for mei driver */
140 err
= pci_request_regions(pdev
, KBUILD_MODNAME
);
142 dev_err(&pdev
->dev
, "failed to get pci regions.\n");
145 /* allocates and initializes the mei dev structure */
146 dev
= mei_me_dev_init(pdev
);
149 goto release_regions
;
152 /* mapping IO device memory */
153 hw
->mem_addr
= pci_iomap(pdev
, 0, 0);
155 dev_err(&pdev
->dev
, "mapping I/O device memory failure.\n");
159 pci_enable_msi(pdev
);
161 /* request and enable interrupt */
162 if (pci_dev_msi_enabled(pdev
))
163 err
= request_threaded_irq(pdev
->irq
,
165 mei_me_irq_thread_handler
,
166 IRQF_ONESHOT
, KBUILD_MODNAME
, dev
);
168 err
= request_threaded_irq(pdev
->irq
,
169 mei_me_irq_quick_handler
,
170 mei_me_irq_thread_handler
,
171 IRQF_SHARED
, KBUILD_MODNAME
, dev
);
174 dev_err(&pdev
->dev
, "request_threaded_irq failure. irq = %d\n",
179 if (mei_start(dev
)) {
180 dev_err(&pdev
->dev
, "init hw failure.\n");
185 err
= mei_register(dev
);
189 pci_set_drvdata(pdev
, dev
);
191 schedule_delayed_work(&dev
->timer_work
, HZ
);
193 dev_dbg(&pdev
->dev
, "initialization successful.\n");
198 mei_disable_interrupts(dev
);
199 flush_scheduled_work();
200 free_irq(pdev
->irq
, dev
);
202 pci_disable_msi(pdev
);
203 pci_iounmap(pdev
, hw
->mem_addr
);
207 pci_release_regions(pdev
);
209 pci_disable_device(pdev
);
211 dev_err(&pdev
->dev
, "initialization failed.\n");
216 * mei_remove - Device Removal Routine
218 * @pdev: PCI device structure
220 * mei_remove is called by the PCI subsystem to alert the driver
221 * that it should release a PCI device.
223 static void mei_me_remove(struct pci_dev
*pdev
)
225 struct mei_device
*dev
;
226 struct mei_me_hw
*hw
;
228 dev
= pci_get_drvdata(pdev
);
235 dev_dbg(&pdev
->dev
, "stop\n");
238 /* disable interrupts */
239 mei_disable_interrupts(dev
);
241 free_irq(pdev
->irq
, dev
);
242 pci_disable_msi(pdev
);
245 pci_iounmap(pdev
, hw
->mem_addr
);
251 pci_release_regions(pdev
);
252 pci_disable_device(pdev
);
257 static int mei_me_pci_suspend(struct device
*device
)
259 struct pci_dev
*pdev
= to_pci_dev(device
);
260 struct mei_device
*dev
= pci_get_drvdata(pdev
);
265 dev_dbg(&pdev
->dev
, "suspend\n");
269 mei_disable_interrupts(dev
);
271 free_irq(pdev
->irq
, dev
);
272 pci_disable_msi(pdev
);
277 static int mei_me_pci_resume(struct device
*device
)
279 struct pci_dev
*pdev
= to_pci_dev(device
);
280 struct mei_device
*dev
;
283 dev
= pci_get_drvdata(pdev
);
287 pci_enable_msi(pdev
);
289 /* request and enable interrupt */
290 if (pci_dev_msi_enabled(pdev
))
291 err
= request_threaded_irq(pdev
->irq
,
293 mei_me_irq_thread_handler
,
294 IRQF_ONESHOT
, KBUILD_MODNAME
, dev
);
296 err
= request_threaded_irq(pdev
->irq
,
297 mei_me_irq_quick_handler
,
298 mei_me_irq_thread_handler
,
299 IRQF_SHARED
, KBUILD_MODNAME
, dev
);
302 dev_err(&pdev
->dev
, "request_threaded_irq failed: irq = %d.\n",
307 mutex_lock(&dev
->device_lock
);
308 dev
->dev_state
= MEI_DEV_POWER_UP
;
309 mei_clear_interrupts(dev
);
311 mutex_unlock(&dev
->device_lock
);
313 /* Start timer if stopped in suspend */
314 schedule_delayed_work(&dev
->timer_work
, HZ
);
318 static SIMPLE_DEV_PM_OPS(mei_me_pm_ops
, mei_me_pci_suspend
, mei_me_pci_resume
);
319 #define MEI_ME_PM_OPS (&mei_me_pm_ops)
321 #define MEI_ME_PM_OPS NULL
322 #endif /* CONFIG_PM */
324 * PCI driver structure
326 static struct pci_driver mei_me_driver
= {
327 .name
= KBUILD_MODNAME
,
328 .id_table
= mei_me_pci_tbl
,
329 .probe
= mei_me_probe
,
330 .remove
= mei_me_remove
,
331 .shutdown
= mei_me_remove
,
332 .driver
.pm
= MEI_ME_PM_OPS
,
335 module_pci_driver(mei_me_driver
);
337 MODULE_AUTHOR("Intel Corporation");
338 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
339 MODULE_LICENSE("GPL v2");