drivers/media/tuners/e4000.c

   1 /*
   2  * Elonics E4000 silicon tuner driver
   3  *
   4  * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; either version 2 of the License, or
   9  *    (at your option) any later version.
  10  *
  11  *    This program is distributed in the hope that it will be useful,
  12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *    GNU General Public License for more details.
  15  *
  16  *    You should have received a copy of the GNU General Public License along
  17  *    with this program; if not, write to the Free Software Foundation, Inc.,
  18  *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 #include "e4000_priv.h"
  22 #include <linux/math64.h>
  23
  24 /* Max transfer size done by I2C transfer functions */
  25 #define MAX_XFER_SIZE  64
  26
  27 /* write multiple registers */
  28 static int e4000_wr_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
  29 {
  30         int ret;
  31         u8 buf[MAX_XFER_SIZE];
  32         struct i2c_msg msg[1] = {
  33                 {
  34                         .addr = priv->cfg->i2c_addr,
  35                         .flags = 0,
  36                         .len = 1 + len,
  37                         .buf = buf,
  38                 }
  39         };
  40
  41         if (1 + len > sizeof(buf)) {
  42                 dev_warn(&priv->i2c->dev,
  43                          "%s: i2c wr reg=%04x: len=%d is too big!\n",
  44                          KBUILD_MODNAME, reg, len);
  45                 return -EINVAL;
  46         }
  47
  48         buf[0] = reg;
  49         memcpy(&buf[1], val, len);
  50
  51         ret = i2c_transfer(priv->i2c, msg, 1);
  52         if (ret == 1) {
  53                 ret = 0;
  54         } else {
  55                 dev_warn(&priv->i2c->dev,
  56                                 "%s: i2c wr failed=%d reg=%02x len=%d\n",
  57                                 KBUILD_MODNAME, ret, reg, len);
  58                 ret = -EREMOTEIO;
  59         }
  60         return ret;
  61 }
  62
  63 /* read multiple registers */
  64 static int e4000_rd_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
  65 {
  66         int ret;
  67         u8 buf[MAX_XFER_SIZE];
  68         struct i2c_msg msg[2] = {
  69                 {
  70                         .addr = priv->cfg->i2c_addr,
  71                         .flags = 0,
  72                         .len = 1,
  73                         .buf = &reg,
  74                 }, {
  75                         .addr = priv->cfg->i2c_addr,
  76                         .flags = I2C_M_RD,
  77                         .len = len,
  78                         .buf = buf,
  79                 }
  80         };
  81
  82         if (len > sizeof(buf)) {
  83                 dev_warn(&priv->i2c->dev,
  84                          "%s: i2c rd reg=%04x: len=%d is too big!\n",
  85                          KBUILD_MODNAME, reg, len);
  86                 return -EINVAL;
  87         }
  88
  89         ret = i2c_transfer(priv->i2c, msg, 2);
  90         if (ret == 2) {
  91                 memcpy(val, buf, len);
  92                 ret = 0;
  93         } else {
  94                 dev_warn(&priv->i2c->dev,
  95                                 "%s: i2c rd failed=%d reg=%02x len=%d\n",
  96                                 KBUILD_MODNAME, ret, reg, len);
  97                 ret = -EREMOTEIO;
  98         }
  99
 100         return ret;
 101 }
 102
 103 /* write single register */
 104 static int e4000_wr_reg(struct e4000_priv *priv, u8 reg, u8 val)
 105 {
 106         return e4000_wr_regs(priv, reg, &val, 1);
 107 }
 108
 109 /* read single register */
 110 static int e4000_rd_reg(struct e4000_priv *priv, u8 reg, u8 *val)
 111 {
 112         return e4000_rd_regs(priv, reg, val, 1);
 113 }
 114
 115 static int e4000_init(struct dvb_frontend *fe)
 116 {
 117         struct e4000_priv *priv = fe->tuner_priv;
 118         int ret;
 119
 120         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
 121
 122         if (fe->ops.i2c_gate_ctrl)
 123                 fe->ops.i2c_gate_ctrl(fe, 1);
 124
 125         /* dummy I2C to ensure I2C wakes up */
 126         ret = e4000_wr_reg(priv, 0x02, 0x40);
 127
 128         /* reset */
 129         ret = e4000_wr_reg(priv, 0x00, 0x01);
 130         if (ret < 0)
 131                 goto err;
 132
 133         /* disable output clock */
 134         ret = e4000_wr_reg(priv, 0x06, 0x00);
 135         if (ret < 0)
 136                 goto err;
 137
 138         ret = e4000_wr_reg(priv, 0x7a, 0x96);
 139         if (ret < 0)
 140                 goto err;
 141
 142         /* configure gains */
 143         ret = e4000_wr_regs(priv, 0x7e, "\x01\xfe", 2);
 144         if (ret < 0)
 145                 goto err;
 146
 147         ret = e4000_wr_reg(priv, 0x82, 0x00);
 148         if (ret < 0)
 149                 goto err;
 150
 151         ret = e4000_wr_reg(priv, 0x24, 0x05);
 152         if (ret < 0)
 153                 goto err;
 154
 155         ret = e4000_wr_regs(priv, 0x87, "\x20\x01", 2);
 156         if (ret < 0)
 157                 goto err;
 158
 159         ret = e4000_wr_regs(priv, 0x9f, "\x7f\x07", 2);
 160         if (ret < 0)
 161                 goto err;
 162
 163         /* DC offset control */
 164         ret = e4000_wr_reg(priv, 0x2d, 0x1f);
 165         if (ret < 0)
 166                 goto err;
 167
 168         ret = e4000_wr_regs(priv, 0x70, "\x01\x01", 2);
 169         if (ret < 0)
 170                 goto err;
 171
 172         /* gain control */
 173         ret = e4000_wr_reg(priv, 0x1a, 0x17);
 174         if (ret < 0)
 175                 goto err;
 176
 177         ret = e4000_wr_reg(priv, 0x1f, 0x1a);
 178         if (ret < 0)
 179                 goto err;
 180
 181         if (fe->ops.i2c_gate_ctrl)
 182                 fe->ops.i2c_gate_ctrl(fe, 0);
 183
 184         return 0;
 185 err:
 186         if (fe->ops.i2c_gate_ctrl)
 187                 fe->ops.i2c_gate_ctrl(fe, 0);
 188
 189         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 190         return ret;
 191 }
 192
 193 static int e4000_sleep(struct dvb_frontend *fe)
 194 {
 195         struct e4000_priv *priv = fe->tuner_priv;
 196         int ret;
 197
 198         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
 199
 200         if (fe->ops.i2c_gate_ctrl)
 201                 fe->ops.i2c_gate_ctrl(fe, 1);
 202
 203         ret = e4000_wr_reg(priv, 0x00, 0x00);
 204         if (ret < 0)
 205                 goto err;
 206
 207         if (fe->ops.i2c_gate_ctrl)
 208                 fe->ops.i2c_gate_ctrl(fe, 0);
 209
 210         return 0;
 211 err:
 212         if (fe->ops.i2c_gate_ctrl)
 213                 fe->ops.i2c_gate_ctrl(fe, 0);
 214
 215         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 216         return ret;
 217 }
 218
 219 static int e4000_set_params(struct dvb_frontend *fe)
 220 {
 221         struct e4000_priv *priv = fe->tuner_priv;
 222         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 223         int ret, i, sigma_delta;
 224         unsigned int f_vco;
 225         u8 buf[5], i_data[4], q_data[4];
 226
 227         dev_dbg(&priv->i2c->dev,
 228                         "%s: delivery_system=%d frequency=%d bandwidth_hz=%d\n",
 229                         __func__, c->delivery_system, c->frequency,
 230                         c->bandwidth_hz);
 231
 232         if (fe->ops.i2c_gate_ctrl)
 233                 fe->ops.i2c_gate_ctrl(fe, 1);
 234
 235         /* gain control manual */
 236         ret = e4000_wr_reg(priv, 0x1a, 0x00);
 237         if (ret < 0)
 238                 goto err;
 239
 240         /* PLL */
 241         for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
 242                 if (c->frequency <= e4000_pll_lut[i].freq)
 243                         break;
 244         }
 245
 246         if (i == ARRAY_SIZE(e4000_pll_lut))
 247                 goto err;
 248
 249         /*
 250          * Note: Currently f_vco overflows when c->frequency is 1 073 741 824 Hz
 251          * or more.
 252          */
 253         f_vco = c->frequency * e4000_pll_lut[i].mul;
 254         sigma_delta = div_u64(0x10000ULL * (f_vco % priv->cfg->clock), priv->cfg->clock);
 255         buf[0] = f_vco / priv->cfg->clock;
 256         buf[1] = (sigma_delta >> 0) & 0xff;
 257         buf[2] = (sigma_delta >> 8) & 0xff;
 258         buf[3] = 0x00;
 259         buf[4] = e4000_pll_lut[i].div;
 260
 261         dev_dbg(&priv->i2c->dev, "%s: f_vco=%u pll div=%d sigma_delta=%04x\n",
 262                         __func__, f_vco, buf[0], sigma_delta);
 263
 264         ret = e4000_wr_regs(priv, 0x09, buf, 5);
 265         if (ret < 0)
 266                 goto err;
 267
 268         /* LNA filter (RF filter) */
 269         for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
 270                 if (c->frequency <= e400_lna_filter_lut[i].freq)
 271                         break;
 272         }
 273
 274         if (i == ARRAY_SIZE(e400_lna_filter_lut))
 275                 goto err;
 276
 277         ret = e4000_wr_reg(priv, 0x10, e400_lna_filter_lut[i].val);
 278         if (ret < 0)
 279                 goto err;
 280
 281         /* IF filters */
 282         for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
 283                 if (c->bandwidth_hz <= e4000_if_filter_lut[i].freq)
 284                         break;
 285         }
 286
 287         if (i == ARRAY_SIZE(e4000_if_filter_lut))
 288                 goto err;
 289
 290         buf[0] = e4000_if_filter_lut[i].reg11_val;
 291         buf[1] = e4000_if_filter_lut[i].reg12_val;
 292
 293         ret = e4000_wr_regs(priv, 0x11, buf, 2);
 294         if (ret < 0)
 295                 goto err;
 296
 297         /* frequency band */
 298         for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
 299                 if (c->frequency <= e4000_band_lut[i].freq)
 300                         break;
 301         }
 302
 303         if (i == ARRAY_SIZE(e4000_band_lut))
 304                 goto err;
 305
 306         ret = e4000_wr_reg(priv, 0x07, e4000_band_lut[i].reg07_val);
 307         if (ret < 0)
 308                 goto err;
 309
 310         ret = e4000_wr_reg(priv, 0x78, e4000_band_lut[i].reg78_val);
 311         if (ret < 0)
 312                 goto err;
 313
 314         /* DC offset */
 315         for (i = 0; i < 4; i++) {
 316                 if (i == 0)
 317                         ret = e4000_wr_regs(priv, 0x15, "\x00\x7e\x24", 3);
 318                 else if (i == 1)
 319                         ret = e4000_wr_regs(priv, 0x15, "\x00\x7f", 2);
 320                 else if (i == 2)
 321                         ret = e4000_wr_regs(priv, 0x15, "\x01", 1);
 322                 else
 323                         ret = e4000_wr_regs(priv, 0x16, "\x7e", 1);
 324
 325                 if (ret < 0)
 326                         goto err;
 327
 328                 ret = e4000_wr_reg(priv, 0x29, 0x01);
 329                 if (ret < 0)
 330                         goto err;
 331
 332                 ret = e4000_rd_regs(priv, 0x2a, buf, 3);
 333                 if (ret < 0)
 334                         goto err;
 335
 336                 i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
 337                 q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
 338         }
 339
 340         swap(q_data[2], q_data[3]);
 341         swap(i_data[2], i_data[3]);
 342
 343         ret = e4000_wr_regs(priv, 0x50, q_data, 4);
 344         if (ret < 0)
 345                 goto err;
 346
 347         ret = e4000_wr_regs(priv, 0x60, i_data, 4);
 348         if (ret < 0)
 349                 goto err;
 350
 351         /* gain control auto */
 352         ret = e4000_wr_reg(priv, 0x1a, 0x17);
 353         if (ret < 0)
 354                 goto err;
 355
 356         if (fe->ops.i2c_gate_ctrl)
 357                 fe->ops.i2c_gate_ctrl(fe, 0);
 358
 359         return 0;
 360 err:
 361         if (fe->ops.i2c_gate_ctrl)
 362                 fe->ops.i2c_gate_ctrl(fe, 0);
 363
 364         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 365         return ret;
 366 }
 367
 368 static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
 369 {
 370         struct e4000_priv *priv = fe->tuner_priv;
 371
 372         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
 373
 374         *frequency = 0; /* Zero-IF */
 375
 376         return 0;
 377 }
 378
 379 static int e4000_release(struct dvb_frontend *fe)
 380 {
 381         struct e4000_priv *priv = fe->tuner_priv;
 382
 383         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
 384
 385         kfree(fe->tuner_priv);
 386
 387         return 0;
 388 }
 389
 390 static const struct dvb_tuner_ops e4000_tuner_ops = {
 391         .info = {
 392                 .name           = "Elonics E4000",
 393                 .frequency_min  = 174000000,
 394                 .frequency_max  = 862000000,
 395         },
 396
 397         .release = e4000_release,
 398
 399         .init = e4000_init,
 400         .sleep = e4000_sleep,
 401         .set_params = e4000_set_params,
 402
 403         .get_if_frequency = e4000_get_if_frequency,
 404 };
 405
 406 struct dvb_frontend *e4000_attach(struct dvb_frontend *fe,
 407                 struct i2c_adapter *i2c, const struct e4000_config *cfg)
 408 {
 409         struct e4000_priv *priv;
 410         int ret;
 411         u8 chip_id;
 412
 413         if (fe->ops.i2c_gate_ctrl)
 414                 fe->ops.i2c_gate_ctrl(fe, 1);
 415
 416         priv = kzalloc(sizeof(struct e4000_priv), GFP_KERNEL);
 417         if (!priv) {
 418                 ret = -ENOMEM;
 419                 dev_err(&i2c->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
 420                 goto err;
 421         }
 422
 423         priv->cfg = cfg;
 424         priv->i2c = i2c;
 425
 426         /* check if the tuner is there */
 427         ret = e4000_rd_reg(priv, 0x02, &chip_id);
 428         if (ret < 0)
 429                 goto err;
 430
 431         dev_dbg(&priv->i2c->dev, "%s: chip_id=%02x\n", __func__, chip_id);
 432
 433         if (chip_id != 0x40)
 434                 goto err;
 435
 436         /* put sleep as chip seems to be in normal mode by default */
 437         ret = e4000_wr_reg(priv, 0x00, 0x00);
 438         if (ret < 0)
 439                 goto err;
 440
 441         dev_info(&priv->i2c->dev,
 442                         "%s: Elonics E4000 successfully identified\n",
 443                         KBUILD_MODNAME);
 444
 445         fe->tuner_priv = priv;
 446         memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops,
 447                         sizeof(struct dvb_tuner_ops));
 448
 449         if (fe->ops.i2c_gate_ctrl)
 450                 fe->ops.i2c_gate_ctrl(fe, 0);
 451
 452         return fe;
 453 err:
 454         if (fe->ops.i2c_gate_ctrl)
 455                 fe->ops.i2c_gate_ctrl(fe, 0);
 456
 457         dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
 458         kfree(priv);
 459         return NULL;
 460 }
 461 EXPORT_SYMBOL(e4000_attach);
 462
 463 MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
 464 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
 465 MODULE_LICENSE("GPL");