2 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
3 Philip Edelbrock <phil@netroedge.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
24 ATI IXP200, IXP300, IXP400, SB600, SB700/SP5100, SB800
28 Note: we assume there can only be one device, with one or more
32 #include <linux/module.h>
33 #include <linux/moduleparam.h>
34 #include <linux/pci.h>
35 #include <linux/kernel.h>
36 #include <linux/delay.h>
37 #include <linux/stddef.h>
38 #include <linux/ioport.h>
39 #include <linux/i2c.h>
40 #include <linux/slab.h>
41 #include <linux/init.h>
42 #include <linux/dmi.h>
43 #include <linux/acpi.h>
47 /* PIIX4 SMBus address offsets */
48 #define SMBHSTSTS (0 + piix4_smba)
49 #define SMBHSLVSTS (1 + piix4_smba)
50 #define SMBHSTCNT (2 + piix4_smba)
51 #define SMBHSTCMD (3 + piix4_smba)
52 #define SMBHSTADD (4 + piix4_smba)
53 #define SMBHSTDAT0 (5 + piix4_smba)
54 #define SMBHSTDAT1 (6 + piix4_smba)
55 #define SMBBLKDAT (7 + piix4_smba)
56 #define SMBSLVCNT (8 + piix4_smba)
57 #define SMBSHDWCMD (9 + piix4_smba)
58 #define SMBSLVEVT (0xA + piix4_smba)
59 #define SMBSLVDAT (0xC + piix4_smba)
61 /* count for request_region */
64 /* PCI Address Constants */
66 #define SMBHSTCFG 0x0D2
68 #define SMBSHDW1 0x0D4
69 #define SMBSHDW2 0x0D5
73 #define MAX_TIMEOUT 500
77 #define PIIX4_QUICK 0x00
78 #define PIIX4_BYTE 0x04
79 #define PIIX4_BYTE_DATA 0x08
80 #define PIIX4_WORD_DATA 0x0C
81 #define PIIX4_BLOCK_DATA 0x14
83 /* insmod parameters */
85 /* If force is set to anything different from 0, we forcibly enable the
88 module_param (force
, int, 0);
89 MODULE_PARM_DESC(force
, "Forcibly enable the PIIX4. DANGEROUS!");
91 /* If force_addr is set to anything different from 0, we forcibly enable
92 the PIIX4 at the given address. VERY DANGEROUS! */
93 static int force_addr
;
94 module_param (force_addr
, int, 0);
95 MODULE_PARM_DESC(force_addr
,
96 "Forcibly enable the PIIX4 at the given address. "
97 "EXTREMELY DANGEROUS!");
99 static int srvrworks_csb5_delay
;
100 static struct pci_driver piix4_driver
;
102 static const struct dmi_system_id piix4_dmi_blacklist
[] = {
104 .ident
= "Sapphire AM2RD790",
106 DMI_MATCH(DMI_BOARD_VENDOR
, "SAPPHIRE Inc."),
107 DMI_MATCH(DMI_BOARD_NAME
, "PC-AM2RD790"),
111 .ident
= "DFI Lanparty UT 790FX",
113 DMI_MATCH(DMI_BOARD_VENDOR
, "DFI Inc."),
114 DMI_MATCH(DMI_BOARD_NAME
, "LP UT 790FX"),
120 /* The IBM entry is in a separate table because we only check it
121 on Intel-based systems */
122 static const struct dmi_system_id piix4_dmi_ibm
[] = {
125 .matches
= { DMI_MATCH(DMI_SYS_VENDOR
, "IBM"), },
130 struct i2c_piix4_adapdata
{
134 static int piix4_setup(struct pci_dev
*PIIX4_dev
,
135 const struct pci_device_id
*id
)
138 unsigned short piix4_smba
;
140 if ((PIIX4_dev
->vendor
== PCI_VENDOR_ID_SERVERWORKS
) &&
141 (PIIX4_dev
->device
== PCI_DEVICE_ID_SERVERWORKS_CSB5
))
142 srvrworks_csb5_delay
= 1;
144 /* On some motherboards, it was reported that accessing the SMBus
145 caused severe hardware problems */
146 if (dmi_check_system(piix4_dmi_blacklist
)) {
147 dev_err(&PIIX4_dev
->dev
,
148 "Accessing the SMBus on this system is unsafe!\n");
152 /* Don't access SMBus on IBM systems which get corrupted eeproms */
153 if (dmi_check_system(piix4_dmi_ibm
) &&
154 PIIX4_dev
->vendor
== PCI_VENDOR_ID_INTEL
) {
155 dev_err(&PIIX4_dev
->dev
, "IBM system detected; this module "
156 "may corrupt your serial eeprom! Refusing to load "
161 /* Determine the address of the SMBus areas */
163 piix4_smba
= force_addr
& 0xfff0;
166 pci_read_config_word(PIIX4_dev
, SMBBA
, &piix4_smba
);
167 piix4_smba
&= 0xfff0;
168 if(piix4_smba
== 0) {
169 dev_err(&PIIX4_dev
->dev
, "SMBus base address "
170 "uninitialized - upgrade BIOS or use "
171 "force_addr=0xaddr\n");
176 if (acpi_check_region(piix4_smba
, SMBIOSIZE
, piix4_driver
.name
))
179 if (!request_region(piix4_smba
, SMBIOSIZE
, piix4_driver
.name
)) {
180 dev_err(&PIIX4_dev
->dev
, "SMBus region 0x%x already in use!\n",
185 pci_read_config_byte(PIIX4_dev
, SMBHSTCFG
, &temp
);
187 /* If force_addr is set, we program the new address here. Just to make
188 sure, we disable the PIIX4 first. */
190 pci_write_config_byte(PIIX4_dev
, SMBHSTCFG
, temp
& 0xfe);
191 pci_write_config_word(PIIX4_dev
, SMBBA
, piix4_smba
);
192 pci_write_config_byte(PIIX4_dev
, SMBHSTCFG
, temp
| 0x01);
193 dev_info(&PIIX4_dev
->dev
, "WARNING: SMBus interface set to "
194 "new address %04x!\n", piix4_smba
);
195 } else if ((temp
& 1) == 0) {
197 /* This should never need to be done, but has been
198 * noted that many Dell machines have the SMBus
199 * interface on the PIIX4 disabled!? NOTE: This assumes
200 * I/O space and other allocations WERE done by the
201 * Bios! Don't complain if your hardware does weird
202 * things after enabling this. :') Check for Bios
203 * updates before resorting to this.
205 pci_write_config_byte(PIIX4_dev
, SMBHSTCFG
,
207 dev_notice(&PIIX4_dev
->dev
,
208 "WARNING: SMBus interface has been FORCEFULLY ENABLED!\n");
210 dev_err(&PIIX4_dev
->dev
,
211 "Host SMBus controller not enabled!\n");
212 release_region(piix4_smba
, SMBIOSIZE
);
217 if (((temp
& 0x0E) == 8) || ((temp
& 0x0E) == 2))
218 dev_dbg(&PIIX4_dev
->dev
, "Using Interrupt 9 for SMBus.\n");
219 else if ((temp
& 0x0E) == 0)
220 dev_dbg(&PIIX4_dev
->dev
, "Using Interrupt SMI# for SMBus.\n");
222 dev_err(&PIIX4_dev
->dev
, "Illegal Interrupt configuration "
223 "(or code out of date)!\n");
225 pci_read_config_byte(PIIX4_dev
, SMBREV
, &temp
);
226 dev_info(&PIIX4_dev
->dev
,
227 "SMBus Host Controller at 0x%x, revision %d\n",
233 static int piix4_setup_sb800(struct pci_dev
*PIIX4_dev
,
234 const struct pci_device_id
*id
, u8 aux
)
236 unsigned short piix4_smba
;
237 unsigned short smba_idx
= 0xcd6;
238 u8 smba_en_lo
, smba_en_hi
, i2ccfg
, i2ccfg_offset
= 0x10, smb_en
;
240 /* SB800 and later SMBus does not support forcing address */
241 if (force
|| force_addr
) {
242 dev_err(&PIIX4_dev
->dev
, "SMBus does not support "
243 "forcing address!\n");
247 /* Determine the address of the SMBus areas */
248 smb_en
= (aux
) ? 0x28 : 0x2c;
250 if (!request_region(smba_idx
, 2, "smba_idx")) {
251 dev_err(&PIIX4_dev
->dev
, "SMBus base address index region "
252 "0x%x already in use!\n", smba_idx
);
255 outb_p(smb_en
, smba_idx
);
256 smba_en_lo
= inb_p(smba_idx
+ 1);
257 outb_p(smb_en
+ 1, smba_idx
);
258 smba_en_hi
= inb_p(smba_idx
+ 1);
259 release_region(smba_idx
, 2);
261 if ((smba_en_lo
& 1) == 0) {
262 dev_err(&PIIX4_dev
->dev
,
263 "Host SMBus controller not enabled!\n");
267 piix4_smba
= ((smba_en_hi
<< 8) | smba_en_lo
) & 0xffe0;
268 if (acpi_check_region(piix4_smba
, SMBIOSIZE
, piix4_driver
.name
))
271 if (!request_region(piix4_smba
, SMBIOSIZE
, piix4_driver
.name
)) {
272 dev_err(&PIIX4_dev
->dev
, "SMBus region 0x%x already in use!\n",
277 /* Aux SMBus does not support IRQ information */
279 dev_info(&PIIX4_dev
->dev
,
280 "SMBus Host Controller at 0x%x\n", piix4_smba
);
284 /* Request the SMBus I2C bus config region */
285 if (!request_region(piix4_smba
+ i2ccfg_offset
, 1, "i2ccfg")) {
286 dev_err(&PIIX4_dev
->dev
, "SMBus I2C bus config region "
287 "0x%x already in use!\n", piix4_smba
+ i2ccfg_offset
);
288 release_region(piix4_smba
, SMBIOSIZE
);
291 i2ccfg
= inb_p(piix4_smba
+ i2ccfg_offset
);
292 release_region(piix4_smba
+ i2ccfg_offset
, 1);
295 dev_dbg(&PIIX4_dev
->dev
, "Using IRQ for SMBus.\n");
297 dev_dbg(&PIIX4_dev
->dev
, "Using SMI# for SMBus.\n");
299 dev_info(&PIIX4_dev
->dev
,
300 "SMBus Host Controller at 0x%x, revision %d\n",
301 piix4_smba
, i2ccfg
>> 4);
306 static int piix4_setup_aux(struct pci_dev
*PIIX4_dev
,
307 const struct pci_device_id
*id
,
308 unsigned short base_reg_addr
)
310 /* Set up auxiliary SMBus controllers found on some
311 * AMD chipsets e.g. SP5100 (SB700 derivative) */
313 unsigned short piix4_smba
;
315 /* Read address of auxiliary SMBus controller */
316 pci_read_config_word(PIIX4_dev
, base_reg_addr
, &piix4_smba
);
317 if ((piix4_smba
& 1) == 0) {
318 dev_dbg(&PIIX4_dev
->dev
,
319 "Auxiliary SMBus controller not enabled\n");
323 piix4_smba
&= 0xfff0;
324 if (piix4_smba
== 0) {
325 dev_dbg(&PIIX4_dev
->dev
,
326 "Auxiliary SMBus base address uninitialized\n");
330 if (acpi_check_region(piix4_smba
, SMBIOSIZE
, piix4_driver
.name
))
333 if (!request_region(piix4_smba
, SMBIOSIZE
, piix4_driver
.name
)) {
334 dev_err(&PIIX4_dev
->dev
, "Auxiliary SMBus region 0x%x "
335 "already in use!\n", piix4_smba
);
339 dev_info(&PIIX4_dev
->dev
,
340 "Auxiliary SMBus Host Controller at 0x%x\n",
346 static int piix4_transaction(struct i2c_adapter
*piix4_adapter
)
348 struct i2c_piix4_adapdata
*adapdata
= i2c_get_adapdata(piix4_adapter
);
349 unsigned short piix4_smba
= adapdata
->smba
;
354 dev_dbg(&piix4_adapter
->dev
, "Transaction (pre): CNT=%02x, CMD=%02x, "
355 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT
),
356 inb_p(SMBHSTCMD
), inb_p(SMBHSTADD
), inb_p(SMBHSTDAT0
),
359 /* Make sure the SMBus host is ready to start transmitting */
360 if ((temp
= inb_p(SMBHSTSTS
)) != 0x00) {
361 dev_dbg(&piix4_adapter
->dev
, "SMBus busy (%02x). "
362 "Resetting...\n", temp
);
363 outb_p(temp
, SMBHSTSTS
);
364 if ((temp
= inb_p(SMBHSTSTS
)) != 0x00) {
365 dev_err(&piix4_adapter
->dev
, "Failed! (%02x)\n", temp
);
368 dev_dbg(&piix4_adapter
->dev
, "Successful!\n");
372 /* start the transaction by setting bit 6 */
373 outb_p(inb(SMBHSTCNT
) | 0x040, SMBHSTCNT
);
375 /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
376 if (srvrworks_csb5_delay
) /* Extra delay for SERVERWORKS_CSB5 */
381 while ((++timeout
< MAX_TIMEOUT
) &&
382 ((temp
= inb_p(SMBHSTSTS
)) & 0x01))
385 /* If the SMBus is still busy, we give up */
386 if (timeout
== MAX_TIMEOUT
) {
387 dev_err(&piix4_adapter
->dev
, "SMBus Timeout!\n");
393 dev_err(&piix4_adapter
->dev
, "Error: Failed bus transaction\n");
398 dev_dbg(&piix4_adapter
->dev
, "Bus collision! SMBus may be "
399 "locked until next hard reset. (sorry!)\n");
400 /* Clock stops and slave is stuck in mid-transmission */
405 dev_dbg(&piix4_adapter
->dev
, "Error: no response!\n");
408 if (inb_p(SMBHSTSTS
) != 0x00)
409 outb_p(inb(SMBHSTSTS
), SMBHSTSTS
);
411 if ((temp
= inb_p(SMBHSTSTS
)) != 0x00) {
412 dev_err(&piix4_adapter
->dev
, "Failed reset at end of "
413 "transaction (%02x)\n", temp
);
415 dev_dbg(&piix4_adapter
->dev
, "Transaction (post): CNT=%02x, CMD=%02x, "
416 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT
),
417 inb_p(SMBHSTCMD
), inb_p(SMBHSTADD
), inb_p(SMBHSTDAT0
),
422 /* Return negative errno on error. */
423 static s32
piix4_access(struct i2c_adapter
* adap
, u16 addr
,
424 unsigned short flags
, char read_write
,
425 u8 command
, int size
, union i2c_smbus_data
* data
)
427 struct i2c_piix4_adapdata
*adapdata
= i2c_get_adapdata(adap
);
428 unsigned short piix4_smba
= adapdata
->smba
;
433 case I2C_SMBUS_QUICK
:
434 outb_p((addr
<< 1) | read_write
,
439 outb_p((addr
<< 1) | read_write
,
441 if (read_write
== I2C_SMBUS_WRITE
)
442 outb_p(command
, SMBHSTCMD
);
445 case I2C_SMBUS_BYTE_DATA
:
446 outb_p((addr
<< 1) | read_write
,
448 outb_p(command
, SMBHSTCMD
);
449 if (read_write
== I2C_SMBUS_WRITE
)
450 outb_p(data
->byte
, SMBHSTDAT0
);
451 size
= PIIX4_BYTE_DATA
;
453 case I2C_SMBUS_WORD_DATA
:
454 outb_p((addr
<< 1) | read_write
,
456 outb_p(command
, SMBHSTCMD
);
457 if (read_write
== I2C_SMBUS_WRITE
) {
458 outb_p(data
->word
& 0xff, SMBHSTDAT0
);
459 outb_p((data
->word
& 0xff00) >> 8, SMBHSTDAT1
);
461 size
= PIIX4_WORD_DATA
;
463 case I2C_SMBUS_BLOCK_DATA
:
464 outb_p((addr
<< 1) | read_write
,
466 outb_p(command
, SMBHSTCMD
);
467 if (read_write
== I2C_SMBUS_WRITE
) {
468 len
= data
->block
[0];
469 if (len
== 0 || len
> I2C_SMBUS_BLOCK_MAX
)
471 outb_p(len
, SMBHSTDAT0
);
472 i
= inb_p(SMBHSTCNT
); /* Reset SMBBLKDAT */
473 for (i
= 1; i
<= len
; i
++)
474 outb_p(data
->block
[i
], SMBBLKDAT
);
476 size
= PIIX4_BLOCK_DATA
;
479 dev_warn(&adap
->dev
, "Unsupported transaction %d\n", size
);
483 outb_p((size
& 0x1C) + (ENABLE_INT9
& 1), SMBHSTCNT
);
485 status
= piix4_transaction(adap
);
489 if ((read_write
== I2C_SMBUS_WRITE
) || (size
== PIIX4_QUICK
))
495 case PIIX4_BYTE_DATA
:
496 data
->byte
= inb_p(SMBHSTDAT0
);
498 case PIIX4_WORD_DATA
:
499 data
->word
= inb_p(SMBHSTDAT0
) + (inb_p(SMBHSTDAT1
) << 8);
501 case PIIX4_BLOCK_DATA
:
502 data
->block
[0] = inb_p(SMBHSTDAT0
);
503 if (data
->block
[0] == 0 || data
->block
[0] > I2C_SMBUS_BLOCK_MAX
)
505 i
= inb_p(SMBHSTCNT
); /* Reset SMBBLKDAT */
506 for (i
= 1; i
<= data
->block
[0]; i
++)
507 data
->block
[i
] = inb_p(SMBBLKDAT
);
513 static u32
piix4_func(struct i2c_adapter
*adapter
)
515 return I2C_FUNC_SMBUS_QUICK
| I2C_FUNC_SMBUS_BYTE
|
516 I2C_FUNC_SMBUS_BYTE_DATA
| I2C_FUNC_SMBUS_WORD_DATA
|
517 I2C_FUNC_SMBUS_BLOCK_DATA
;
520 static const struct i2c_algorithm smbus_algorithm
= {
521 .smbus_xfer
= piix4_access
,
522 .functionality
= piix4_func
,
525 static DEFINE_PCI_DEVICE_TABLE(piix4_ids
) = {
526 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82371AB_3
) },
527 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82443MX_3
) },
528 { PCI_DEVICE(PCI_VENDOR_ID_EFAR
, PCI_DEVICE_ID_EFAR_SLC90E66_3
) },
529 { PCI_DEVICE(PCI_VENDOR_ID_ATI
, PCI_DEVICE_ID_ATI_IXP200_SMBUS
) },
530 { PCI_DEVICE(PCI_VENDOR_ID_ATI
, PCI_DEVICE_ID_ATI_IXP300_SMBUS
) },
531 { PCI_DEVICE(PCI_VENDOR_ID_ATI
, PCI_DEVICE_ID_ATI_IXP400_SMBUS
) },
532 { PCI_DEVICE(PCI_VENDOR_ID_ATI
, PCI_DEVICE_ID_ATI_SBX00_SMBUS
) },
533 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS
) },
534 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, 0x790b) },
535 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS
,
536 PCI_DEVICE_ID_SERVERWORKS_OSB4
) },
537 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS
,
538 PCI_DEVICE_ID_SERVERWORKS_CSB5
) },
539 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS
,
540 PCI_DEVICE_ID_SERVERWORKS_CSB6
) },
541 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS
,
542 PCI_DEVICE_ID_SERVERWORKS_HT1000SB
) },
543 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS
,
544 PCI_DEVICE_ID_SERVERWORKS_HT1100LD
) },
548 MODULE_DEVICE_TABLE (pci
, piix4_ids
);
550 static struct i2c_adapter
*piix4_main_adapter
;
551 static struct i2c_adapter
*piix4_aux_adapter
;
553 static int piix4_add_adapter(struct pci_dev
*dev
, unsigned short smba
,
554 struct i2c_adapter
**padap
)
556 struct i2c_adapter
*adap
;
557 struct i2c_piix4_adapdata
*adapdata
;
560 adap
= kzalloc(sizeof(*adap
), GFP_KERNEL
);
562 release_region(smba
, SMBIOSIZE
);
566 adap
->owner
= THIS_MODULE
;
567 adap
->class = I2C_CLASS_HWMON
| I2C_CLASS_SPD
;
568 adap
->algo
= &smbus_algorithm
;
570 adapdata
= kzalloc(sizeof(*adapdata
), GFP_KERNEL
);
571 if (adapdata
== NULL
) {
573 release_region(smba
, SMBIOSIZE
);
577 adapdata
->smba
= smba
;
579 /* set up the sysfs linkage to our parent device */
580 adap
->dev
.parent
= &dev
->dev
;
582 snprintf(adap
->name
, sizeof(adap
->name
),
583 "SMBus PIIX4 adapter at %04x", smba
);
585 i2c_set_adapdata(adap
, adapdata
);
587 retval
= i2c_add_adapter(adap
);
589 dev_err(&dev
->dev
, "Couldn't register adapter!\n");
592 release_region(smba
, SMBIOSIZE
);
600 static int piix4_probe(struct pci_dev
*dev
, const struct pci_device_id
*id
)
604 if ((dev
->vendor
== PCI_VENDOR_ID_ATI
&&
605 dev
->device
== PCI_DEVICE_ID_ATI_SBX00_SMBUS
&&
606 dev
->revision
>= 0x40) ||
607 dev
->vendor
== PCI_VENDOR_ID_AMD
)
608 /* base address location etc changed in SB800 */
609 retval
= piix4_setup_sb800(dev
, id
, 0);
611 retval
= piix4_setup(dev
, id
);
613 /* If no main SMBus found, give up */
617 /* Try to register main SMBus adapter, give up if we can't */
618 retval
= piix4_add_adapter(dev
, retval
, &piix4_main_adapter
);
622 /* Check for auxiliary SMBus on some AMD chipsets */
625 if (dev
->vendor
== PCI_VENDOR_ID_ATI
&&
626 dev
->device
== PCI_DEVICE_ID_ATI_SBX00_SMBUS
) {
627 if (dev
->revision
< 0x40) {
628 retval
= piix4_setup_aux(dev
, id
, 0x58);
630 /* SB800 added aux bus too */
631 retval
= piix4_setup_sb800(dev
, id
, 1);
635 if (dev
->vendor
== PCI_VENDOR_ID_AMD
&&
636 dev
->device
== PCI_DEVICE_ID_AMD_HUDSON2_SMBUS
) {
637 retval
= piix4_setup_sb800(dev
, id
, 1);
641 /* Try to add the aux adapter if it exists,
642 * piix4_add_adapter will clean up if this fails */
643 piix4_add_adapter(dev
, retval
, &piix4_aux_adapter
);
649 static void piix4_adap_remove(struct i2c_adapter
*adap
)
651 struct i2c_piix4_adapdata
*adapdata
= i2c_get_adapdata(adap
);
653 if (adapdata
->smba
) {
654 i2c_del_adapter(adap
);
655 release_region(adapdata
->smba
, SMBIOSIZE
);
661 static void piix4_remove(struct pci_dev
*dev
)
663 if (piix4_main_adapter
) {
664 piix4_adap_remove(piix4_main_adapter
);
665 piix4_main_adapter
= NULL
;
668 if (piix4_aux_adapter
) {
669 piix4_adap_remove(piix4_aux_adapter
);
670 piix4_aux_adapter
= NULL
;
674 static struct pci_driver piix4_driver
= {
675 .name
= "piix4_smbus",
676 .id_table
= piix4_ids
,
677 .probe
= piix4_probe
,
678 .remove
= piix4_remove
,
681 module_pci_driver(piix4_driver
);
683 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
684 "Philip Edelbrock <phil@netroedge.com>");
685 MODULE_DESCRIPTION("PIIX4 SMBus driver");
686 MODULE_LICENSE("GPL");