drivers/watchdog/it87_wdt.c

   1 /*
   2  *      Watchdog Timer Driver
   3  *         for ITE IT87xx Environment Control - Low Pin Count Input / Output
   4  *
   5  *      (c) Copyright 2007  Oliver Schuster <olivers137@aol.com>
   6  *
   7  *      Based on softdog.c      by Alan Cox,
   8  *               83977f_wdt.c   by Jose Goncalves,
   9  *               it87.c         by Chris Gauthron, Jean Delvare
  10  *
  11  *      Data-sheets: Publicly available at the ITE website
  12  *                  http://www.ite.com.tw/
  13  *
  14  *      Support of the watchdog timers, which are available on
  15  *      IT8702, IT8712, IT8716, IT8718, IT8720, IT8721 and IT8726.
  16  *
  17  *      This program is free software; you can redistribute it and/or
  18  *      modify it under the terms of the GNU General Public License
  19  *      as published by the Free Software Foundation; either version
  20  *      2 of the License, or (at your option) any later version.
  21  *
  22  *      This program is distributed in the hope that it will be useful,
  23  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  *      GNU General Public License for more details.
  26  *
  27  *      You should have received a copy of the GNU General Public License
  28  *      along with this program; if not, write to the Free Software
  29  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  30  */
  31
  32 #include <linux/module.h>
  33 #include <linux/moduleparam.h>
  34 #include <linux/types.h>
  35 #include <linux/kernel.h>
  36 #include <linux/fs.h>
  37 #include <linux/miscdevice.h>
  38 #include <linux/init.h>
  39 #include <linux/ioport.h>
  40 #include <linux/watchdog.h>
  41 #include <linux/notifier.h>
  42 #include <linux/reboot.h>
  43 #include <linux/uaccess.h>
  44 #include <linux/io.h>
  45
  46
  47 #define WATCHDOG_VERSION        "1.14"
  48 #define WATCHDOG_NAME           "IT87 WDT"
  49 #define PFX                     WATCHDOG_NAME ": "
  50 #define DRIVER_VERSION          WATCHDOG_NAME " driver, v" WATCHDOG_VERSION "\n"
  51 #define WD_MAGIC                'V'
  52
  53 /* Defaults for Module Parameter */
  54 #define DEFAULT_NOGAMEPORT      0
  55 #define DEFAULT_EXCLUSIVE       1
  56 #define DEFAULT_TIMEOUT         60
  57 #define DEFAULT_TESTMODE        0
  58 #define DEFAULT_NOWAYOUT        WATCHDOG_NOWAYOUT
  59
  60 /* IO Ports */
  61 #define REG             0x2e
  62 #define VAL             0x2f
  63
  64 /* Logical device Numbers LDN */
  65 #define GPIO            0x07
  66 #define GAMEPORT        0x09
  67 #define CIR             0x0a
  68
  69 /* Configuration Registers and Functions */
  70 #define LDNREG          0x07
  71 #define CHIPID          0x20
  72 #define CHIPREV         0x22
  73 #define ACTREG          0x30
  74 #define BASEREG         0x60
  75
  76 /* Chip Id numbers */
  77 #define NO_DEV_ID       0xffff
  78 #define IT8702_ID       0x8702
  79 #define IT8705_ID       0x8705
  80 #define IT8712_ID       0x8712
  81 #define IT8716_ID       0x8716
  82 #define IT8718_ID       0x8718
  83 #define IT8720_ID       0x8720
  84 #define IT8721_ID       0x8721
  85 #define IT8726_ID       0x8726  /* the data sheet suggest wrongly 0x8716 */
  86
  87 /* GPIO Configuration Registers LDN=0x07 */
  88 #define WDTCTRL         0x71
  89 #define WDTCFG          0x72
  90 #define WDTVALLSB       0x73
  91 #define WDTVALMSB       0x74
  92
  93 /* GPIO Bits WDTCTRL */
  94 #define WDT_CIRINT      0x80
  95 #define WDT_MOUSEINT    0x40
  96 #define WDT_KYBINT      0x20
  97 #define WDT_GAMEPORT    0x10 /* not in it8718, it8720, it8721 */
  98 #define WDT_FORCE       0x02
  99 #define WDT_ZERO        0x01
 100
 101 /* GPIO Bits WDTCFG */
 102 #define WDT_TOV1        0x80
 103 #define WDT_KRST        0x40
 104 #define WDT_TOVE        0x20
 105 #define WDT_PWROK       0x10 /* not in it8721 */
 106 #define WDT_INT_MASK    0x0f
 107
 108 /* CIR Configuration Register LDN=0x0a */
 109 #define CIR_ILS         0x70
 110
 111 /* The default Base address is not always available, we use this */
 112 #define CIR_BASE        0x0208
 113
 114 /* CIR Controller */
 115 #define CIR_DR(b)       (b)
 116 #define CIR_IER(b)      (b + 1)
 117 #define CIR_RCR(b)      (b + 2)
 118 #define CIR_TCR1(b)     (b + 3)
 119 #define CIR_TCR2(b)     (b + 4)
 120 #define CIR_TSR(b)      (b + 5)
 121 #define CIR_RSR(b)      (b + 6)
 122 #define CIR_BDLR(b)     (b + 5)
 123 #define CIR_BDHR(b)     (b + 6)
 124 #define CIR_IIR(b)      (b + 7)
 125
 126 /* Default Base address of Game port */
 127 #define GP_BASE_DEFAULT 0x0201
 128
 129 /* wdt_status */
 130 #define WDTS_TIMER_RUN  0
 131 #define WDTS_DEV_OPEN   1
 132 #define WDTS_KEEPALIVE  2
 133 #define WDTS_LOCKED     3
 134 #define WDTS_USE_GP     4
 135 #define WDTS_EXPECTED   5
 136
 137 static  unsigned int base, gpact, ciract, max_units, chip_type;
 138 static  unsigned long wdt_status;
 139
 140 static  int nogameport = DEFAULT_NOGAMEPORT;
 141 static  int exclusive  = DEFAULT_EXCLUSIVE;
 142 static  int timeout    = DEFAULT_TIMEOUT;
 143 static  int testmode   = DEFAULT_TESTMODE;
 144 static  int nowayout   = DEFAULT_NOWAYOUT;
 145
 146 module_param(nogameport, int, 0);
 147 MODULE_PARM_DESC(nogameport, "Forbid the activation of game port, default="
 148                 __MODULE_STRING(DEFAULT_NOGAMEPORT));
 149 module_param(exclusive, int, 0);
 150 MODULE_PARM_DESC(exclusive, "Watchdog exclusive device open, default="
 151                 __MODULE_STRING(DEFAULT_EXCLUSIVE));
 152 module_param(timeout, int, 0);
 153 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
 154                 __MODULE_STRING(DEFAULT_TIMEOUT));
 155 module_param(testmode, int, 0);
 156 MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
 157                 __MODULE_STRING(DEFAULT_TESTMODE));
 158 module_param(nowayout, int, 0);
 159 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
 160                 __MODULE_STRING(WATCHDOG_NOWAYOUT));
 161
 162 /* Superio Chip */
 163
 164 static inline int superio_enter(void)
 165 {
 166         /*
 167          * Try to reserve REG and REG + 1 for exclusive access.
 168          */
 169         if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
 170                 return -EBUSY;
 171
 172         outb(0x87, REG);
 173         outb(0x01, REG);
 174         outb(0x55, REG);
 175         outb(0x55, REG);
 176         return 0;
 177 }
 178
 179 static inline void superio_exit(void)
 180 {
 181         outb(0x02, REG);
 182         outb(0x02, VAL);
 183         release_region(REG, 2);
 184 }
 185
 186 static inline void superio_select(int ldn)
 187 {
 188         outb(LDNREG, REG);
 189         outb(ldn, VAL);
 190 }
 191
 192 static inline int superio_inb(int reg)
 193 {
 194         outb(reg, REG);
 195         return inb(VAL);
 196 }
 197
 198 static inline void superio_outb(int val, int reg)
 199 {
 200         outb(reg, REG);
 201         outb(val, VAL);
 202 }
 203
 204 static inline int superio_inw(int reg)
 205 {
 206         int val;
 207         outb(reg++, REG);
 208         val = inb(VAL) << 8;
 209         outb(reg, REG);
 210         val |= inb(VAL);
 211         return val;
 212 }
 213
 214 static inline void superio_outw(int val, int reg)
 215 {
 216         outb(reg++, REG);
 217         outb(val >> 8, VAL);
 218         outb(reg, REG);
 219         outb(val, VAL);
 220 }
 221
 222 /* Internal function, should be called after superio_select(GPIO) */
 223 static void wdt_update_timeout(void)
 224 {
 225         unsigned char cfg = WDT_KRST;
 226         int tm = timeout;
 227
 228         if (testmode)
 229                 cfg = 0;
 230
 231         if (tm <= max_units)
 232                 cfg |= WDT_TOV1;
 233         else
 234                 tm /= 60;
 235
 236         if (chip_type != IT8721_ID)
 237                 cfg |= WDT_PWROK;
 238
 239         superio_outb(cfg, WDTCFG);
 240         superio_outb(tm, WDTVALLSB);
 241         if (max_units > 255)
 242                 superio_outb(tm>>8, WDTVALMSB);
 243 }
 244
 245 static int wdt_round_time(int t)
 246 {
 247         t += 59;
 248         t -= t % 60;
 249         return t;
 250 }
 251
 252 /* watchdog timer handling */
 253
 254 static void wdt_keepalive(void)
 255 {
 256         if (test_bit(WDTS_USE_GP, &wdt_status))
 257                 inb(base);
 258         else
 259                 /* The timer reloads with around 5 msec delay */
 260                 outb(0x55, CIR_DR(base));
 261         set_bit(WDTS_KEEPALIVE, &wdt_status);
 262 }
 263
 264 static int wdt_start(void)
 265 {
 266         int ret = superio_enter();
 267         if (ret)
 268                 return ret;
 269
 270         superio_select(GPIO);
 271         if (test_bit(WDTS_USE_GP, &wdt_status))
 272                 superio_outb(WDT_GAMEPORT, WDTCTRL);
 273         else
 274                 superio_outb(WDT_CIRINT, WDTCTRL);
 275         wdt_update_timeout();
 276
 277         superio_exit();
 278
 279         return 0;
 280 }
 281
 282 static int wdt_stop(void)
 283 {
 284         int ret = superio_enter();
 285         if (ret)
 286                 return ret;
 287
 288         superio_select(GPIO);
 289         superio_outb(0x00, WDTCTRL);
 290         superio_outb(WDT_TOV1, WDTCFG);
 291         superio_outb(0x00, WDTVALLSB);
 292         if (max_units > 255)
 293                 superio_outb(0x00, WDTVALMSB);
 294
 295         superio_exit();
 296         return 0;
 297 }
 298
 299 /**
 300  *      wdt_set_timeout - set a new timeout value with watchdog ioctl
 301  *      @t: timeout value in seconds
 302  *
 303  *      The hardware device has a 8 or 16 bit watchdog timer (depends on
 304  *      chip version) that can be configured to count seconds or minutes.
 305  *
 306  *      Used within WDIOC_SETTIMEOUT watchdog device ioctl.
 307  */
 308
 309 static int wdt_set_timeout(int t)
 310 {
 311         if (t < 1 || t > max_units * 60)
 312                 return -EINVAL;
 313
 314         if (t > max_units)
 315                 timeout = wdt_round_time(t);
 316         else
 317                 timeout = t;
 318
 319         if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
 320                 int ret = superio_enter();
 321                 if (ret)
 322                         return ret;
 323
 324                 superio_select(GPIO);
 325                 wdt_update_timeout();
 326                 superio_exit();
 327         }
 328         return 0;
 329 }
 330
 331 /**
 332  *      wdt_get_status - determines the status supported by watchdog ioctl
 333  *      @status: status returned to user space
 334  *
 335  *      The status bit of the device does not allow to distinguish
 336  *      between a regular system reset and a watchdog forced reset.
 337  *      But, in test mode it is useful, so it is supported through
 338  *      WDIOC_GETSTATUS watchdog ioctl. Additionally the driver
 339  *      reports the keepalive signal and the acception of the magic.
 340  *
 341  *      Used within WDIOC_GETSTATUS watchdog device ioctl.
 342  */
 343
 344 static int wdt_get_status(int *status)
 345 {
 346         *status = 0;
 347         if (testmode) {
 348                 int ret = superio_enter();
 349                 if (ret)
 350                         return ret;
 351
 352                 superio_select(GPIO);
 353                 if (superio_inb(WDTCTRL) & WDT_ZERO) {
 354                         superio_outb(0x00, WDTCTRL);
 355                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 356                         *status |= WDIOF_CARDRESET;
 357                 }
 358
 359                 superio_exit();
 360         }
 361         if (test_and_clear_bit(WDTS_KEEPALIVE, &wdt_status))
 362                 *status |= WDIOF_KEEPALIVEPING;
 363         if (test_bit(WDTS_EXPECTED, &wdt_status))
 364                 *status |= WDIOF_MAGICCLOSE;
 365         return 0;
 366 }
 367
 368 /* /dev/watchdog handling */
 369
 370 /**
 371  *      wdt_open - watchdog file_operations .open
 372  *      @inode: inode of the device
 373  *      @file: file handle to the device
 374  *
 375  *      The watchdog timer starts by opening the device.
 376  *
 377  *      Used within the file operation of the watchdog device.
 378  */
 379
 380 static int wdt_open(struct inode *inode, struct file *file)
 381 {
 382         if (exclusive && test_and_set_bit(WDTS_DEV_OPEN, &wdt_status))
 383                 return -EBUSY;
 384         if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
 385                 int ret;
 386                 if (nowayout && !test_and_set_bit(WDTS_LOCKED, &wdt_status))
 387                         __module_get(THIS_MODULE);
 388
 389                 ret = wdt_start();
 390                 if (ret) {
 391                         clear_bit(WDTS_LOCKED, &wdt_status);
 392                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 393                         clear_bit(WDTS_DEV_OPEN, &wdt_status);
 394                         return ret;
 395                 }
 396         }
 397         return nonseekable_open(inode, file);
 398 }
 399
 400 /**
 401  *      wdt_release - watchdog file_operations .release
 402  *      @inode: inode of the device
 403  *      @file: file handle to the device
 404  *
 405  *      Closing the watchdog device either stops the watchdog timer
 406  *      or in the case, that nowayout is set or the magic character
 407  *      wasn't written, a critical warning about an running watchdog
 408  *      timer is given.
 409  *
 410  *      Used within the file operation of the watchdog device.
 411  */
 412
 413 static int wdt_release(struct inode *inode, struct file *file)
 414 {
 415         if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
 416                 if (test_and_clear_bit(WDTS_EXPECTED, &wdt_status)) {
 417                         int ret = wdt_stop();
 418                         if (ret) {
 419                                 /*
 420                                  * Stop failed. Just keep the watchdog alive
 421                                  * and hope nothing bad happens.
 422                                  */
 423                                 set_bit(WDTS_EXPECTED, &wdt_status);
 424                                 wdt_keepalive();
 425                                 return ret;
 426                         }
 427                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 428                 } else {
 429                         wdt_keepalive();
 430                         printk(KERN_CRIT PFX
 431                                "unexpected close, not stopping watchdog!\n");
 432                 }
 433         }
 434         clear_bit(WDTS_DEV_OPEN, &wdt_status);
 435         return 0;
 436 }
 437
 438 /**
 439  *      wdt_write - watchdog file_operations .write
 440  *      @file: file handle to the watchdog
 441  *      @buf: buffer to write
 442  *      @count: count of bytes
 443  *      @ppos: pointer to the position to write. No seeks allowed
 444  *
 445  *      A write to a watchdog device is defined as a keepalive signal. Any
 446  *      write of data will do, as we don't define content meaning.
 447  *
 448  *      Used within the file operation of the watchdog device.
 449  */
 450
 451 static ssize_t wdt_write(struct file *file, const char __user *buf,
 452                             size_t count, loff_t *ppos)
 453 {
 454         if (count) {
 455                 clear_bit(WDTS_EXPECTED, &wdt_status);
 456                 wdt_keepalive();
 457         }
 458         if (!nowayout) {
 459                 size_t ofs;
 460
 461         /* note: just in case someone wrote the magic character long ago */
 462                 for (ofs = 0; ofs != count; ofs++) {
 463                         char c;
 464                         if (get_user(c, buf + ofs))
 465                                 return -EFAULT;
 466                         if (c == WD_MAGIC)
 467                                 set_bit(WDTS_EXPECTED, &wdt_status);
 468                 }
 469         }
 470         return count;
 471 }
 472
 473 static const struct watchdog_info ident = {
 474         .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
 475         .firmware_version =     1,
 476         .identity = WATCHDOG_NAME,
 477 };
 478
 479 /**
 480  *      wdt_ioctl - watchdog file_operations .unlocked_ioctl
 481  *      @file: file handle to the device
 482  *      @cmd: watchdog command
 483  *      @arg: argument pointer
 484  *
 485  *      The watchdog API defines a common set of functions for all watchdogs
 486  *      according to their available features.
 487  *
 488  *      Used within the file operation of the watchdog device.
 489  */
 490
 491 static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 492 {
 493         int rc = 0, status, new_options, new_timeout;
 494         union {
 495                 struct watchdog_info __user *ident;
 496                 int __user *i;
 497         } uarg;
 498
 499         uarg.i = (int __user *)arg;
 500
 501         switch (cmd) {
 502         case WDIOC_GETSUPPORT:
 503                 return copy_to_user(uarg.ident,
 504                                     &ident, sizeof(ident)) ? -EFAULT : 0;
 505
 506         case WDIOC_GETSTATUS:
 507                 rc = wdt_get_status(&status);
 508                 if (rc)
 509                         return rc;
 510                 return put_user(status, uarg.i);
 511
 512         case WDIOC_GETBOOTSTATUS:
 513                 return put_user(0, uarg.i);
 514
 515         case WDIOC_KEEPALIVE:
 516                 wdt_keepalive();
 517                 return 0;
 518
 519         case WDIOC_SETOPTIONS:
 520                 if (get_user(new_options, uarg.i))
 521                         return -EFAULT;
 522
 523                 switch (new_options) {
 524                 case WDIOS_DISABLECARD:
 525                         if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
 526                                 rc = wdt_stop();
 527                                 if (rc)
 528                                         return rc;
 529                         }
 530                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 531                         return 0;
 532
 533                 case WDIOS_ENABLECARD:
 534                         if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
 535                                 rc = wdt_start();
 536                                 if (rc) {
 537                                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 538                                         return rc;
 539                                 }
 540                         }
 541                         return 0;
 542
 543                 default:
 544                         return -EFAULT;
 545                 }
 546
 547         case WDIOC_SETTIMEOUT:
 548                 if (get_user(new_timeout, uarg.i))
 549                         return -EFAULT;
 550                 rc = wdt_set_timeout(new_timeout);
 551         case WDIOC_GETTIMEOUT:
 552                 if (put_user(timeout, uarg.i))
 553                         return -EFAULT;
 554                 return rc;
 555
 556         default:
 557                 return -ENOTTY;
 558         }
 559 }
 560
 561 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
 562         void *unused)
 563 {
 564         if (code == SYS_DOWN || code == SYS_HALT)
 565                 wdt_stop();
 566         return NOTIFY_DONE;
 567 }
 568
 569 static const struct file_operations wdt_fops = {
 570         .owner          = THIS_MODULE,
 571         .llseek         = no_llseek,
 572         .write          = wdt_write,
 573         .unlocked_ioctl = wdt_ioctl,
 574         .open           = wdt_open,
 575         .release        = wdt_release,
 576 };
 577
 578 static struct miscdevice wdt_miscdev = {
 579         .minor          = WATCHDOG_MINOR,
 580         .name           = "watchdog",
 581         .fops           = &wdt_fops,
 582 };
 583
 584 static struct notifier_block wdt_notifier = {
 585         .notifier_call = wdt_notify_sys,
 586 };
 587
 588 static int __init it87_wdt_init(void)
 589 {
 590         int rc = 0;
 591         int try_gameport = !nogameport;
 592         u8  chip_rev;
 593         int gp_rreq_fail = 0;
 594
 595         wdt_status = 0;
 596
 597         rc = superio_enter();
 598         if (rc)
 599                 return rc;
 600
 601         chip_type = superio_inw(CHIPID);
 602         chip_rev  = superio_inb(CHIPREV) & 0x0f;
 603         superio_exit();
 604
 605         switch (chip_type) {
 606         case IT8702_ID:
 607                 max_units = 255;
 608                 break;
 609         case IT8712_ID:
 610                 max_units = (chip_rev < 8) ? 255 : 65535;
 611                 break;
 612         case IT8716_ID:
 613         case IT8726_ID:
 614                 max_units = 65535;
 615                 break;
 616         case IT8718_ID:
 617         case IT8720_ID:
 618         case IT8721_ID:
 619                 max_units = 65535;
 620                 try_gameport = 0;
 621                 break;
 622         case IT8705_ID:
 623                 printk(KERN_ERR PFX
 624                        "Unsupported Chip found, Chip %04x Revision %02x\n",
 625                        chip_type, chip_rev);
 626                 return -ENODEV;
 627         case NO_DEV_ID:
 628                 printk(KERN_ERR PFX "no device\n");
 629                 return -ENODEV;
 630         default:
 631                 printk(KERN_ERR PFX
 632                        "Unknown Chip found, Chip %04x Revision %04x\n",
 633                        chip_type, chip_rev);
 634                 return -ENODEV;
 635         }
 636
 637         rc = superio_enter();
 638         if (rc)
 639                 return rc;
 640
 641         superio_select(GPIO);
 642         superio_outb(WDT_TOV1, WDTCFG);
 643         superio_outb(0x00, WDTCTRL);
 644
 645         /* First try to get Gameport support */
 646         if (try_gameport) {
 647                 superio_select(GAMEPORT);
 648                 base = superio_inw(BASEREG);
 649                 if (!base) {
 650                         base = GP_BASE_DEFAULT;
 651                         superio_outw(base, BASEREG);
 652                 }
 653                 gpact = superio_inb(ACTREG);
 654                 superio_outb(0x01, ACTREG);
 655                 if (request_region(base, 1, WATCHDOG_NAME))
 656                         set_bit(WDTS_USE_GP, &wdt_status);
 657                 else
 658                         gp_rreq_fail = 1;
 659         }
 660
 661         /* If we haven't Gameport support, try to get CIR support */
 662         if (!test_bit(WDTS_USE_GP, &wdt_status)) {
 663                 if (!request_region(CIR_BASE, 8, WATCHDOG_NAME)) {
 664                         if (gp_rreq_fail)
 665                                 printk(KERN_ERR PFX
 666                                         "I/O Address 0x%04x and 0x%04x"
 667                                         " already in use\n", base, CIR_BASE);
 668                         else
 669                                 printk(KERN_ERR PFX
 670                                         "I/O Address 0x%04x already in use\n",
 671                                         CIR_BASE);
 672                         rc = -EIO;
 673                         goto err_out;
 674                 }
 675                 base = CIR_BASE;
 676
 677                 superio_select(CIR);
 678                 superio_outw(base, BASEREG);
 679                 superio_outb(0x00, CIR_ILS);
 680                 ciract = superio_inb(ACTREG);
 681                 superio_outb(0x01, ACTREG);
 682                 if (gp_rreq_fail) {
 683                         superio_select(GAMEPORT);
 684                         superio_outb(gpact, ACTREG);
 685                 }
 686         }
 687
 688         if (timeout < 1 || timeout > max_units * 60) {
 689                 timeout = DEFAULT_TIMEOUT;
 690                 printk(KERN_WARNING PFX
 691                        "Timeout value out of range, use default %d sec\n",
 692                        DEFAULT_TIMEOUT);
 693         }
 694
 695         if (timeout > max_units)
 696                 timeout = wdt_round_time(timeout);
 697
 698         rc = register_reboot_notifier(&wdt_notifier);
 699         if (rc) {
 700                 printk(KERN_ERR PFX
 701                        "Cannot register reboot notifier (err=%d)\n", rc);
 702                 goto err_out_region;
 703         }
 704
 705         rc = misc_register(&wdt_miscdev);
 706         if (rc) {
 707                 printk(KERN_ERR PFX
 708                        "Cannot register miscdev on minor=%d (err=%d)\n",
 709                         wdt_miscdev.minor, rc);
 710                 goto err_out_reboot;
 711         }
 712
 713         /* Initialize CIR to use it as keepalive source */
 714         if (!test_bit(WDTS_USE_GP, &wdt_status)) {
 715                 outb(0x00, CIR_RCR(base));
 716                 outb(0xc0, CIR_TCR1(base));
 717                 outb(0x5c, CIR_TCR2(base));
 718                 outb(0x10, CIR_IER(base));
 719                 outb(0x00, CIR_BDHR(base));
 720                 outb(0x01, CIR_BDLR(base));
 721                 outb(0x09, CIR_IER(base));
 722         }
 723
 724         printk(KERN_INFO PFX "Chip IT%04x revision %d initialized. "
 725                 "timeout=%d sec (nowayout=%d testmode=%d exclusive=%d "
 726                 "nogameport=%d)\n", chip_type, chip_rev, timeout,
 727                 nowayout, testmode, exclusive, nogameport);
 728
 729         superio_exit();
 730         return 0;
 731
 732 err_out_reboot:
 733         unregister_reboot_notifier(&wdt_notifier);
 734 err_out_region:
 735         release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
 736         if (!test_bit(WDTS_USE_GP, &wdt_status)) {
 737                 superio_select(CIR);
 738                 superio_outb(ciract, ACTREG);
 739         }
 740 err_out:
 741         if (try_gameport) {
 742                 superio_select(GAMEPORT);
 743                 superio_outb(gpact, ACTREG);
 744         }
 745
 746         superio_exit();
 747         return rc;
 748 }
 749
 750 static void __exit it87_wdt_exit(void)
 751 {
 752         if (superio_enter() == 0) {
 753                 superio_select(GPIO);
 754                 superio_outb(0x00, WDTCTRL);
 755                 superio_outb(0x00, WDTCFG);
 756                 superio_outb(0x00, WDTVALLSB);
 757                 if (max_units > 255)
 758                         superio_outb(0x00, WDTVALMSB);
 759                 if (test_bit(WDTS_USE_GP, &wdt_status)) {
 760                         superio_select(GAMEPORT);
 761                         superio_outb(gpact, ACTREG);
 762                 } else {
 763                         superio_select(CIR);
 764                         superio_outb(ciract, ACTREG);
 765                 }
 766                 superio_exit();
 767         }
 768
 769         misc_deregister(&wdt_miscdev);
 770         unregister_reboot_notifier(&wdt_notifier);
 771         release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
 772 }
 773
 774 module_init(it87_wdt_init);
 775 module_exit(it87_wdt_exit);
 776
 777 MODULE_AUTHOR("Oliver Schuster");
 778 MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
 779 MODULE_LICENSE("GPL");
 780 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);