1 /***************************************************************************
2 * Copyright (c) 2005-2009, Broadcom Corporation.
4 * Name: crystalhd_misc . h
7 * BCM70012 Linux driver general purpose routines.
8 * Includes reg/mem read and write routines.
12 **********************************************************************
13 * This file is part of the crystalhd device driver.
15 * This driver is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation, version 2 of the License.
19 * This driver is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this driver. If not, see <http://www.gnu.org/licenses/>.
26 **********************************************************************/
28 #ifndef _CRYSTALHD_MISC_H_
29 #define _CRYSTALHD_MISC_H_
31 #include "crystalhd.h"
33 #include <linux/module.h>
34 #include <linux/kernel.h>
35 #include <linux/errno.h>
36 #include <linux/string.h>
37 #include <linux/ioctl.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/sched.h>
40 #include "bc_dts_glob_lnx.h"
42 /* Global log level variable defined in crystal_misc.c file */
43 extern uint32_t g_linklog_level
;
45 /* Global element pool for all Queue management.
46 * TX: Active = BC_TX_LIST_CNT, Free = BC_TX_LIST_CNT.
47 * RX: Free = BC_RX_LIST_CNT, Active = 2
50 #define BC_LINK_ELEM_POOL_SZ ((BC_TX_LIST_CNT * 2) + BC_RX_LIST_CNT + 2 + 4)
52 /* Driver's IODATA pool count */
53 #define CHD_IODATA_POOL_SZ (BC_IOCTL_DATA_POOL_SIZE * BC_LINK_MAX_OPENS)
55 /* Scatter Gather memory pool size for Tx and Rx */
56 #define BC_LINK_SG_POOL_SZ (BC_TX_LIST_CNT + BC_RX_LIST_CNT)
58 enum crystalhd_dio_sig
{
59 crystalhd_dio_inv
= 0,
61 crystalhd_dio_sg_mapped
,
64 struct crystalhd_dio_user_info
{
80 struct crystalhd_dio_req
{
84 struct scatterlist
*sg
;
88 struct crystalhd_dio_user_info uinfo
;
92 struct crystalhd_dio_req
*next
;
95 #define BC_LINK_DIOQ_SIG (0x09223280)
97 struct crystalhd_elem
{
98 struct crystalhd_elem
*flink
;
99 struct crystalhd_elem
*blink
;
104 typedef void (*crystalhd_data_free_cb
)(void *context
, void *data
);
106 struct crystalhd_dioq
{
108 struct crystalhd_adp
*adp
;
109 struct crystalhd_elem
*head
;
110 struct crystalhd_elem
*tail
;
113 wait_queue_head_t event
;
114 crystalhd_data_free_cb data_rel_cb
;
118 typedef void (*hw_comp_callback
)(struct crystalhd_dio_req
*,
119 wait_queue_head_t
*event
, enum BC_STATUS sts
);
121 /*========= Decoder (7412) register access routines.================= */
122 uint32_t bc_dec_reg_rd(struct crystalhd_adp
*, uint32_t);
123 void bc_dec_reg_wr(struct crystalhd_adp
*, uint32_t, uint32_t);
125 /*========= Link (70012) register access routines.. =================*/
126 uint32_t crystalhd_reg_rd(struct crystalhd_adp
*, uint32_t);
127 void crystalhd_reg_wr(struct crystalhd_adp
*, uint32_t, uint32_t);
129 /*========= Decoder (7412) memory access routines..=================*/
130 enum BC_STATUS
crystalhd_mem_rd(struct crystalhd_adp
*, uint32_t, uint32_t, uint32_t *);
131 enum BC_STATUS
crystalhd_mem_wr(struct crystalhd_adp
*, uint32_t, uint32_t, uint32_t *);
133 /*==========Link (70012) PCIe Config access routines.================*/
134 enum BC_STATUS
crystalhd_pci_cfg_rd(struct crystalhd_adp
*, uint32_t, uint32_t, uint32_t *);
135 enum BC_STATUS
crystalhd_pci_cfg_wr(struct crystalhd_adp
*, uint32_t, uint32_t, uint32_t);
137 /*========= Linux Kernel Interface routines. ======================= */
138 void *bc_kern_dma_alloc(struct crystalhd_adp
*, uint32_t, dma_addr_t
*);
139 void bc_kern_dma_free(struct crystalhd_adp
*, uint32_t,
141 #define crystalhd_create_event(_ev) init_waitqueue_head(_ev)
142 #define crystalhd_set_event(_ev) wake_up_interruptible(_ev)
143 #define crystalhd_wait_on_event(ev, condition, timeout, ret, nosig) \
145 DECLARE_WAITQUEUE(entry, current); \
146 unsigned long end = jiffies + ((timeout * HZ) / 1000); \
148 add_wait_queue(ev, &entry); \
150 __set_current_state(TASK_INTERRUPTIBLE); \
154 if (time_after_eq(jiffies, end)) { \
158 schedule_timeout((HZ / 100 > 1) ? HZ / 100 : 1); \
159 if (!nosig && signal_pending(current)) { \
164 __set_current_state(TASK_RUNNING); \
165 remove_wait_queue(ev, &entry); \
168 /*================ Direct IO mapping routines ==================*/
169 extern int crystalhd_create_dio_pool(struct crystalhd_adp
*, uint32_t);
170 extern void crystalhd_destroy_dio_pool(struct crystalhd_adp
*);
171 extern enum BC_STATUS
crystalhd_map_dio(struct crystalhd_adp
*, void *, uint32_t,
172 uint32_t, bool, bool, struct crystalhd_dio_req
**);
174 extern enum BC_STATUS
crystalhd_unmap_dio(struct crystalhd_adp
*, struct crystalhd_dio_req
*);
175 #define crystalhd_get_sgle_paddr(_dio, _ix) (cpu_to_le64(sg_dma_address(&_dio->sg[_ix])))
176 #define crystalhd_get_sgle_len(_dio, _ix) (cpu_to_le32(sg_dma_len(&_dio->sg[_ix])))
178 /*================ General Purpose Queues ==================*/
179 extern enum BC_STATUS
crystalhd_create_dioq(struct crystalhd_adp
*, struct crystalhd_dioq
**, crystalhd_data_free_cb
, void *);
180 extern void crystalhd_delete_dioq(struct crystalhd_adp
*, struct crystalhd_dioq
*);
181 extern enum BC_STATUS
crystalhd_dioq_add(struct crystalhd_dioq
*ioq
, void *data
, bool wake
, uint32_t tag
);
182 extern void *crystalhd_dioq_fetch(struct crystalhd_dioq
*ioq
);
183 extern void *crystalhd_dioq_find_and_fetch(struct crystalhd_dioq
*ioq
, uint32_t tag
);
184 extern void *crystalhd_dioq_fetch_wait(struct crystalhd_dioq
*ioq
, uint32_t to_secs
, uint32_t *sig_pend
);
186 #define crystalhd_dioq_count(_ioq) ((_ioq) ? _ioq->count : 0)
188 extern int crystalhd_create_elem_pool(struct crystalhd_adp
*, uint32_t);
189 extern void crystalhd_delete_elem_pool(struct crystalhd_adp
*);
192 /*================ Debug routines/macros .. ================================*/
193 extern void crystalhd_show_buffer(uint32_t off
, uint8_t *buff
, uint32_t dwcount
);
195 enum _chd_log_levels
{
196 BCMLOG_ERROR
= 0x80000000, /* Don't disable this option */
197 BCMLOG_DATA
= 0x40000000, /* Data, enable by default */
198 BCMLOG_SPINLOCK
= 0x20000000, /* Spcial case for Spin locks*/
200 /* Following are allowed only in debug mode */
201 BCMLOG_INFO
= 0x00000001, /* Generic informational */
202 BCMLOG_DBG
= 0x00000002, /* First level Debug info */
203 BCMLOG_SSTEP
= 0x00000004, /* Stepping information */
207 #define BCMLOG(trace, fmt, args...) \
209 if (g_linklog_level & trace) \
210 printk(fmt, ##args); \
214 #define BCMLOG_ERR(fmt, args...) \
216 if (g_linklog_level & BCMLOG_ERROR) \
217 printk(KERN_ERR "*ERR*:%s:%d: "fmt, \
218 __FILE__, __LINE__, ##args); \