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Remove all #inclusions of asm/system.h
[linux-2.6.git] / drivers / net / tokenring / smctr.c
blobcb35fb79e01649fdc556eea7aef94ad18f51de14
1 /*
2 * smctr.c: A network driver for the SMC Token Ring Adapters.
3 *
4 * Written by Jay Schulist <jschlst@samba.org>
5 *
6 * This software may be used and distributed according to the terms
7 * of the GNU General Public License, incorporated herein by reference.
8 *
9 * This device driver works with the following SMC adapters:
10 * - SMC TokenCard Elite (8115T, chips 825/584)
11 * - SMC TokenCard Elite/A MCA (8115T/A, chips 825/594)
12 *
13 * Source(s):
14 * - SMC TokenCard SDK.
15 *
16 * Maintainer(s):
17 * JS Jay Schulist <jschlst@samba.org>
18 *
19 * Changes:
20 * 07102000 JS Fixed a timing problem in smctr_wait_cmd();
21 * Also added a bit more discriptive error msgs.
22 * 07122000 JS Fixed problem with detecting a card with
23 * module io/irq/mem specified.
24 *
25 * To do:
26 * 1. Multicast support.
27 *
28 * Initial 2.5 cleanup Alan Cox <alan@lxorguk.ukuu.org.uk> 2002/10/28
29 */
30
31 #include <linux/module.h>
32 #include <linux/kernel.h>
33 #include <linux/types.h>
34 #include <linux/fcntl.h>
35 #include <linux/interrupt.h>
36 #include <linux/ptrace.h>
37 #include <linux/ioport.h>
38 #include <linux/in.h>
39 #include <linux/string.h>
40 #include <linux/time.h>
41 #include <linux/errno.h>
42 #include <linux/init.h>
43 #include <linux/mca-legacy.h>
44 #include <linux/delay.h>
45 #include <linux/netdevice.h>
46 #include <linux/etherdevice.h>
47 #include <linux/skbuff.h>
48 #include <linux/trdevice.h>
49 #include <linux/bitops.h>
50 #include <linux/firmware.h>
51
52 #include <asm/io.h>
53 #include <asm/dma.h>
54 #include <asm/irq.h>
55
56 #if BITS_PER_LONG == 64
57 #error FIXME: driver does not support 64-bit platforms
58 #endif
59
60 #include "smctr.h" /* Our Stuff */
61
62 static const char version[] __initdata =
63 KERN_INFO "smctr.c: v1.4 7/12/00 by jschlst@samba.org\n";
64 static const char cardname[] = "smctr";
65
66
67 #define SMCTR_IO_EXTENT 20
68
69 #ifdef CONFIG_MCA_LEGACY
70 static unsigned int smctr_posid = 0x6ec6;
71 #endif
72
73 static int ringspeed;
74
75 /* SMC Name of the Adapter. */
76 static char smctr_name[] = "SMC TokenCard";
77 static char *smctr_model = "Unknown";
78
79 /* Use 0 for production, 1 for verification, 2 for debug, and
80 * 3 for very verbose debug.
81 */
82 #ifndef SMCTR_DEBUG
83 #define SMCTR_DEBUG 1
84 #endif
85 static unsigned int smctr_debug = SMCTR_DEBUG;
86
87 /* smctr.c prototypes and functions are arranged alphabeticly
88 * for clearity, maintainability and pure old fashion fun.
89 */
90 /* A */
91 static int smctr_alloc_shared_memory(struct net_device *dev);
92
93 /* B */
94 static int smctr_bypass_state(struct net_device *dev);
95
96 /* C */
97 static int smctr_checksum_firmware(struct net_device *dev);
98 static int __init smctr_chk_isa(struct net_device *dev);
99 static int smctr_chg_rx_mask(struct net_device *dev);
100 static int smctr_clear_int(struct net_device *dev);
101 static int smctr_clear_trc_reset(int ioaddr);
102 static int smctr_close(struct net_device *dev);
103
104 /* D */
105 static int smctr_decode_firmware(struct net_device *dev,
106 const struct firmware *fw);
107 static int smctr_disable_16bit(struct net_device *dev);
108 static int smctr_disable_adapter_ctrl_store(struct net_device *dev);
109 static int smctr_disable_bic_int(struct net_device *dev);
110
111 /* E */
112 static int smctr_enable_16bit(struct net_device *dev);
113 static int smctr_enable_adapter_ctrl_store(struct net_device *dev);
114 static int smctr_enable_adapter_ram(struct net_device *dev);
115 static int smctr_enable_bic_int(struct net_device *dev);
116
117 /* G */
118 static int __init smctr_get_boardid(struct net_device *dev, int mca);
119 static int smctr_get_group_address(struct net_device *dev);
120 static int smctr_get_functional_address(struct net_device *dev);
121 static unsigned int smctr_get_num_rx_bdbs(struct net_device *dev);
122 static int smctr_get_physical_drop_number(struct net_device *dev);
123 static __u8 *smctr_get_rx_pointer(struct net_device *dev, short queue);
124 static int smctr_get_station_id(struct net_device *dev);
125 static FCBlock *smctr_get_tx_fcb(struct net_device *dev, __u16 queue,
126 __u16 bytes_count);
127 static int smctr_get_upstream_neighbor_addr(struct net_device *dev);
128
129 /* H */
130 static int smctr_hardware_send_packet(struct net_device *dev,
131 struct net_local *tp);
132 /* I */
133 static int smctr_init_acbs(struct net_device *dev);
134 static int smctr_init_adapter(struct net_device *dev);
135 static int smctr_init_card_real(struct net_device *dev);
136 static int smctr_init_rx_bdbs(struct net_device *dev);
137 static int smctr_init_rx_fcbs(struct net_device *dev);
138 static int smctr_init_shared_memory(struct net_device *dev);
139 static int smctr_init_tx_bdbs(struct net_device *dev);
140 static int smctr_init_tx_fcbs(struct net_device *dev);
141 static int smctr_internal_self_test(struct net_device *dev);
142 static irqreturn_t smctr_interrupt(int irq, void *dev_id);
143 static int smctr_issue_enable_int_cmd(struct net_device *dev,
144 __u16 interrupt_enable_mask);
145 static int smctr_issue_int_ack(struct net_device *dev, __u16 iack_code,
146 __u16 ibits);
147 static int smctr_issue_init_timers_cmd(struct net_device *dev);
148 static int smctr_issue_init_txrx_cmd(struct net_device *dev);
149 static int smctr_issue_insert_cmd(struct net_device *dev);
150 static int smctr_issue_read_ring_status_cmd(struct net_device *dev);
151 static int smctr_issue_read_word_cmd(struct net_device *dev, __u16 aword_cnt);
152 static int smctr_issue_remove_cmd(struct net_device *dev);
153 static int smctr_issue_resume_acb_cmd(struct net_device *dev);
154 static int smctr_issue_resume_rx_bdb_cmd(struct net_device *dev, __u16 queue);
155 static int smctr_issue_resume_rx_fcb_cmd(struct net_device *dev, __u16 queue);
156 static int smctr_issue_resume_tx_fcb_cmd(struct net_device *dev, __u16 queue);
157 static int smctr_issue_test_internal_rom_cmd(struct net_device *dev);
158 static int smctr_issue_test_hic_cmd(struct net_device *dev);
159 static int smctr_issue_test_mac_reg_cmd(struct net_device *dev);
160 static int smctr_issue_trc_loopback_cmd(struct net_device *dev);
161 static int smctr_issue_tri_loopback_cmd(struct net_device *dev);
162 static int smctr_issue_write_byte_cmd(struct net_device *dev,
163 short aword_cnt, void *byte);
164 static int smctr_issue_write_word_cmd(struct net_device *dev,
165 short aword_cnt, void *word);
166
167 /* J */
168 static int smctr_join_complete_state(struct net_device *dev);
169
170 /* L */
171 static int smctr_link_tx_fcbs_to_bdbs(struct net_device *dev);
172 static int smctr_load_firmware(struct net_device *dev);
173 static int smctr_load_node_addr(struct net_device *dev);
174 static int smctr_lobe_media_test(struct net_device *dev);
175 static int smctr_lobe_media_test_cmd(struct net_device *dev);
176 static int smctr_lobe_media_test_state(struct net_device *dev);
177
178 /* M */
179 static int smctr_make_8025_hdr(struct net_device *dev,
180 MAC_HEADER *rmf, MAC_HEADER *tmf, __u16 ac_fc);
181 static int smctr_make_access_pri(struct net_device *dev,
182 MAC_SUB_VECTOR *tsv);
183 static int smctr_make_addr_mod(struct net_device *dev, MAC_SUB_VECTOR *tsv);
184 static int smctr_make_auth_funct_class(struct net_device *dev,
185 MAC_SUB_VECTOR *tsv);
186 static int smctr_make_corr(struct net_device *dev,
187 MAC_SUB_VECTOR *tsv, __u16 correlator);
188 static int smctr_make_funct_addr(struct net_device *dev,
189 MAC_SUB_VECTOR *tsv);
190 static int smctr_make_group_addr(struct net_device *dev,
191 MAC_SUB_VECTOR *tsv);
192 static int smctr_make_phy_drop_num(struct net_device *dev,
193 MAC_SUB_VECTOR *tsv);
194 static int smctr_make_product_id(struct net_device *dev, MAC_SUB_VECTOR *tsv);
195 static int smctr_make_station_id(struct net_device *dev, MAC_SUB_VECTOR *tsv);
196 static int smctr_make_ring_station_status(struct net_device *dev,
197 MAC_SUB_VECTOR *tsv);
198 static int smctr_make_ring_station_version(struct net_device *dev,
199 MAC_SUB_VECTOR *tsv);
200 static int smctr_make_tx_status_code(struct net_device *dev,
201 MAC_SUB_VECTOR *tsv, __u16 tx_fstatus);
202 static int smctr_make_upstream_neighbor_addr(struct net_device *dev,
203 MAC_SUB_VECTOR *tsv);
204 static int smctr_make_wrap_data(struct net_device *dev,
205 MAC_SUB_VECTOR *tsv);
206
207 /* O */
208 static int smctr_open(struct net_device *dev);
209 static int smctr_open_tr(struct net_device *dev);
210
211 /* P */
212 struct net_device *smctr_probe(int unit);
213 static int __init smctr_probe1(struct net_device *dev, int ioaddr);
214 static int smctr_process_rx_packet(MAC_HEADER *rmf, __u16 size,
215 struct net_device *dev, __u16 rx_status);
216
217 /* R */
218 static int smctr_ram_memory_test(struct net_device *dev);
219 static int smctr_rcv_chg_param(struct net_device *dev, MAC_HEADER *rmf,
220 __u16 *correlator);
221 static int smctr_rcv_init(struct net_device *dev, MAC_HEADER *rmf,
222 __u16 *correlator);
223 static int smctr_rcv_tx_forward(struct net_device *dev, MAC_HEADER *rmf);
224 static int smctr_rcv_rq_addr_state_attch(struct net_device *dev,
225 MAC_HEADER *rmf, __u16 *correlator);
226 static int smctr_rcv_unknown(struct net_device *dev, MAC_HEADER *rmf,
227 __u16 *correlator);
228 static int smctr_reset_adapter(struct net_device *dev);
229 static int smctr_restart_tx_chain(struct net_device *dev, short queue);
230 static int smctr_ring_status_chg(struct net_device *dev);
231 static int smctr_rx_frame(struct net_device *dev);
232
233 /* S */
234 static int smctr_send_dat(struct net_device *dev);
235 static netdev_tx_t smctr_send_packet(struct sk_buff *skb,
236 struct net_device *dev);
237 static int smctr_send_lobe_media_test(struct net_device *dev);
238 static int smctr_send_rpt_addr(struct net_device *dev, MAC_HEADER *rmf,
239 __u16 correlator);
240 static int smctr_send_rpt_attch(struct net_device *dev, MAC_HEADER *rmf,
241 __u16 correlator);
242 static int smctr_send_rpt_state(struct net_device *dev, MAC_HEADER *rmf,
243 __u16 correlator);
244 static int smctr_send_rpt_tx_forward(struct net_device *dev,
245 MAC_HEADER *rmf, __u16 tx_fstatus);
246 static int smctr_send_rsp(struct net_device *dev, MAC_HEADER *rmf,
247 __u16 rcode, __u16 correlator);
248 static int smctr_send_rq_init(struct net_device *dev);
249 static int smctr_send_tx_forward(struct net_device *dev, MAC_HEADER *rmf,
250 __u16 *tx_fstatus);
251 static int smctr_set_auth_access_pri(struct net_device *dev,
252 MAC_SUB_VECTOR *rsv);
253 static int smctr_set_auth_funct_class(struct net_device *dev,
254 MAC_SUB_VECTOR *rsv);
255 static int smctr_set_corr(struct net_device *dev, MAC_SUB_VECTOR *rsv,
256 __u16 *correlator);
257 static int smctr_set_error_timer_value(struct net_device *dev,
258 MAC_SUB_VECTOR *rsv);
259 static int smctr_set_frame_forward(struct net_device *dev,
260 MAC_SUB_VECTOR *rsv, __u8 dc_sc);
261 static int smctr_set_local_ring_num(struct net_device *dev,
262 MAC_SUB_VECTOR *rsv);
263 static unsigned short smctr_set_ctrl_attention(struct net_device *dev);
264 static void smctr_set_multicast_list(struct net_device *dev);
265 static int smctr_set_page(struct net_device *dev, __u8 *buf);
266 static int smctr_set_phy_drop(struct net_device *dev,
267 MAC_SUB_VECTOR *rsv);
268 static int smctr_set_ring_speed(struct net_device *dev);
269 static int smctr_set_rx_look_ahead(struct net_device *dev);
270 static int smctr_set_trc_reset(int ioaddr);
271 static int smctr_setup_single_cmd(struct net_device *dev,
272 __u16 command, __u16 subcommand);
273 static int smctr_setup_single_cmd_w_data(struct net_device *dev,
274 __u16 command, __u16 subcommand);
275 static char *smctr_malloc(struct net_device *dev, __u16 size);
276 static int smctr_status_chg(struct net_device *dev);
277
278 /* T */
279 static void smctr_timeout(struct net_device *dev);
280 static int smctr_trc_send_packet(struct net_device *dev, FCBlock *fcb,
281 __u16 queue);
282 static __u16 smctr_tx_complete(struct net_device *dev, __u16 queue);
283 static unsigned short smctr_tx_move_frame(struct net_device *dev,
284 struct sk_buff *skb, __u8 *pbuff, unsigned int bytes);
285
286 /* U */
287 static int smctr_update_err_stats(struct net_device *dev);
288 static int smctr_update_rx_chain(struct net_device *dev, __u16 queue);
289 static int smctr_update_tx_chain(struct net_device *dev, FCBlock *fcb,
290 __u16 queue);
291
292 /* W */
293 static int smctr_wait_cmd(struct net_device *dev);
294 static int smctr_wait_while_cbusy(struct net_device *dev);
295
296 #define TO_256_BYTE_BOUNDRY(X) (((X + 0xff) & 0xff00) - X)
297 #define TO_PARAGRAPH_BOUNDRY(X) (((X + 0x0f) & 0xfff0) - X)
298 #define PARAGRAPH_BOUNDRY(X) smctr_malloc(dev, TO_PARAGRAPH_BOUNDRY(X))
299
300 /* Allocate Adapter Shared Memory.
301 * IMPORTANT NOTE: Any changes to this function MUST be mirrored in the
302 * function "get_num_rx_bdbs" below!!!
303 *
304 * Order of memory allocation:
305 *
306 * 0. Initial System Configuration Block Pointer
307 * 1. System Configuration Block
308 * 2. System Control Block
309 * 3. Action Command Block
310 * 4. Interrupt Status Block
311 *
312 * 5. MAC TX FCB'S
313 * 6. NON-MAC TX FCB'S
314 * 7. MAC TX BDB'S
315 * 8. NON-MAC TX BDB'S
316 * 9. MAC RX FCB'S
317 * 10. NON-MAC RX FCB'S
318 * 11. MAC RX BDB'S
319 * 12. NON-MAC RX BDB'S
320 * 13. MAC TX Data Buffer( 1, 256 byte buffer)
321 * 14. MAC RX Data Buffer( 1, 256 byte buffer)
322 *
323 * 15. NON-MAC TX Data Buffer
324 * 16. NON-MAC RX Data Buffer
325 */
326 static int smctr_alloc_shared_memory(struct net_device *dev)
327 {
328 struct net_local *tp = netdev_priv(dev);
329
330 if(smctr_debug > 10)
331 printk(KERN_DEBUG "%s: smctr_alloc_shared_memory\n", dev->name);
332
333 /* Allocate initial System Control Block pointer.
334 * This pointer is located in the last page, last offset - 4.
335 */
336 tp->iscpb_ptr = (ISCPBlock *)(tp->ram_access + ((__u32)64 * 0x400)
337 - (long)ISCP_BLOCK_SIZE);
338
339 /* Allocate System Control Blocks. */
340 tp->scgb_ptr = (SCGBlock *)smctr_malloc(dev, sizeof(SCGBlock));
341 PARAGRAPH_BOUNDRY(tp->sh_mem_used);
342
343 tp->sclb_ptr = (SCLBlock *)smctr_malloc(dev, sizeof(SCLBlock));
344 PARAGRAPH_BOUNDRY(tp->sh_mem_used);
345
346 tp->acb_head = (ACBlock *)smctr_malloc(dev,
347 sizeof(ACBlock)*tp->num_acbs);
348 PARAGRAPH_BOUNDRY(tp->sh_mem_used);
349
350 tp->isb_ptr = (ISBlock *)smctr_malloc(dev, sizeof(ISBlock));
351 PARAGRAPH_BOUNDRY(tp->sh_mem_used);
352
353 tp->misc_command_data = (__u16 *)smctr_malloc(dev, MISC_DATA_SIZE);
354 PARAGRAPH_BOUNDRY(tp->sh_mem_used);
355
356 /* Allocate transmit FCBs. */
357 tp->tx_fcb_head[MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
358 sizeof(FCBlock) * tp->num_tx_fcbs[MAC_QUEUE]);
359
360 tp->tx_fcb_head[NON_MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
361 sizeof(FCBlock) * tp->num_tx_fcbs[NON_MAC_QUEUE]);
362
363 tp->tx_fcb_head[BUG_QUEUE] = (FCBlock *)smctr_malloc(dev,
364 sizeof(FCBlock) * tp->num_tx_fcbs[BUG_QUEUE]);
365
366 /* Allocate transmit BDBs. */
367 tp->tx_bdb_head[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
368 sizeof(BDBlock) * tp->num_tx_bdbs[MAC_QUEUE]);
369
370 tp->tx_bdb_head[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
371 sizeof(BDBlock) * tp->num_tx_bdbs[NON_MAC_QUEUE]);
372
373 tp->tx_bdb_head[BUG_QUEUE] = (BDBlock *)smctr_malloc(dev,
374 sizeof(BDBlock) * tp->num_tx_bdbs[BUG_QUEUE]);
375
376 /* Allocate receive FCBs. */
377 tp->rx_fcb_head[MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
378 sizeof(FCBlock) * tp->num_rx_fcbs[MAC_QUEUE]);
379
380 tp->rx_fcb_head[NON_MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
381 sizeof(FCBlock) * tp->num_rx_fcbs[NON_MAC_QUEUE]);
382
383 /* Allocate receive BDBs. */
384 tp->rx_bdb_head[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
385 sizeof(BDBlock) * tp->num_rx_bdbs[MAC_QUEUE]);
386
387 tp->rx_bdb_end[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev, 0);
388
389 tp->rx_bdb_head[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
390 sizeof(BDBlock) * tp->num_rx_bdbs[NON_MAC_QUEUE]);
391
392 tp->rx_bdb_end[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev, 0);
393
394 /* Allocate MAC transmit buffers.
395 * MAC Tx Buffers doen't have to be on an ODD Boundary.
396 */
397 tp->tx_buff_head[MAC_QUEUE]
398 = (__u16 *)smctr_malloc(dev, tp->tx_buff_size[MAC_QUEUE]);
399 tp->tx_buff_curr[MAC_QUEUE] = tp->tx_buff_head[MAC_QUEUE];
400 tp->tx_buff_end [MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
401
402 /* Allocate BUG transmit buffers. */
403 tp->tx_buff_head[BUG_QUEUE]
404 = (__u16 *)smctr_malloc(dev, tp->tx_buff_size[BUG_QUEUE]);
405 tp->tx_buff_curr[BUG_QUEUE] = tp->tx_buff_head[BUG_QUEUE];
406 tp->tx_buff_end[BUG_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
407
408 /* Allocate MAC receive data buffers.
409 * MAC Rx buffer doesn't have to be on a 256 byte boundary.
410 */
411 tp->rx_buff_head[MAC_QUEUE] = (__u16 *)smctr_malloc(dev,
412 RX_DATA_BUFFER_SIZE * tp->num_rx_bdbs[MAC_QUEUE]);
413 tp->rx_buff_end[MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
414
415 /* Allocate Non-MAC transmit buffers.
416 * ?? For maximum Netware performance, put Tx Buffers on
417 * ODD Boundary and then restore malloc to Even Boundrys.
418 */
419 smctr_malloc(dev, 1L);
420 tp->tx_buff_head[NON_MAC_QUEUE]
421 = (__u16 *)smctr_malloc(dev, tp->tx_buff_size[NON_MAC_QUEUE]);
422 tp->tx_buff_curr[NON_MAC_QUEUE] = tp->tx_buff_head[NON_MAC_QUEUE];
423 tp->tx_buff_end [NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
424 smctr_malloc(dev, 1L);
425
426 /* Allocate Non-MAC receive data buffers.
427 * To guarantee a minimum of 256 contiguous memory to
428 * UM_Receive_Packet's lookahead pointer, before a page
429 * change or ring end is encountered, place each rx buffer on
430 * a 256 byte boundary.
431 */
432 smctr_malloc(dev, TO_256_BYTE_BOUNDRY(tp->sh_mem_used));
433 tp->rx_buff_head[NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev,
434 RX_DATA_BUFFER_SIZE * tp->num_rx_bdbs[NON_MAC_QUEUE]);
435 tp->rx_buff_end[NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
436
437 return 0;
438 }
439
440 /* Enter Bypass state. */
441 static int smctr_bypass_state(struct net_device *dev)
442 {
443 int err;
444
445 if(smctr_debug > 10)
446 printk(KERN_DEBUG "%s: smctr_bypass_state\n", dev->name);
447
448 err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE, JS_BYPASS_STATE);
449
450 return err;
451 }
452
453 static int smctr_checksum_firmware(struct net_device *dev)
454 {
455 struct net_local *tp = netdev_priv(dev);
456 __u16 i, checksum = 0;
457
458 if(smctr_debug > 10)
459 printk(KERN_DEBUG "%s: smctr_checksum_firmware\n", dev->name);
460
461 smctr_enable_adapter_ctrl_store(dev);
462
463 for(i = 0; i < CS_RAM_SIZE; i += 2)
464 checksum += *((__u16 *)(tp->ram_access + i));
465
466 tp->microcode_version = *(__u16 *)(tp->ram_access
467 + CS_RAM_VERSION_OFFSET);
468 tp->microcode_version >>= 8;
469
470 smctr_disable_adapter_ctrl_store(dev);
471
472 if(checksum)
473 return checksum;
474
475 return 0;
476 }
477
478 static int __init smctr_chk_mca(struct net_device *dev)
479 {
480 #ifdef CONFIG_MCA_LEGACY
481 struct net_local *tp = netdev_priv(dev);
482 int current_slot;
483 __u8 r1, r2, r3, r4, r5;
484
485 current_slot = mca_find_unused_adapter(smctr_posid, 0);
486 if(current_slot == MCA_NOTFOUND)
487 return -ENODEV;
488
489 mca_set_adapter_name(current_slot, smctr_name);
490 mca_mark_as_used(current_slot);
491 tp->slot_num = current_slot;
492
493 r1 = mca_read_stored_pos(tp->slot_num, 2);
494 r2 = mca_read_stored_pos(tp->slot_num, 3);
495
496 if(tp->slot_num)
497 outb(CNFG_POS_CONTROL_REG, (__u8)((tp->slot_num - 1) | CNFG_SLOT_ENABLE_BIT));
498 else
499 outb(CNFG_POS_CONTROL_REG, (__u8)((tp->slot_num) | CNFG_SLOT_ENABLE_BIT));
500
501 r1 = inb(CNFG_POS_REG1);
502 r2 = inb(CNFG_POS_REG0);
503
504 tp->bic_type = BIC_594_CHIP;
505
506 /* IO */
507 r2 = mca_read_stored_pos(tp->slot_num, 2);
508 r2 &= 0xF0;
509 dev->base_addr = ((__u16)r2 << 8) + (__u16)0x800;
510 request_region(dev->base_addr, SMCTR_IO_EXTENT, smctr_name);
511
512 /* IRQ */
513 r5 = mca_read_stored_pos(tp->slot_num, 5);
514 r5 &= 0xC;
515 switch(r5)
516 {
517 case 0:
518 dev->irq = 3;
519 break;
520
521 case 0x4:
522 dev->irq = 4;
523 break;
524
525 case 0x8:
526 dev->irq = 10;
527 break;
528
529 default:
530 dev->irq = 15;
531 break;
532 }
533 if (request_irq(dev->irq, smctr_interrupt, IRQF_SHARED, smctr_name, dev)) {
534 release_region(dev->base_addr, SMCTR_IO_EXTENT);
535 return -ENODEV;
536 }
537
538 /* Get RAM base */
539 r3 = mca_read_stored_pos(tp->slot_num, 3);
540 tp->ram_base = ((__u32)(r3 & 0x7) << 13) + 0x0C0000;
541 if (r3 & 0x8)
542 tp->ram_base += 0x010000;
543 if (r3 & 0x80)
544 tp->ram_base += 0xF00000;
545
546 /* Get Ram Size */
547 r3 &= 0x30;
548 r3 >>= 4;
549
550 tp->ram_usable = (__u16)CNFG_SIZE_8KB << r3;
551 tp->ram_size = (__u16)CNFG_SIZE_64KB;
552 tp->board_id |= TOKEN_MEDIA;
553
554 r4 = mca_read_stored_pos(tp->slot_num, 4);
555 tp->rom_base = ((__u32)(r4 & 0x7) << 13) + 0x0C0000;
556 if (r4 & 0x8)
557 tp->rom_base += 0x010000;
558
559 /* Get ROM size. */
560 r4 >>= 4;
561 switch (r4) {
562 case 0:
563 tp->rom_size = CNFG_SIZE_8KB;
564 break;
565 case 1:
566 tp->rom_size = CNFG_SIZE_16KB;
567 break;
568 case 2:
569 tp->rom_size = CNFG_SIZE_32KB;
570 break;
571 default:
572 tp->rom_size = ROM_DISABLE;
573 }
574
575 /* Get Media Type. */
576 r5 = mca_read_stored_pos(tp->slot_num, 5);
577 r5 &= CNFG_MEDIA_TYPE_MASK;
578 switch(r5)
579 {
580 case (0):
581 tp->media_type = MEDIA_STP_4;
582 break;
583
584 case (1):
585 tp->media_type = MEDIA_STP_16;
586 break;
587
588 case (3):
589 tp->media_type = MEDIA_UTP_16;
590 break;
591
592 default:
593 tp->media_type = MEDIA_UTP_4;
594 break;
595 }
596 tp->media_menu = 14;
597
598 r2 = mca_read_stored_pos(tp->slot_num, 2);
599 if(!(r2 & 0x02))
600 tp->mode_bits |= EARLY_TOKEN_REL;
601
602 /* Disable slot */
603 outb(CNFG_POS_CONTROL_REG, 0);
604
605 tp->board_id = smctr_get_boardid(dev, 1);
606 switch(tp->board_id & 0xffff)
607 {
608 case WD8115TA:
609 smctr_model = "8115T/A";
610 break;
611
612 case WD8115T:
613 if(tp->extra_info & CHIP_REV_MASK)
614 smctr_model = "8115T rev XE";
615 else
616 smctr_model = "8115T rev XD";
617 break;
618
619 default:
620 smctr_model = "Unknown";
621 break;
622 }
623
624 return 0;
625 #else
626 return -1;
627 #endif /* CONFIG_MCA_LEGACY */
628 }
629
630 static int smctr_chg_rx_mask(struct net_device *dev)
631 {
632 struct net_local *tp = netdev_priv(dev);
633 int err = 0;
634
635 if(smctr_debug > 10)
636 printk(KERN_DEBUG "%s: smctr_chg_rx_mask\n", dev->name);
637
638 smctr_enable_16bit(dev);
639 smctr_set_page(dev, (__u8 *)tp->ram_access);
640
641 if(tp->mode_bits & LOOPING_MODE_MASK)
642 tp->config_word0 |= RX_OWN_BIT;
643 else
644 tp->config_word0 &= ~RX_OWN_BIT;
645
646 if(tp->receive_mask & PROMISCUOUS_MODE)
647 tp->config_word0 |= PROMISCUOUS_BIT;
648 else
649 tp->config_word0 &= ~PROMISCUOUS_BIT;
650
651 if(tp->receive_mask & ACCEPT_ERR_PACKETS)
652 tp->config_word0 |= SAVBAD_BIT;
653 else
654 tp->config_word0 &= ~SAVBAD_BIT;
655
656 if(tp->receive_mask & ACCEPT_ATT_MAC_FRAMES)
657 tp->config_word0 |= RXATMAC;
658 else
659 tp->config_word0 &= ~RXATMAC;
660
661 if(tp->receive_mask & ACCEPT_MULTI_PROM)
662 tp->config_word1 |= MULTICAST_ADDRESS_BIT;
663 else
664 tp->config_word1 &= ~MULTICAST_ADDRESS_BIT;
665
666 if(tp->receive_mask & ACCEPT_SOURCE_ROUTING_SPANNING)
667 tp->config_word1 |= SOURCE_ROUTING_SPANNING_BITS;
668 else
669 {
670 if(tp->receive_mask & ACCEPT_SOURCE_ROUTING)
671 tp->config_word1 |= SOURCE_ROUTING_EXPLORER_BIT;
672 else
673 tp->config_word1 &= ~SOURCE_ROUTING_SPANNING_BITS;
674 }
675
676 if((err = smctr_issue_write_word_cmd(dev, RW_CONFIG_REGISTER_0,
677 &tp->config_word0)))
678 {
679 return err;
680 }
681
682 if((err = smctr_issue_write_word_cmd(dev, RW_CONFIG_REGISTER_1,
683 &tp->config_word1)))
684 {
685 return err;
686 }
687
688 smctr_disable_16bit(dev);
689
690 return 0;
691 }
692
693 static int smctr_clear_int(struct net_device *dev)
694 {
695 struct net_local *tp = netdev_priv(dev);
696
697 outb((tp->trc_mask | CSR_CLRTINT), dev->base_addr + CSR);
698
699 return 0;
700 }
701
702 static int smctr_clear_trc_reset(int ioaddr)
703 {
704 __u8 r;
705
706 r = inb(ioaddr + MSR);
707 outb(~MSR_RST & r, ioaddr + MSR);
708
709 return 0;
710 }
711
712 /*
713 * The inverse routine to smctr_open().
714 */
715 static int smctr_close(struct net_device *dev)
716 {
717 struct net_local *tp = netdev_priv(dev);
718 struct sk_buff *skb;
719 int err;
720
721 netif_stop_queue(dev);
722
723 tp->cleanup = 1;
724
725 /* Check to see if adapter is already in a closed state. */
726 if(tp->status != OPEN)
727 return 0;
728
729 smctr_enable_16bit(dev);
730 smctr_set_page(dev, (__u8 *)tp->ram_access);
731
732 if((err = smctr_issue_remove_cmd(dev)))
733 {
734 smctr_disable_16bit(dev);
735 return err;
736 }
737
738 for(;;)
739 {
740 skb = skb_dequeue(&tp->SendSkbQueue);
741 if(skb == NULL)
742 break;
743 tp->QueueSkb++;
744 dev_kfree_skb(skb);
745 }
746
747
748 return 0;
749 }
750
751 static int smctr_decode_firmware(struct net_device *dev,
752 const struct firmware *fw)
753 {
754 struct net_local *tp = netdev_priv(dev);
755 short bit = 0x80, shift = 12;
756 DECODE_TREE_NODE *tree;
757 short branch, tsize;
758 __u16 buff = 0;
759 long weight;
760 __u8 *ucode;
761 __u16 *mem;
762
763 if(smctr_debug > 10)
764 printk(KERN_DEBUG "%s: smctr_decode_firmware\n", dev->name);
765
766 weight = *(long *)(fw->data + WEIGHT_OFFSET);
767 tsize = *(__u8 *)(fw->data + TREE_SIZE_OFFSET);
768 tree = (DECODE_TREE_NODE *)(fw->data + TREE_OFFSET);
769 ucode = (__u8 *)(fw->data + TREE_OFFSET
770 + (tsize * sizeof(DECODE_TREE_NODE)));
771 mem = (__u16 *)(tp->ram_access);
772
773 while(weight)
774 {
775 branch = ROOT;
776 while((tree + branch)->tag != LEAF && weight)
777 {
778 branch = *ucode & bit ? (tree + branch)->llink
779 : (tree + branch)->rlink;
780
781 bit >>= 1;
782 weight--;
783
784 if(bit == 0)
785 {
786 bit = 0x80;
787 ucode++;
788 }
789 }
790
791 buff |= (tree + branch)->info << shift;
792 shift -= 4;
793
794 if(shift < 0)
795 {
796 *(mem++) = SWAP_BYTES(buff);
797 buff = 0;
798 shift = 12;
799 }
800 }
801
802 /* The following assumes the Control Store Memory has
803 * been initialized to zero. If the last partial word
804 * is zero, it will not be written.
805 */
806 if(buff)
807 *(mem++) = SWAP_BYTES(buff);
808
809 return 0;
810 }
811
812 static int smctr_disable_16bit(struct net_device *dev)
813 {
814 return 0;
815 }
816
817 /*
818 * On Exit, Adapter is:
819 * 1. TRC is in a reset state and un-initialized.
820 * 2. Adapter memory is enabled.
821 * 3. Control Store memory is out of context (-WCSS is 1).
822 */
823 static int smctr_disable_adapter_ctrl_store(struct net_device *dev)
824 {
825 struct net_local *tp = netdev_priv(dev);
826 int ioaddr = dev->base_addr;
827
828 if(smctr_debug > 10)
829 printk(KERN_DEBUG "%s: smctr_disable_adapter_ctrl_store\n", dev->name);
830
831 tp->trc_mask |= CSR_WCSS;
832 outb(tp->trc_mask, ioaddr + CSR);
833
834 return 0;
835 }
836
837 static int smctr_disable_bic_int(struct net_device *dev)
838 {
839 struct net_local *tp = netdev_priv(dev);
840 int ioaddr = dev->base_addr;
841
842 tp->trc_mask = CSR_MSK_ALL | CSR_MSKCBUSY
843 | CSR_MSKTINT | CSR_WCSS;
844 outb(tp->trc_mask, ioaddr + CSR);
845
846 return 0;
847 }
848
849 static int smctr_enable_16bit(struct net_device *dev)
850 {
851 struct net_local *tp = netdev_priv(dev);
852 __u8 r;
853
854 if(tp->adapter_bus == BUS_ISA16_TYPE)
855 {
856 r = inb(dev->base_addr + LAAR);
857 outb((r | LAAR_MEM16ENB), dev->base_addr + LAAR);
858 }
859
860 return 0;
861 }
862
863 /*
864 * To enable the adapter control store memory:
865 * 1. Adapter must be in a RESET state.
866 * 2. Adapter memory must be enabled.
867 * 3. Control Store Memory is in context (-WCSS is 0).
868 */
869 static int smctr_enable_adapter_ctrl_store(struct net_device *dev)
870 {
871 struct net_local *tp = netdev_priv(dev);
872 int ioaddr = dev->base_addr;
873
874 if(smctr_debug > 10)
875 printk(KERN_DEBUG "%s: smctr_enable_adapter_ctrl_store\n", dev->name);
876
877 smctr_set_trc_reset(ioaddr);
878 smctr_enable_adapter_ram(dev);
879
880 tp->trc_mask &= ~CSR_WCSS;
881 outb(tp->trc_mask, ioaddr + CSR);
882
883 return 0;
884 }
885
886 static int smctr_enable_adapter_ram(struct net_device *dev)
887 {
888 int ioaddr = dev->base_addr;
889 __u8 r;
890
891 if(smctr_debug > 10)
892 printk(KERN_DEBUG "%s: smctr_enable_adapter_ram\n", dev->name);
893
894 r = inb(ioaddr + MSR);
895 outb(MSR_MEMB | r, ioaddr + MSR);
896
897 return 0;
898 }
899
900 static int smctr_enable_bic_int(struct net_device *dev)
901 {
902 struct net_local *tp = netdev_priv(dev);
903 int ioaddr = dev->base_addr;
904 __u8 r;
905
906 switch(tp->bic_type)
907 {
908 case (BIC_584_CHIP):
909 tp->trc_mask = CSR_MSKCBUSY | CSR_WCSS;
910 outb(tp->trc_mask, ioaddr + CSR);
911 r = inb(ioaddr + IRR);
912 outb(r | IRR_IEN, ioaddr + IRR);
913 break;
914
915 case (BIC_594_CHIP):
916 tp->trc_mask = CSR_MSKCBUSY | CSR_WCSS;
917 outb(tp->trc_mask, ioaddr + CSR);
918 r = inb(ioaddr + IMCCR);
919 outb(r | IMCCR_EIL, ioaddr + IMCCR);
920 break;
921 }
922
923 return 0;
924 }
925
926 static int __init smctr_chk_isa(struct net_device *dev)
927 {
928 struct net_local *tp = netdev_priv(dev);
929 int ioaddr = dev->base_addr;
930 __u8 r1, r2, b, chksum = 0;
931 __u16 r;
932 int i;
933 int err = -ENODEV;
934
935 if(smctr_debug > 10)
936 printk(KERN_DEBUG "%s: smctr_chk_isa %#4x\n", dev->name, ioaddr);
937
938 if((ioaddr & 0x1F) != 0)
939 goto out;
940
941 /* Grab the region so that no one else tries to probe our ioports. */
942 if (!request_region(ioaddr, SMCTR_IO_EXTENT, smctr_name)) {
943 err = -EBUSY;
944 goto out;
945 }
946
947 /* Checksum SMC node address */
948 for(i = 0; i < 8; i++)
949 {
950 b = inb(ioaddr + LAR0 + i);
951 chksum += b;
952 }
953
954 if (chksum != NODE_ADDR_CKSUM)
955 goto out2;
956
957 b = inb(ioaddr + BDID);
958 if(b != BRD_ID_8115T)
959 {
960 printk(KERN_ERR "%s: The adapter found is not supported\n", dev->name);
961 goto out2;
962 }
963
964 /* Check for 8115T Board ID */
965 r2 = 0;
966 for(r = 0; r < 8; r++)
967 {
968 r1 = inb(ioaddr + 0x8 + r);
969 r2 += r1;
970 }
971
972 /* value of RegF adds up the sum to 0xFF */
973 if((r2 != 0xFF) && (r2 != 0xEE))
974 goto out2;
975
976 /* Get adapter ID */
977 tp->board_id = smctr_get_boardid(dev, 0);
978 switch(tp->board_id & 0xffff)
979 {
980 case WD8115TA:
981 smctr_model = "8115T/A";
982 break;
983
984 case WD8115T:
985 if(tp->extra_info & CHIP_REV_MASK)
986 smctr_model = "8115T rev XE";
987 else
988 smctr_model = "8115T rev XD";
989 break;
990
991 default:
992 smctr_model = "Unknown";
993 break;
994 }
995
996 /* Store BIC type. */
997 tp->bic_type = BIC_584_CHIP;
998 tp->nic_type = NIC_825_CHIP;
999
1000 /* Copy Ram Size */
1001 tp->ram_usable = CNFG_SIZE_16KB;
1002 tp->ram_size = CNFG_SIZE_64KB;
1003
1004 /* Get 58x Ram Base */
1005 r1 = inb(ioaddr);
1006 r1 &= 0x3F;
1007
1008 r2 = inb(ioaddr + CNFG_LAAR_584);
1009 r2 &= CNFG_LAAR_MASK;
1010 r2 <<= 3;
1011 r2 |= ((r1 & 0x38) >> 3);
1012
1013 tp->ram_base = ((__u32)r2 << 16) + (((__u32)(r1 & 0x7)) << 13);
1014
1015 /* Get 584 Irq */
1016 r1 = 0;
1017 r1 = inb(ioaddr + CNFG_ICR_583);
1018 r1 &= CNFG_ICR_IR2_584;
1019
1020 r2 = inb(ioaddr + CNFG_IRR_583);
1021 r2 &= CNFG_IRR_IRQS; /* 0x60 */
1022 r2 >>= 5;
1023
1024 switch(r2)
1025 {
1026 case 0:
1027 if(r1 == 0)
1028 dev->irq = 2;
1029 else
1030 dev->irq = 10;
1031 break;
1032
1033 case 1:
1034 if(r1 == 0)
1035 dev->irq = 3;
1036 else
1037 dev->irq = 11;
1038 break;
1039
1040 case 2:
1041 if(r1 == 0)
1042 {
1043 if(tp->extra_info & ALTERNATE_IRQ_BIT)
1044 dev->irq = 5;
1045 else
1046 dev->irq = 4;
1047 }
1048 else
1049 dev->irq = 15;
1050 break;
1051
1052 case 3:
1053 if(r1 == 0)
1054 dev->irq = 7;
1055 else
1056 dev->irq = 4;
1057 break;
1058
1059 default:
1060 printk(KERN_ERR "%s: No IRQ found aborting\n", dev->name);
1061 goto out2;
1062 }
1063
1064 if (request_irq(dev->irq, smctr_interrupt, IRQF_SHARED, smctr_name, dev))
1065 goto out2;
1066
1067 /* Get 58x Rom Base */
1068 r1 = inb(ioaddr + CNFG_BIO_583);
1069 r1 &= 0x3E;
1070 r1 |= 0x40;
1071
1072 tp->rom_base = (__u32)r1 << 13;
1073
1074 /* Get 58x Rom Size */
1075 r1 = inb(ioaddr + CNFG_BIO_583);
1076 r1 &= 0xC0;
1077 if(r1 == 0)
1078 tp->rom_size = ROM_DISABLE;
1079 else
1080 {
1081 r1 >>= 6;
1082 tp->rom_size = (__u16)CNFG_SIZE_8KB << r1;
1083 }
1084
1085 /* Get 58x Boot Status */
1086 r1 = inb(ioaddr + CNFG_GP2);
1087
1088 tp->mode_bits &= (~BOOT_STATUS_MASK);
1089
1090 if(r1 & CNFG_GP2_BOOT_NIBBLE)
1091 tp->mode_bits |= BOOT_TYPE_1;
1092
1093 /* Get 58x Zero Wait State */
1094 tp->mode_bits &= (~ZERO_WAIT_STATE_MASK);
1095
1096 r1 = inb(ioaddr + CNFG_IRR_583);
1097
1098 if(r1 & CNFG_IRR_ZWS)
1099 tp->mode_bits |= ZERO_WAIT_STATE_8_BIT;
1100
1101 if(tp->board_id & BOARD_16BIT)
1102 {
1103 r1 = inb(ioaddr + CNFG_LAAR_584);
1104
1105 if(r1 & CNFG_LAAR_ZWS)
1106 tp->mode_bits |= ZERO_WAIT_STATE_16_BIT;
1107 }
1108
1109 /* Get 584 Media Menu */
1110 tp->media_menu = 14;
1111 r1 = inb(ioaddr + CNFG_IRR_583);
1112
1113 tp->mode_bits &= 0xf8ff; /* (~CNFG_INTERFACE_TYPE_MASK) */
1114 if((tp->board_id & TOKEN_MEDIA) == TOKEN_MEDIA)
1115 {
1116 /* Get Advanced Features */
1117 if(((r1 & 0x6) >> 1) == 0x3)
1118 tp->media_type |= MEDIA_UTP_16;
1119 else
1120 {
1121 if(((r1 & 0x6) >> 1) == 0x2)
1122 tp->media_type |= MEDIA_STP_16;
1123 else
1124 {
1125 if(((r1 & 0x6) >> 1) == 0x1)
1126 tp->media_type |= MEDIA_UTP_4;
1127
1128 else
1129 tp->media_type |= MEDIA_STP_4;
1130 }
1131 }
1132
1133 r1 = inb(ioaddr + CNFG_GP2);
1134 if(!(r1 & 0x2) ) /* GP2_ETRD */
1135 tp->mode_bits |= EARLY_TOKEN_REL;
1136
1137 /* see if the chip is corrupted
1138 if(smctr_read_584_chksum(ioaddr))
1139 {
1140 printk(KERN_ERR "%s: EEPROM Checksum Failure\n", dev->name);
1141 free_irq(dev->irq, dev);
1142 goto out2;
1143 }
1144 */
1145 }
1146
1147 return 0;
1148
1149 out2:
1150 release_region(ioaddr, SMCTR_IO_EXTENT);
1151 out:
1152 return err;
1153 }
1154
1155 static int __init smctr_get_boardid(struct net_device *dev, int mca)
1156 {
1157 struct net_local *tp = netdev_priv(dev);
1158 int ioaddr = dev->base_addr;
1159 __u8 r, r1, IdByte;
1160 __u16 BoardIdMask;
1161
1162 tp->board_id = BoardIdMask = 0;
1163
1164 if(mca)
1165 {
1166 BoardIdMask |= (MICROCHANNEL+INTERFACE_CHIP+TOKEN_MEDIA+PAGED_RAM+BOARD_16BIT);
1167 tp->extra_info |= (INTERFACE_594_CHIP+RAM_SIZE_64K+NIC_825_BIT+ALTERNATE_IRQ_BIT+SLOT_16BIT);
1168 }
1169 else
1170 {
1171 BoardIdMask|=(INTERFACE_CHIP+TOKEN_MEDIA+PAGED_RAM+BOARD_16BIT);
1172 tp->extra_info |= (INTERFACE_584_CHIP + RAM_SIZE_64K
1173 + NIC_825_BIT + ALTERNATE_IRQ_BIT);
1174 }
1175
1176 if(!mca)
1177 {
1178 r = inb(ioaddr + BID_REG_1);
1179 r &= 0x0c;
1180 outb(r, ioaddr + BID_REG_1);
1181 r = inb(ioaddr + BID_REG_1);
1182
1183 if(r & BID_SIXTEEN_BIT_BIT)
1184 {
1185 tp->extra_info |= SLOT_16BIT;
1186 tp->adapter_bus = BUS_ISA16_TYPE;
1187 }
1188 else
1189 tp->adapter_bus = BUS_ISA8_TYPE;
1190 }
1191 else
1192 tp->adapter_bus = BUS_MCA_TYPE;
1193
1194 /* Get Board Id Byte */
1195 IdByte = inb(ioaddr + BID_BOARD_ID_BYTE);
1196
1197 /* if Major version > 1.0 then
1198 * return;
1199 */
1200 if(IdByte & 0xF8)
1201 return -1;
1202
1203 r1 = inb(ioaddr + BID_REG_1);
1204 r1 &= BID_ICR_MASK;
1205 r1 |= BID_OTHER_BIT;
1206
1207 outb(r1, ioaddr + BID_REG_1);
1208 r1 = inb(ioaddr + BID_REG_3);
1209
1210 r1 &= BID_EAR_MASK;
1211 r1 |= BID_ENGR_PAGE;
1212
1213 outb(r1, ioaddr + BID_REG_3);
1214 r1 = inb(ioaddr + BID_REG_1);
1215 r1 &= BID_ICR_MASK;
1216 r1 |= (BID_RLA | BID_OTHER_BIT);
1217
1218 outb(r1, ioaddr + BID_REG_1);
1219
1220 r1 = inb(ioaddr + BID_REG_1);
1221 while(r1 & BID_RECALL_DONE_MASK)
1222 r1 = inb(ioaddr + BID_REG_1);
1223
1224 r = inb(ioaddr + BID_LAR_0 + BID_REG_6);
1225
1226 /* clear chip rev bits */
1227 tp->extra_info &= ~CHIP_REV_MASK;
1228 tp->extra_info |= ((r & BID_EEPROM_CHIP_REV_MASK) << 6);
1229
1230 r1 = inb(ioaddr + BID_REG_1);
1231 r1 &= BID_ICR_MASK;
1232 r1 |= BID_OTHER_BIT;
1233
1234 outb(r1, ioaddr + BID_REG_1);
1235 r1 = inb(ioaddr + BID_REG_3);
1236
1237 r1 &= BID_EAR_MASK;
1238 r1 |= BID_EA6;
1239
1240 outb(r1, ioaddr + BID_REG_3);
1241 r1 = inb(ioaddr + BID_REG_1);
1242
1243 r1 &= BID_ICR_MASK;
1244 r1 |= BID_RLA;
1245
1246 outb(r1, ioaddr + BID_REG_1);
1247 r1 = inb(ioaddr + BID_REG_1);
1248
1249 while(r1 & BID_RECALL_DONE_MASK)
1250 r1 = inb(ioaddr + BID_REG_1);
1251
1252 return BoardIdMask;
1253 }
1254
1255 static int smctr_get_group_address(struct net_device *dev)
1256 {
1257 smctr_issue_read_word_cmd(dev, RW_INDIVIDUAL_GROUP_ADDR);
1258
1259 return smctr_wait_cmd(dev);
1260 }
1261
1262 static int smctr_get_functional_address(struct net_device *dev)
1263 {
1264 smctr_issue_read_word_cmd(dev, RW_FUNCTIONAL_ADDR);
1265
1266 return smctr_wait_cmd(dev);
1267 }
1268
1269 /* Calculate number of Non-MAC receive BDB's and data buffers.
1270 * This function must simulate allocateing shared memory exactly
1271 * as the allocate_shared_memory function above.
1272 */
1273 static unsigned int smctr_get_num_rx_bdbs(struct net_device *dev)
1274 {
1275 struct net_local *tp = netdev_priv(dev);
1276 unsigned int mem_used = 0;
1277
1278 /* Allocate System Control Blocks. */
1279 mem_used += sizeof(SCGBlock);
1280
1281 mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
1282 mem_used += sizeof(SCLBlock);
1283
1284 mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
1285 mem_used += sizeof(ACBlock) * tp->num_acbs;
1286
1287 mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
1288 mem_used += sizeof(ISBlock);
1289
1290 mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
1291 mem_used += MISC_DATA_SIZE;
1292
1293 /* Allocate transmit FCB's. */
1294 mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
1295
1296 mem_used += sizeof(FCBlock) * tp->num_tx_fcbs[MAC_QUEUE];
1297 mem_used += sizeof(FCBlock) * tp->num_tx_fcbs[NON_MAC_QUEUE];
1298 mem_used += sizeof(FCBlock) * tp->num_tx_fcbs[BUG_QUEUE];
1299
1300 /* Allocate transmit BDBs. */
1301 mem_used += sizeof(BDBlock) * tp->num_tx_bdbs[MAC_QUEUE];
1302 mem_used += sizeof(BDBlock) * tp->num_tx_bdbs[NON_MAC_QUEUE];
1303 mem_used += sizeof(BDBlock) * tp->num_tx_bdbs[BUG_QUEUE];
1304
1305 /* Allocate receive FCBs. */
1306 mem_used += sizeof(FCBlock) * tp->num_rx_fcbs[MAC_QUEUE];
1307 mem_used += sizeof(FCBlock) * tp->num_rx_fcbs[NON_MAC_QUEUE];
1308
1309 /* Allocate receive BDBs. */
1310 mem_used += sizeof(BDBlock) * tp->num_rx_bdbs[MAC_QUEUE];
1311
1312 /* Allocate MAC transmit buffers.
1313 * MAC transmit buffers don't have to be on an ODD Boundary.
1314 */
1315 mem_used += tp->tx_buff_size[MAC_QUEUE];
1316
1317 /* Allocate BUG transmit buffers. */
1318 mem_used += tp->tx_buff_size[BUG_QUEUE];
1319
1320 /* Allocate MAC receive data buffers.
1321 * MAC receive buffers don't have to be on a 256 byte boundary.
1322 */
1323 mem_used += RX_DATA_BUFFER_SIZE * tp->num_rx_bdbs[MAC_QUEUE];
1324
1325 /* Allocate Non-MAC transmit buffers.
1326 * For maximum Netware performance, put Tx Buffers on
1327 * ODD Boundary,and then restore malloc to Even Boundrys.
1328 */
1329 mem_used += 1L;
1330 mem_used += tp->tx_buff_size[NON_MAC_QUEUE];
1331 mem_used += 1L;
1332
1333 /* CALCULATE NUMBER OF NON-MAC RX BDB'S
1334 * AND NON-MAC RX DATA BUFFERS
1335 *
1336 * Make sure the mem_used offset at this point is the
1337 * same as in allocate_shared memory or the following
1338 * boundary adjustment will be incorrect (i.e. not allocating
1339 * the non-mac receive buffers above cannot change the 256
1340 * byte offset).
1341 *
1342 * Since this cannot be guaranteed, adding the full 256 bytes
1343 * to the amount of shared memory used at this point will guaranteed
1344 * that the rx data buffers do not overflow shared memory.
1345 */
1346 mem_used += 0x100;
1347
1348 return (0xffff - mem_used) / (RX_DATA_BUFFER_SIZE + sizeof(BDBlock));
1349 }
1350
1351 static int smctr_get_physical_drop_number(struct net_device *dev)
1352 {
1353 smctr_issue_read_word_cmd(dev, RW_PHYSICAL_DROP_NUMBER);
1354
1355 return smctr_wait_cmd(dev);
1356 }
1357
1358 static __u8 * smctr_get_rx_pointer(struct net_device *dev, short queue)
1359 {
1360 struct net_local *tp = netdev_priv(dev);
1361 BDBlock *bdb;
1362
1363 bdb = (BDBlock *)((__u32)tp->ram_access
1364 + (__u32)(tp->rx_fcb_curr[queue]->trc_bdb_ptr));
1365
1366 tp->rx_fcb_curr[queue]->bdb_ptr = bdb;
1367
1368 return (__u8 *)bdb->data_block_ptr;
1369 }
1370
1371 static int smctr_get_station_id(struct net_device *dev)
1372 {
1373 smctr_issue_read_word_cmd(dev, RW_INDIVIDUAL_MAC_ADDRESS);
1374
1375 return smctr_wait_cmd(dev);
1376 }
1377
1378 /*
1379 * Get the current statistics. This may be called with the card open
1380 * or closed.
1381 */
1382 static struct net_device_stats *smctr_get_stats(struct net_device *dev)
1383 {
1384 struct net_local *tp = netdev_priv(dev);
1385
1386 return (struct net_device_stats *)&tp->MacStat;
1387 }
1388
1389 static FCBlock *smctr_get_tx_fcb(struct net_device *dev, __u16 queue,
1390 __u16 bytes_count)
1391 {
1392 struct net_local *tp = netdev_priv(dev);
1393 FCBlock *pFCB;
1394 BDBlock *pbdb;
1395 unsigned short alloc_size;
1396 unsigned short *temp;
1397
1398 if(smctr_debug > 20)
1399 printk(KERN_DEBUG "smctr_get_tx_fcb\n");
1400
1401 /* check if there is enough FCB blocks */
1402 if(tp->num_tx_fcbs_used[queue] >= tp->num_tx_fcbs[queue])
1403 return (FCBlock *)(-1L);
1404
1405 /* round off the input pkt size to the nearest even number */
1406 alloc_size = (bytes_count + 1) & 0xfffe;
1407
1408 /* check if enough mem */
1409 if((tp->tx_buff_used[queue] + alloc_size) > tp->tx_buff_size[queue])
1410 return (FCBlock *)(-1L);
1411
1412 /* check if past the end ;
1413 * if exactly enough mem to end of ring, alloc from front.
1414 * this avoids update of curr when curr = end
1415 */
1416 if(((unsigned long)(tp->tx_buff_curr[queue]) + alloc_size)
1417 >= (unsigned long)(tp->tx_buff_end[queue]))
1418 {
1419 /* check if enough memory from ring head */
1420 alloc_size = alloc_size +
1421 (__u16)((__u32)tp->tx_buff_end[queue]
1422 - (__u32)tp->tx_buff_curr[queue]);
1423
1424 if((tp->tx_buff_used[queue] + alloc_size)
1425 > tp->tx_buff_size[queue])
1426 {
1427 return (FCBlock *)(-1L);
1428 }
1429
1430 /* ring wrap */
1431 tp->tx_buff_curr[queue] = tp->tx_buff_head[queue];
1432 }
1433
1434 tp->tx_buff_used[queue] += alloc_size;
1435 tp->num_tx_fcbs_used[queue]++;
1436 tp->tx_fcb_curr[queue]->frame_length = bytes_count;
1437 tp->tx_fcb_curr[queue]->memory_alloc = alloc_size;
1438 temp = tp->tx_buff_curr[queue];
1439 tp->tx_buff_curr[queue]
1440 = (__u16 *)((__u32)temp + (__u32)((bytes_count + 1) & 0xfffe));
1441
1442 pbdb = tp->tx_fcb_curr[queue]->bdb_ptr;
1443 pbdb->buffer_length = bytes_count;
1444 pbdb->data_block_ptr = temp;
1445 pbdb->trc_data_block_ptr = TRC_POINTER(temp);
1446
1447 pFCB = tp->tx_fcb_curr[queue];
1448 tp->tx_fcb_curr[queue] = tp->tx_fcb_curr[queue]->next_ptr;
1449
1450 return pFCB;
1451 }
1452
1453 static int smctr_get_upstream_neighbor_addr(struct net_device *dev)
1454 {
1455 smctr_issue_read_word_cmd(dev, RW_UPSTREAM_NEIGHBOR_ADDRESS);
1456
1457 return smctr_wait_cmd(dev);
1458 }
1459
1460 static int smctr_hardware_send_packet(struct net_device *dev,
1461 struct net_local *tp)
1462 {
1463 struct tr_statistics *tstat = &tp->MacStat;
1464 struct sk_buff *skb;
1465 FCBlock *fcb;
1466
1467 if(smctr_debug > 10)
1468 printk(KERN_DEBUG"%s: smctr_hardware_send_packet\n", dev->name);
1469
1470 if(tp->status != OPEN)
1471 return -1;
1472
1473 if(tp->monitor_state_ready != 1)
1474 return -1;
1475
1476 for(;;)
1477 {
1478 /* Send first buffer from queue */
1479 skb = skb_dequeue(&tp->SendSkbQueue);
1480 if(skb == NULL)
1481 return -1;
1482
1483 tp->QueueSkb++;
1484
1485 if(skb->len < SMC_HEADER_SIZE || skb->len > tp->max_packet_size)
1486 return -1;
1487
1488 smctr_enable_16bit(dev);
1489 smctr_set_page(dev, (__u8 *)tp->ram_access);
1490
1491 if((fcb = smctr_get_tx_fcb(dev, NON_MAC_QUEUE, skb->len))
1492 == (FCBlock *)(-1L))
1493 {
1494 smctr_disable_16bit(dev);
1495 return -1;
1496 }
1497
1498 smctr_tx_move_frame(dev, skb,
1499 (__u8 *)fcb->bdb_ptr->data_block_ptr, skb->len);
1500
1501 smctr_set_page(dev, (__u8 *)fcb);
1502
1503 smctr_trc_send_packet(dev, fcb, NON_MAC_QUEUE);
1504 dev_kfree_skb(skb);
1505
1506 tstat->tx_packets++;
1507
1508 smctr_disable_16bit(dev);
1509 }
1510
1511 return 0;
1512 }
1513
1514 static int smctr_init_acbs(struct net_device *dev)
1515 {
1516 struct net_local *tp = netdev_priv(dev);
1517 unsigned int i;
1518 ACBlock *acb;
1519
1520 if(smctr_debug > 10)
1521 printk(KERN_DEBUG "%s: smctr_init_acbs\n", dev->name);
1522
1523 acb = tp->acb_head;
1524 acb->cmd_done_status = (ACB_COMMAND_DONE | ACB_COMMAND_SUCCESSFUL);
1525 acb->cmd_info = ACB_CHAIN_END;
1526 acb->cmd = 0;
1527 acb->subcmd = 0;
1528 acb->data_offset_lo = 0;
1529 acb->data_offset_hi = 0;
1530 acb->next_ptr
1531 = (ACBlock *)(((char *)acb) + sizeof(ACBlock));
1532 acb->trc_next_ptr = TRC_POINTER(acb->next_ptr);
1533
1534 for(i = 1; i < tp->num_acbs; i++)
1535 {
1536 acb = acb->next_ptr;
1537 acb->cmd_done_status
1538 = (ACB_COMMAND_DONE | ACB_COMMAND_SUCCESSFUL);
1539 acb->cmd_info = ACB_CHAIN_END;
1540 acb->cmd = 0;
1541 acb->subcmd = 0;
1542 acb->data_offset_lo = 0;
1543 acb->data_offset_hi = 0;
1544 acb->next_ptr
1545 = (ACBlock *)(((char *)acb) + sizeof(ACBlock));
1546 acb->trc_next_ptr = TRC_POINTER(acb->next_ptr);
1547 }
1548
1549 acb->next_ptr = tp->acb_head;
1550 acb->trc_next_ptr = TRC_POINTER(tp->acb_head);
1551 tp->acb_next = tp->acb_head->next_ptr;
1552 tp->acb_curr = tp->acb_head->next_ptr;
1553 tp->num_acbs_used = 0;
1554
1555 return 0;
1556 }
1557
1558 static int smctr_init_adapter(struct net_device *dev)
1559 {
1560 struct net_local *tp = netdev_priv(dev);
1561 int err;
1562
1563 if(smctr_debug > 10)
1564 printk(KERN_DEBUG "%s: smctr_init_adapter\n", dev->name);
1565
1566 tp->status = CLOSED;
1567 tp->page_offset_mask = (tp->ram_usable * 1024) - 1;
1568 skb_queue_head_init(&tp->SendSkbQueue);
1569 tp->QueueSkb = MAX_TX_QUEUE;
1570
1571 if(!(tp->group_address_0 & 0x0080))
1572 tp->group_address_0 |= 0x00C0;
1573
1574 if(!(tp->functional_address_0 & 0x00C0))
1575 tp->functional_address_0 |= 0x00C0;
1576
1577 tp->functional_address[0] &= 0xFF7F;
1578
1579 if(tp->authorized_function_classes == 0)
1580 tp->authorized_function_classes = 0x7FFF;
1581
1582 if(tp->authorized_access_priority == 0)
1583 tp->authorized_access_priority = 0x06;
1584
1585 smctr_disable_bic_int(dev);
1586 smctr_set_trc_reset(dev->base_addr);
1587
1588 smctr_enable_16bit(dev);
1589 smctr_set_page(dev, (__u8 *)tp->ram_access);
1590
1591 if(smctr_checksum_firmware(dev))
1592 {
1593 printk(KERN_ERR "%s: Previously loaded firmware is missing\n",dev->name);
1594 return -ENOENT;
1595 }
1596
1597 if((err = smctr_ram_memory_test(dev)))
1598 {
1599 printk(KERN_ERR "%s: RAM memory test failed.\n", dev->name);
1600 return -EIO;
1601 }
1602
1603 smctr_set_rx_look_ahead(dev);
1604 smctr_load_node_addr(dev);
1605
1606 /* Initialize adapter for Internal Self Test. */
1607 smctr_reset_adapter(dev);
1608 if((err = smctr_init_card_real(dev)))
1609 {
1610 printk(KERN_ERR "%s: Initialization of card failed (%d)\n",
1611 dev->name, err);
1612 return -EINVAL;
1613 }
1614
1615 /* This routine clobbers the TRC's internal registers. */
1616 if((err = smctr_internal_self_test(dev)))
1617 {
1618 printk(KERN_ERR "%s: Card failed internal self test (%d)\n",
1619 dev->name, err);
1620 return -EINVAL;
1621 }
1622
1623 /* Re-Initialize adapter's internal registers */
1624 smctr_reset_adapter(dev);
1625 if((err = smctr_init_card_real(dev)))
1626 {
1627 printk(KERN_ERR "%s: Initialization of card failed (%d)\n",
1628 dev->name, err);
1629 return -EINVAL;
1630 }
1631
1632 smctr_enable_bic_int(dev);
1633
1634 if((err = smctr_issue_enable_int_cmd(dev, TRC_INTERRUPT_ENABLE_MASK)))
1635 return err;
1636
1637 smctr_disable_16bit(dev);
1638
1639 return 0;
1640 }
1641
1642 static int smctr_init_card_real(struct net_device *dev)
1643 {
1644 struct net_local *tp = netdev_priv(dev);
1645 int err = 0;
1646
1647 if(smctr_debug > 10)
1648 printk(KERN_DEBUG "%s: smctr_init_card_real\n", dev->name);
1649
1650 tp->sh_mem_used = 0;
1651 tp->num_acbs = NUM_OF_ACBS;
1652
1653 /* Range Check Max Packet Size */
1654 if(tp->max_packet_size < 256)
1655 tp->max_packet_size = 256;
1656 else
1657 {
1658 if(tp->max_packet_size > NON_MAC_TX_BUFFER_MEMORY)
1659 tp->max_packet_size = NON_MAC_TX_BUFFER_MEMORY;
1660 }
1661
1662 tp->num_of_tx_buffs = (NON_MAC_TX_BUFFER_MEMORY
1663 / tp->max_packet_size) - 1;
1664
1665 if(tp->num_of_tx_buffs > NUM_NON_MAC_TX_FCBS)
1666 tp->num_of_tx_buffs = NUM_NON_MAC_TX_FCBS;
1667 else
1668 {
1669 if(tp->num_of_tx_buffs == 0)
1670 tp->num_of_tx_buffs = 1;
1671 }
1672
1673 /* Tx queue constants */
1674 tp->num_tx_fcbs [BUG_QUEUE] = NUM_BUG_TX_FCBS;
1675 tp->num_tx_bdbs [BUG_QUEUE] = NUM_BUG_TX_BDBS;
1676 tp->tx_buff_size [BUG_QUEUE] = BUG_TX_BUFFER_MEMORY;
1677 tp->tx_buff_used [BUG_QUEUE] = 0;
1678 tp->tx_queue_status [BUG_QUEUE] = NOT_TRANSMITING;
1679
1680 tp->num_tx_fcbs [MAC_QUEUE] = NUM_MAC_TX_FCBS;
1681 tp->num_tx_bdbs [MAC_QUEUE] = NUM_MAC_TX_BDBS;
1682 tp->tx_buff_size [MAC_QUEUE] = MAC_TX_BUFFER_MEMORY;
1683 tp->tx_buff_used [MAC_QUEUE] = 0;
1684 tp->tx_queue_status [MAC_QUEUE] = NOT_TRANSMITING;
1685
1686 tp->num_tx_fcbs [NON_MAC_QUEUE] = NUM_NON_MAC_TX_FCBS;
1687 tp->num_tx_bdbs [NON_MAC_QUEUE] = NUM_NON_MAC_TX_BDBS;
1688 tp->tx_buff_size [NON_MAC_QUEUE] = NON_MAC_TX_BUFFER_MEMORY;
1689 tp->tx_buff_used [NON_MAC_QUEUE] = 0;
1690 tp->tx_queue_status [NON_MAC_QUEUE] = NOT_TRANSMITING;
1691
1692 /* Receive Queue Constants */
1693 tp->num_rx_fcbs[MAC_QUEUE] = NUM_MAC_RX_FCBS;
1694 tp->num_rx_bdbs[MAC_QUEUE] = NUM_MAC_RX_BDBS;
1695
1696 if(tp->extra_info & CHIP_REV_MASK)
1697 tp->num_rx_fcbs[NON_MAC_QUEUE] = 78; /* 825 Rev. XE */
1698 else
1699 tp->num_rx_fcbs[NON_MAC_QUEUE] = 7; /* 825 Rev. XD */
1700
1701 tp->num_rx_bdbs[NON_MAC_QUEUE] = smctr_get_num_rx_bdbs(dev);
1702
1703 smctr_alloc_shared_memory(dev);
1704 smctr_init_shared_memory(dev);
1705
1706 if((err = smctr_issue_init_timers_cmd(dev)))
1707 return err;
1708
1709 if((err = smctr_issue_init_txrx_cmd(dev)))
1710 {
1711 printk(KERN_ERR "%s: Hardware failure\n", dev->name);
1712 return err;
1713 }
1714
1715 return 0;
1716 }
1717
1718 static int smctr_init_rx_bdbs(struct net_device *dev)
1719 {
1720 struct net_local *tp = netdev_priv(dev);
1721 unsigned int i, j;
1722 BDBlock *bdb;
1723 __u16 *buf;
1724
1725 if(smctr_debug > 10)
1726 printk(KERN_DEBUG "%s: smctr_init_rx_bdbs\n", dev->name);
1727
1728 for(i = 0; i < NUM_RX_QS_USED; i++)
1729 {
1730 bdb = tp->rx_bdb_head[i];
1731 buf = tp->rx_buff_head[i];
1732 bdb->info = (BDB_CHAIN_END | BDB_NO_WARNING);
1733 bdb->buffer_length = RX_DATA_BUFFER_SIZE;
1734 bdb->next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));
1735 bdb->data_block_ptr = buf;
1736 bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
1737
1738 if(i == NON_MAC_QUEUE)
1739 bdb->trc_data_block_ptr = RX_BUFF_TRC_POINTER(buf);
1740 else
1741 bdb->trc_data_block_ptr = TRC_POINTER(buf);
1742
1743 for(j = 1; j < tp->num_rx_bdbs[i]; j++)
1744 {
1745 bdb->next_ptr->back_ptr = bdb;
1746 bdb = bdb->next_ptr;
1747 buf = (__u16 *)((char *)buf + RX_DATA_BUFFER_SIZE);
1748 bdb->info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);
1749 bdb->buffer_length = RX_DATA_BUFFER_SIZE;
1750 bdb->next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));
1751 bdb->data_block_ptr = buf;
1752 bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
1753
1754 if(i == NON_MAC_QUEUE)
1755 bdb->trc_data_block_ptr = RX_BUFF_TRC_POINTER(buf);
1756 else
1757 bdb->trc_data_block_ptr = TRC_POINTER(buf);
1758 }
1759
1760 bdb->next_ptr = tp->rx_bdb_head[i];
1761 bdb->trc_next_ptr = TRC_POINTER(tp->rx_bdb_head[i]);
1762
1763 tp->rx_bdb_head[i]->back_ptr = bdb;
1764 tp->rx_bdb_curr[i] = tp->rx_bdb_head[i]->next_ptr;
1765 }
1766
1767 return 0;
1768 }
1769
1770 static int smctr_init_rx_fcbs(struct net_device *dev)
1771 {
1772 struct net_local *tp = netdev_priv(dev);
1773 unsigned int i, j;
1774 FCBlock *fcb;
1775
1776 for(i = 0; i < NUM_RX_QS_USED; i++)
1777 {
1778 fcb = tp->rx_fcb_head[i];
1779 fcb->frame_status = 0;
1780 fcb->frame_length = 0;
1781 fcb->info = FCB_CHAIN_END;
1782 fcb->next_ptr = (FCBlock *)(((char*)fcb) + sizeof(FCBlock));
1783 if(i == NON_MAC_QUEUE)
1784 fcb->trc_next_ptr = RX_FCB_TRC_POINTER(fcb->next_ptr);
1785 else
1786 fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
1787
1788 for(j = 1; j < tp->num_rx_fcbs[i]; j++)
1789 {
1790 fcb->next_ptr->back_ptr = fcb;
1791 fcb = fcb->next_ptr;
1792 fcb->frame_status = 0;
1793 fcb->frame_length = 0;
1794 fcb->info = FCB_WARNING;
1795 fcb->next_ptr
1796 = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));
1797
1798 if(i == NON_MAC_QUEUE)
1799 fcb->trc_next_ptr
1800 = RX_FCB_TRC_POINTER(fcb->next_ptr);
1801 else
1802 fcb->trc_next_ptr
1803 = TRC_POINTER(fcb->next_ptr);
1804 }
1805
1806 fcb->next_ptr = tp->rx_fcb_head[i];
1807
1808 if(i == NON_MAC_QUEUE)
1809 fcb->trc_next_ptr = RX_FCB_TRC_POINTER(fcb->next_ptr);
1810 else
1811 fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
1812
1813 tp->rx_fcb_head[i]->back_ptr = fcb;
1814 tp->rx_fcb_curr[i] = tp->rx_fcb_head[i]->next_ptr;
1815 }
1816
1817 return 0;
1818 }
1819
1820 static int smctr_init_shared_memory(struct net_device *dev)
1821 {
1822 struct net_local *tp = netdev_priv(dev);
1823 unsigned int i;
1824 __u32 *iscpb;
1825
1826 if(smctr_debug > 10)
1827 printk(KERN_DEBUG "%s: smctr_init_shared_memory\n", dev->name);
1828
1829 smctr_set_page(dev, (__u8 *)(unsigned int)tp->iscpb_ptr);
1830
1831 /* Initialize Initial System Configuration Point. (ISCP) */
1832 iscpb = (__u32 *)PAGE_POINTER(&tp->iscpb_ptr->trc_scgb_ptr);
1833 *iscpb = (__u32)(SWAP_WORDS(TRC_POINTER(tp->scgb_ptr)));
1834
1835 smctr_set_page(dev, (__u8 *)tp->ram_access);
1836
1837 /* Initialize System Configuration Pointers. (SCP) */
1838 tp->scgb_ptr->config = (SCGB_ADDRESS_POINTER_FORMAT
1839 | SCGB_MULTI_WORD_CONTROL | SCGB_DATA_FORMAT
1840 | SCGB_BURST_LENGTH);
1841
1842 tp->scgb_ptr->trc_sclb_ptr = TRC_POINTER(tp->sclb_ptr);
1843 tp->scgb_ptr->trc_acb_ptr = TRC_POINTER(tp->acb_head);
1844 tp->scgb_ptr->trc_isb_ptr = TRC_POINTER(tp->isb_ptr);
1845 tp->scgb_ptr->isbsiz = (sizeof(ISBlock)) - 2;
1846
1847 /* Initialize System Control Block. (SCB) */
1848 tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_CMD_NOP;
1849 tp->sclb_ptr->iack_code = 0;
1850 tp->sclb_ptr->resume_control = 0;
1851 tp->sclb_ptr->int_mask_control = 0;
1852 tp->sclb_ptr->int_mask_state = 0;
1853
1854 /* Initialize Interrupt Status Block. (ISB) */
1855 for(i = 0; i < NUM_OF_INTERRUPTS; i++)
1856 {
1857 tp->isb_ptr->IStatus[i].IType = 0xf0;
1858 tp->isb_ptr->IStatus[i].ISubtype = 0;
1859 }
1860
1861 tp->current_isb_index = 0;
1862
1863 /* Initialize Action Command Block. (ACB) */
1864 smctr_init_acbs(dev);
1865
1866 /* Initialize transmit FCB's and BDB's. */
1867 smctr_link_tx_fcbs_to_bdbs(dev);
1868 smctr_init_tx_bdbs(dev);
1869 smctr_init_tx_fcbs(dev);
1870
1871 /* Initialize receive FCB's and BDB's. */
1872 smctr_init_rx_bdbs(dev);
1873 smctr_init_rx_fcbs(dev);
1874
1875 return 0;
1876 }
1877
1878 static int smctr_init_tx_bdbs(struct net_device *dev)
1879 {
1880 struct net_local *tp = netdev_priv(dev);
1881 unsigned int i, j;
1882 BDBlock *bdb;
1883
1884 for(i = 0; i < NUM_TX_QS_USED; i++)
1885 {
1886 bdb = tp->tx_bdb_head[i];
1887 bdb->info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);
1888 bdb->next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));
1889 bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
1890
1891 for(j = 1; j < tp->num_tx_bdbs[i]; j++)
1892 {
1893 bdb->next_ptr->back_ptr = bdb;
1894 bdb = bdb->next_ptr;
1895 bdb->info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);
1896 bdb->next_ptr
1897 = (BDBlock *)(((char *)bdb) + sizeof( BDBlock)); bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
1898 }
1899
1900 bdb->next_ptr = tp->tx_bdb_head[i];
1901 bdb->trc_next_ptr = TRC_POINTER(tp->tx_bdb_head[i]);
1902 tp->tx_bdb_head[i]->back_ptr = bdb;
1903 }
1904
1905 return 0;
1906 }
1907
1908 static int smctr_init_tx_fcbs(struct net_device *dev)
1909 {
1910 struct net_local *tp = netdev_priv(dev);
1911 unsigned int i, j;
1912 FCBlock *fcb;
1913
1914 for(i = 0; i < NUM_TX_QS_USED; i++)
1915 {
1916 fcb = tp->tx_fcb_head[i];
1917 fcb->frame_status = 0;
1918 fcb->frame_length = 0;
1919 fcb->info = FCB_CHAIN_END;
1920 fcb->next_ptr = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));
1921 fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
1922
1923 for(j = 1; j < tp->num_tx_fcbs[i]; j++)
1924 {
1925 fcb->next_ptr->back_ptr = fcb;
1926 fcb = fcb->next_ptr;
1927 fcb->frame_status = 0;
1928 fcb->frame_length = 0;
1929 fcb->info = FCB_CHAIN_END;
1930 fcb->next_ptr
1931 = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));
1932 fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
1933 }
1934
1935 fcb->next_ptr = tp->tx_fcb_head[i];
1936 fcb->trc_next_ptr = TRC_POINTER(tp->tx_fcb_head[i]);
1937
1938 tp->tx_fcb_head[i]->back_ptr = fcb;
1939 tp->tx_fcb_end[i] = tp->tx_fcb_head[i]->next_ptr;
1940 tp->tx_fcb_curr[i] = tp->tx_fcb_head[i]->next_ptr;
1941 tp->num_tx_fcbs_used[i] = 0;
1942 }
1943
1944 return 0;
1945 }
1946
1947 static int smctr_internal_self_test(struct net_device *dev)
1948 {
1949 struct net_local *tp = netdev_priv(dev);
1950 int err;
1951
1952 if((err = smctr_issue_test_internal_rom_cmd(dev)))
1953 return err;
1954
1955 if((err = smctr_wait_cmd(dev)))
1956 return err;
1957
1958 if(tp->acb_head->cmd_done_status & 0xff)
1959 return -1;
1960
1961 if((err = smctr_issue_test_hic_cmd(dev)))
1962 return err;
1963
1964 if((err = smctr_wait_cmd(dev)))
1965 return err;
1966
1967 if(tp->acb_head->cmd_done_status & 0xff)
1968 return -1;
1969
1970 if((err = smctr_issue_test_mac_reg_cmd(dev)))
1971 return err;
1972
1973 if((err = smctr_wait_cmd(dev)))
1974 return err;
1975
1976 if(tp->acb_head->cmd_done_status & 0xff)
1977 return -1;
1978
1979 return 0;
1980 }
1981
1982 /*
1983 * The typical workload of the driver: Handle the network interface interrupts.
1984 */
1985 static irqreturn_t smctr_interrupt(int irq, void *dev_id)
1986 {
1987 struct net_device *dev = dev_id;
1988 struct net_local *tp;
1989 int ioaddr;
1990 __u16 interrupt_unmask_bits = 0, interrupt_ack_code = 0xff00;
1991 __u16 err1, err = NOT_MY_INTERRUPT;
1992 __u8 isb_type, isb_subtype;
1993 __u16 isb_index;
1994
1995 ioaddr = dev->base_addr;
1996 tp = netdev_priv(dev);
1997
1998 if(tp->status == NOT_INITIALIZED)
1999 return IRQ_NONE;
2000
2001 spin_lock(&tp->lock);
2002
2003 smctr_disable_bic_int(dev);
2004 smctr_enable_16bit(dev);
2005
2006 smctr_clear_int(dev);
2007
2008 /* First read the LSB */
2009 while((tp->isb_ptr->IStatus[tp->current_isb_index].IType & 0xf0) == 0)
2010 {
2011 isb_index = tp->current_isb_index;
2012 isb_type = tp->isb_ptr->IStatus[isb_index].IType;
2013 isb_subtype = tp->isb_ptr->IStatus[isb_index].ISubtype;
2014
2015 (tp->current_isb_index)++;
2016 if(tp->current_isb_index == NUM_OF_INTERRUPTS)
2017 tp->current_isb_index = 0;
2018
2019 if(isb_type >= 0x10)
2020 {
2021 smctr_disable_16bit(dev);
2022 spin_unlock(&tp->lock);
2023 return IRQ_HANDLED;
2024 }
2025
2026 err = HARDWARE_FAILED;
2027 interrupt_ack_code = isb_index;
2028 tp->isb_ptr->IStatus[isb_index].IType |= 0xf0;
2029
2030 interrupt_unmask_bits |= (1 << (__u16)isb_type);
2031
2032 switch(isb_type)
2033 {
2034 case ISB_IMC_MAC_TYPE_3:
2035 smctr_disable_16bit(dev);
2036
2037 switch(isb_subtype)
2038 {
2039 case 0:
2040 tp->monitor_state = MS_MONITOR_FSM_INACTIVE;
2041 break;
2042
2043 case 1:
2044 tp->monitor_state = MS_REPEAT_BEACON_STATE;
2045 break;
2046
2047 case 2:
2048 tp->monitor_state = MS_REPEAT_CLAIM_TOKEN_STATE;
2049 break;
2050
2051 case 3:
2052 tp->monitor_state = MS_TRANSMIT_CLAIM_TOKEN_STATE; break;
2053
2054 case 4:
2055 tp->monitor_state = MS_STANDBY_MONITOR_STATE;
2056 break;
2057
2058 case 5:
2059 tp->monitor_state = MS_TRANSMIT_BEACON_STATE;
2060 break;
2061
2062 case 6:
2063 tp->monitor_state = MS_ACTIVE_MONITOR_STATE;
2064 break;
2065
2066 case 7:
2067 tp->monitor_state = MS_TRANSMIT_RING_PURGE_STATE;
2068 break;
2069
2070 case 8: /* diagnostic state */
2071 break;
2072
2073 case 9:
2074 tp->monitor_state = MS_BEACON_TEST_STATE;
2075 if(smctr_lobe_media_test(dev))
2076 {
2077 tp->ring_status_flags = RING_STATUS_CHANGED;
2078 tp->ring_status = AUTO_REMOVAL_ERROR;
2079 smctr_ring_status_chg(dev);
2080 smctr_bypass_state(dev);
2081 }
2082 else
2083 smctr_issue_insert_cmd(dev);
2084 break;
2085
2086 /* case 0x0a-0xff, illegal states */
2087 default:
2088 break;
2089 }
2090
2091 tp->ring_status_flags = MONITOR_STATE_CHANGED;
2092 err = smctr_ring_status_chg(dev);
2093
2094 smctr_enable_16bit(dev);
2095 break;
2096
2097 /* Type 0x02 - MAC Error Counters Interrupt
2098 * One or more MAC Error Counter is half full
2099 * MAC Error Counters
2100 * Lost_FR_Error_Counter
2101 * RCV_Congestion_Counter
2102 * FR_copied_Error_Counter
2103 * FREQ_Error_Counter
2104 * Token_Error_Counter
2105 * Line_Error_Counter
2106 * Internal_Error_Count
2107 */
2108 case ISB_IMC_MAC_ERROR_COUNTERS:
2109 /* Read 802.5 Error Counters */
2110 err = smctr_issue_read_ring_status_cmd(dev);
2111 break;
2112
2113 /* Type 0x04 - MAC Type 2 Interrupt
2114 * HOST needs to enqueue MAC Frame for transmission
2115 * SubType Bit 15 - RQ_INIT_PDU( Request Initialization) * Changed from RQ_INIT_PDU to
2116 * TRC_Status_Changed_Indicate
2117 */
2118 case ISB_IMC_MAC_TYPE_2:
2119 err = smctr_issue_read_ring_status_cmd(dev);
2120 break;
2121
2122
2123 /* Type 0x05 - TX Frame Interrupt (FI). */
2124 case ISB_IMC_TX_FRAME:
2125 /* BUG QUEUE for TRC stuck receive BUG */
2126 if(isb_subtype & TX_PENDING_PRIORITY_2)
2127 {
2128 if((err = smctr_tx_complete(dev, BUG_QUEUE)) != SUCCESS)
2129 break;
2130 }
2131
2132 /* NON-MAC frames only */
2133 if(isb_subtype & TX_PENDING_PRIORITY_1)
2134 {
2135 if((err = smctr_tx_complete(dev, NON_MAC_QUEUE)) != SUCCESS)
2136 break;
2137 }
2138
2139 /* MAC frames only */
2140 if(isb_subtype & TX_PENDING_PRIORITY_0)
2141 err = smctr_tx_complete(dev, MAC_QUEUE); break;
2142
2143 /* Type 0x06 - TX END OF QUEUE (FE) */
2144 case ISB_IMC_END_OF_TX_QUEUE:
2145 /* BUG queue */
2146 if(isb_subtype & TX_PENDING_PRIORITY_2)
2147 {
2148 /* ok to clear Receive FIFO overrun
2149 * imask send_BUG now completes.
2150 */
2151 interrupt_unmask_bits |= 0x800;
2152
2153 tp->tx_queue_status[BUG_QUEUE] = NOT_TRANSMITING;
2154 if((err = smctr_tx_complete(dev, BUG_QUEUE)) != SUCCESS)
2155 break;
2156 if((err = smctr_restart_tx_chain(dev, BUG_QUEUE)) != SUCCESS)
2157 break;
2158 }
2159
2160 /* NON-MAC queue only */
2161 if(isb_subtype & TX_PENDING_PRIORITY_1)
2162 {
2163 tp->tx_queue_status[NON_MAC_QUEUE] = NOT_TRANSMITING;
2164 if((err = smctr_tx_complete(dev, NON_MAC_QUEUE)) != SUCCESS)
2165 break;
2166 if((err = smctr_restart_tx_chain(dev, NON_MAC_QUEUE)) != SUCCESS)
2167 break;
2168 }
2169
2170 /* MAC queue only */
2171 if(isb_subtype & TX_PENDING_PRIORITY_0)
2172 {
2173 tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
2174 if((err = smctr_tx_complete(dev, MAC_QUEUE)) != SUCCESS)
2175 break;
2176
2177 err = smctr_restart_tx_chain(dev, MAC_QUEUE);
2178 }
2179 break;
2180
2181 /* Type 0x07 - NON-MAC RX Resource Interrupt
2182 * Subtype bit 12 - (BW) BDB warning
2183 * Subtype bit 13 - (FW) FCB warning
2184 * Subtype bit 14 - (BE) BDB End of chain
2185 * Subtype bit 15 - (FE) FCB End of chain
2186 */
2187 case ISB_IMC_NON_MAC_RX_RESOURCE:
2188 tp->rx_fifo_overrun_count = 0;
2189 tp->receive_queue_number = NON_MAC_QUEUE;
2190 err1 = smctr_rx_frame(dev);
2191
2192 if(isb_subtype & NON_MAC_RX_RESOURCE_FE)
2193 {
2194 if((err = smctr_issue_resume_rx_fcb_cmd( dev, NON_MAC_QUEUE)) != SUCCESS) break;
2195
2196 if(tp->ptr_rx_fcb_overruns)
2197 (*tp->ptr_rx_fcb_overruns)++;
2198 }
2199
2200 if(isb_subtype & NON_MAC_RX_RESOURCE_BE)
2201 {
2202 if((err = smctr_issue_resume_rx_bdb_cmd( dev, NON_MAC_QUEUE)) != SUCCESS) break;
2203
2204 if(tp->ptr_rx_bdb_overruns)
2205 (*tp->ptr_rx_bdb_overruns)++;
2206 }
2207 err = err1;
2208 break;
2209
2210 /* Type 0x08 - MAC RX Resource Interrupt
2211 * Subtype bit 12 - (BW) BDB warning
2212 * Subtype bit 13 - (FW) FCB warning
2213 * Subtype bit 14 - (BE) BDB End of chain
2214 * Subtype bit 15 - (FE) FCB End of chain
2215 */
2216 case ISB_IMC_MAC_RX_RESOURCE:
2217 tp->receive_queue_number = MAC_QUEUE;
2218 err1 = smctr_rx_frame(dev);
2219
2220 if(isb_subtype & MAC_RX_RESOURCE_FE)
2221 {
2222 if((err = smctr_issue_resume_rx_fcb_cmd( dev, MAC_QUEUE)) != SUCCESS)
2223 break;
2224
2225 if(tp->ptr_rx_fcb_overruns)
2226 (*tp->ptr_rx_fcb_overruns)++;
2227 }
2228
2229 if(isb_subtype & MAC_RX_RESOURCE_BE)
2230 {
2231 if((err = smctr_issue_resume_rx_bdb_cmd( dev, MAC_QUEUE)) != SUCCESS)
2232 break;
2233
2234 if(tp->ptr_rx_bdb_overruns)
2235 (*tp->ptr_rx_bdb_overruns)++;
2236 }
2237 err = err1;
2238 break;
2239
2240 /* Type 0x09 - NON_MAC RX Frame Interrupt */
2241 case ISB_IMC_NON_MAC_RX_FRAME:
2242 tp->rx_fifo_overrun_count = 0;
2243 tp->receive_queue_number = NON_MAC_QUEUE;
2244 err = smctr_rx_frame(dev);
2245 break;
2246
2247 /* Type 0x0A - MAC RX Frame Interrupt */
2248 case ISB_IMC_MAC_RX_FRAME:
2249 tp->receive_queue_number = MAC_QUEUE;
2250 err = smctr_rx_frame(dev);
2251 break;
2252
2253 /* Type 0x0B - TRC status
2254 * TRC has encountered an error condition
2255 * subtype bit 14 - transmit FIFO underrun
2256 * subtype bit 15 - receive FIFO overrun
2257 */
2258 case ISB_IMC_TRC_FIFO_STATUS:
2259 if(isb_subtype & TRC_FIFO_STATUS_TX_UNDERRUN)
2260 {
2261 if(tp->ptr_tx_fifo_underruns)
2262 (*tp->ptr_tx_fifo_underruns)++;
2263 }
2264
2265 if(isb_subtype & TRC_FIFO_STATUS_RX_OVERRUN)
2266 {
2267 /* update overrun stuck receive counter
2268 * if >= 3, has to clear it by sending
2269 * back to back frames. We pick
2270 * DAT(duplicate address MAC frame)
2271 */
2272 tp->rx_fifo_overrun_count++;
2273
2274 if(tp->rx_fifo_overrun_count >= 3)
2275 {
2276 tp->rx_fifo_overrun_count = 0;
2277
2278 /* delay clearing fifo overrun
2279 * imask till send_BUG tx
2280 * complete posted
2281 */
2282 interrupt_unmask_bits &= (~0x800);
2283 printk(KERN_CRIT "Jay please send bug\n");// smctr_send_bug(dev);
2284 }
2285
2286 if(tp->ptr_rx_fifo_overruns)
2287 (*tp->ptr_rx_fifo_overruns)++;
2288 }
2289
2290 err = SUCCESS;
2291 break;
2292
2293 /* Type 0x0C - Action Command Status Interrupt
2294 * Subtype bit 14 - CB end of command chain (CE)
2295 * Subtype bit 15 - CB command interrupt (CI)
2296 */
2297 case ISB_IMC_COMMAND_STATUS:
2298 err = SUCCESS;
2299 if(tp->acb_head->cmd == ACB_CMD_HIC_NOP)
2300 {
2301 printk(KERN_ERR "i1\n");
2302 smctr_disable_16bit(dev);
2303
2304 /* XXXXXXXXXXXXXXXXX */
2305 /* err = UM_Interrupt(dev); */
2306
2307 smctr_enable_16bit(dev);
2308 }
2309 else
2310 {
2311 if((tp->acb_head->cmd
2312 == ACB_CMD_READ_TRC_STATUS) &&
2313 (tp->acb_head->subcmd
2314 == RW_TRC_STATUS_BLOCK))
2315 {
2316 if(tp->ptr_bcn_type)
2317 {
2318 *(tp->ptr_bcn_type)
2319 = (__u32)((SBlock *)tp->misc_command_data)->BCN_Type;
2320 }
2321
2322 if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & ERROR_COUNTERS_CHANGED)
2323 {
2324 smctr_update_err_stats(dev);
2325 }
2326
2327 if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & TI_NDIS_RING_STATUS_CHANGED)
2328 {
2329 tp->ring_status
2330 = ((SBlock*)tp->misc_command_data)->TI_NDIS_Ring_Status;
2331 smctr_disable_16bit(dev);
2332 err = smctr_ring_status_chg(dev);
2333 smctr_enable_16bit(dev);
2334 if((tp->ring_status & REMOVE_RECEIVED) &&
2335 (tp->config_word0 & NO_AUTOREMOVE))
2336 {
2337 smctr_issue_remove_cmd(dev);
2338 }
2339
2340 if(err != SUCCESS)
2341 {
2342 tp->acb_pending = 0;
2343 break;
2344 }
2345 }
2346
2347 if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & UNA_CHANGED)
2348 {
2349 if(tp->ptr_una)
2350 {
2351 tp->ptr_una[0] = SWAP_BYTES(((SBlock *)tp->misc_command_data)->UNA[0]);
2352 tp->ptr_una[1] = SWAP_BYTES(((SBlock *)tp->misc_command_data)->UNA[1]);
2353 tp->ptr_una[2] = SWAP_BYTES(((SBlock *)tp->misc_command_data)->UNA[2]);
2354 }
2355
2356 }
2357
2358 if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & READY_TO_SEND_RQ_INIT) {
2359 err = smctr_send_rq_init(dev);
2360 }
2361 }
2362 }
2363
2364 tp->acb_pending = 0;
2365 break;
2366
2367 /* Type 0x0D - MAC Type 1 interrupt
2368 * Subtype -- 00 FR_BCN received at S12
2369 * 01 FR_BCN received at S21
2370 * 02 FR_DAT(DA=MA, A<>0) received at S21
2371 * 03 TSM_EXP at S21
2372 * 04 FR_REMOVE received at S42
2373 * 05 TBR_EXP, BR_FLAG_SET at S42
2374 * 06 TBT_EXP at S53
2375 */
2376 case ISB_IMC_MAC_TYPE_1:
2377 if(isb_subtype > 8)
2378 {
2379 err = HARDWARE_FAILED;
2380 break;
2381 }
2382
2383 err = SUCCESS;
2384 switch(isb_subtype)
2385 {
2386 case 0:
2387 tp->join_state = JS_BYPASS_STATE;
2388 if(tp->status != CLOSED)
2389 {
2390 tp->status = CLOSED;
2391 err = smctr_status_chg(dev);
2392 }
2393 break;
2394
2395 case 1:
2396 tp->join_state = JS_LOBE_TEST_STATE;
2397 break;
2398
2399 case 2:
2400 tp->join_state = JS_DETECT_MONITOR_PRESENT_STATE;
2401 break;
2402
2403 case 3:
2404 tp->join_state = JS_AWAIT_NEW_MONITOR_STATE;
2405 break;
2406
2407 case 4:
2408 tp->join_state = JS_DUPLICATE_ADDRESS_TEST_STATE;
2409 break;
2410
2411 case 5:
2412 tp->join_state = JS_NEIGHBOR_NOTIFICATION_STATE;
2413 break;
2414
2415 case 6:
2416 tp->join_state = JS_REQUEST_INITIALIZATION_STATE;
2417 break;
2418
2419 case 7:
2420 tp->join_state = JS_JOIN_COMPLETE_STATE;
2421 tp->status = OPEN;
2422 err = smctr_status_chg(dev);
2423 break;
2424
2425 case 8:
2426 tp->join_state = JS_BYPASS_WAIT_STATE;
2427 break;
2428 }
2429 break ;
2430
2431 /* Type 0x0E - TRC Initialization Sequence Interrupt
2432 * Subtype -- 00-FF Initializatin sequence complete
2433 */
2434 case ISB_IMC_TRC_INTRNL_TST_STATUS:
2435 tp->status = INITIALIZED;
2436 smctr_disable_16bit(dev);
2437 err = smctr_status_chg(dev);
2438 smctr_enable_16bit(dev);
2439 break;
2440
2441 /* other interrupt types, illegal */
2442 default:
2443 break;
2444 }
2445
2446 if(err != SUCCESS)
2447 break;
2448 }
2449
2450 /* Checking the ack code instead of the unmask bits here is because :
2451 * while fixing the stuck receive, DAT frame are sent and mask off
2452 * FIFO overrun interrupt temporarily (interrupt_unmask_bits = 0)
2453 * but we still want to issue ack to ISB
2454 */
2455 if(!(interrupt_ack_code & 0xff00))
2456 smctr_issue_int_ack(dev, interrupt_ack_code, interrupt_unmask_bits);
2457
2458 smctr_disable_16bit(dev);
2459 smctr_enable_bic_int(dev);
2460 spin_unlock(&tp->lock);
2461
2462 return IRQ_HANDLED;
2463 }
2464
2465 static int smctr_issue_enable_int_cmd(struct net_device *dev,
2466 __u16 interrupt_enable_mask)
2467 {
2468 struct net_local *tp = netdev_priv(dev);
2469 int err;
2470
2471 if((err = smctr_wait_while_cbusy(dev)))
2472 return err;
2473
2474 tp->sclb_ptr->int_mask_control = interrupt_enable_mask;
2475 tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_CMD_CLEAR_INTERRUPT_MASK;
2476
2477 smctr_set_ctrl_attention(dev);
2478
2479 return 0;
2480 }
2481
2482 static int smctr_issue_int_ack(struct net_device *dev, __u16 iack_code, __u16 ibits)
2483 {
2484 struct net_local *tp = netdev_priv(dev);
2485
2486 if(smctr_wait_while_cbusy(dev))
2487 return -1;
2488
2489 tp->sclb_ptr->int_mask_control = ibits;
2490 tp->sclb_ptr->iack_code = iack_code << 1; /* use the offset from base */ tp->sclb_ptr->resume_control = 0;
2491 tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_IACK_CODE_VALID | SCLB_CMD_CLEAR_INTERRUPT_MASK;
2492
2493 smctr_set_ctrl_attention(dev);
2494
2495 return 0;
2496 }
2497
2498 static int smctr_issue_init_timers_cmd(struct net_device *dev)
2499 {
2500 struct net_local *tp = netdev_priv(dev);
2501 unsigned int i;
2502 int err;
2503 __u16 *pTimer_Struc = (__u16 *)tp->misc_command_data;
2504
2505 if((err = smctr_wait_while_cbusy(dev)))
2506 return err;
2507
2508 if((err = smctr_wait_cmd(dev)))
2509 return err;
2510
2511 tp->config_word0 = THDREN | DMA_TRIGGER | USETPT | NO_AUTOREMOVE;
2512 tp->config_word1 = 0;
2513
2514 if((tp->media_type == MEDIA_STP_16) ||
2515 (tp->media_type == MEDIA_UTP_16) ||
2516 (tp->media_type == MEDIA_STP_16_UTP_16))
2517 {
2518 tp->config_word0 |= FREQ_16MB_BIT;
2519 }
2520
2521 if(tp->mode_bits & EARLY_TOKEN_REL)
2522 tp->config_word0 |= ETREN;
2523
2524 if(tp->mode_bits & LOOPING_MODE_MASK)
2525 tp->config_word0 |= RX_OWN_BIT;
2526 else
2527 tp->config_word0 &= ~RX_OWN_BIT;
2528
2529 if(tp->receive_mask & PROMISCUOUS_MODE)
2530 tp->config_word0 |= PROMISCUOUS_BIT;
2531 else
2532 tp->config_word0 &= ~PROMISCUOUS_BIT;
2533
2534 if(tp->receive_mask & ACCEPT_ERR_PACKETS)
2535 tp->config_word0 |= SAVBAD_BIT;
2536 else
2537 tp->config_word0 &= ~SAVBAD_BIT;
2538
2539 if(tp->receive_mask & ACCEPT_ATT_MAC_FRAMES)
2540 tp->config_word0 |= RXATMAC;
2541 else
2542 tp->config_word0 &= ~RXATMAC;
2543
2544 if(tp->receive_mask & ACCEPT_MULTI_PROM)
2545 tp->config_word1 |= MULTICAST_ADDRESS_BIT;
2546 else
2547 tp->config_word1 &= ~MULTICAST_ADDRESS_BIT;
2548
2549 if(tp->receive_mask & ACCEPT_SOURCE_ROUTING_SPANNING)
2550 tp->config_word1 |= SOURCE_ROUTING_SPANNING_BITS;
2551 else
2552 {
2553 if(tp->receive_mask & ACCEPT_SOURCE_ROUTING)
2554 tp->config_word1 |= SOURCE_ROUTING_EXPLORER_BIT;
2555 else
2556 tp->config_word1 &= ~SOURCE_ROUTING_SPANNING_BITS;
2557 }
2558
2559 if((tp->media_type == MEDIA_STP_16) ||
2560 (tp->media_type == MEDIA_UTP_16) ||
2561 (tp->media_type == MEDIA_STP_16_UTP_16))
2562 {
2563 tp->config_word1 |= INTERFRAME_SPACING_16;
2564 }
2565 else
2566 tp->config_word1 |= INTERFRAME_SPACING_4;
2567
2568 *pTimer_Struc++ = tp->config_word0;
2569 *pTimer_Struc++ = tp->config_word1;
2570
2571 if((tp->media_type == MEDIA_STP_4) ||
2572 (tp->media_type == MEDIA_UTP_4) ||
2573 (tp->media_type == MEDIA_STP_4_UTP_4))
2574 {
2575 *pTimer_Struc++ = 0x00FA; /* prescale */
2576 *pTimer_Struc++ = 0x2710; /* TPT_limit */
2577 *pTimer_Struc++ = 0x2710; /* TQP_limit */
2578 *pTimer_Struc++ = 0x0A28; /* TNT_limit */
2579 *pTimer_Struc++ = 0x3E80; /* TBT_limit */
2580 *pTimer_Struc++ = 0x3A98; /* TSM_limit */
2581 *pTimer_Struc++ = 0x1B58; /* TAM_limit */
2582 *pTimer_Struc++ = 0x00C8; /* TBR_limit */
2583 *pTimer_Struc++ = 0x07D0; /* TER_limit */
2584 *pTimer_Struc++ = 0x000A; /* TGT_limit */
2585 *pTimer_Struc++ = 0x1162; /* THT_limit */
2586 *pTimer_Struc++ = 0x07D0; /* TRR_limit */
2587 *pTimer_Struc++ = 0x1388; /* TVX_limit */
2588 *pTimer_Struc++ = 0x0000; /* reserved */
2589 }
2590 else
2591 {
2592 *pTimer_Struc++ = 0x03E8; /* prescale */
2593 *pTimer_Struc++ = 0x9C40; /* TPT_limit */
2594 *pTimer_Struc++ = 0x9C40; /* TQP_limit */
2595 *pTimer_Struc++ = 0x0A28; /* TNT_limit */
2596 *pTimer_Struc++ = 0x3E80; /* TBT_limit */
2597 *pTimer_Struc++ = 0x3A98; /* TSM_limit */
2598 *pTimer_Struc++ = 0x1B58; /* TAM_limit */
2599 *pTimer_Struc++ = 0x00C8; /* TBR_limit */
2600 *pTimer_Struc++ = 0x07D0; /* TER_limit */
2601 *pTimer_Struc++ = 0x000A; /* TGT_limit */
2602 *pTimer_Struc++ = 0x4588; /* THT_limit */
2603 *pTimer_Struc++ = 0x1F40; /* TRR_limit */
2604 *pTimer_Struc++ = 0x4E20; /* TVX_limit */
2605 *pTimer_Struc++ = 0x0000; /* reserved */
2606 }
2607
2608 /* Set node address. */
2609 *pTimer_Struc++ = dev->dev_addr[0] << 8
2610 | (dev->dev_addr[1] & 0xFF);
2611 *pTimer_Struc++ = dev->dev_addr[2] << 8
2612 | (dev->dev_addr[3] & 0xFF);
2613 *pTimer_Struc++ = dev->dev_addr[4] << 8
2614 | (dev->dev_addr[5] & 0xFF);
2615
2616 /* Set group address. */
2617 *pTimer_Struc++ = tp->group_address_0 << 8
2618 | tp->group_address_0 >> 8;
2619 *pTimer_Struc++ = tp->group_address[0] << 8
2620 | tp->group_address[0] >> 8;
2621 *pTimer_Struc++ = tp->group_address[1] << 8
2622 | tp->group_address[1] >> 8;
2623
2624 /* Set functional address. */
2625 *pTimer_Struc++ = tp->functional_address_0 << 8
2626 | tp->functional_address_0 >> 8;
2627 *pTimer_Struc++ = tp->functional_address[0] << 8
2628 | tp->functional_address[0] >> 8;
2629 *pTimer_Struc++ = tp->functional_address[1] << 8
2630 | tp->functional_address[1] >> 8;
2631
2632 /* Set Bit-Wise group address. */
2633 *pTimer_Struc++ = tp->bitwise_group_address[0] << 8
2634 | tp->bitwise_group_address[0] >> 8;
2635 *pTimer_Struc++ = tp->bitwise_group_address[1] << 8
2636 | tp->bitwise_group_address[1] >> 8;
2637
2638 /* Set ring number address. */
2639 *pTimer_Struc++ = tp->source_ring_number;
2640 *pTimer_Struc++ = tp->target_ring_number;
2641
2642 /* Physical drop number. */
2643 *pTimer_Struc++ = (unsigned short)0;
2644 *pTimer_Struc++ = (unsigned short)0;
2645
2646 /* Product instance ID. */
2647 for(i = 0; i < 9; i++)
2648 *pTimer_Struc++ = (unsigned short)0;
2649
2650 err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_INIT_TRC_TIMERS, 0);
2651
2652 return err;
2653 }
2654
2655 static int smctr_issue_init_txrx_cmd(struct net_device *dev)
2656 {
2657 struct net_local *tp = netdev_priv(dev);
2658 unsigned int i;
2659 int err;
2660 void **txrx_ptrs = (void *)tp->misc_command_data;
2661
2662 if((err = smctr_wait_while_cbusy(dev)))
2663 return err;
2664
2665 if((err = smctr_wait_cmd(dev)))
2666 {
2667 printk(KERN_ERR "%s: Hardware failure\n", dev->name);
2668 return err;
2669 }
2670
2671 /* Initialize Transmit Queue Pointers that are used, to point to
2672 * a single FCB.
2673 */
2674 for(i = 0; i < NUM_TX_QS_USED; i++)
2675 *txrx_ptrs++ = (void *)TRC_POINTER(tp->tx_fcb_head[i]);
2676
2677 /* Initialize Transmit Queue Pointers that are NOT used to ZERO. */
2678 for(; i < MAX_TX_QS; i++)
2679 *txrx_ptrs++ = (void *)0;
2680
2681 /* Initialize Receive Queue Pointers (MAC and Non-MAC) that are
2682 * used, to point to a single FCB and a BDB chain of buffers.
2683 */
2684 for(i = 0; i < NUM_RX_QS_USED; i++)
2685 {
2686 *txrx_ptrs++ = (void *)TRC_POINTER(tp->rx_fcb_head[i]);
2687 *txrx_ptrs++ = (void *)TRC_POINTER(tp->rx_bdb_head[i]);
2688 }
2689
2690 /* Initialize Receive Queue Pointers that are NOT used to ZERO. */
2691 for(; i < MAX_RX_QS; i++)
2692 {
2693 *txrx_ptrs++ = (void *)0;
2694 *txrx_ptrs++ = (void *)0;
2695 }
2696
2697 err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_INIT_TX_RX, 0);
2698
2699 return err;
2700 }
2701
2702 static int smctr_issue_insert_cmd(struct net_device *dev)
2703 {
2704 int err;
2705
2706 err = smctr_setup_single_cmd(dev, ACB_CMD_INSERT, ACB_SUB_CMD_NOP);
2707
2708 return err;
2709 }
2710
2711 static int smctr_issue_read_ring_status_cmd(struct net_device *dev)
2712 {
2713 int err;
2714
2715 if((err = smctr_wait_while_cbusy(dev)))
2716 return err;
2717
2718 if((err = smctr_wait_cmd(dev)))
2719 return err;
2720
2721 err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_READ_TRC_STATUS,
2722 RW_TRC_STATUS_BLOCK);
2723
2724 return err;
2725 }
2726
2727 static int smctr_issue_read_word_cmd(struct net_device *dev, __u16 aword_cnt)
2728 {
2729 int err;
2730
2731 if((err = smctr_wait_while_cbusy(dev)))
2732 return err;
2733
2734 if((err = smctr_wait_cmd(dev)))
2735 return err;
2736
2737 err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_READ_VALUE,
2738 aword_cnt);
2739
2740 return err;
2741 }
2742
2743 static int smctr_issue_remove_cmd(struct net_device *dev)
2744 {
2745 struct net_local *tp = netdev_priv(dev);
2746 int err;
2747
2748 if((err = smctr_wait_while_cbusy(dev)))
2749 return err;
2750
2751 tp->sclb_ptr->resume_control = 0;
2752 tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_CMD_REMOVE;
2753
2754 smctr_set_ctrl_attention(dev);
2755
2756 return 0;
2757 }
2758
2759 static int smctr_issue_resume_acb_cmd(struct net_device *dev)
2760 {
2761 struct net_local *tp = netdev_priv(dev);
2762 int err;
2763
2764 if((err = smctr_wait_while_cbusy(dev)))
2765 return err;
2766
2767 tp->sclb_ptr->resume_control = SCLB_RC_ACB;
2768 tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;
2769
2770 tp->acb_pending = 1;
2771
2772 smctr_set_ctrl_attention(dev);
2773
2774 return 0;
2775 }
2776
2777 static int smctr_issue_resume_rx_bdb_cmd(struct net_device *dev, __u16 queue)
2778 {
2779 struct net_local *tp = netdev_priv(dev);
2780 int err;
2781
2782 if((err = smctr_wait_while_cbusy(dev)))
2783 return err;
2784
2785 if(queue == MAC_QUEUE)
2786 tp->sclb_ptr->resume_control = SCLB_RC_RX_MAC_BDB;
2787 else
2788 tp->sclb_ptr->resume_control = SCLB_RC_RX_NON_MAC_BDB;
2789
2790 tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;
2791
2792 smctr_set_ctrl_attention(dev);
2793
2794 return 0;
2795 }
2796
2797 static int smctr_issue_resume_rx_fcb_cmd(struct net_device *dev, __u16 queue)
2798 {
2799 struct net_local *tp = netdev_priv(dev);
2800
2801 if(smctr_debug > 10)
2802 printk(KERN_DEBUG "%s: smctr_issue_resume_rx_fcb_cmd\n", dev->name);
2803
2804 if(smctr_wait_while_cbusy(dev))
2805 return -1;
2806
2807 if(queue == MAC_QUEUE)
2808 tp->sclb_ptr->resume_control = SCLB_RC_RX_MAC_FCB;
2809 else
2810 tp->sclb_ptr->resume_control = SCLB_RC_RX_NON_MAC_FCB;
2811
2812 tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;
2813
2814 smctr_set_ctrl_attention(dev);
2815
2816 return 0;
2817 }
2818
2819 static int smctr_issue_resume_tx_fcb_cmd(struct net_device *dev, __u16 queue)
2820 {
2821 struct net_local *tp = netdev_priv(dev);
2822
2823 if(smctr_debug > 10)
2824 printk(KERN_DEBUG "%s: smctr_issue_resume_tx_fcb_cmd\n", dev->name);
2825
2826 if(smctr_wait_while_cbusy(dev))
2827 return -1;
2828
2829 tp->sclb_ptr->resume_control = (SCLB_RC_TFCB0 << queue);
2830 tp->sclb_ptr->valid_command = SCLB_RESUME_CONTROL_VALID | SCLB_VALID;
2831
2832 smctr_set_ctrl_attention(dev);
2833
2834 return 0;
2835 }
2836
2837 static int smctr_issue_test_internal_rom_cmd(struct net_device *dev)
2838 {
2839 int err;
2840
2841 err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
2842 TRC_INTERNAL_ROM_TEST);
2843
2844 return err;
2845 }
2846
2847 static int smctr_issue_test_hic_cmd(struct net_device *dev)
2848 {
2849 int err;
2850
2851 err = smctr_setup_single_cmd(dev, ACB_CMD_HIC_TEST,
2852 TRC_HOST_INTERFACE_REG_TEST);
2853
2854 return err;
2855 }
2856
2857 static int smctr_issue_test_mac_reg_cmd(struct net_device *dev)
2858 {
2859 int err;
2860
2861 err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
2862 TRC_MAC_REGISTERS_TEST);
2863
2864 return err;
2865 }
2866
2867 static int smctr_issue_trc_loopback_cmd(struct net_device *dev)
2868 {
2869 int err;
2870
2871 err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
2872 TRC_INTERNAL_LOOPBACK);
2873
2874 return err;
2875 }
2876
2877 static int smctr_issue_tri_loopback_cmd(struct net_device *dev)
2878 {
2879 int err;
2880
2881 err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
2882 TRC_TRI_LOOPBACK);
2883
2884 return err;
2885 }
2886
2887 static int smctr_issue_write_byte_cmd(struct net_device *dev,
2888 short aword_cnt, void *byte)
2889 {
2890 struct net_local *tp = netdev_priv(dev);
2891 unsigned int iword, ibyte;
2892 int err;
2893
2894 if((err = smctr_wait_while_cbusy(dev)))
2895 return err;
2896
2897 if((err = smctr_wait_cmd(dev)))
2898 return err;
2899
2900 for(iword = 0, ibyte = 0; iword < (unsigned int)(aword_cnt & 0xff);
2901 iword++, ibyte += 2)
2902 {
2903 tp->misc_command_data[iword] = (*((__u8 *)byte + ibyte) << 8)
2904 | (*((__u8 *)byte + ibyte + 1));
2905 }
2906
2907 return smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_WRITE_VALUE,
2908 aword_cnt);
2909 }
2910
2911 static int smctr_issue_write_word_cmd(struct net_device *dev,
2912 short aword_cnt, void *word)
2913 {
2914 struct net_local *tp = netdev_priv(dev);
2915 unsigned int i, err;
2916
2917 if((err = smctr_wait_while_cbusy(dev)))
2918 return err;
2919
2920 if((err = smctr_wait_cmd(dev)))
2921 return err;
2922
2923 for(i = 0; i < (unsigned int)(aword_cnt & 0xff); i++)
2924 tp->misc_command_data[i] = *((__u16 *)word + i);
2925
2926 err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_WRITE_VALUE,
2927 aword_cnt);
2928
2929 return err;
2930 }
2931
2932 static int smctr_join_complete_state(struct net_device *dev)
2933 {
2934 int err;
2935
2936 err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE,
2937 JS_JOIN_COMPLETE_STATE);
2938
2939 return err;
2940 }
2941
2942 static int smctr_link_tx_fcbs_to_bdbs(struct net_device *dev)
2943 {
2944 struct net_local *tp = netdev_priv(dev);
2945 unsigned int i, j;
2946 FCBlock *fcb;
2947 BDBlock *bdb;
2948
2949 for(i = 0; i < NUM_TX_QS_USED; i++)
2950 {
2951 fcb = tp->tx_fcb_head[i];
2952 bdb = tp->tx_bdb_head[i];
2953
2954 for(j = 0; j < tp->num_tx_fcbs[i]; j++)
2955 {
2956 fcb->bdb_ptr = bdb;
2957 fcb->trc_bdb_ptr = TRC_POINTER(bdb);
2958 fcb = (FCBlock *)((char *)fcb + sizeof(FCBlock));
2959 bdb = (BDBlock *)((char *)bdb + sizeof(BDBlock));
2960 }
2961 }
2962
2963 return 0;
2964 }
2965
2966 static int smctr_load_firmware(struct net_device *dev)
2967 {
2968 struct net_local *tp = netdev_priv(dev);
2969 const struct firmware *fw;
2970 __u16 i, checksum = 0;
2971 int err = 0;
2972
2973 if(smctr_debug > 10)
2974 printk(KERN_DEBUG "%s: smctr_load_firmware\n", dev->name);
2975
2976 if (request_firmware(&fw, "tr_smctr.bin", &dev->dev)) {
2977 printk(KERN_ERR "%s: firmware not found\n", dev->name);
2978 return UCODE_NOT_PRESENT;
2979 }
2980
2981 tp->num_of_tx_buffs = 4;
2982 tp->mode_bits |= UMAC;
2983 tp->receive_mask = 0;
2984 tp->max_packet_size = 4177;
2985
2986 /* Can only upload the firmware once per adapter reset. */
2987 if (tp->microcode_version != 0) {
2988 err = (UCODE_PRESENT);
2989 goto out;
2990 }
2991
2992 /* Verify the firmware exists and is there in the right amount. */
2993 if (!fw->data ||
2994 (*(fw->data + UCODE_VERSION_OFFSET) < UCODE_VERSION))
2995 {
2996 err = (UCODE_NOT_PRESENT);
2997 goto out;
2998 }
2999
3000 /* UCODE_SIZE is not included in Checksum. */
3001 for(i = 0; i < *((__u16 *)(fw->data + UCODE_SIZE_OFFSET)); i += 2)
3002 checksum += *((__u16 *)(fw->data + 2 + i));
3003 if (checksum) {
3004 err = (UCODE_NOT_PRESENT);
3005 goto out;
3006 }
3007
3008 /* At this point we have a valid firmware image, lets kick it on up. */
3009 smctr_enable_adapter_ram(dev);
3010 smctr_enable_16bit(dev);
3011 smctr_set_page(dev, (__u8 *)tp->ram_access);
3012
3013 if((smctr_checksum_firmware(dev)) ||
3014 (*(fw->data + UCODE_VERSION_OFFSET) > tp->microcode_version))
3015 {
3016 smctr_enable_adapter_ctrl_store(dev);
3017
3018 /* Zero out ram space for firmware. */
3019 for(i = 0; i < CS_RAM_SIZE; i += 2)
3020 *((__u16 *)(tp->ram_access + i)) = 0;
3021
3022 smctr_decode_firmware(dev, fw);
3023
3024 tp->microcode_version = *(fw->data + UCODE_VERSION_OFFSET); *((__u16 *)(tp->ram_access + CS_RAM_VERSION_OFFSET))
3025 = (tp->microcode_version << 8);
3026 *((__u16 *)(tp->ram_access + CS_RAM_CHECKSUM_OFFSET))
3027 = ~(tp->microcode_version << 8) + 1;
3028
3029 smctr_disable_adapter_ctrl_store(dev);
3030
3031 if(smctr_checksum_firmware(dev))
3032 err = HARDWARE_FAILED;
3033 }
3034 else
3035 err = UCODE_PRESENT;
3036
3037 smctr_disable_16bit(dev);
3038 out:
3039 release_firmware(fw);
3040 return err;
3041 }
3042
3043 static int smctr_load_node_addr(struct net_device *dev)
3044 {
3045 int ioaddr = dev->base_addr;
3046 unsigned int i;
3047 __u8 r;
3048
3049 for(i = 0; i < 6; i++)
3050 {
3051 r = inb(ioaddr + LAR0 + i);
3052 dev->dev_addr[i] = (char)r;
3053 }
3054 dev->addr_len = 6;
3055
3056 return 0;
3057 }
3058
3059 /* Lobe Media Test.
3060 * During the transmission of the initial 1500 lobe media MAC frames,
3061 * the phase lock loop in the 805 chip may lock, and then un-lock, causing
3062 * the 825 to go into a PURGE state. When performing a PURGE, the MCT
3063 * microcode will not transmit any frames given to it by the host, and
3064 * will consequently cause a timeout.
3065 *
3066 * NOTE 1: If the monitor_state is MS_BEACON_TEST_STATE, all transmit
3067 * queues other than the one used for the lobe_media_test should be
3068 * disabled.!?
3069 *
3070 * NOTE 2: If the monitor_state is MS_BEACON_TEST_STATE and the receive_mask
3071 * has any multi-cast or promiscuous bits set, the receive_mask needs to
3072 * be changed to clear the multi-cast or promiscuous mode bits, the lobe_test
3073 * run, and then the receive mask set back to its original value if the test
3074 * is successful.
3075 */
3076 static int smctr_lobe_media_test(struct net_device *dev)
3077 {
3078 struct net_local *tp = netdev_priv(dev);
3079 unsigned int i, perror = 0;
3080 unsigned short saved_rcv_mask;
3081
3082 if(smctr_debug > 10)
3083 printk(KERN_DEBUG "%s: smctr_lobe_media_test\n", dev->name);
3084
3085 /* Clear receive mask for lobe test. */
3086 saved_rcv_mask = tp->receive_mask;
3087 tp->receive_mask = 0;
3088
3089 smctr_chg_rx_mask(dev);
3090
3091 /* Setup the lobe media test. */
3092 smctr_lobe_media_test_cmd(dev);
3093 if(smctr_wait_cmd(dev))
3094 goto err;
3095
3096 /* Tx lobe media test frames. */
3097 for(i = 0; i < 1500; ++i)
3098 {
3099 if(smctr_send_lobe_media_test(dev))
3100 {
3101 if(perror)
3102 goto err;
3103 else
3104 {
3105 perror = 1;
3106 if(smctr_lobe_media_test_cmd(dev))
3107 goto err;
3108 }
3109 }
3110 }
3111
3112 if(smctr_send_dat(dev))
3113 {
3114 if(smctr_send_dat(dev))
3115 goto err;
3116 }
3117
3118 /* Check if any frames received during test. */
3119 if((tp->rx_fcb_curr[MAC_QUEUE]->frame_status) ||
3120 (tp->rx_fcb_curr[NON_MAC_QUEUE]->frame_status))
3121 goto err;
3122
3123 /* Set receive mask to "Promisc" mode. */
3124 tp->receive_mask = saved_rcv_mask;
3125
3126 smctr_chg_rx_mask(dev);
3127
3128 return 0;
3129 err:
3130 smctr_reset_adapter(dev);
3131 tp->status = CLOSED;
3132 return LOBE_MEDIA_TEST_FAILED;
3133 }
3134
3135 static int smctr_lobe_media_test_cmd(struct net_device *dev)
3136 {
3137 struct net_local *tp = netdev_priv(dev);
3138 int err;
3139
3140 if(smctr_debug > 10)
3141 printk(KERN_DEBUG "%s: smctr_lobe_media_test_cmd\n", dev->name);
3142
3143 /* Change to lobe media test state. */
3144 if(tp->monitor_state != MS_BEACON_TEST_STATE)
3145 {
3146 smctr_lobe_media_test_state(dev);
3147 if(smctr_wait_cmd(dev))
3148 {
3149 printk(KERN_ERR "Lobe Failed test state\n");
3150 return LOBE_MEDIA_TEST_FAILED;
3151 }
3152 }
3153
3154 err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
3155 TRC_LOBE_MEDIA_TEST);
3156
3157 return err;
3158 }
3159
3160 static int smctr_lobe_media_test_state(struct net_device *dev)
3161 {
3162 int err;
3163
3164 err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE,
3165 JS_LOBE_TEST_STATE);
3166
3167 return err;
3168 }
3169
3170 static int smctr_make_8025_hdr(struct net_device *dev,
3171 MAC_HEADER *rmf, MAC_HEADER *tmf, __u16 ac_fc)
3172 {
3173 tmf->ac = MSB(ac_fc); /* msb is access control */
3174 tmf->fc = LSB(ac_fc); /* lsb is frame control */
3175
3176 tmf->sa[0] = dev->dev_addr[0];
3177 tmf->sa[1] = dev->dev_addr[1];
3178 tmf->sa[2] = dev->dev_addr[2];
3179 tmf->sa[3] = dev->dev_addr[3];
3180 tmf->sa[4] = dev->dev_addr[4];
3181 tmf->sa[5] = dev->dev_addr[5];
3182
3183 switch(tmf->vc)
3184 {
3185 /* Send RQ_INIT to RPS */
3186 case RQ_INIT:
3187 tmf->da[0] = 0xc0;
3188 tmf->da[1] = 0x00;
3189 tmf->da[2] = 0x00;
3190 tmf->da[3] = 0x00;
3191 tmf->da[4] = 0x00;
3192 tmf->da[5] = 0x02;
3193 break;
3194
3195 /* Send RPT_TX_FORWARD to CRS */
3196 case RPT_TX_FORWARD:
3197 tmf->da[0] = 0xc0;
3198 tmf->da[1] = 0x00;
3199 tmf->da[2] = 0x00;
3200 tmf->da[3] = 0x00;
3201 tmf->da[4] = 0x00;
3202 tmf->da[5] = 0x10;
3203 break;
3204
3205 /* Everything else goes to sender */
3206 default:
3207 tmf->da[0] = rmf->sa[0];
3208 tmf->da[1] = rmf->sa[1];
3209 tmf->da[2] = rmf->sa[2];
3210 tmf->da[3] = rmf->sa[3];
3211 tmf->da[4] = rmf->sa[4];
3212 tmf->da[5] = rmf->sa[5];
3213 break;
3214 }
3215
3216 return 0;
3217 }
3218
3219 static int smctr_make_access_pri(struct net_device *dev, MAC_SUB_VECTOR *tsv)
3220 {
3221 struct net_local *tp = netdev_priv(dev);
3222
3223 tsv->svi = AUTHORIZED_ACCESS_PRIORITY;
3224 tsv->svl = S_AUTHORIZED_ACCESS_PRIORITY;
3225
3226 tsv->svv[0] = MSB(tp->authorized_access_priority);
3227 tsv->svv[1] = LSB(tp->authorized_access_priority);
3228
3229 return 0;
3230 }
3231
3232 static int smctr_make_addr_mod(struct net_device *dev, MAC_SUB_VECTOR *tsv)
3233 {
3234 tsv->svi = ADDRESS_MODIFER;
3235 tsv->svl = S_ADDRESS_MODIFER;
3236
3237 tsv->svv[0] = 0;
3238 tsv->svv[1] = 0;
3239
3240 return 0;
3241 }
3242
3243 static int smctr_make_auth_funct_class(struct net_device *dev,
3244 MAC_SUB_VECTOR *tsv)
3245 {
3246 struct net_local *tp = netdev_priv(dev);
3247
3248 tsv->svi = AUTHORIZED_FUNCTION_CLASS;
3249 tsv->svl = S_AUTHORIZED_FUNCTION_CLASS;
3250
3251 tsv->svv[0] = MSB(tp->authorized_function_classes);
3252 tsv->svv[1] = LSB(tp->authorized_function_classes);
3253
3254 return 0;
3255 }
3256
3257 static int smctr_make_corr(struct net_device *dev,
3258 MAC_SUB_VECTOR *tsv, __u16 correlator)
3259 {
3260 tsv->svi = CORRELATOR;
3261 tsv->svl = S_CORRELATOR;
3262
3263 tsv->svv[0] = MSB(correlator);
3264 tsv->svv[1] = LSB(correlator);
3265
3266 return 0;
3267 }
3268
3269 static int smctr_make_funct_addr(struct net_device *dev, MAC_SUB_VECTOR *tsv)
3270 {
3271 struct net_local *tp = netdev_priv(dev);
3272
3273 smctr_get_functional_address(dev);
3274
3275 tsv->svi = FUNCTIONAL_ADDRESS;
3276 tsv->svl = S_FUNCTIONAL_ADDRESS;
3277
3278 tsv->svv[0] = MSB(tp->misc_command_data[0]);
3279 tsv->svv[1] = LSB(tp->misc_command_data[0]);
3280
3281 tsv->svv[2] = MSB(tp->misc_command_data[1]);
3282 tsv->svv[3] = LSB(tp->misc_command_data[1]);
3283
3284 return 0;
3285 }
3286
3287 static int smctr_make_group_addr(struct net_device *dev, MAC_SUB_VECTOR *tsv)
3288 {
3289 struct net_local *tp = netdev_priv(dev);
3290
3291 smctr_get_group_address(dev);
3292
3293 tsv->svi = GROUP_ADDRESS;
3294 tsv->svl = S_GROUP_ADDRESS;
3295
3296 tsv->svv[0] = MSB(tp->misc_command_data[0]);
3297 tsv->svv[1] = LSB(tp->misc_command_data[0]);
3298
3299 tsv->svv[2] = MSB(tp->misc_command_data[1]);
3300 tsv->svv[3] = LSB(tp->misc_command_data[1]);
3301
3302 /* Set Group Address Sub-vector to all zeros if only the
3303 * Group Address/Functional Address Indicator is set.
3304 */
3305 if(tsv->svv[0] == 0x80 && tsv->svv[1] == 0x00 &&
3306 tsv->svv[2] == 0x00 && tsv->svv[3] == 0x00)
3307 tsv->svv[0] = 0x00;
3308
3309 return 0;
3310 }
3311
3312 static int smctr_make_phy_drop_num(struct net_device *dev,
3313 MAC_SUB_VECTOR *tsv)
3314 {
3315 struct net_local *tp = netdev_priv(dev);
3316
3317 smctr_get_physical_drop_number(dev);
3318
3319 tsv->svi = PHYSICAL_DROP;
3320 tsv->svl = S_PHYSICAL_DROP;
3321
3322 tsv->svv[0] = MSB(tp->misc_command_data[0]);
3323 tsv->svv[1] = LSB(tp->misc_command_data[0]);
3324
3325 tsv->svv[2] = MSB(tp->misc_command_data[1]);
3326 tsv->svv[3] = LSB(tp->misc_command_data[1]);
3327
3328 return 0;
3329 }
3330
3331 static int smctr_make_product_id(struct net_device *dev, MAC_SUB_VECTOR *tsv)
3332 {
3333 int i;
3334
3335 tsv->svi = PRODUCT_INSTANCE_ID;
3336 tsv->svl = S_PRODUCT_INSTANCE_ID;
3337
3338 for(i = 0; i < 18; i++)
3339 tsv->svv[i] = 0xF0;
3340
3341 return 0;
3342 }
3343
3344 static int smctr_make_station_id(struct net_device *dev, MAC_SUB_VECTOR *tsv)
3345 {
3346 struct net_local *tp = netdev_priv(dev);
3347
3348 smctr_get_station_id(dev);
3349
3350 tsv->svi = STATION_IDENTIFER;
3351 tsv->svl = S_STATION_IDENTIFER;
3352
3353 tsv->svv[0] = MSB(tp->misc_command_data[0]);
3354 tsv->svv[1] = LSB(tp->misc_command_data[0]);
3355
3356 tsv->svv[2] = MSB(tp->misc_command_data[1]);
3357 tsv->svv[3] = LSB(tp->misc_command_data[1]);
3358
3359 tsv->svv[4] = MSB(tp->misc_command_data[2]);
3360 tsv->svv[5] = LSB(tp->misc_command_data[2]);
3361
3362 return 0;
3363 }
3364
3365 static int smctr_make_ring_station_status(struct net_device *dev,
3366 MAC_SUB_VECTOR * tsv)
3367 {
3368 tsv->svi = RING_STATION_STATUS;
3369 tsv->svl = S_RING_STATION_STATUS;
3370
3371 tsv->svv[0] = 0;
3372 tsv->svv[1] = 0;
3373 tsv->svv[2] = 0;
3374 tsv->svv[3] = 0;
3375 tsv->svv[4] = 0;
3376 tsv->svv[5] = 0;
3377
3378 return 0;
3379 }
3380
3381 static int smctr_make_ring_station_version(struct net_device *dev,
3382 MAC_SUB_VECTOR *tsv)
3383 {
3384 struct net_local *tp = netdev_priv(dev);
3385
3386 tsv->svi = RING_STATION_VERSION_NUMBER;
3387 tsv->svl = S_RING_STATION_VERSION_NUMBER;
3388
3389 tsv->svv[0] = 0xe2; /* EBCDIC - S */
3390 tsv->svv[1] = 0xd4; /* EBCDIC - M */
3391 tsv->svv[2] = 0xc3; /* EBCDIC - C */
3392 tsv->svv[3] = 0x40; /* EBCDIC - */
3393 tsv->svv[4] = 0xe5; /* EBCDIC - V */
3394 tsv->svv[5] = 0xF0 + (tp->microcode_version >> 4);
3395 tsv->svv[6] = 0xF0 + (tp->microcode_version & 0x0f);
3396 tsv->svv[7] = 0x40; /* EBCDIC - */
3397 tsv->svv[8] = 0xe7; /* EBCDIC - X */
3398
3399 if(tp->extra_info & CHIP_REV_MASK)
3400 tsv->svv[9] = 0xc5; /* EBCDIC - E */
3401 else
3402 tsv->svv[9] = 0xc4; /* EBCDIC - D */
3403
3404 return 0;
3405 }
3406
3407 static int smctr_make_tx_status_code(struct net_device *dev,
3408 MAC_SUB_VECTOR *tsv, __u16 tx_fstatus)
3409 {
3410 tsv->svi = TRANSMIT_STATUS_CODE;
3411 tsv->svl = S_TRANSMIT_STATUS_CODE;
3412
3413 tsv->svv[0] = ((tx_fstatus & 0x0100 >> 6) | IBM_PASS_SOURCE_ADDR);
3414
3415 /* Stripped frame status of Transmitted Frame */
3416 tsv->svv[1] = tx_fstatus & 0xff;
3417
3418 return 0;
3419 }
3420
3421 static int smctr_make_upstream_neighbor_addr(struct net_device *dev,
3422 MAC_SUB_VECTOR *tsv)
3423 {
3424 struct net_local *tp = netdev_priv(dev);
3425
3426 smctr_get_upstream_neighbor_addr(dev);
3427
3428 tsv->svi = UPSTREAM_NEIGHBOR_ADDRESS;
3429 tsv->svl = S_UPSTREAM_NEIGHBOR_ADDRESS;
3430
3431 tsv->svv[0] = MSB(tp->misc_command_data[0]);
3432 tsv->svv[1] = LSB(tp->misc_command_data[0]);
3433
3434 tsv->svv[2] = MSB(tp->misc_command_data[1]);
3435 tsv->svv[3] = LSB(tp->misc_command_data[1]);
3436
3437 tsv->svv[4] = MSB(tp->misc_command_data[2]);
3438 tsv->svv[5] = LSB(tp->misc_command_data[2]);
3439
3440 return 0;
3441 }
3442
3443 static int smctr_make_wrap_data(struct net_device *dev, MAC_SUB_VECTOR *tsv)
3444 {
3445 tsv->svi = WRAP_DATA;
3446 tsv->svl = S_WRAP_DATA;
3447
3448 return 0;
3449 }
3450
3451 /*
3452 * Open/initialize the board. This is called sometime after
3453 * booting when the 'ifconfig' program is run.
3454 *
3455 * This routine should set everything up anew at each open, even
3456 * registers that "should" only need to be set once at boot, so that
3457 * there is non-reboot way to recover if something goes wrong.
3458 */
3459 static int smctr_open(struct net_device *dev)
3460 {
3461 int err;
3462
3463 if(smctr_debug > 10)
3464 printk(KERN_DEBUG "%s: smctr_open\n", dev->name);
3465
3466 err = smctr_init_adapter(dev);
3467 if(err < 0)
3468 return err;
3469
3470 return err;
3471 }
3472
3473 /* Interrupt driven open of Token card. */
3474 static int smctr_open_tr(struct net_device *dev)
3475 {
3476 struct net_local *tp = netdev_priv(dev);
3477 unsigned long flags;
3478 int err;
3479
3480 if(smctr_debug > 10)
3481 printk(KERN_DEBUG "%s: smctr_open_tr\n", dev->name);
3482
3483 /* Now we can actually open the adapter. */
3484 if(tp->status == OPEN)
3485 return 0;
3486 if(tp->status != INITIALIZED)
3487 return -1;
3488
3489 /* FIXME: it would work a lot better if we masked the irq sources
3490 on the card here, then we could skip the locking and poll nicely */
3491 spin_lock_irqsave(&tp->lock, flags);
3492
3493 smctr_set_page(dev, (__u8 *)tp->ram_access);
3494
3495 if((err = smctr_issue_resume_rx_fcb_cmd(dev, (short)MAC_QUEUE)))
3496 goto out;
3497
3498 if((err = smctr_issue_resume_rx_bdb_cmd(dev, (short)MAC_QUEUE)))
3499 goto out;
3500
3501 if((err = smctr_issue_resume_rx_fcb_cmd(dev, (short)NON_MAC_QUEUE)))
3502 goto out;
3503
3504 if((err = smctr_issue_resume_rx_bdb_cmd(dev, (short)NON_MAC_QUEUE)))
3505 goto out;
3506
3507 tp->status = CLOSED;
3508
3509 /* Insert into the Ring or Enter Loopback Mode. */
3510 if((tp->mode_bits & LOOPING_MODE_MASK) == LOOPBACK_MODE_1)
3511 {
3512 tp->status = CLOSED;
3513
3514 if(!(err = smctr_issue_trc_loopback_cmd(dev)))
3515 {
3516 if(!(err = smctr_wait_cmd(dev)))
3517 tp->status = OPEN;
3518 }
3519
3520 smctr_status_chg(dev);
3521 }
3522 else
3523 {
3524 if((tp->mode_bits & LOOPING_MODE_MASK) == LOOPBACK_MODE_2)
3525 {
3526 tp->status = CLOSED;
3527 if(!(err = smctr_issue_tri_loopback_cmd(dev)))
3528 {
3529 if(!(err = smctr_wait_cmd(dev)))
3530 tp->status = OPEN;
3531 }
3532
3533 smctr_status_chg(dev);
3534 }
3535 else
3536 {
3537 if((tp->mode_bits & LOOPING_MODE_MASK)
3538 == LOOPBACK_MODE_3)
3539 {
3540 tp->status = CLOSED;
3541 if(!(err = smctr_lobe_media_test_cmd(dev)))
3542 {
3543 if(!(err = smctr_wait_cmd(dev)))
3544 tp->status = OPEN;
3545 }
3546 smctr_status_chg(dev);
3547 }
3548 else
3549 {
3550 if(!(err = smctr_lobe_media_test(dev)))
3551 err = smctr_issue_insert_cmd(dev);
3552 else
3553 {
3554 if(err == LOBE_MEDIA_TEST_FAILED)
3555 printk(KERN_WARNING "%s: Lobe Media Test Failure - Check cable?\n", dev->name);
3556 }
3557 }
3558 }
3559 }
3560
3561 out:
3562 spin_unlock_irqrestore(&tp->lock, flags);
3563
3564 return err;
3565 }
3566
3567 /* Check for a network adapter of this type,
3568 * and return device structure if one exists.
3569 */
3570 struct net_device __init *smctr_probe(int unit)
3571 {
3572 struct net_device *dev = alloc_trdev(sizeof(struct net_local));
3573 static const unsigned ports[] = {
3574 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0, 0x300,
3575 0x320, 0x340, 0x360, 0x380, 0
3576 };
3577 const unsigned *port;
3578 int err = 0;
3579
3580 if (!dev)
3581 return ERR_PTR(-ENOMEM);
3582
3583 if (unit >= 0) {
3584 sprintf(dev->name, "tr%d", unit);
3585 netdev_boot_setup_check(dev);
3586 }
3587
3588 if (dev->base_addr > 0x1ff) /* Check a single specified location. */
3589 err = smctr_probe1(dev, dev->base_addr);
3590 else if(dev->base_addr != 0) /* Don't probe at all. */
3591 err =-ENXIO;
3592 else {
3593 for (port = ports; *port; port++) {
3594 err = smctr_probe1(dev, *port);
3595 if (!err)
3596 break;
3597 }
3598 }
3599 if (err)
3600 goto out;
3601 err = register_netdev(dev);
3602 if (err)
3603 goto out1;
3604 return dev;
3605 out1:
3606 #ifdef CONFIG_MCA_LEGACY
3607 { struct net_local *tp = netdev_priv(dev);
3608 if (tp->slot_num)
3609 mca_mark_as_unused(tp->slot_num);
3610 }
3611 #endif
3612 release_region(dev->base_addr, SMCTR_IO_EXTENT);
3613 free_irq(dev->irq, dev);
3614 out:
3615 free_netdev(dev);
3616 return ERR_PTR(err);
3617 }
3618
3619 static const struct net_device_ops smctr_netdev_ops = {
3620 .ndo_open = smctr_open,
3621 .ndo_stop = smctr_close,
3622 .ndo_start_xmit = smctr_send_packet,
3623 .ndo_tx_timeout = smctr_timeout,
3624 .ndo_get_stats = smctr_get_stats,
3625 .ndo_set_rx_mode = smctr_set_multicast_list,
3626 };
3627
3628 static int __init smctr_probe1(struct net_device *dev, int ioaddr)
3629 {
3630 static unsigned version_printed;
3631 struct net_local *tp = netdev_priv(dev);
3632 int err;
3633 __u32 *ram;
3634
3635 if(smctr_debug && version_printed++ == 0)
3636 printk(version);
3637
3638 spin_lock_init(&tp->lock);
3639 dev->base_addr = ioaddr;
3640
3641 /* Actually detect an adapter now. */
3642 err = smctr_chk_isa(dev);
3643 if(err < 0)
3644 {
3645 if ((err = smctr_chk_mca(dev)) < 0) {
3646 err = -ENODEV;
3647 goto out;
3648 }
3649 }
3650
3651 tp = netdev_priv(dev);
3652 dev->mem_start = tp->ram_base;
3653 dev->mem_end = dev->mem_start + 0x10000;
3654 ram = (__u32 *)phys_to_virt(dev->mem_start);
3655 tp->ram_access = *(__u32 *)&ram;
3656 tp->status = NOT_INITIALIZED;
3657
3658 err = smctr_load_firmware(dev);
3659 if(err != UCODE_PRESENT && err != SUCCESS)
3660 {
3661 printk(KERN_ERR "%s: Firmware load failed (%d)\n", dev->name, err);
3662 err = -EIO;
3663 goto out;
3664 }
3665
3666 /* Allow user to specify ring speed on module insert. */
3667 if(ringspeed == 4)
3668 tp->media_type = MEDIA_UTP_4;
3669 else
3670 tp->media_type = MEDIA_UTP_16;
3671
3672 printk(KERN_INFO "%s: %s %s at Io %#4x, Irq %d, Rom %#4x, Ram %#4x.\n",
3673 dev->name, smctr_name, smctr_model,
3674 (unsigned int)dev->base_addr,
3675 dev->irq, tp->rom_base, tp->ram_base);
3676
3677 dev->netdev_ops = &smctr_netdev_ops;
3678 dev->watchdog_timeo = HZ;
3679 return 0;
3680
3681 out:
3682 return err;
3683 }
3684
3685 static int smctr_process_rx_packet(MAC_HEADER *rmf, __u16 size,
3686 struct net_device *dev, __u16 rx_status)
3687 {
3688 struct net_local *tp = netdev_priv(dev);
3689 struct sk_buff *skb;
3690 __u16 rcode, correlator;
3691 int err = 0;
3692 __u8 xframe = 1;
3693
3694 rmf->vl = SWAP_BYTES(rmf->vl);
3695 if(rx_status & FCB_RX_STATUS_DA_MATCHED)
3696 {
3697 switch(rmf->vc)
3698 {
3699 /* Received MAC Frames Processed by RS. */
3700 case INIT:
3701 if((rcode = smctr_rcv_init(dev, rmf, &correlator)) == HARDWARE_FAILED)
3702 {
3703 return rcode;
3704 }
3705
3706 if((err = smctr_send_rsp(dev, rmf, rcode,
3707 correlator)))
3708 {
3709 return err;
3710 }
3711 break;
3712
3713 case CHG_PARM:
3714 if((rcode = smctr_rcv_chg_param(dev, rmf,
3715 &correlator)) ==HARDWARE_FAILED)
3716 {
3717 return rcode;
3718 }
3719
3720 if((err = smctr_send_rsp(dev, rmf, rcode,
3721 correlator)))
3722 {
3723 return err;
3724 }
3725 break;
3726
3727 case RQ_ADDR:
3728 if((rcode = smctr_rcv_rq_addr_state_attch(dev,
3729 rmf, &correlator)) != POSITIVE_ACK)
3730 {
3731 if(rcode == HARDWARE_FAILED)
3732 return rcode;
3733 else
3734 return smctr_send_rsp(dev, rmf,
3735 rcode, correlator);
3736 }
3737
3738 if((err = smctr_send_rpt_addr(dev, rmf,
3739 correlator)))
3740 {
3741 return err;
3742 }
3743 break;
3744
3745 case RQ_ATTCH:
3746 if((rcode = smctr_rcv_rq_addr_state_attch(dev,
3747 rmf, &correlator)) != POSITIVE_ACK)
3748 {
3749 if(rcode == HARDWARE_FAILED)
3750 return rcode;
3751 else
3752 return smctr_send_rsp(dev, rmf,
3753 rcode,
3754 correlator);
3755 }
3756
3757 if((err = smctr_send_rpt_attch(dev, rmf,
3758 correlator)))
3759 {
3760 return err;
3761 }
3762 break;
3763
3764 case RQ_STATE:
3765 if((rcode = smctr_rcv_rq_addr_state_attch(dev,
3766 rmf, &correlator)) != POSITIVE_ACK)
3767 {
3768 if(rcode == HARDWARE_FAILED)
3769 return rcode;
3770 else
3771 return smctr_send_rsp(dev, rmf,
3772 rcode,
3773 correlator);
3774 }
3775
3776 if((err = smctr_send_rpt_state(dev, rmf,
3777 correlator)))
3778 {
3779 return err;
3780 }
3781 break;
3782
3783 case TX_FORWARD: {
3784 __u16 uninitialized_var(tx_fstatus);
3785
3786 if((rcode = smctr_rcv_tx_forward(dev, rmf))
3787 != POSITIVE_ACK)
3788 {
3789 if(rcode == HARDWARE_FAILED)
3790 return rcode;
3791 else
3792 return smctr_send_rsp(dev, rmf,
3793 rcode,
3794 correlator);
3795 }
3796
3797 if((err = smctr_send_tx_forward(dev, rmf,
3798 &tx_fstatus)) == HARDWARE_FAILED)
3799 {
3800 return err;
3801 }
3802
3803 if(err == A_FRAME_WAS_FORWARDED)
3804 {
3805 if((err = smctr_send_rpt_tx_forward(dev,
3806 rmf, tx_fstatus))
3807 == HARDWARE_FAILED)
3808 {
3809 return err;
3810 }
3811 }
3812 break;
3813 }
3814
3815 /* Received MAC Frames Processed by CRS/REM/RPS. */
3816 case RSP:
3817 case RQ_INIT:
3818 case RPT_NEW_MON:
3819 case RPT_SUA_CHG:
3820 case RPT_ACTIVE_ERR:
3821 case RPT_NN_INCMP:
3822 case RPT_ERROR:
3823 case RPT_ATTCH:
3824 case RPT_STATE:
3825 case RPT_ADDR:
3826 break;
3827
3828 /* Rcvd Att. MAC Frame (if RXATMAC set) or UNKNOWN */
3829 default:
3830 xframe = 0;
3831 if(!(tp->receive_mask & ACCEPT_ATT_MAC_FRAMES))
3832 {
3833 rcode = smctr_rcv_unknown(dev, rmf,
3834 &correlator);
3835 if((err = smctr_send_rsp(dev, rmf,rcode,
3836 correlator)))
3837 {
3838 return err;
3839 }
3840 }
3841
3842 break;
3843 }
3844 }
3845 else
3846 {
3847 /* 1. DA doesn't match (Promiscuous Mode).
3848 * 2. Parse for Extended MAC Frame Type.
3849 */
3850 switch(rmf->vc)
3851 {
3852 case RSP:
3853 case INIT:
3854 case RQ_INIT:
3855 case RQ_ADDR:
3856 case RQ_ATTCH:
3857 case RQ_STATE:
3858 case CHG_PARM:
3859 case RPT_ADDR:
3860 case RPT_ERROR:
3861 case RPT_ATTCH:
3862 case RPT_STATE:
3863 case RPT_NEW_MON:
3864 case RPT_SUA_CHG:
3865 case RPT_NN_INCMP:
3866 case RPT_ACTIVE_ERR:
3867 break;
3868
3869 default:
3870 xframe = 0;
3871 break;
3872 }
3873 }
3874
3875 /* NOTE: UNKNOWN MAC frames will NOT be passed up unless
3876 * ACCEPT_ATT_MAC_FRAMES is set.
3877 */
3878 if(((tp->receive_mask & ACCEPT_ATT_MAC_FRAMES) &&
3879 (xframe == (__u8)0)) ||
3880 ((tp->receive_mask & ACCEPT_EXT_MAC_FRAMES) &&
3881 (xframe == (__u8)1)))
3882 {
3883 rmf->vl = SWAP_BYTES(rmf->vl);
3884
3885 if (!(skb = dev_alloc_skb(size)))
3886 return -ENOMEM;
3887 skb->len = size;
3888
3889 /* Slide data into a sleek skb. */
3890 skb_put(skb, skb->len);
3891 skb_copy_to_linear_data(skb, rmf, skb->len);
3892
3893 /* Update Counters */
3894 tp->MacStat.rx_packets++;
3895 tp->MacStat.rx_bytes += skb->len;
3896
3897 /* Kick the packet on up. */
3898 skb->protocol = tr_type_trans(skb, dev);
3899 netif_rx(skb);
3900 err = 0;
3901 }
3902
3903 return err;
3904 }
3905
3906 /* Adapter RAM test. Incremental word ODD boundary data test. */
3907 static int smctr_ram_memory_test(struct net_device *dev)
3908 {
3909 struct net_local *tp = netdev_priv(dev);
3910 __u16 page, pages_of_ram, start_pattern = 0, word_pattern = 0,
3911 word_read = 0, err_word = 0, err_pattern = 0;
3912 unsigned int err_offset;
3913 __u32 j, pword;
3914 __u8 err = 0;
3915
3916 if(smctr_debug > 10)
3917 printk(KERN_DEBUG "%s: smctr_ram_memory_test\n", dev->name);
3918
3919 start_pattern = 0x0001;
3920 pages_of_ram = tp->ram_size / tp->ram_usable;
3921 pword = tp->ram_access;
3922
3923 /* Incremental word ODD boundary test. */
3924 for(page = 0; (page < pages_of_ram) && (~err);
3925 page++, start_pattern += 0x8000)
3926 {
3927 smctr_set_page(dev, (__u8 *)(tp->ram_access
3928 + (page * tp->ram_usable * 1024) + 1));
3929 word_pattern = start_pattern;
3930
3931 for(j = 1; j < (__u32)(tp->ram_usable * 1024) - 1; j += 2)
3932 *(__u16 *)(pword + j) = word_pattern++;
3933
3934 word_pattern = start_pattern;
3935
3936 for(j = 1; j < (__u32)(tp->ram_usable * 1024) - 1 && (~err);
3937 j += 2, word_pattern++)
3938 {
3939 word_read = *(__u16 *)(pword + j);
3940 if(word_read != word_pattern)
3941 {
3942 err = (__u8)1;
3943 err_offset = j;
3944 err_word = word_read;
3945 err_pattern = word_pattern;
3946 return RAM_TEST_FAILED;
3947 }
3948 }
3949 }
3950
3951 /* Zero out memory. */
3952 for(page = 0; page < pages_of_ram && (~err); page++)
3953 {
3954 smctr_set_page(dev, (__u8 *)(tp->ram_access
3955 + (page * tp->ram_usable * 1024)));
3956 word_pattern = 0;
3957
3958 for(j = 0; j < (__u32)tp->ram_usable * 1024; j +=2)
3959 *(__u16 *)(pword + j) = word_pattern;
3960
3961 for(j =0; j < (__u32)tp->ram_usable * 1024 && (~err); j += 2)
3962 {
3963 word_read = *(__u16 *)(pword + j);
3964 if(word_read != word_pattern)
3965 {
3966 err = (__u8)1;
3967 err_offset = j;
3968 err_word = word_read;
3969 err_pattern = word_pattern;
3970 return RAM_TEST_FAILED;
3971 }
3972 }
3973 }
3974
3975 smctr_set_page(dev, (__u8 *)tp->ram_access);
3976
3977 return 0;
3978 }
3979
3980 static int smctr_rcv_chg_param(struct net_device *dev, MAC_HEADER *rmf,
3981 __u16 *correlator)
3982 {
3983 MAC_SUB_VECTOR *rsv;
3984 signed short vlen;
3985 __u16 rcode = POSITIVE_ACK;
3986 unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
3987
3988 /* This Frame can only come from a CRS */
3989 if((rmf->dc_sc & SC_MASK) != SC_CRS)
3990 return E_INAPPROPRIATE_SOURCE_CLASS;
3991
3992 /* Remove MVID Length from total length. */
3993 vlen = (signed short)rmf->vl - 4;
3994
3995 /* Point to First SVID */
3996 rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
3997
3998 /* Search for Appropriate SVID's. */
3999 while((vlen > 0) && (rcode == POSITIVE_ACK))
4000 {
4001 switch(rsv->svi)
4002 {
4003 case CORRELATOR:
4004 svectors |= F_CORRELATOR;
4005 rcode = smctr_set_corr(dev, rsv, correlator);
4006 break;
4007
4008 case LOCAL_RING_NUMBER:
4009 svectors |= F_LOCAL_RING_NUMBER;
4010 rcode = smctr_set_local_ring_num(dev, rsv);
4011 break;
4012
4013 case ASSIGN_PHYSICAL_DROP:
4014 svectors |= F_ASSIGN_PHYSICAL_DROP;
4015 rcode = smctr_set_phy_drop(dev, rsv);
4016 break;
4017
4018 case ERROR_TIMER_VALUE:
4019 svectors |= F_ERROR_TIMER_VALUE;
4020 rcode = smctr_set_error_timer_value(dev, rsv);
4021 break;
4022
4023 case AUTHORIZED_FUNCTION_CLASS:
4024 svectors |= F_AUTHORIZED_FUNCTION_CLASS;
4025 rcode = smctr_set_auth_funct_class(dev, rsv);
4026 break;
4027
4028 case AUTHORIZED_ACCESS_PRIORITY:
4029 svectors |= F_AUTHORIZED_ACCESS_PRIORITY;
4030 rcode = smctr_set_auth_access_pri(dev, rsv);
4031 break;
4032
4033 default:
4034 rcode = E_SUB_VECTOR_UNKNOWN;
4035 break;
4036 }
4037
4038 /* Let Sender Know if SUM of SV length's is
4039 * larger then length in MVID length field
4040 */
4041 if((vlen -= rsv->svl) < 0)
4042 rcode = E_VECTOR_LENGTH_ERROR;
4043
4044 rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
4045 }
4046
4047 if(rcode == POSITIVE_ACK)
4048 {
4049 /* Let Sender Know if MVID length field
4050 * is larger then SUM of SV length's
4051 */
4052 if(vlen != 0)
4053 rcode = E_VECTOR_LENGTH_ERROR;
4054 else
4055 {
4056 /* Let Sender Know if Expected SVID Missing */
4057 if((svectors & R_CHG_PARM) ^ R_CHG_PARM)
4058 rcode = E_MISSING_SUB_VECTOR;
4059 }
4060 }
4061
4062 return rcode;
4063 }
4064
4065 static int smctr_rcv_init(struct net_device *dev, MAC_HEADER *rmf,
4066 __u16 *correlator)
4067 {
4068 MAC_SUB_VECTOR *rsv;
4069 signed short vlen;
4070 __u16 rcode = POSITIVE_ACK;
4071 unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
4072
4073 /* This Frame can only come from a RPS */
4074 if((rmf->dc_sc & SC_MASK) != SC_RPS)
4075 return E_INAPPROPRIATE_SOURCE_CLASS;
4076
4077 /* Remove MVID Length from total length. */
4078 vlen = (signed short)rmf->vl - 4;
4079
4080 /* Point to First SVID */
4081 rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
4082
4083 /* Search for Appropriate SVID's */
4084 while((vlen > 0) && (rcode == POSITIVE_ACK))
4085 {
4086 switch(rsv->svi)
4087 {
4088 case CORRELATOR:
4089 svectors |= F_CORRELATOR;
4090 rcode = smctr_set_corr(dev, rsv, correlator);
4091 break;
4092
4093 case LOCAL_RING_NUMBER:
4094 svectors |= F_LOCAL_RING_NUMBER;
4095 rcode = smctr_set_local_ring_num(dev, rsv);
4096 break;
4097
4098 case ASSIGN_PHYSICAL_DROP:
4099 svectors |= F_ASSIGN_PHYSICAL_DROP;
4100 rcode = smctr_set_phy_drop(dev, rsv);
4101 break;
4102
4103 case ERROR_TIMER_VALUE:
4104 svectors |= F_ERROR_TIMER_VALUE;
4105 rcode = smctr_set_error_timer_value(dev, rsv);
4106 break;
4107
4108 default:
4109 rcode = E_SUB_VECTOR_UNKNOWN;
4110 break;
4111 }
4112
4113 /* Let Sender Know if SUM of SV length's is
4114 * larger then length in MVID length field
4115 */
4116 if((vlen -= rsv->svl) < 0)
4117 rcode = E_VECTOR_LENGTH_ERROR;
4118
4119 rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
4120 }
4121
4122 if(rcode == POSITIVE_ACK)
4123 {
4124 /* Let Sender Know if MVID length field
4125 * is larger then SUM of SV length's
4126 */
4127 if(vlen != 0)
4128 rcode = E_VECTOR_LENGTH_ERROR;
4129 else
4130 {
4131 /* Let Sender Know if Expected SV Missing */
4132 if((svectors & R_INIT) ^ R_INIT)
4133 rcode = E_MISSING_SUB_VECTOR;
4134 }
4135 }
4136
4137 return rcode;
4138 }
4139
4140 static int smctr_rcv_tx_forward(struct net_device *dev, MAC_HEADER *rmf)
4141 {
4142 MAC_SUB_VECTOR *rsv;
4143 signed short vlen;
4144 __u16 rcode = POSITIVE_ACK;
4145 unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
4146
4147 /* This Frame can only come from a CRS */
4148 if((rmf->dc_sc & SC_MASK) != SC_CRS)
4149 return E_INAPPROPRIATE_SOURCE_CLASS;
4150
4151 /* Remove MVID Length from total length */
4152 vlen = (signed short)rmf->vl - 4;
4153
4154 /* Point to First SVID */
4155 rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
4156
4157 /* Search for Appropriate SVID's */
4158 while((vlen > 0) && (rcode == POSITIVE_ACK))
4159 {
4160 switch(rsv->svi)
4161 {
4162 case FRAME_FORWARD:
4163 svectors |= F_FRAME_FORWARD;
4164 rcode = smctr_set_frame_forward(dev, rsv,
4165 rmf->dc_sc);
4166 break;
4167
4168 default:
4169 rcode = E_SUB_VECTOR_UNKNOWN;
4170 break;
4171 }
4172
4173 /* Let Sender Know if SUM of SV length's is
4174 * larger then length in MVID length field
4175 */
4176 if((vlen -= rsv->svl) < 0)
4177 rcode = E_VECTOR_LENGTH_ERROR;
4178
4179 rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
4180 }
4181
4182 if(rcode == POSITIVE_ACK)
4183 {
4184 /* Let Sender Know if MVID length field
4185 * is larger then SUM of SV length's
4186 */
4187 if(vlen != 0)
4188 rcode = E_VECTOR_LENGTH_ERROR;
4189 else
4190 {
4191 /* Let Sender Know if Expected SV Missing */
4192 if((svectors & R_TX_FORWARD) ^ R_TX_FORWARD)
4193 rcode = E_MISSING_SUB_VECTOR;
4194 }
4195 }
4196
4197 return rcode;
4198 }
4199
4200 static int smctr_rcv_rq_addr_state_attch(struct net_device *dev,
4201 MAC_HEADER *rmf, __u16 *correlator)
4202 {
4203 MAC_SUB_VECTOR *rsv;
4204 signed short vlen;
4205 __u16 rcode = POSITIVE_ACK;
4206 unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
4207
4208 /* Remove MVID Length from total length */
4209 vlen = (signed short)rmf->vl - 4;
4210
4211 /* Point to First SVID */
4212 rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
4213
4214 /* Search for Appropriate SVID's */
4215 while((vlen > 0) && (rcode == POSITIVE_ACK))
4216 {
4217 switch(rsv->svi)
4218 {
4219 case CORRELATOR:
4220 svectors |= F_CORRELATOR;
4221 rcode = smctr_set_corr(dev, rsv, correlator);
4222 break;
4223
4224 default:
4225 rcode = E_SUB_VECTOR_UNKNOWN;
4226 break;
4227 }
4228
4229 /* Let Sender Know if SUM of SV length's is
4230 * larger then length in MVID length field
4231 */
4232 if((vlen -= rsv->svl) < 0)
4233 rcode = E_VECTOR_LENGTH_ERROR;
4234
4235 rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
4236 }
4237
4238 if(rcode == POSITIVE_ACK)
4239 {
4240 /* Let Sender Know if MVID length field
4241 * is larger then SUM of SV length's
4242 */
4243 if(vlen != 0)
4244 rcode = E_VECTOR_LENGTH_ERROR;
4245 else
4246 {
4247 /* Let Sender Know if Expected SVID Missing */
4248 if((svectors & R_RQ_ATTCH_STATE_ADDR)
4249 ^ R_RQ_ATTCH_STATE_ADDR)
4250 rcode = E_MISSING_SUB_VECTOR;
4251 }
4252 }
4253
4254 return rcode;
4255 }
4256
4257 static int smctr_rcv_unknown(struct net_device *dev, MAC_HEADER *rmf,
4258 __u16 *correlator)
4259 {
4260 MAC_SUB_VECTOR *rsv;
4261 signed short vlen;
4262
4263 *correlator = 0;
4264
4265 /* Remove MVID Length from total length */
4266 vlen = (signed short)rmf->vl - 4;
4267
4268 /* Point to First SVID */
4269 rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
4270
4271 /* Search for CORRELATOR for RSP to UNKNOWN */
4272 while((vlen > 0) && (*correlator == 0))
4273 {
4274 switch(rsv->svi)
4275 {
4276 case CORRELATOR:
4277 smctr_set_corr(dev, rsv, correlator);
4278 break;
4279
4280 default:
4281 break;
4282 }
4283
4284 vlen -= rsv->svl;
4285 rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
4286 }
4287
4288 return E_UNRECOGNIZED_VECTOR_ID;
4289 }
4290
4291 /*
4292 * Reset the 825 NIC and exit w:
4293 * 1. The NIC reset cleared (non-reset state), halted and un-initialized.
4294 * 2. TINT masked.
4295 * 3. CBUSY masked.
4296 * 4. TINT clear.
4297 * 5. CBUSY clear.
4298 */
4299 static int smctr_reset_adapter(struct net_device *dev)
4300 {
4301 struct net_local *tp = netdev_priv(dev);
4302 int ioaddr = dev->base_addr;
4303
4304 /* Reseting the NIC will put it in a halted and un-initialized state. */ smctr_set_trc_reset(ioaddr);
4305 mdelay(200); /* ~2 ms */
4306
4307 smctr_clear_trc_reset(ioaddr);
4308 mdelay(200); /* ~2 ms */
4309
4310 /* Remove any latched interrupts that occurred prior to reseting the
4311 * adapter or possibily caused by line glitches due to the reset.
4312 */
4313 outb(tp->trc_mask | CSR_CLRTINT | CSR_CLRCBUSY, ioaddr + CSR);
4314
4315 return 0;
4316 }
4317
4318 static int smctr_restart_tx_chain(struct net_device *dev, short queue)
4319 {
4320 struct net_local *tp = netdev_priv(dev);
4321 int err = 0;
4322
4323 if(smctr_debug > 10)
4324 printk(KERN_DEBUG "%s: smctr_restart_tx_chain\n", dev->name);
4325
4326 if(tp->num_tx_fcbs_used[queue] != 0 &&
4327 tp->tx_queue_status[queue] == NOT_TRANSMITING)
4328 {
4329 tp->tx_queue_status[queue] = TRANSMITING;
4330 err = smctr_issue_resume_tx_fcb_cmd(dev, queue);
4331 }
4332
4333 return err;
4334 }
4335
4336 static int smctr_ring_status_chg(struct net_device *dev)
4337 {
4338 struct net_local *tp = netdev_priv(dev);
4339
4340 if(smctr_debug > 10)
4341 printk(KERN_DEBUG "%s: smctr_ring_status_chg\n", dev->name);
4342
4343 /* Check for ring_status_flag: whenever MONITOR_STATE_BIT
4344 * Bit is set, check value of monitor_state, only then we
4345 * enable and start transmit/receive timeout (if and only
4346 * if it is MS_ACTIVE_MONITOR_STATE or MS_STANDBY_MONITOR_STATE)
4347 */
4348 if(tp->ring_status_flags == MONITOR_STATE_CHANGED)
4349 {
4350 if((tp->monitor_state == MS_ACTIVE_MONITOR_STATE) ||
4351 (tp->monitor_state == MS_STANDBY_MONITOR_STATE))
4352 {
4353 tp->monitor_state_ready = 1;
4354 }
4355 else
4356 {
4357 /* if adapter is NOT in either active monitor
4358 * or standby monitor state => Disable
4359 * transmit/receive timeout.
4360 */
4361 tp->monitor_state_ready = 0;
4362
4363 /* Ring speed problem, switching to auto mode. */
4364 if(tp->monitor_state == MS_MONITOR_FSM_INACTIVE &&
4365 !tp->cleanup)
4366 {
4367 printk(KERN_INFO "%s: Incorrect ring speed switching.\n",
4368 dev->name);
4369 smctr_set_ring_speed(dev);
4370 }
4371 }
4372 }
4373
4374 if(!(tp->ring_status_flags & RING_STATUS_CHANGED))
4375 return 0;
4376
4377 switch(tp->ring_status)
4378 {
4379 case RING_RECOVERY:
4380 printk(KERN_INFO "%s: Ring Recovery\n", dev->name);
4381 break;
4382
4383 case SINGLE_STATION:
4384 printk(KERN_INFO "%s: Single Statinon\n", dev->name);
4385 break;
4386
4387 case COUNTER_OVERFLOW:
4388 printk(KERN_INFO "%s: Counter Overflow\n", dev->name);
4389 break;
4390
4391 case REMOVE_RECEIVED:
4392 printk(KERN_INFO "%s: Remove Received\n", dev->name);
4393 break;
4394
4395 case AUTO_REMOVAL_ERROR:
4396 printk(KERN_INFO "%s: Auto Remove Error\n", dev->name);
4397 break;
4398
4399 case LOBE_WIRE_FAULT:
4400 printk(KERN_INFO "%s: Lobe Wire Fault\n", dev->name);
4401 break;
4402
4403 case TRANSMIT_BEACON:
4404 printk(KERN_INFO "%s: Transmit Beacon\n", dev->name);
4405 break;
4406
4407 case SOFT_ERROR:
4408 printk(KERN_INFO "%s: Soft Error\n", dev->name);
4409 break;
4410
4411 case HARD_ERROR:
4412 printk(KERN_INFO "%s: Hard Error\n", dev->name);
4413 break;
4414
4415 case SIGNAL_LOSS:
4416 printk(KERN_INFO "%s: Signal Loss\n", dev->name);
4417 break;
4418
4419 default:
4420 printk(KERN_INFO "%s: Unknown ring status change\n",
4421 dev->name);
4422 break;
4423 }
4424
4425 return 0;
4426 }
4427
4428 static int smctr_rx_frame(struct net_device *dev)
4429 {
4430 struct net_local *tp = netdev_priv(dev);
4431 __u16 queue, status, rx_size, err = 0;
4432 __u8 *pbuff;
4433
4434 if(smctr_debug > 10)
4435 printk(KERN_DEBUG "%s: smctr_rx_frame\n", dev->name);
4436
4437 queue = tp->receive_queue_number;
4438
4439 while((status = tp->rx_fcb_curr[queue]->frame_status) != SUCCESS)
4440 {
4441 err = HARDWARE_FAILED;
4442
4443 if(((status & 0x007f) == 0) ||
4444 ((tp->receive_mask & ACCEPT_ERR_PACKETS) != 0))
4445 {
4446 /* frame length less the CRC (4 bytes) + FS (1 byte) */
4447 rx_size = tp->rx_fcb_curr[queue]->frame_length - 5;
4448
4449 pbuff = smctr_get_rx_pointer(dev, queue);
4450
4451 smctr_set_page(dev, pbuff);
4452 smctr_disable_16bit(dev);
4453
4454 /* pbuff points to addr within one page */
4455 pbuff = (__u8 *)PAGE_POINTER(pbuff);
4456
4457 if(queue == NON_MAC_QUEUE)
4458 {
4459 struct sk_buff *skb;
4460
4461 skb = dev_alloc_skb(rx_size);
4462 if (skb) {
4463 skb_put(skb, rx_size);
4464
4465 skb_copy_to_linear_data(skb, pbuff, rx_size);
4466
4467 /* Update Counters */
4468 tp->MacStat.rx_packets++;
4469 tp->MacStat.rx_bytes += skb->len;
4470
4471 /* Kick the packet on up. */
4472 skb->protocol = tr_type_trans(skb, dev);
4473 netif_rx(skb);
4474 } else {
4475 }
4476 }
4477 else
4478 smctr_process_rx_packet((MAC_HEADER *)pbuff,
4479 rx_size, dev, status);
4480 }
4481
4482 smctr_enable_16bit(dev);
4483 smctr_set_page(dev, (__u8 *)tp->ram_access);
4484 smctr_update_rx_chain(dev, queue);
4485
4486 if(err != SUCCESS)
4487 break;
4488 }
4489
4490 return err;
4491 }
4492
4493 static int smctr_send_dat(struct net_device *dev)
4494 {
4495 struct net_local *tp = netdev_priv(dev);
4496 unsigned int i, err;
4497 MAC_HEADER *tmf;
4498 FCBlock *fcb;
4499
4500 if(smctr_debug > 10)
4501 printk(KERN_DEBUG "%s: smctr_send_dat\n", dev->name);
4502
4503 if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE,
4504 sizeof(MAC_HEADER))) == (FCBlock *)(-1L))
4505 {
4506 return OUT_OF_RESOURCES;
4507 }
4508
4509 /* Initialize DAT Data Fields. */
4510 tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
4511 tmf->ac = MSB(AC_FC_DAT);
4512 tmf->fc = LSB(AC_FC_DAT);
4513
4514 for(i = 0; i < 6; i++)
4515 {
4516 tmf->sa[i] = dev->dev_addr[i];
4517 tmf->da[i] = dev->dev_addr[i];
4518
4519 }
4520
4521 tmf->vc = DAT;
4522 tmf->dc_sc = DC_RS | SC_RS;
4523 tmf->vl = 4;
4524 tmf->vl = SWAP_BYTES(tmf->vl);
4525
4526 /* Start Transmit. */
4527 if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
4528 return err;
4529
4530 /* Wait for Transmit to Complete */
4531 for(i = 0; i < 10000; i++)
4532 {
4533 if(fcb->frame_status & FCB_COMMAND_DONE)
4534 break;
4535 mdelay(1);
4536 }
4537
4538 /* Check if GOOD frame Tx'ed. */
4539 if(!(fcb->frame_status & FCB_COMMAND_DONE) ||
4540 fcb->frame_status & (FCB_TX_STATUS_E | FCB_TX_AC_BITS))
4541 {
4542 return INITIALIZE_FAILED;
4543 }
4544
4545 /* De-allocated Tx FCB and Frame Buffer
4546 * The FCB must be de-allocated manually if executing with
4547 * interrupts disabled, other wise the ISR (LM_Service_Events)
4548 * will de-allocate it when the interrupt occurs.
4549 */
4550 tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
4551 smctr_update_tx_chain(dev, fcb, MAC_QUEUE);
4552
4553 return 0;
4554 }
4555
4556 static void smctr_timeout(struct net_device *dev)
4557 {
4558 /*
4559 * If we get here, some higher level has decided we are broken.
4560 * There should really be a "kick me" function call instead.
4561 *
4562 * Resetting the token ring adapter takes a long time so just
4563 * fake transmission time and go on trying. Our own timeout
4564 * routine is in sktr_timer_chk()
4565 */
4566 dev->trans_start = jiffies; /* prevent tx timeout */
4567 netif_wake_queue(dev);
4568 }
4569
4570 /*
4571 * Gets skb from system, queues it and checks if it can be sent
4572 */
4573 static netdev_tx_t smctr_send_packet(struct sk_buff *skb,
4574 struct net_device *dev)
4575 {
4576 struct net_local *tp = netdev_priv(dev);
4577
4578 if(smctr_debug > 10)
4579 printk(KERN_DEBUG "%s: smctr_send_packet\n", dev->name);
4580
4581 /*
4582 * Block a transmit overlap
4583 */
4584
4585 netif_stop_queue(dev);
4586
4587 if(tp->QueueSkb == 0)
4588 return NETDEV_TX_BUSY; /* Return with tbusy set: queue full */
4589
4590 tp->QueueSkb--;
4591 skb_queue_tail(&tp->SendSkbQueue, skb);
4592 smctr_hardware_send_packet(dev, tp);
4593 if(tp->QueueSkb > 0)
4594 netif_wake_queue(dev);
4595
4596 return NETDEV_TX_OK;
4597 }
4598
4599 static int smctr_send_lobe_media_test(struct net_device *dev)
4600 {
4601 struct net_local *tp = netdev_priv(dev);
4602 MAC_SUB_VECTOR *tsv;
4603 MAC_HEADER *tmf;
4604 FCBlock *fcb;
4605 __u32 i;
4606 int err;
4607
4608 if(smctr_debug > 15)
4609 printk(KERN_DEBUG "%s: smctr_send_lobe_media_test\n", dev->name);
4610
4611 if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(struct trh_hdr)
4612 + S_WRAP_DATA + S_WRAP_DATA)) == (FCBlock *)(-1L))
4613 {
4614 return OUT_OF_RESOURCES;
4615 }
4616
4617 /* Initialize DAT Data Fields. */
4618 tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
4619 tmf->ac = MSB(AC_FC_LOBE_MEDIA_TEST);
4620 tmf->fc = LSB(AC_FC_LOBE_MEDIA_TEST);
4621
4622 for(i = 0; i < 6; i++)
4623 {
4624 tmf->da[i] = 0;
4625 tmf->sa[i] = dev->dev_addr[i];
4626 }
4627
4628 tmf->vc = LOBE_MEDIA_TEST;
4629 tmf->dc_sc = DC_RS | SC_RS;
4630 tmf->vl = 4;
4631
4632 tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
4633 smctr_make_wrap_data(dev, tsv);
4634 tmf->vl += tsv->svl;
4635
4636 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4637 smctr_make_wrap_data(dev, tsv);
4638 tmf->vl += tsv->svl;
4639
4640 /* Start Transmit. */
4641 tmf->vl = SWAP_BYTES(tmf->vl);
4642 if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
4643 return err;
4644
4645 /* Wait for Transmit to Complete. (10 ms). */
4646 for(i=0; i < 10000; i++)
4647 {
4648 if(fcb->frame_status & FCB_COMMAND_DONE)
4649 break;
4650 mdelay(1);
4651 }
4652
4653 /* Check if GOOD frame Tx'ed */
4654 if(!(fcb->frame_status & FCB_COMMAND_DONE) ||
4655 fcb->frame_status & (FCB_TX_STATUS_E | FCB_TX_AC_BITS))
4656 {
4657 return LOBE_MEDIA_TEST_FAILED;
4658 }
4659
4660 /* De-allocated Tx FCB and Frame Buffer
4661 * The FCB must be de-allocated manually if executing with
4662 * interrupts disabled, other wise the ISR (LM_Service_Events)
4663 * will de-allocate it when the interrupt occurs.
4664 */
4665 tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
4666 smctr_update_tx_chain(dev, fcb, MAC_QUEUE);
4667
4668 return 0;
4669 }
4670
4671 static int smctr_send_rpt_addr(struct net_device *dev, MAC_HEADER *rmf,
4672 __u16 correlator)
4673 {
4674 MAC_HEADER *tmf;
4675 MAC_SUB_VECTOR *tsv;
4676 FCBlock *fcb;
4677
4678 if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
4679 + S_CORRELATOR + S_PHYSICAL_DROP + S_UPSTREAM_NEIGHBOR_ADDRESS
4680 + S_ADDRESS_MODIFER + S_GROUP_ADDRESS + S_FUNCTIONAL_ADDRESS))
4681 == (FCBlock *)(-1L))
4682 {
4683 return 0;
4684 }
4685
4686 tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
4687 tmf->vc = RPT_ADDR;
4688 tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
4689 tmf->vl = 4;
4690
4691 smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_ADDR);
4692
4693 tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
4694 smctr_make_corr(dev, tsv, correlator);
4695
4696 tmf->vl += tsv->svl;
4697 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4698 smctr_make_phy_drop_num(dev, tsv);
4699
4700 tmf->vl += tsv->svl;
4701 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4702 smctr_make_upstream_neighbor_addr(dev, tsv);
4703
4704 tmf->vl += tsv->svl;
4705 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4706 smctr_make_addr_mod(dev, tsv);
4707
4708 tmf->vl += tsv->svl;
4709 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4710 smctr_make_group_addr(dev, tsv);
4711
4712 tmf->vl += tsv->svl;
4713 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4714 smctr_make_funct_addr(dev, tsv);
4715
4716 tmf->vl += tsv->svl;
4717
4718 /* Subtract out MVID and MVL which is
4719 * include in both vl and MAC_HEADER
4720 */
4721 /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
4722 fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
4723 */
4724 tmf->vl = SWAP_BYTES(tmf->vl);
4725
4726 return smctr_trc_send_packet(dev, fcb, MAC_QUEUE);
4727 }
4728
4729 static int smctr_send_rpt_attch(struct net_device *dev, MAC_HEADER *rmf,
4730 __u16 correlator)
4731 {
4732 MAC_HEADER *tmf;
4733 MAC_SUB_VECTOR *tsv;
4734 FCBlock *fcb;
4735
4736 if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
4737 + S_CORRELATOR + S_PRODUCT_INSTANCE_ID + S_FUNCTIONAL_ADDRESS
4738 + S_AUTHORIZED_FUNCTION_CLASS + S_AUTHORIZED_ACCESS_PRIORITY))
4739 == (FCBlock *)(-1L))
4740 {
4741 return 0;
4742 }
4743
4744 tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
4745 tmf->vc = RPT_ATTCH;
4746 tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
4747 tmf->vl = 4;
4748
4749 smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_ATTCH);
4750
4751 tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
4752 smctr_make_corr(dev, tsv, correlator);
4753
4754 tmf->vl += tsv->svl;
4755 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4756 smctr_make_product_id(dev, tsv);
4757
4758 tmf->vl += tsv->svl;
4759 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4760 smctr_make_funct_addr(dev, tsv);
4761
4762 tmf->vl += tsv->svl;
4763 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4764 smctr_make_auth_funct_class(dev, tsv);
4765
4766 tmf->vl += tsv->svl;
4767 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4768 smctr_make_access_pri(dev, tsv);
4769
4770 tmf->vl += tsv->svl;
4771
4772 /* Subtract out MVID and MVL which is
4773 * include in both vl and MAC_HEADER
4774 */
4775 /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
4776 fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
4777 */
4778 tmf->vl = SWAP_BYTES(tmf->vl);
4779
4780 return smctr_trc_send_packet(dev, fcb, MAC_QUEUE);
4781 }
4782
4783 static int smctr_send_rpt_state(struct net_device *dev, MAC_HEADER *rmf,
4784 __u16 correlator)
4785 {
4786 MAC_HEADER *tmf;
4787 MAC_SUB_VECTOR *tsv;
4788 FCBlock *fcb;
4789
4790 if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
4791 + S_CORRELATOR + S_RING_STATION_VERSION_NUMBER
4792 + S_RING_STATION_STATUS + S_STATION_IDENTIFER))
4793 == (FCBlock *)(-1L))
4794 {
4795 return 0;
4796 }
4797
4798 tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
4799 tmf->vc = RPT_STATE;
4800 tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
4801 tmf->vl = 4;
4802
4803 smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_STATE);
4804
4805 tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
4806 smctr_make_corr(dev, tsv, correlator);
4807
4808 tmf->vl += tsv->svl;
4809 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4810 smctr_make_ring_station_version(dev, tsv);
4811
4812 tmf->vl += tsv->svl;
4813 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4814 smctr_make_ring_station_status(dev, tsv);
4815
4816 tmf->vl += tsv->svl;
4817 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4818 smctr_make_station_id(dev, tsv);
4819
4820 tmf->vl += tsv->svl;
4821
4822 /* Subtract out MVID and MVL which is
4823 * include in both vl and MAC_HEADER
4824 */
4825 /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
4826 fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
4827 */
4828 tmf->vl = SWAP_BYTES(tmf->vl);
4829
4830 return smctr_trc_send_packet(dev, fcb, MAC_QUEUE);
4831 }
4832
4833 static int smctr_send_rpt_tx_forward(struct net_device *dev,
4834 MAC_HEADER *rmf, __u16 tx_fstatus)
4835 {
4836 MAC_HEADER *tmf;
4837 MAC_SUB_VECTOR *tsv;
4838 FCBlock *fcb;
4839
4840 if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
4841 + S_TRANSMIT_STATUS_CODE)) == (FCBlock *)(-1L))
4842 {
4843 return 0;
4844 }
4845
4846 tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
4847 tmf->vc = RPT_TX_FORWARD;
4848 tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
4849 tmf->vl = 4;
4850
4851 smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_TX_FORWARD);
4852
4853 tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
4854 smctr_make_tx_status_code(dev, tsv, tx_fstatus);
4855
4856 tmf->vl += tsv->svl;
4857
4858 /* Subtract out MVID and MVL which is
4859 * include in both vl and MAC_HEADER
4860 */
4861 /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
4862 fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
4863 */
4864 tmf->vl = SWAP_BYTES(tmf->vl);
4865
4866 return smctr_trc_send_packet(dev, fcb, MAC_QUEUE);
4867 }
4868
4869 static int smctr_send_rsp(struct net_device *dev, MAC_HEADER *rmf,
4870 __u16 rcode, __u16 correlator)
4871 {
4872 MAC_HEADER *tmf;
4873 MAC_SUB_VECTOR *tsv;
4874 FCBlock *fcb;
4875
4876 if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
4877 + S_CORRELATOR + S_RESPONSE_CODE)) == (FCBlock *)(-1L))
4878 {
4879 return 0;
4880 }
4881
4882 tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
4883 tmf->vc = RSP;
4884 tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
4885 tmf->vl = 4;
4886
4887 smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RSP);
4888
4889 tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
4890 smctr_make_corr(dev, tsv, correlator);
4891
4892 return 0;
4893 }
4894
4895 static int smctr_send_rq_init(struct net_device *dev)
4896 {
4897 struct net_local *tp = netdev_priv(dev);
4898 MAC_HEADER *tmf;
4899 MAC_SUB_VECTOR *tsv;
4900 FCBlock *fcb;
4901 unsigned int i, count = 0;
4902 __u16 fstatus;
4903 int err;
4904
4905 do {
4906 if(((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
4907 + S_PRODUCT_INSTANCE_ID + S_UPSTREAM_NEIGHBOR_ADDRESS
4908 + S_RING_STATION_VERSION_NUMBER + S_ADDRESS_MODIFER))
4909 == (FCBlock *)(-1L)))
4910 {
4911 return 0;
4912 }
4913
4914 tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
4915 tmf->vc = RQ_INIT;
4916 tmf->dc_sc = DC_RPS | SC_RS;
4917 tmf->vl = 4;
4918
4919 smctr_make_8025_hdr(dev, NULL, tmf, AC_FC_RQ_INIT);
4920
4921 tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
4922 smctr_make_product_id(dev, tsv);
4923
4924 tmf->vl += tsv->svl;
4925 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4926 smctr_make_upstream_neighbor_addr(dev, tsv);
4927
4928 tmf->vl += tsv->svl;
4929 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4930 smctr_make_ring_station_version(dev, tsv);
4931
4932 tmf->vl += tsv->svl;
4933 tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
4934 smctr_make_addr_mod(dev, tsv);
4935
4936 tmf->vl += tsv->svl;
4937
4938 /* Subtract out MVID and MVL which is
4939 * include in both vl and MAC_HEADER
4940 */
4941 /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
4942 fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
4943 */
4944 tmf->vl = SWAP_BYTES(tmf->vl);
4945
4946 if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
4947 return err;
4948
4949 /* Wait for Transmit to Complete */
4950 for(i = 0; i < 10000; i++)
4951 {
4952 if(fcb->frame_status & FCB_COMMAND_DONE)
4953 break;
4954 mdelay(1);
4955 }
4956
4957 /* Check if GOOD frame Tx'ed */
4958 fstatus = fcb->frame_status;
4959
4960 if(!(fstatus & FCB_COMMAND_DONE))
4961 return HARDWARE_FAILED;
4962
4963 if(!(fstatus & FCB_TX_STATUS_E))
4964 count++;
4965
4966 /* De-allocated Tx FCB and Frame Buffer
4967 * The FCB must be de-allocated manually if executing with
4968 * interrupts disabled, other wise the ISR (LM_Service_Events)
4969 * will de-allocate it when the interrupt occurs.
4970 */
4971 tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
4972 smctr_update_tx_chain(dev, fcb, MAC_QUEUE);
4973 } while(count < 4 && ((fstatus & FCB_TX_AC_BITS) ^ FCB_TX_AC_BITS));
4974
4975 return smctr_join_complete_state(dev);
4976 }
4977
4978 static int smctr_send_tx_forward(struct net_device *dev, MAC_HEADER *rmf,
4979 __u16 *tx_fstatus)
4980 {
4981 struct net_local *tp = netdev_priv(dev);
4982 FCBlock *fcb;
4983 unsigned int i;
4984 int err;
4985
4986 /* Check if this is the END POINT of the Transmit Forward Chain. */
4987 if(rmf->vl <= 18)
4988 return 0;
4989
4990 /* Allocate Transmit FCB only by requesting 0 bytes
4991 * of data buffer.
4992 */
4993 if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, 0)) == (FCBlock *)(-1L))
4994 return 0;
4995
4996 /* Set pointer to Transmit Frame Buffer to the data
4997 * portion of the received TX Forward frame, making
4998 * sure to skip over the Vector Code (vc) and Vector
4999 * length (vl).
5000 */
5001 fcb->bdb_ptr->trc_data_block_ptr = TRC_POINTER((__u32)rmf
5002 + sizeof(MAC_HEADER) + 2);
5003 fcb->bdb_ptr->data_block_ptr = (__u16 *)((__u32)rmf
5004 + sizeof(MAC_HEADER) + 2);
5005
5006 fcb->frame_length = rmf->vl - 4 - 2;
5007 fcb->bdb_ptr->buffer_length = rmf->vl - 4 - 2;
5008
5009 if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
5010 return err;
5011
5012 /* Wait for Transmit to Complete */
5013 for(i = 0; i < 10000; i++)
5014 {
5015 if(fcb->frame_status & FCB_COMMAND_DONE)
5016 break;
5017 mdelay(1);
5018 }
5019
5020 /* Check if GOOD frame Tx'ed */
5021 if(!(fcb->frame_status & FCB_COMMAND_DONE))
5022 {
5023 if((err = smctr_issue_resume_tx_fcb_cmd(dev, MAC_QUEUE)))
5024 return err;
5025
5026 for(i = 0; i < 10000; i++)
5027 {
5028 if(fcb->frame_status & FCB_COMMAND_DONE)
5029 break;
5030 mdelay(1);
5031 }
5032
5033 if(!(fcb->frame_status & FCB_COMMAND_DONE))
5034 return HARDWARE_FAILED;
5035 }
5036
5037 *tx_fstatus = fcb->frame_status;
5038
5039 return A_FRAME_WAS_FORWARDED;
5040 }
5041
5042 static int smctr_set_auth_access_pri(struct net_device *dev,
5043 MAC_SUB_VECTOR *rsv)
5044 {
5045 struct net_local *tp = netdev_priv(dev);
5046
5047 if(rsv->svl != S_AUTHORIZED_ACCESS_PRIORITY)
5048 return E_SUB_VECTOR_LENGTH_ERROR;
5049
5050 tp->authorized_access_priority = (rsv->svv[0] << 8 | rsv->svv[1]);
5051
5052 return POSITIVE_ACK;
5053 }
5054
5055 static int smctr_set_auth_funct_class(struct net_device *dev,
5056 MAC_SUB_VECTOR *rsv)
5057 {
5058 struct net_local *tp = netdev_priv(dev);
5059
5060 if(rsv->svl != S_AUTHORIZED_FUNCTION_CLASS)
5061 return E_SUB_VECTOR_LENGTH_ERROR;
5062
5063 tp->authorized_function_classes = (rsv->svv[0] << 8 | rsv->svv[1]);
5064
5065 return POSITIVE_ACK;
5066 }
5067
5068 static int smctr_set_corr(struct net_device *dev, MAC_SUB_VECTOR *rsv,
5069 __u16 *correlator)
5070 {
5071 if(rsv->svl != S_CORRELATOR)
5072 return E_SUB_VECTOR_LENGTH_ERROR;
5073
5074 *correlator = (rsv->svv[0] << 8 | rsv->svv[1]);
5075
5076 return POSITIVE_ACK;
5077 }
5078
5079 static int smctr_set_error_timer_value(struct net_device *dev,
5080 MAC_SUB_VECTOR *rsv)
5081 {
5082 __u16 err_tval;
5083 int err;
5084
5085 if(rsv->svl != S_ERROR_TIMER_VALUE)
5086 return E_SUB_VECTOR_LENGTH_ERROR;
5087
5088 err_tval = (rsv->svv[0] << 8 | rsv->svv[1])*10;
5089
5090 smctr_issue_write_word_cmd(dev, RW_TER_THRESHOLD, &err_tval);
5091
5092 if((err = smctr_wait_cmd(dev)))
5093 return err;
5094
5095 return POSITIVE_ACK;
5096 }
5097
5098 static int smctr_set_frame_forward(struct net_device *dev,
5099 MAC_SUB_VECTOR *rsv, __u8 dc_sc)
5100 {
5101 if((rsv->svl < 2) || (rsv->svl > S_FRAME_FORWARD))
5102 return E_SUB_VECTOR_LENGTH_ERROR;
5103
5104 if((dc_sc & DC_MASK) != DC_CRS)
5105 {
5106 if(rsv->svl >= 2 && rsv->svl < 20)
5107 return E_TRANSMIT_FORWARD_INVALID;
5108
5109 if((rsv->svv[0] != 0) || (rsv->svv[1] != 0))
5110 return E_TRANSMIT_FORWARD_INVALID;
5111 }
5112
5113 return POSITIVE_ACK;
5114 }
5115
5116 static int smctr_set_local_ring_num(struct net_device *dev,
5117 MAC_SUB_VECTOR *rsv)
5118 {
5119 struct net_local *tp = netdev_priv(dev);
5120
5121 if(rsv->svl != S_LOCAL_RING_NUMBER)
5122 return E_SUB_VECTOR_LENGTH_ERROR;
5123
5124 if(tp->ptr_local_ring_num)
5125 *(__u16 *)(tp->ptr_local_ring_num)
5126 = (rsv->svv[0] << 8 | rsv->svv[1]);
5127
5128 return POSITIVE_ACK;
5129 }
5130
5131 static unsigned short smctr_set_ctrl_attention(struct net_device *dev)
5132 {
5133 struct net_local *tp = netdev_priv(dev);
5134 int ioaddr = dev->base_addr;
5135
5136 if(tp->bic_type == BIC_585_CHIP)
5137 outb((tp->trc_mask | HWR_CA), ioaddr + HWR);
5138 else
5139 {
5140 outb((tp->trc_mask | CSR_CA), ioaddr + CSR);
5141 outb(tp->trc_mask, ioaddr + CSR);
5142 }
5143
5144 return 0;
5145 }
5146
5147 static void smctr_set_multicast_list(struct net_device *dev)
5148 {
5149 if(smctr_debug > 10)
5150 printk(KERN_DEBUG "%s: smctr_set_multicast_list\n", dev->name);
5151 }
5152
5153 static int smctr_set_page(struct net_device *dev, __u8 *buf)
5154 {
5155 struct net_local *tp = netdev_priv(dev);
5156 __u8 amask;
5157 __u32 tptr;
5158
5159 tptr = (__u32)buf - (__u32)tp->ram_access;
5160 amask = (__u8)((tptr & PR_PAGE_MASK) >> 8);
5161 outb(amask, dev->base_addr + PR);
5162
5163 return 0;
5164 }
5165
5166 static int smctr_set_phy_drop(struct net_device *dev, MAC_SUB_VECTOR *rsv)
5167 {
5168 int err;
5169
5170 if(rsv->svl != S_PHYSICAL_DROP)
5171 return E_SUB_VECTOR_LENGTH_ERROR;
5172
5173 smctr_issue_write_byte_cmd(dev, RW_PHYSICAL_DROP_NUMBER, &rsv->svv[0]);
5174 if((err = smctr_wait_cmd(dev)))
5175 return err;
5176
5177 return POSITIVE_ACK;
5178 }
5179
5180 /* Reset the ring speed to the opposite of what it was. This auto-pilot
5181 * mode requires a complete reset and re-init of the adapter.
5182 */
5183 static int smctr_set_ring_speed(struct net_device *dev)
5184 {
5185 struct net_local *tp = netdev_priv(dev);
5186 int err;
5187
5188 if(tp->media_type == MEDIA_UTP_16)
5189 tp->media_type = MEDIA_UTP_4;
5190 else
5191 tp->media_type = MEDIA_UTP_16;
5192
5193 smctr_enable_16bit(dev);
5194
5195 /* Re-Initialize adapter's internal registers */
5196 smctr_reset_adapter(dev);
5197
5198 if((err = smctr_init_card_real(dev)))
5199 return err;
5200
5201 smctr_enable_bic_int(dev);
5202
5203 if((err = smctr_issue_enable_int_cmd(dev, TRC_INTERRUPT_ENABLE_MASK)))
5204 return err;
5205
5206 smctr_disable_16bit(dev);
5207
5208 return 0;
5209 }
5210
5211 static int smctr_set_rx_look_ahead(struct net_device *dev)
5212 {
5213 struct net_local *tp = netdev_priv(dev);
5214 __u16 sword, rword;
5215
5216 if(smctr_debug > 10)
5217 printk(KERN_DEBUG "%s: smctr_set_rx_look_ahead_flag\n", dev->name);
5218
5219 tp->adapter_flags &= ~(FORCED_16BIT_MODE);
5220 tp->adapter_flags |= RX_VALID_LOOKAHEAD;
5221
5222 if(tp->adapter_bus == BUS_ISA16_TYPE)
5223 {
5224 sword = *((__u16 *)(tp->ram_access));
5225 *((__u16 *)(tp->ram_access)) = 0x1234;
5226
5227 smctr_disable_16bit(dev);
5228 rword = *((__u16 *)(tp->ram_access));
5229 smctr_enable_16bit(dev);
5230
5231 if(rword != 0x1234)
5232 tp->adapter_flags |= FORCED_16BIT_MODE;
5233
5234 *((__u16 *)(tp->ram_access)) = sword;
5235 }
5236
5237 return 0;
5238 }
5239
5240 static int smctr_set_trc_reset(int ioaddr)
5241 {
5242 __u8 r;
5243
5244 r = inb(ioaddr + MSR);
5245 outb(MSR_RST | r, ioaddr + MSR);
5246
5247 return 0;
5248 }
5249
5250 /*
5251 * This function can be called if the adapter is busy or not.
5252 */
5253 static int smctr_setup_single_cmd(struct net_device *dev,
5254 __u16 command, __u16 subcommand)
5255 {
5256 struct net_local *tp = netdev_priv(dev);
5257 unsigned int err;
5258
5259 if(smctr_debug > 10)
5260 printk(KERN_DEBUG "%s: smctr_setup_single_cmd\n", dev->name);
5261
5262 if((err = smctr_wait_while_cbusy(dev)))
5263 return err;
5264
5265 if((err = (unsigned int)smctr_wait_cmd(dev)))
5266 return err;
5267
5268 tp->acb_head->cmd_done_status = 0;
5269 tp->acb_head->cmd = command;
5270 tp->acb_head->subcmd = subcommand;
5271
5272 err = smctr_issue_resume_acb_cmd(dev);
5273
5274 return err;
5275 }
5276
5277 /*
5278 * This function can not be called with the adapter busy.
5279 */
5280 static int smctr_setup_single_cmd_w_data(struct net_device *dev,
5281 __u16 command, __u16 subcommand)
5282 {
5283 struct net_local *tp = netdev_priv(dev);
5284
5285 tp->acb_head->cmd_done_status = ACB_COMMAND_NOT_DONE;
5286 tp->acb_head->cmd = command;
5287 tp->acb_head->subcmd = subcommand;
5288 tp->acb_head->data_offset_lo
5289 = (__u16)TRC_POINTER(tp->misc_command_data);
5290
5291 return smctr_issue_resume_acb_cmd(dev);
5292 }
5293
5294 static char *smctr_malloc(struct net_device *dev, __u16 size)
5295 {
5296 struct net_local *tp = netdev_priv(dev);
5297 char *m;
5298
5299 m = (char *)(tp->ram_access + tp->sh_mem_used);
5300 tp->sh_mem_used += (__u32)size;
5301
5302 return m;
5303 }
5304
5305 static int smctr_status_chg(struct net_device *dev)
5306 {
5307 struct net_local *tp = netdev_priv(dev);
5308
5309 if(smctr_debug > 10)
5310 printk(KERN_DEBUG "%s: smctr_status_chg\n", dev->name);
5311
5312 switch(tp->status)
5313 {
5314 case OPEN:
5315 break;
5316
5317 case CLOSED:
5318 break;
5319
5320 /* Interrupt driven open() completion. XXX */
5321 case INITIALIZED:
5322 tp->group_address_0 = 0;
5323 tp->group_address[0] = 0;
5324 tp->group_address[1] = 0;
5325 tp->functional_address_0 = 0;
5326 tp->functional_address[0] = 0;
5327 tp->functional_address[1] = 0;
5328 smctr_open_tr(dev);
5329 break;
5330
5331 default:
5332 printk(KERN_INFO "%s: status change unknown %x\n",
5333 dev->name, tp->status);
5334 break;
5335 }
5336
5337 return 0;
5338 }
5339
5340 static int smctr_trc_send_packet(struct net_device *dev, FCBlock *fcb,
5341 __u16 queue)
5342 {
5343 struct net_local *tp = netdev_priv(dev);
5344 int err = 0;
5345
5346 if(smctr_debug > 10)
5347 printk(KERN_DEBUG "%s: smctr_trc_send_packet\n", dev->name);
5348
5349 fcb->info = FCB_CHAIN_END | FCB_ENABLE_TFS;
5350 if(tp->num_tx_fcbs[queue] != 1)
5351 fcb->back_ptr->info = FCB_INTERRUPT_ENABLE | FCB_ENABLE_TFS;
5352
5353 if(tp->tx_queue_status[queue] == NOT_TRANSMITING)
5354 {
5355 tp->tx_queue_status[queue] = TRANSMITING;
5356 err = smctr_issue_resume_tx_fcb_cmd(dev, queue);
5357 }
5358
5359 return err;
5360 }
5361
5362 static __u16 smctr_tx_complete(struct net_device *dev, __u16 queue)
5363 {
5364 struct net_local *tp = netdev_priv(dev);
5365 __u16 status, err = 0;
5366 int cstatus;
5367
5368 if(smctr_debug > 10)
5369 printk(KERN_DEBUG "%s: smctr_tx_complete\n", dev->name);
5370
5371 while((status = tp->tx_fcb_end[queue]->frame_status) != SUCCESS)
5372 {
5373 if(status & 0x7e00 )
5374 {
5375 err = HARDWARE_FAILED;
5376 break;
5377 }
5378
5379 if((err = smctr_update_tx_chain(dev, tp->tx_fcb_end[queue],
5380 queue)) != SUCCESS)
5381 break;
5382
5383 smctr_disable_16bit(dev);
5384
5385 if(tp->mode_bits & UMAC)
5386 {
5387 if(!(status & (FCB_TX_STATUS_AR1 | FCB_TX_STATUS_AR2)))
5388 cstatus = NO_SUCH_DESTINATION;
5389 else
5390 {
5391 if(!(status & (FCB_TX_STATUS_CR1 | FCB_TX_STATUS_CR2)))
5392 cstatus = DEST_OUT_OF_RESOURCES;
5393 else
5394 {
5395 if(status & FCB_TX_STATUS_E)
5396 cstatus = MAX_COLLISIONS;
5397 else
5398 cstatus = SUCCESS;
5399 }
5400 }
5401 }
5402 else
5403 cstatus = SUCCESS;
5404
5405 if(queue == BUG_QUEUE)
5406 err = SUCCESS;
5407
5408 smctr_enable_16bit(dev);
5409 if(err != SUCCESS)
5410 break;
5411 }
5412
5413 return err;
5414 }
5415
5416 static unsigned short smctr_tx_move_frame(struct net_device *dev,
5417 struct sk_buff *skb, __u8 *pbuff, unsigned int bytes)
5418 {
5419 struct net_local *tp = netdev_priv(dev);
5420 unsigned int ram_usable;
5421 __u32 flen, len, offset = 0;
5422 __u8 *frag, *page;
5423
5424 if(smctr_debug > 10)
5425 printk(KERN_DEBUG "%s: smctr_tx_move_frame\n", dev->name);
5426
5427 ram_usable = ((unsigned int)tp->ram_usable) << 10;
5428 frag = skb->data;
5429 flen = skb->len;
5430
5431 while(flen > 0 && bytes > 0)
5432 {
5433 smctr_set_page(dev, pbuff);
5434
5435 offset = SMC_PAGE_OFFSET(pbuff);
5436
5437 if(offset + flen > ram_usable)
5438 len = ram_usable - offset;
5439 else
5440 len = flen;
5441
5442 if(len > bytes)
5443 len = bytes;
5444
5445 page = (char *) (offset + tp->ram_access);
5446 memcpy(page, frag, len);
5447
5448 flen -=len;
5449 bytes -= len;
5450 frag += len;
5451 pbuff += len;
5452 }
5453
5454 return 0;
5455 }
5456
5457 /* Update the error statistic counters for this adapter. */
5458 static int smctr_update_err_stats(struct net_device *dev)
5459 {
5460 struct net_local *tp = netdev_priv(dev);
5461 struct tr_statistics *tstat = &tp->MacStat;
5462
5463 if(tstat->internal_errors)
5464 tstat->internal_errors
5465 += *(tp->misc_command_data + 0) & 0x00ff;
5466
5467 if(tstat->line_errors)
5468 tstat->line_errors += *(tp->misc_command_data + 0) >> 8;
5469
5470 if(tstat->A_C_errors)
5471 tstat->A_C_errors += *(tp->misc_command_data + 1) & 0x00ff;
5472
5473 if(tstat->burst_errors)
5474 tstat->burst_errors += *(tp->misc_command_data + 1) >> 8;
5475
5476 if(tstat->abort_delimiters)
5477 tstat->abort_delimiters += *(tp->misc_command_data + 2) >> 8;
5478
5479 if(tstat->recv_congest_count)
5480 tstat->recv_congest_count
5481 += *(tp->misc_command_data + 3) & 0x00ff;
5482
5483 if(tstat->lost_frames)
5484 tstat->lost_frames
5485 += *(tp->misc_command_data + 3) >> 8;
5486
5487 if(tstat->frequency_errors)
5488 tstat->frequency_errors += *(tp->misc_command_data + 4) & 0x00ff;
5489
5490 if(tstat->frame_copied_errors)
5491 tstat->frame_copied_errors
5492 += *(tp->misc_command_data + 4) >> 8;
5493
5494 if(tstat->token_errors)
5495 tstat->token_errors += *(tp->misc_command_data + 5) >> 8;
5496
5497 return 0;
5498 }
5499
5500 static int smctr_update_rx_chain(struct net_device *dev, __u16 queue)
5501 {
5502 struct net_local *tp = netdev_priv(dev);
5503 FCBlock *fcb;
5504 BDBlock *bdb;
5505 __u16 size, len;
5506
5507 fcb = tp->rx_fcb_curr[queue];
5508 len = fcb->frame_length;
5509
5510 fcb->frame_status = 0;
5511 fcb->info = FCB_CHAIN_END;
5512 fcb->back_ptr->info = FCB_WARNING;
5513
5514 tp->rx_fcb_curr[queue] = tp->rx_fcb_curr[queue]->next_ptr;
5515
5516 /* update RX BDBs */
5517 size = (len >> RX_BDB_SIZE_SHIFT);
5518 if(len & RX_DATA_BUFFER_SIZE_MASK)
5519 size += sizeof(BDBlock);
5520 size &= (~RX_BDB_SIZE_MASK);
5521
5522 /* check if wrap around */
5523 bdb = (BDBlock *)((__u32)(tp->rx_bdb_curr[queue]) + (__u32)(size));
5524 if((__u32)bdb >= (__u32)tp->rx_bdb_end[queue])
5525 {
5526 bdb = (BDBlock *)((__u32)(tp->rx_bdb_head[queue])
5527 + (__u32)(bdb) - (__u32)(tp->rx_bdb_end[queue]));
5528 }
5529
5530 bdb->back_ptr->info = BDB_CHAIN_END;
5531 tp->rx_bdb_curr[queue]->back_ptr->info = BDB_NOT_CHAIN_END;
5532 tp->rx_bdb_curr[queue] = bdb;
5533
5534 return 0;
5535 }
5536
5537 static int smctr_update_tx_chain(struct net_device *dev, FCBlock *fcb,
5538 __u16 queue)
5539 {
5540 struct net_local *tp = netdev_priv(dev);
5541
5542 if(smctr_debug > 20)
5543 printk(KERN_DEBUG "smctr_update_tx_chain\n");
5544
5545 if(tp->num_tx_fcbs_used[queue] <= 0)
5546 return HARDWARE_FAILED;
5547 else
5548 {
5549 if(tp->tx_buff_used[queue] < fcb->memory_alloc)
5550 {
5551 tp->tx_buff_used[queue] = 0;
5552 return HARDWARE_FAILED;
5553 }
5554
5555 tp->tx_buff_used[queue] -= fcb->memory_alloc;
5556
5557 /* if all transmit buffer are cleared
5558 * need to set the tx_buff_curr[] to tx_buff_head[]
5559 * otherwise, tx buffer will be segregate and cannot
5560 * accommodate and buffer greater than (curr - head) and
5561 * (end - curr) since we do not allow wrap around allocation.
5562 */
5563 if(tp->tx_buff_used[queue] == 0)
5564 tp->tx_buff_curr[queue] = tp->tx_buff_head[queue];
5565
5566 tp->num_tx_fcbs_used[queue]--;
5567 fcb->frame_status = 0;
5568 tp->tx_fcb_end[queue] = fcb->next_ptr;
5569 netif_wake_queue(dev);
5570 return 0;
5571 }
5572 }
5573
5574 static int smctr_wait_cmd(struct net_device *dev)
5575 {
5576 struct net_local *tp = netdev_priv(dev);
5577 unsigned int loop_count = 0x20000;
5578
5579 if(smctr_debug > 10)
5580 printk(KERN_DEBUG "%s: smctr_wait_cmd\n", dev->name);
5581
5582 while(loop_count)
5583 {
5584 if(tp->acb_head->cmd_done_status & ACB_COMMAND_DONE)
5585 break;
5586 udelay(1);
5587 loop_count--;
5588 }
5589
5590 if(loop_count == 0)
5591 return HARDWARE_FAILED;
5592
5593 if(tp->acb_head->cmd_done_status & 0xff)
5594 return HARDWARE_FAILED;
5595
5596 return 0;
5597 }
5598
5599 static int smctr_wait_while_cbusy(struct net_device *dev)
5600 {
5601 struct net_local *tp = netdev_priv(dev);
5602 unsigned int timeout = 0x20000;
5603 int ioaddr = dev->base_addr;
5604 __u8 r;
5605
5606 if(tp->bic_type == BIC_585_CHIP)
5607 {
5608 while(timeout)
5609 {
5610 r = inb(ioaddr + HWR);
5611 if((r & HWR_CBUSY) == 0)
5612 break;
5613 timeout--;
5614 }
5615 }
5616 else
5617 {
5618 while(timeout)
5619 {
5620 r = inb(ioaddr + CSR);
5621 if((r & CSR_CBUSY) == 0)
5622 break;
5623 timeout--;
5624 }
5625 }
5626
5627 if(timeout)
5628 return 0;
5629 else
5630 return HARDWARE_FAILED;
5631 }
5632
5633 #ifdef MODULE
5634
5635 static struct net_device* dev_smctr[SMCTR_MAX_ADAPTERS];
5636 static int io[SMCTR_MAX_ADAPTERS];
5637 static int irq[SMCTR_MAX_ADAPTERS];
5638
5639 MODULE_LICENSE("GPL");
5640 MODULE_FIRMWARE("tr_smctr.bin");
5641
5642 module_param_array(io, int, NULL, 0);
5643 module_param_array(irq, int, NULL, 0);
5644 module_param(ringspeed, int, 0);
5645
5646 static struct net_device * __init setup_card(int n)
5647 {
5648 struct net_device *dev = alloc_trdev(sizeof(struct net_local));
5649 int err;
5650
5651 if (!dev)
5652 return ERR_PTR(-ENOMEM);
5653
5654 dev->irq = irq[n];
5655 err = smctr_probe1(dev, io[n]);
5656 if (err)
5657 goto out;
5658
5659 err = register_netdev(dev);
5660 if (err)
5661 goto out1;
5662 return dev;
5663 out1:
5664 #ifdef CONFIG_MCA_LEGACY
5665 { struct net_local *tp = netdev_priv(dev);
5666 if (tp->slot_num)
5667 mca_mark_as_unused(tp->slot_num);
5668 }
5669 #endif
5670 release_region(dev->base_addr, SMCTR_IO_EXTENT);
5671 free_irq(dev->irq, dev);
5672 out:
5673 free_netdev(dev);
5674 return ERR_PTR(err);
5675 }
5676
5677 int __init init_module(void)
5678 {
5679 int i, found = 0;
5680 struct net_device *dev;
5681
5682 for(i = 0; i < SMCTR_MAX_ADAPTERS; i++) {
5683 dev = io[0]? setup_card(i) : smctr_probe(-1);
5684 if (!IS_ERR(dev)) {
5685 ++found;
5686 dev_smctr[i] = dev;
5687 }
5688 }
5689
5690 return found ? 0 : -ENODEV;
5691 }
5692
5693 void __exit cleanup_module(void)
5694 {
5695 int i;
5696
5697 for(i = 0; i < SMCTR_MAX_ADAPTERS; i++) {
5698 struct net_device *dev = dev_smctr[i];
5699
5700 if (dev) {
5701
5702 unregister_netdev(dev);
5703 #ifdef CONFIG_MCA_LEGACY
5704 { struct net_local *tp = netdev_priv(dev);
5705 if (tp->slot_num)
5706 mca_mark_as_unused(tp->slot_num);
5707 }
5708 #endif
5709 release_region(dev->base_addr, SMCTR_IO_EXTENT);
5710 if (dev->irq)
5711 free_irq(dev->irq, dev);
5712
5713 free_netdev(dev);
5714 }
5715 }
5716 }
5717 #endif /* MODULE */
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