arch/arm/mach-integrator/core.c

   1 /*
   2  *  linux/arch/arm/mach-integrator/core.c
   3  *
   4  *  Copyright (C) 2000-2003 Deep Blue Solutions Ltd
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2, as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/types.h>
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/device.h>
  14 #include <linux/spinlock.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/irq.h>
  17 #include <linux/memblock.h>
  18 #include <linux/sched.h>
  19 #include <linux/smp.h>
  20 #include <linux/termios.h>
  21 #include <linux/amba/bus.h>
  22 #include <linux/amba/serial.h>
  23 #include <linux/io.h>
  24 #include <linux/clkdev.h>
  25
  26 #include <mach/hardware.h>
  27 #include <mach/platform.h>
  28 #include <asm/irq.h>
  29 #include <mach/cm.h>
  30 #include <asm/leds.h>
  31 #include <asm/mach-types.h>
  32 #include <asm/mach/time.h>
  33 #include <asm/pgtable.h>
  34
  35 static struct amba_pl010_data integrator_uart_data;
  36
  37 static struct amba_device rtc_device = {
  38         .dev            = {
  39                 .init_name = "mb:15",
  40         },
  41         .res            = {
  42                 .start  = INTEGRATOR_RTC_BASE,
  43                 .end    = INTEGRATOR_RTC_BASE + SZ_4K - 1,
  44                 .flags  = IORESOURCE_MEM,
  45         },
  46         .irq            = { IRQ_RTCINT, NO_IRQ },
  47 };
  48
  49 static struct amba_device uart0_device = {
  50         .dev            = {
  51                 .init_name = "mb:16",
  52                 .platform_data = &integrator_uart_data,
  53         },
  54         .res            = {
  55                 .start  = INTEGRATOR_UART0_BASE,
  56                 .end    = INTEGRATOR_UART0_BASE + SZ_4K - 1,
  57                 .flags  = IORESOURCE_MEM,
  58         },
  59         .irq            = { IRQ_UARTINT0, NO_IRQ },
  60 };
  61
  62 static struct amba_device uart1_device = {
  63         .dev            = {
  64                 .init_name = "mb:17",
  65                 .platform_data = &integrator_uart_data,
  66         },
  67         .res            = {
  68                 .start  = INTEGRATOR_UART1_BASE,
  69                 .end    = INTEGRATOR_UART1_BASE + SZ_4K - 1,
  70                 .flags  = IORESOURCE_MEM,
  71         },
  72         .irq            = { IRQ_UARTINT1, NO_IRQ },
  73 };
  74
  75 static struct amba_device kmi0_device = {
  76         .dev            = {
  77                 .init_name = "mb:18",
  78         },
  79         .res            = {
  80                 .start  = KMI0_BASE,
  81                 .end    = KMI0_BASE + SZ_4K - 1,
  82                 .flags  = IORESOURCE_MEM,
  83         },
  84         .irq            = { IRQ_KMIINT0, NO_IRQ },
  85 };
  86
  87 static struct amba_device kmi1_device = {
  88         .dev            = {
  89                 .init_name = "mb:19",
  90         },
  91         .res            = {
  92                 .start  = KMI1_BASE,
  93                 .end    = KMI1_BASE + SZ_4K - 1,
  94                 .flags  = IORESOURCE_MEM,
  95         },
  96         .irq            = { IRQ_KMIINT1, NO_IRQ },
  97 };
  98
  99 static struct amba_device *amba_devs[] __initdata = {
 100         &rtc_device,
 101         &uart0_device,
 102         &uart1_device,
 103         &kmi0_device,
 104         &kmi1_device,
 105 };
 106
 107 /*
 108  * These are fixed clocks.
 109  */
 110 static struct clk clk24mhz = {
 111         .rate   = 24000000,
 112 };
 113
 114 static struct clk uartclk = {
 115         .rate   = 14745600,
 116 };
 117
 118 static struct clk dummy_apb_pclk;
 119
 120 static struct clk_lookup lookups[] = {
 121         {       /* Bus clock */
 122                 .con_id         = "apb_pclk",
 123                 .clk            = &dummy_apb_pclk,
 124         }, {
 125                 /* Integrator/AP timer frequency */
 126                 .dev_id         = "ap_timer",
 127                 .clk            = &clk24mhz,
 128         }, {    /* UART0 */
 129                 .dev_id         = "mb:16",
 130                 .clk            = &uartclk,
 131         }, {    /* UART1 */
 132                 .dev_id         = "mb:17",
 133                 .clk            = &uartclk,
 134         }, {    /* KMI0 */
 135                 .dev_id         = "mb:18",
 136                 .clk            = &clk24mhz,
 137         }, {    /* KMI1 */
 138                 .dev_id         = "mb:19",
 139                 .clk            = &clk24mhz,
 140         }, {    /* MMCI - IntegratorCP */
 141                 .dev_id         = "mb:1c",
 142                 .clk            = &uartclk,
 143         }
 144 };
 145
 146 void __init integrator_init_early(void)
 147 {
 148         clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 149 }
 150
 151 static int __init integrator_init(void)
 152 {
 153         int i;
 154
 155         /*
 156          * The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to
 157          * hard-code them. The Integator/CP and forward have proper cell IDs.
 158          * Else we leave them undefined to the bus driver can autoprobe them.
 159          */
 160         if (machine_is_integrator()) {
 161                 rtc_device.periphid     = 0x00041030;
 162                 uart0_device.periphid   = 0x00041010;
 163                 uart1_device.periphid   = 0x00041010;
 164                 kmi0_device.periphid    = 0x00041050;
 165                 kmi1_device.periphid    = 0x00041050;
 166         }
 167
 168         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
 169                 struct amba_device *d = amba_devs[i];
 170                 amba_device_register(d, &iomem_resource);
 171         }
 172
 173         return 0;
 174 }
 175
 176 arch_initcall(integrator_init);
 177
 178 /*
 179  * On the Integrator platform, the port RTS and DTR are provided by
 180  * bits in the following SC_CTRLS register bits:
 181  *        RTS  DTR
 182  *  UART0  7    6
 183  *  UART1  5    4
 184  */
 185 #define SC_CTRLC        IO_ADDRESS(INTEGRATOR_SC_CTRLC)
 186 #define SC_CTRLS        IO_ADDRESS(INTEGRATOR_SC_CTRLS)
 187
 188 static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
 189 {
 190         unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
 191
 192         if (dev == &uart0_device) {
 193                 rts_mask = 1 << 4;
 194                 dtr_mask = 1 << 5;
 195         } else {
 196                 rts_mask = 1 << 6;
 197                 dtr_mask = 1 << 7;
 198         }
 199
 200         if (mctrl & TIOCM_RTS)
 201                 ctrlc |= rts_mask;
 202         else
 203                 ctrls |= rts_mask;
 204
 205         if (mctrl & TIOCM_DTR)
 206                 ctrlc |= dtr_mask;
 207         else
 208                 ctrls |= dtr_mask;
 209
 210         __raw_writel(ctrls, SC_CTRLS);
 211         __raw_writel(ctrlc, SC_CTRLC);
 212 }
 213
 214 static struct amba_pl010_data integrator_uart_data = {
 215         .set_mctrl = integrator_uart_set_mctrl,
 216 };
 217
 218 #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL)
 219
 220 static DEFINE_RAW_SPINLOCK(cm_lock);
 221
 222 /**
 223  * cm_control - update the CM_CTRL register.
 224  * @mask: bits to change
 225  * @set: bits to set
 226  */
 227 void cm_control(u32 mask, u32 set)
 228 {
 229         unsigned long flags;
 230         u32 val;
 231
 232         raw_spin_lock_irqsave(&cm_lock, flags);
 233         val = readl(CM_CTRL) & ~mask;
 234         writel(val | set, CM_CTRL);
 235         raw_spin_unlock_irqrestore(&cm_lock, flags);
 236 }
 237
 238 EXPORT_SYMBOL(cm_control);
 239
 240 /*
 241  * We need to stop things allocating the low memory; ideally we need a
 242  * better implementation of GFP_DMA which does not assume that DMA-able
 243  * memory starts at zero.
 244  */
 245 void __init integrator_reserve(void)
 246 {
 247         memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
 248 }
 249
 250 /*
 251  * To reset, we hit the on-board reset register in the system FPGA
 252  */
 253 void integrator_restart(char mode, const char *cmd)
 254 {
 255         cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
 256 }