| blob | 9dac00693fafce39f7df2bcf9fc72700711685e1 |
1 /*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
12 /include/ "skeleton.dtsi"
14 / {
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 gpio0 = &pioA;
25 gpio1 = &pioB;
26 gpio2 = &pioC;
27 gpio3 = &pioD;
28 tcb0 = &tcb0;
29 tcb1 = &tcb1;
30 i2c0 = &i2c0;
31 i2c1 = &i2c1;
32 i2c2 = &i2c2;
33 };
34 cpus {
35 cpu@0 {
36 compatible = "arm,arm926ejs";
37 };
38 };
40 memory {
41 reg = <0x20000000 0x10000000>;
42 };
44 ahb {
45 compatible = "simple-bus";
46 #address-cells = <1>;
47 #size-cells = <1>;
48 ranges;
50 apb {
51 compatible = "simple-bus";
52 #address-cells = <1>;
53 #size-cells = <1>;
54 ranges;
56 aic: interrupt-controller@fffff000 {
57 #interrupt-cells = <3>;
58 compatible = "atmel,at91rm9200-aic";
59 interrupt-controller;
60 reg = <0xfffff000 0x200>;
61 atmel,external-irqs = <31>;
62 };
64 ramc0: ramc@ffffe800 {
65 compatible = "atmel,at91sam9g45-ddramc";
66 reg = <0xffffe800 0x200>;
67 };
69 pmc: pmc@fffffc00 {
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
72 };
74 rstc@fffffe00 {
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffe00 0x10>;
77 };
79 shdwc@fffffe10 {
80 compatible = "atmel,at91sam9x5-shdwc";
81 reg = <0xfffffe10 0x10>;
82 };
84 pit: timer@fffffe30 {
85 compatible = "atmel,at91sam9260-pit";
86 reg = <0xfffffe30 0xf>;
87 interrupts = <1 4 7>;
88 };
90 tcb0: timer@f8008000 {
91 compatible = "atmel,at91sam9x5-tcb";
92 reg = <0xf8008000 0x100>;
93 interrupts = <17 4 0>;
94 };
96 tcb1: timer@f800c000 {
97 compatible = "atmel,at91sam9x5-tcb";
98 reg = <0xf800c000 0x100>;
99 interrupts = <17 4 0>;
100 };
102 dma0: dma-controller@ffffec00 {
103 compatible = "atmel,at91sam9g45-dma";
104 reg = <0xffffec00 0x200>;
105 interrupts = <20 4 0>;
106 };
108 dma1: dma-controller@ffffee00 {
109 compatible = "atmel,at91sam9g45-dma";
110 reg = <0xffffee00 0x200>;
111 interrupts = <21 4 0>;
112 };
114 pinctrl@fffff400 {
115 #address-cells = <1>;
116 #size-cells = <1>;
117 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
118 ranges = <0xfffff400 0xfffff400 0x800>;
120 /* shared pinctrl settings */
121 dbgu {
122 pinctrl_dbgu: dbgu-0 {
123 atmel,pins =
124 <0 9 0x1 0x0 /* PA9 periph A */
125 0 10 0x1 0x1>; /* PA10 periph A with pullup */
126 };
127 };
129 usart0 {
130 pinctrl_usart0: usart0-0 {
131 atmel,pins =
132 <0 0 0x1 0x1 /* PA0 periph A with pullup */
133 0 1 0x1 0x0>; /* PA1 periph A */
134 };
136 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
137 atmel,pins =
138 <0 2 0x1 0x0 /* PA2 periph A */
139 0 3 0x1 0x0>; /* PA3 periph A */
140 };
141 };
143 usart1 {
144 pinctrl_usart1: usart1-0 {
145 atmel,pins =
146 <0 5 0x1 0x1 /* PA5 periph A with pullup */
147 0 6 0x1 0x0>; /* PA6 periph A */
148 };
150 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
151 atmel,pins =
152 <3 27 0x3 0x0 /* PC27 periph C */
153 3 28 0x3 0x0>; /* PC28 periph C */
154 };
155 };
157 usart2 {
158 pinctrl_usart2: usart2-0 {
159 atmel,pins =
160 <0 7 0x1 0x1 /* PA7 periph A with pullup */
161 0 8 0x1 0x0>; /* PA8 periph A */
162 };
164 pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
165 atmel,pins =
166 <0 0 0x2 0x0 /* PB0 periph B */
167 0 1 0x2 0x0>; /* PB1 periph B */
168 };
169 };
171 usart3 {
172 pinctrl_uart3: usart3-0 {
173 atmel,pins =
174 <3 23 0x2 0x1 /* PC22 periph B with pullup */
175 3 23 0x2 0x0>; /* PC23 periph B */
176 };
178 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
179 atmel,pins =
180 <3 24 0x2 0x0 /* PC24 periph B */
181 3 25 0x2 0x0>; /* PC25 periph B */
182 };
183 };
185 uart0 {
186 pinctrl_uart0: uart0-0 {
187 atmel,pins =
188 <3 8 0x3 0x0 /* PC8 periph C */
189 3 9 0x3 0x1>; /* PC9 periph C with pullup */
190 };
191 };
193 uart1 {
194 pinctrl_uart1: uart1-0 {
195 atmel,pins =
196 <3 16 0x3 0x0 /* PC16 periph C */
197 3 17 0x3 0x1>; /* PC17 periph C with pullup */
198 };
199 };
201 nand {
202 pinctrl_nand: nand-0 {
203 atmel,pins =
204 <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
205 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
206 };
207 };
209 macb0 {
210 pinctrl_macb0_rmii: macb0_rmii-0 {
211 atmel,pins =
212 <1 0 0x1 0x0 /* PB0 periph A */
213 1 1 0x1 0x0 /* PB1 periph A */
214 1 2 0x1 0x0 /* PB2 periph A */
215 1 3 0x1 0x0 /* PB3 periph A */
216 1 4 0x1 0x0 /* PB4 periph A */
217 1 5 0x1 0x0 /* PB5 periph A */
218 1 6 0x1 0x0 /* PB6 periph A */
219 1 7 0x1 0x0 /* PB7 periph A */
220 1 9 0x1 0x0 /* PB9 periph A */
221 1 10 0x1 0x0>; /* PB10 periph A */
222 };
224 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
225 atmel,pins =
226 <1 8 0x1 0x0 /* PA8 periph A */
227 1 11 0x1 0x0 /* PA11 periph A */
228 1 12 0x1 0x0 /* PA12 periph A */
229 1 13 0x1 0x0 /* PA13 periph A */
230 1 14 0x1 0x0 /* PA14 periph A */
231 1 15 0x1 0x0 /* PA15 periph A */
232 1 16 0x1 0x0 /* PA16 periph A */
233 1 17 0x1 0x0>; /* PA17 periph A */
234 };
235 };
237 pioA: gpio@fffff400 {
238 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
239 reg = <0xfffff400 0x200>;
240 interrupts = <2 4 1>;
241 #gpio-cells = <2>;
242 gpio-controller;
243 interrupt-controller;
244 #interrupt-cells = <2>;
245 };
247 pioB: gpio@fffff600 {
248 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
249 reg = <0xfffff600 0x200>;
250 interrupts = <2 4 1>;
251 #gpio-cells = <2>;
252 gpio-controller;
253 #gpio-lines = <19>;
254 interrupt-controller;
255 #interrupt-cells = <2>;
256 };
258 pioC: gpio@fffff800 {
259 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
260 reg = <0xfffff800 0x200>;
261 interrupts = <3 4 1>;
262 #gpio-cells = <2>;
263 gpio-controller;
264 interrupt-controller;
265 #interrupt-cells = <2>;
266 };
268 pioD: gpio@fffffa00 {
269 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
270 reg = <0xfffffa00 0x200>;
271 interrupts = <3 4 1>;
272 #gpio-cells = <2>;
273 gpio-controller;
274 #gpio-lines = <22>;
275 interrupt-controller;
276 #interrupt-cells = <2>;
277 };
278 };
280 dbgu: serial@fffff200 {
281 compatible = "atmel,at91sam9260-usart";
282 reg = <0xfffff200 0x200>;
283 interrupts = <1 4 7>;
284 pinctrl-names = "default";
285 pinctrl-0 = <&pinctrl_dbgu>;
286 status = "disabled";
287 };
289 usart0: serial@f801c000 {
290 compatible = "atmel,at91sam9260-usart";
291 reg = <0xf801c000 0x200>;
292 interrupts = <5 4 5>;
293 atmel,use-dma-rx;
294 atmel,use-dma-tx;
295 pinctrl-names = "default";
296 pinctrl-0 = <&pinctrl_usart0>;
297 status = "disabled";
298 };
300 usart1: serial@f8020000 {
301 compatible = "atmel,at91sam9260-usart";
302 reg = <0xf8020000 0x200>;
303 interrupts = <6 4 5>;
304 atmel,use-dma-rx;
305 atmel,use-dma-tx;
306 pinctrl-names = "default";
307 pinctrl-0 = <&pinctrl_usart1>;
308 status = "disabled";
309 };
311 usart2: serial@f8024000 {
312 compatible = "atmel,at91sam9260-usart";
313 reg = <0xf8024000 0x200>;
314 interrupts = <7 4 5>;
315 atmel,use-dma-rx;
316 atmel,use-dma-tx;
317 pinctrl-names = "default";
318 pinctrl-0 = <&pinctrl_usart2>;
319 status = "disabled";
320 };
322 macb0: ethernet@f802c000 {
323 compatible = "cdns,at32ap7000-macb", "cdns,macb";
324 reg = <0xf802c000 0x100>;
325 interrupts = <24 4 3>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_macb0_rmii>;
328 status = "disabled";
329 };
331 macb1: ethernet@f8030000 {
332 compatible = "cdns,at32ap7000-macb", "cdns,macb";
333 reg = <0xf8030000 0x100>;
334 interrupts = <27 4 3>;
335 status = "disabled";
336 };
338 i2c0: i2c@f8010000 {
339 compatible = "atmel,at91sam9x5-i2c";
340 reg = <0xf8010000 0x100>;
341 interrupts = <9 4 6>;
342 #address-cells = <1>;
343 #size-cells = <0>;
344 status = "disabled";
345 };
347 i2c1: i2c@f8014000 {
348 compatible = "atmel,at91sam9x5-i2c";
349 reg = <0xf8014000 0x100>;
350 interrupts = <10 4 6>;
351 #address-cells = <1>;
352 #size-cells = <0>;
353 status = "disabled";
354 };
356 i2c2: i2c@f8018000 {
357 compatible = "atmel,at91sam9x5-i2c";
358 reg = <0xf8018000 0x100>;
359 interrupts = <11 4 6>;
360 #address-cells = <1>;
361 #size-cells = <0>;
362 status = "disabled";
363 };
365 adc0: adc@f804c000 {
366 compatible = "atmel,at91sam9260-adc";
367 reg = <0xf804c000 0x100>;
368 interrupts = <19 4 0>;
369 atmel,adc-use-external;
370 atmel,adc-channels-used = <0xffff>;
371 atmel,adc-vref = <3300>;
372 atmel,adc-num-channels = <12>;
373 atmel,adc-startup-time = <40>;
374 atmel,adc-channel-base = <0x50>;
375 atmel,adc-drdy-mask = <0x1000000>;
376 atmel,adc-status-register = <0x30>;
377 atmel,adc-trigger-register = <0xc0>;
379 trigger@0 {
380 trigger-name = "external-rising";
381 trigger-value = <0x1>;
382 trigger-external;
383 };
385 trigger@1 {
386 trigger-name = "external-falling";
387 trigger-value = <0x2>;
388 trigger-external;
389 };
391 trigger@2 {
392 trigger-name = "external-any";
393 trigger-value = <0x3>;
394 trigger-external;
395 };
397 trigger@3 {
398 trigger-name = "continuous";
399 trigger-value = <0x6>;
400 };
401 };
402 };
404 nand0: nand@40000000 {
405 compatible = "atmel,at91rm9200-nand";
406 #address-cells = <1>;
407 #size-cells = <1>;
408 reg = <0x40000000 0x10000000
409 >;
410 atmel,nand-addr-offset = <21>;
411 atmel,nand-cmd-offset = <22>;
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_nand>;
414 gpios = <&pioD 5 0
415 &pioD 4 0
416 0
417 >;
418 status = "disabled";
419 };
421 usb0: ohci@00600000 {
422 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
423 reg = <0x00600000 0x100000>;
424 interrupts = <22 4 2>;
425 status = "disabled";
426 };
428 usb1: ehci@00700000 {
429 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
430 reg = <0x00700000 0x100000>;
431 interrupts = <22 4 2>;
432 status = "disabled";
433 };
434 };
436 i2c@0 {
437 compatible = "i2c-gpio";
438 gpios = <&pioA 30 0 /* sda */
439 &pioA 31 0 /* scl */
440 >;
441 i2c-gpio,sda-open-drain;
442 i2c-gpio,scl-open-drain;
443 i2c-gpio,delay-us = <2>; /* ~100 kHz */
444 #address-cells = <1>;
445 #size-cells = <0>;
446 status = "disabled";
447 };
449 i2c@1 {
450 compatible = "i2c-gpio";
451 gpios = <&pioC 0 0 /* sda */
452 &pioC 1 0 /* scl */
453 >;
454 i2c-gpio,sda-open-drain;
455 i2c-gpio,scl-open-drain;
456 i2c-gpio,delay-us = <2>; /* ~100 kHz */
457 #address-cells = <1>;
458 #size-cells = <0>;
459 status = "disabled";
460 };
462 i2c@2 {
463 compatible = "i2c-gpio";
464 gpios = <&pioB 4 0 /* sda */
465 &pioB 5 0 /* scl */
466 >;
467 i2c-gpio,sda-open-drain;
468 i2c-gpio,scl-open-drain;
469 i2c-gpio,delay-us = <2>; /* ~100 kHz */
470 #address-cells = <1>;
471 #size-cells = <0>;
472 status = "disabled";
473 };
474 };