| blob | 9e8c0be7b5ca14650a79029fa44480d5c391665e |
1 config ARM
2 bool
3 default y
4 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
5 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
6 select ARCH_HAVE_CUSTOM_GPIO_H
7 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
8 select ARCH_WANT_IPC_PARSE_VERSION
9 select BUILDTIME_EXTABLE_SORT if MMU
10 select CPU_PM if (SUSPEND || CPU_IDLE)
11 select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
12 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
13 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
14 select GENERIC_IRQ_PROBE
15 select GENERIC_IRQ_SHOW
16 select GENERIC_PCI_IOMAP
17 select GENERIC_SMP_IDLE_THREAD
18 select GENERIC_STRNCPY_FROM_USER
19 select GENERIC_STRNLEN_USER
20 select HARDIRQS_SW_RESEND
21 select HAVE_AOUT
22 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
23 select HAVE_ARCH_KGDB
24 select HAVE_ARCH_SECCOMP_FILTER
25 select HAVE_ARCH_TRACEHOOK
26 select HAVE_BPF_JIT
27 select HAVE_C_RECORDMCOUNT
28 select HAVE_DEBUG_KMEMLEAK
29 select HAVE_DMA_API_DEBUG
30 select HAVE_DMA_ATTRS
31 select HAVE_DMA_CONTIGUOUS if MMU
32 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
33 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
34 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
35 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
36 select HAVE_GENERIC_DMA_COHERENT
37 select HAVE_GENERIC_HARDIRQS
38 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
39 select HAVE_IDE if PCI || ISA || PCMCIA
40 select HAVE_IRQ_WORK
41 select HAVE_KERNEL_GZIP
42 select HAVE_KERNEL_LZMA
43 select HAVE_KERNEL_LZO
44 select HAVE_KERNEL_XZ
45 select HAVE_KPROBES if !XIP_KERNEL
46 select HAVE_KRETPROBES if (HAVE_KPROBES)
47 select HAVE_MEMBLOCK
48 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
49 select HAVE_PERF_EVENTS
50 select HAVE_REGS_AND_STACK_ACCESS_API
51 select HAVE_SYSCALL_TRACEPOINTS
52 select HAVE_UID16
53 select KTIME_SCALAR
54 select PERF_USE_VMALLOC
55 select RTC_LIB
56 select SYS_SUPPORTS_APM_EMULATION
57 select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
58 select MODULES_USE_ELF_REL
59 select CLONE_BACKWARDS
60 help
61 The ARM series is a line of low-power-consumption RISC chip designs
62 licensed by ARM Ltd and targeted at embedded applications and
63 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
64 manufactured, but legacy ARM-based PC hardware remains popular in
65 Europe. There is an ARM Linux project with a web page at
66 <http://www.arm.linux.org.uk/>.
68 config ARM_HAS_SG_CHAIN
69 bool
71 config NEED_SG_DMA_LENGTH
72 bool
74 config ARM_DMA_USE_IOMMU
75 bool
76 select ARM_HAS_SG_CHAIN
77 select NEED_SG_DMA_LENGTH
79 config HAVE_PWM
80 bool
82 config MIGHT_HAVE_PCI
83 bool
85 config SYS_SUPPORTS_APM_EMULATION
86 bool
88 config GENERIC_GPIO
89 bool
91 config HAVE_TCM
92 bool
93 select GENERIC_ALLOCATOR
95 config HAVE_PROC_CPU
96 bool
98 config NO_IOPORT
99 bool
101 config EISA
102 bool
103 ---help---
104 The Extended Industry Standard Architecture (EISA) bus was
105 developed as an open alternative to the IBM MicroChannel bus.
107 The EISA bus provided some of the features of the IBM MicroChannel
108 bus while maintaining backward compatibility with cards made for
109 the older ISA bus. The EISA bus saw limited use between 1988 and
110 1995 when it was made obsolete by the PCI bus.
112 Say Y here if you are building a kernel for an EISA-based machine.
114 Otherwise, say N.
116 config SBUS
117 bool
119 config STACKTRACE_SUPPORT
120 bool
121 default y
123 config HAVE_LATENCYTOP_SUPPORT
124 bool
125 depends on !SMP
126 default y
128 config LOCKDEP_SUPPORT
129 bool
130 default y
132 config TRACE_IRQFLAGS_SUPPORT
133 bool
134 default y
136 config RWSEM_GENERIC_SPINLOCK
137 bool
138 default y
140 config RWSEM_XCHGADD_ALGORITHM
141 bool
143 config ARCH_HAS_ILOG2_U32
144 bool
146 config ARCH_HAS_ILOG2_U64
147 bool
149 config ARCH_HAS_CPUFREQ
150 bool
151 help
152 Internal node to signify that the ARCH has CPUFREQ support
153 and that the relevant menu configurations are displayed for
154 it.
156 config GENERIC_HWEIGHT
157 bool
158 default y
160 config GENERIC_CALIBRATE_DELAY
161 bool
162 default y
164 config ARCH_MAY_HAVE_PC_FDC
165 bool
167 config ZONE_DMA
168 bool
170 config NEED_DMA_MAP_STATE
171 def_bool y
173 config ARCH_HAS_DMA_SET_COHERENT_MASK
174 bool
176 config GENERIC_ISA_DMA
177 bool
179 config FIQ
180 bool
182 config NEED_RET_TO_USER
183 bool
185 config ARCH_MTD_XIP
186 bool
188 config VECTORS_BASE
189 hex
190 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
191 default DRAM_BASE if REMAP_VECTORS_TO_RAM
192 default 0x00000000
193 help
194 The base address of exception vectors.
196 config ARM_PATCH_PHYS_VIRT
197 bool "Patch physical to virtual translations at runtime" if EMBEDDED
198 default y
199 depends on !XIP_KERNEL && MMU
200 depends on !ARCH_REALVIEW || !SPARSEMEM
201 help
202 Patch phys-to-virt and virt-to-phys translation functions at
203 boot and module load time according to the position of the
204 kernel in system memory.
206 This can only be used with non-XIP MMU kernels where the base
207 of physical memory is at a 16MB boundary.
209 Only disable this option if you know that you do not require
210 this feature (eg, building a kernel for a single machine) and
211 you need to shrink the kernel to the minimal size.
213 config NEED_MACH_GPIO_H
214 bool
215 help
216 Select this when mach/gpio.h is required to provide special
217 definitions for this platform. The need for mach/gpio.h should
218 be avoided when possible.
220 config NEED_MACH_IO_H
221 bool
222 help
223 Select this when mach/io.h is required to provide special
224 definitions for this platform. The need for mach/io.h should
225 be avoided when possible.
227 config NEED_MACH_MEMORY_H
228 bool
229 help
230 Select this when mach/memory.h is required to provide special
231 definitions for this platform. The need for mach/memory.h should
232 be avoided when possible.
234 config PHYS_OFFSET
235 hex "Physical address of main memory" if MMU
236 depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
237 default DRAM_BASE if !MMU
238 help
239 Please provide the physical address corresponding to the
240 location of main memory in your system.
242 config GENERIC_BUG
243 def_bool y
244 depends on BUG
246 source "init/Kconfig"
248 source "kernel/Kconfig.freezer"
250 menu "System Type"
252 config MMU
253 bool "MMU-based Paged Memory Management Support"
254 default y
255 help
256 Select if you want MMU-based virtualised addressing space
257 support by paged memory management. If unsure, say 'Y'.
259 #
260 # The "ARM system type" choice list is ordered alphabetically by option
261 # text. Please add new entries in the option alphabetic order.
262 #
263 choice
264 prompt "ARM system type"
265 default ARCH_MULTIPLATFORM
267 config ARCH_MULTIPLATFORM
268 bool "Allow multiple platforms to be selected"
269 depends on MMU
270 select ARM_PATCH_PHYS_VIRT
271 select AUTO_ZRELADDR
272 select COMMON_CLK
273 select MULTI_IRQ_HANDLER
274 select SPARSE_IRQ
275 select USE_OF
277 config ARCH_INTEGRATOR
278 bool "ARM Ltd. Integrator family"
279 select ARCH_HAS_CPUFREQ
280 select ARM_AMBA
281 select COMMON_CLK
282 select COMMON_CLK_VERSATILE
283 select GENERIC_CLOCKEVENTS
284 select HAVE_TCM
285 select ICST
286 select MULTI_IRQ_HANDLER
287 select NEED_MACH_MEMORY_H
288 select PLAT_VERSATILE
289 select SPARSE_IRQ
290 select VERSATILE_FPGA_IRQ
291 help
292 Support for ARM's Integrator platform.
294 config ARCH_REALVIEW
295 bool "ARM Ltd. RealView family"
296 select ARCH_WANT_OPTIONAL_GPIOLIB
297 select ARM_AMBA
298 select ARM_TIMER_SP804
299 select COMMON_CLK
300 select COMMON_CLK_VERSATILE
301 select GENERIC_CLOCKEVENTS
302 select GPIO_PL061 if GPIOLIB
303 select ICST
304 select NEED_MACH_MEMORY_H
305 select PLAT_VERSATILE
306 select PLAT_VERSATILE_CLCD
307 help
308 This enables support for ARM Ltd RealView boards.
310 config ARCH_VERSATILE
311 bool "ARM Ltd. Versatile family"
312 select ARCH_WANT_OPTIONAL_GPIOLIB
313 select ARM_AMBA
314 select ARM_TIMER_SP804
315 select ARM_VIC
316 select CLKDEV_LOOKUP
317 select GENERIC_CLOCKEVENTS
318 select HAVE_MACH_CLKDEV
319 select ICST
320 select PLAT_VERSATILE
321 select PLAT_VERSATILE_CLCD
322 select PLAT_VERSATILE_CLOCK
323 select VERSATILE_FPGA_IRQ
324 help
325 This enables support for ARM Ltd Versatile board.
327 config ARCH_AT91
328 bool "Atmel AT91"
329 select ARCH_REQUIRE_GPIOLIB
330 select CLKDEV_LOOKUP
331 select HAVE_CLK
332 select IRQ_DOMAIN
333 select NEED_MACH_GPIO_H
334 select NEED_MACH_IO_H if PCCARD
335 select PINCTRL
336 select PINCTRL_AT91 if USE_OF
337 help
338 This enables support for systems based on Atmel
339 AT91RM9200 and AT91SAM9* processors.
341 config ARCH_BCM2835
342 bool "Broadcom BCM2835 family"
343 select ARCH_REQUIRE_GPIOLIB
344 select ARM_AMBA
345 select ARM_ERRATA_411920
346 select ARM_TIMER_SP804
347 select CLKDEV_LOOKUP
348 select COMMON_CLK
349 select CPU_V6
350 select GENERIC_CLOCKEVENTS
351 select GENERIC_GPIO
352 select MULTI_IRQ_HANDLER
353 select PINCTRL
354 select PINCTRL_BCM2835
355 select SPARSE_IRQ
356 select USE_OF
357 help
358 This enables support for the Broadcom BCM2835 SoC. This SoC is
359 use in the Raspberry Pi, and Roku 2 devices.
361 config ARCH_CNS3XXX
362 bool "Cavium Networks CNS3XXX family"
363 select ARM_GIC
364 select CPU_V6K
365 select GENERIC_CLOCKEVENTS
366 select MIGHT_HAVE_CACHE_L2X0
367 select MIGHT_HAVE_PCI
368 select PCI_DOMAINS if PCI
369 help
370 Support for Cavium Networks CNS3XXX platform.
372 config ARCH_CLPS711X
373 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
374 select ARCH_REQUIRE_GPIOLIB
375 select AUTO_ZRELADDR
376 select CLKDEV_LOOKUP
377 select COMMON_CLK
378 select CPU_ARM720T
379 select GENERIC_CLOCKEVENTS
380 select MULTI_IRQ_HANDLER
381 select NEED_MACH_MEMORY_H
382 select SPARSE_IRQ
383 help
384 Support for Cirrus Logic 711x/721x/731x based boards.
386 config ARCH_GEMINI
387 bool "Cortina Systems Gemini"
388 select ARCH_REQUIRE_GPIOLIB
389 select ARCH_USES_GETTIMEOFFSET
390 select CPU_FA526
391 help
392 Support for the Cortina Systems Gemini family SoCs
394 config ARCH_SIRF
395 bool "CSR SiRF"
396 select ARCH_REQUIRE_GPIOLIB
397 select COMMON_CLK
398 select GENERIC_CLOCKEVENTS
399 select GENERIC_IRQ_CHIP
400 select MIGHT_HAVE_CACHE_L2X0
401 select NO_IOPORT
402 select PINCTRL
403 select PINCTRL_SIRF
404 select USE_OF
405 help
406 Support for CSR SiRFprimaII/Marco/Polo platforms
408 config ARCH_EBSA110
409 bool "EBSA-110"
410 select ARCH_USES_GETTIMEOFFSET
411 select CPU_SA110
412 select ISA
413 select NEED_MACH_IO_H
414 select NEED_MACH_MEMORY_H
415 select NO_IOPORT
416 help
417 This is an evaluation board for the StrongARM processor available
418 from Digital. It has limited hardware on-board, including an
419 Ethernet interface, two PCMCIA sockets, two serial ports and a
420 parallel port.
422 config ARCH_EP93XX
423 bool "EP93xx-based"
424 select ARCH_HAS_HOLES_MEMORYMODEL
425 select ARCH_REQUIRE_GPIOLIB
426 select ARCH_USES_GETTIMEOFFSET
427 select ARM_AMBA
428 select ARM_VIC
429 select CLKDEV_LOOKUP
430 select CPU_ARM920T
431 select NEED_MACH_MEMORY_H
432 help
433 This enables support for the Cirrus EP93xx series of CPUs.
435 config ARCH_FOOTBRIDGE
436 bool "FootBridge"
437 select CPU_SA110
438 select FOOTBRIDGE
439 select GENERIC_CLOCKEVENTS
440 select HAVE_IDE
441 select NEED_MACH_IO_H if !MMU
442 select NEED_MACH_MEMORY_H
443 help
444 Support for systems based on the DC21285 companion chip
445 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
447 config ARCH_MXS
448 bool "Freescale MXS-based"
449 select ARCH_REQUIRE_GPIOLIB
450 select CLKDEV_LOOKUP
451 select CLKSRC_MMIO
452 select COMMON_CLK
453 select GENERIC_CLOCKEVENTS
454 select HAVE_CLK_PREPARE
455 select MULTI_IRQ_HANDLER
456 select PINCTRL
457 select SPARSE_IRQ
458 select USE_OF
459 help
460 Support for Freescale MXS-based family of processors
462 config ARCH_NETX
463 bool "Hilscher NetX based"
464 select ARM_VIC
465 select CLKSRC_MMIO
466 select CPU_ARM926T
467 select GENERIC_CLOCKEVENTS
468 help
469 This enables support for systems based on the Hilscher NetX Soc
471 config ARCH_H720X
472 bool "Hynix HMS720x-based"
473 select ARCH_USES_GETTIMEOFFSET
474 select CPU_ARM720T
475 select ISA_DMA_API
476 help
477 This enables support for systems based on the Hynix HMS720x
479 config ARCH_IOP13XX
480 bool "IOP13xx-based"
481 depends on MMU
482 select ARCH_SUPPORTS_MSI
483 select CPU_XSC3
484 select NEED_MACH_MEMORY_H
485 select NEED_RET_TO_USER
486 select PCI
487 select PLAT_IOP
488 select VMSPLIT_1G
489 help
490 Support for Intel's IOP13XX (XScale) family of processors.
492 config ARCH_IOP32X
493 bool "IOP32x-based"
494 depends on MMU
495 select ARCH_REQUIRE_GPIOLIB
496 select CPU_XSCALE
497 select NEED_MACH_GPIO_H
498 select NEED_RET_TO_USER
499 select PCI
500 select PLAT_IOP
501 help
502 Support for Intel's 80219 and IOP32X (XScale) family of
503 processors.
505 config ARCH_IOP33X
506 bool "IOP33x-based"
507 depends on MMU
508 select ARCH_REQUIRE_GPIOLIB
509 select CPU_XSCALE
510 select NEED_MACH_GPIO_H
511 select NEED_RET_TO_USER
512 select PCI
513 select PLAT_IOP
514 help
515 Support for Intel's IOP33X (XScale) family of processors.
517 config ARCH_IXP4XX
518 bool "IXP4xx-based"
519 depends on MMU
520 select ARCH_HAS_DMA_SET_COHERENT_MASK
521 select ARCH_REQUIRE_GPIOLIB
522 select CLKSRC_MMIO
523 select CPU_XSCALE
524 select DMABOUNCE if PCI
525 select GENERIC_CLOCKEVENTS
526 select MIGHT_HAVE_PCI
527 select NEED_MACH_IO_H
528 help
529 Support for Intel's IXP4XX (XScale) family of processors.
531 config ARCH_DOVE
532 bool "Marvell Dove"
533 select ARCH_REQUIRE_GPIOLIB
534 select COMMON_CLK_DOVE
535 select CPU_V7
536 select GENERIC_CLOCKEVENTS
537 select MIGHT_HAVE_PCI
538 select PINCTRL
539 select PINCTRL_DOVE
540 select PLAT_ORION_LEGACY
541 select USB_ARCH_HAS_EHCI
542 help
543 Support for the Marvell Dove SoC 88AP510
545 config ARCH_KIRKWOOD
546 bool "Marvell Kirkwood"
547 select ARCH_REQUIRE_GPIOLIB
548 select CPU_FEROCEON
549 select GENERIC_CLOCKEVENTS
550 select PCI
551 select PCI_QUIRKS
552 select PINCTRL
553 select PINCTRL_KIRKWOOD
554 select PLAT_ORION_LEGACY
555 help
556 Support for the following Marvell Kirkwood series SoCs:
557 88F6180, 88F6192 and 88F6281.
559 config ARCH_MV78XX0
560 bool "Marvell MV78xx0"
561 select ARCH_REQUIRE_GPIOLIB
562 select CPU_FEROCEON
563 select GENERIC_CLOCKEVENTS
564 select PCI
565 select PLAT_ORION_LEGACY
566 help
567 Support for the following Marvell MV78xx0 series SoCs:
568 MV781x0, MV782x0.
570 config ARCH_ORION5X
571 bool "Marvell Orion"
572 depends on MMU
573 select ARCH_REQUIRE_GPIOLIB
574 select CPU_FEROCEON
575 select GENERIC_CLOCKEVENTS
576 select PCI
577 select PLAT_ORION_LEGACY
578 help
579 Support for the following Marvell Orion 5x series SoCs:
580 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
581 Orion-2 (5281), Orion-1-90 (6183).
583 config ARCH_MMP
584 bool "Marvell PXA168/910/MMP2"
585 depends on MMU
586 select ARCH_REQUIRE_GPIOLIB
587 select CLKDEV_LOOKUP
588 select GENERIC_ALLOCATOR
589 select GENERIC_CLOCKEVENTS
590 select GPIO_PXA
591 select IRQ_DOMAIN
592 select NEED_MACH_GPIO_H
593 select PINCTRL
594 select PLAT_PXA
595 select SPARSE_IRQ
596 help
597 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
599 config ARCH_KS8695
600 bool "Micrel/Kendin KS8695"
601 select ARCH_REQUIRE_GPIOLIB
602 select CLKSRC_MMIO
603 select CPU_ARM922T
604 select GENERIC_CLOCKEVENTS
605 select NEED_MACH_MEMORY_H
606 help
607 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
608 System-on-Chip devices.
610 config ARCH_W90X900
611 bool "Nuvoton W90X900 CPU"
612 select ARCH_REQUIRE_GPIOLIB
613 select CLKDEV_LOOKUP
614 select CLKSRC_MMIO
615 select CPU_ARM926T
616 select GENERIC_CLOCKEVENTS
617 help
618 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
619 At present, the w90x900 has been renamed nuc900, regarding
620 the ARM series product line, you can login the following
621 link address to know more.
623 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
624 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
626 config ARCH_LPC32XX
627 bool "NXP LPC32XX"
628 select ARCH_REQUIRE_GPIOLIB
629 select ARM_AMBA
630 select CLKDEV_LOOKUP
631 select CLKSRC_MMIO
632 select CPU_ARM926T
633 select GENERIC_CLOCKEVENTS
634 select HAVE_IDE
635 select HAVE_PWM
636 select USB_ARCH_HAS_OHCI
637 select USE_OF
638 help
639 Support for the NXP LPC32XX family of processors
641 config ARCH_TEGRA
642 bool "NVIDIA Tegra"
643 select ARCH_HAS_CPUFREQ
644 select CLKDEV_LOOKUP
645 select CLKSRC_MMIO
646 select COMMON_CLK
647 select GENERIC_CLOCKEVENTS
648 select GENERIC_GPIO
649 select HAVE_CLK
650 select HAVE_SMP
651 select MIGHT_HAVE_CACHE_L2X0
652 select SPARSE_IRQ
653 select USE_OF
654 help
655 This enables support for NVIDIA Tegra based systems (Tegra APX,
656 Tegra 6xx and Tegra 2 series).
658 config ARCH_PXA
659 bool "PXA2xx/PXA3xx-based"
660 depends on MMU
661 select ARCH_HAS_CPUFREQ
662 select ARCH_MTD_XIP
663 select ARCH_REQUIRE_GPIOLIB
664 select ARM_CPU_SUSPEND if PM
665 select AUTO_ZRELADDR
666 select CLKDEV_LOOKUP
667 select CLKSRC_MMIO
668 select GENERIC_CLOCKEVENTS
669 select GPIO_PXA
670 select HAVE_IDE
671 select MULTI_IRQ_HANDLER
672 select NEED_MACH_GPIO_H
673 select PLAT_PXA
674 select SPARSE_IRQ
675 help
676 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
678 config ARCH_MSM
679 bool "Qualcomm MSM"
680 select ARCH_REQUIRE_GPIOLIB
681 select CLKDEV_LOOKUP
682 select GENERIC_CLOCKEVENTS
683 select HAVE_CLK
684 help
685 Support for Qualcomm MSM/QSD based systems. This runs on the
686 apps processor of the MSM/QSD and depends on a shared memory
687 interface to the modem processor which runs the baseband
688 stack and controls some vital subsystems
689 (clock and power control, etc).
691 config ARCH_SHMOBILE
692 bool "Renesas SH-Mobile / R-Mobile"
693 select CLKDEV_LOOKUP
694 select GENERIC_CLOCKEVENTS
695 select HAVE_CLK
696 select HAVE_MACH_CLKDEV
697 select HAVE_SMP
698 select MIGHT_HAVE_CACHE_L2X0
699 select MULTI_IRQ_HANDLER
700 select NEED_MACH_MEMORY_H
701 select NO_IOPORT
702 select PM_GENERIC_DOMAINS if PM
703 select SPARSE_IRQ
704 help
705 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
707 config ARCH_RPC
708 bool "RiscPC"
709 select ARCH_ACORN
710 select ARCH_MAY_HAVE_PC_FDC
711 select ARCH_SPARSEMEM_ENABLE
712 select ARCH_USES_GETTIMEOFFSET
713 select FIQ
714 select HAVE_IDE
715 select HAVE_PATA_PLATFORM
716 select ISA_DMA_API
717 select NEED_MACH_IO_H
718 select NEED_MACH_MEMORY_H
719 select NO_IOPORT
720 help
721 On the Acorn Risc-PC, Linux can support the internal IDE disk and
722 CD-ROM interface, serial and parallel port, and the floppy drive.
724 config ARCH_SA1100
725 bool "SA1100-based"
726 select ARCH_HAS_CPUFREQ
727 select ARCH_MTD_XIP
728 select ARCH_REQUIRE_GPIOLIB
729 select ARCH_SPARSEMEM_ENABLE
730 select CLKDEV_LOOKUP
731 select CLKSRC_MMIO
732 select CPU_FREQ
733 select CPU_SA1100
734 select GENERIC_CLOCKEVENTS
735 select HAVE_IDE
736 select ISA
737 select NEED_MACH_GPIO_H
738 select NEED_MACH_MEMORY_H
739 select SPARSE_IRQ
740 help
741 Support for StrongARM 11x0 based boards.
743 config ARCH_S3C24XX
744 bool "Samsung S3C24XX SoCs"
745 select ARCH_HAS_CPUFREQ
746 select ARCH_USES_GETTIMEOFFSET
747 select CLKDEV_LOOKUP
748 select GENERIC_GPIO
749 select HAVE_CLK
750 select HAVE_S3C2410_I2C if I2C
751 select HAVE_S3C2410_WATCHDOG if WATCHDOG
752 select HAVE_S3C_RTC if RTC_CLASS
753 select NEED_MACH_GPIO_H
754 select NEED_MACH_IO_H
755 help
756 Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
757 and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
758 (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
759 Samsung SMDK2410 development board (and derivatives).
761 config ARCH_S3C64XX
762 bool "Samsung S3C64XX"
763 select ARCH_HAS_CPUFREQ
764 select ARCH_REQUIRE_GPIOLIB
765 select ARCH_USES_GETTIMEOFFSET
766 select ARM_VIC
767 select CLKDEV_LOOKUP
768 select CPU_V6
769 select HAVE_CLK
770 select HAVE_S3C2410_I2C if I2C
771 select HAVE_S3C2410_WATCHDOG if WATCHDOG
772 select HAVE_TCM
773 select NEED_MACH_GPIO_H
774 select NO_IOPORT
775 select PLAT_SAMSUNG
776 select S3C_DEV_NAND
777 select S3C_GPIO_TRACK
778 select SAMSUNG_CLKSRC
779 select SAMSUNG_GPIOLIB_4BIT
780 select SAMSUNG_IRQ_VIC_TIMER
781 select USB_ARCH_HAS_OHCI
782 help
783 Samsung S3C64XX series based systems
785 config ARCH_S5P64X0
786 bool "Samsung S5P6440 S5P6450"
787 select CLKDEV_LOOKUP
788 select CLKSRC_MMIO
789 select CPU_V6
790 select GENERIC_CLOCKEVENTS
791 select GENERIC_GPIO
792 select HAVE_CLK
793 select HAVE_S3C2410_I2C if I2C
794 select HAVE_S3C2410_WATCHDOG if WATCHDOG
795 select HAVE_S3C_RTC if RTC_CLASS
796 select NEED_MACH_GPIO_H
797 help
798 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
799 SMDK6450.
801 config ARCH_S5PC100
802 bool "Samsung S5PC100"
803 select ARCH_USES_GETTIMEOFFSET
804 select CLKDEV_LOOKUP
805 select CPU_V7
806 select GENERIC_GPIO
807 select HAVE_CLK
808 select HAVE_S3C2410_I2C if I2C
809 select HAVE_S3C2410_WATCHDOG if WATCHDOG
810 select HAVE_S3C_RTC if RTC_CLASS
811 select NEED_MACH_GPIO_H
812 help
813 Samsung S5PC100 series based systems
815 config ARCH_S5PV210
816 bool "Samsung S5PV210/S5PC110"
817 select ARCH_HAS_CPUFREQ
818 select ARCH_HAS_HOLES_MEMORYMODEL
819 select ARCH_SPARSEMEM_ENABLE
820 select CLKDEV_LOOKUP
821 select CLKSRC_MMIO
822 select CPU_V7
823 select GENERIC_CLOCKEVENTS
824 select GENERIC_GPIO
825 select HAVE_CLK
826 select HAVE_S3C2410_I2C if I2C
827 select HAVE_S3C2410_WATCHDOG if WATCHDOG
828 select HAVE_S3C_RTC if RTC_CLASS
829 select NEED_MACH_GPIO_H
830 select NEED_MACH_MEMORY_H
831 help
832 Samsung S5PV210/S5PC110 series based systems
834 config ARCH_EXYNOS
835 bool "Samsung EXYNOS"
836 select ARCH_HAS_CPUFREQ
837 select ARCH_HAS_HOLES_MEMORYMODEL
838 select ARCH_SPARSEMEM_ENABLE
839 select CLKDEV_LOOKUP
840 select CPU_V7
841 select GENERIC_CLOCKEVENTS
842 select GENERIC_GPIO
843 select HAVE_CLK
844 select HAVE_S3C2410_I2C if I2C
845 select HAVE_S3C2410_WATCHDOG if WATCHDOG
846 select HAVE_S3C_RTC if RTC_CLASS
847 select NEED_MACH_GPIO_H
848 select NEED_MACH_MEMORY_H
849 help
850 Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
852 config ARCH_SHARK
853 bool "Shark"
854 select ARCH_USES_GETTIMEOFFSET
855 select CPU_SA110
856 select ISA
857 select ISA_DMA
858 select NEED_MACH_MEMORY_H
859 select PCI
860 select ZONE_DMA
861 help
862 Support for the StrongARM based Digital DNARD machine, also known
863 as "Shark" (<http://www.shark-linux.de/shark.html>).
865 config ARCH_U300
866 bool "ST-Ericsson U300 Series"
867 depends on MMU
868 select ARCH_REQUIRE_GPIOLIB
869 select ARM_AMBA
870 select ARM_PATCH_PHYS_VIRT
871 select ARM_VIC
872 select CLKDEV_LOOKUP
873 select CLKSRC_MMIO
874 select COMMON_CLK
875 select CPU_ARM926T
876 select GENERIC_CLOCKEVENTS
877 select GENERIC_GPIO
878 select HAVE_TCM
879 select SPARSE_IRQ
880 help
881 Support for ST-Ericsson U300 series mobile platforms.
883 config ARCH_U8500
884 bool "ST-Ericsson U8500 Series"
885 depends on MMU
886 select ARCH_HAS_CPUFREQ
887 select ARCH_REQUIRE_GPIOLIB
888 select ARM_AMBA
889 select CLKDEV_LOOKUP
890 select CPU_V7
891 select GENERIC_CLOCKEVENTS
892 select HAVE_SMP
893 select MIGHT_HAVE_CACHE_L2X0
894 select SPARSE_IRQ
895 help
896 Support for ST-Ericsson's Ux500 architecture
898 config ARCH_NOMADIK
899 bool "STMicroelectronics Nomadik"
900 select ARCH_REQUIRE_GPIOLIB
901 select ARM_AMBA
902 select ARM_VIC
903 select COMMON_CLK
904 select CPU_ARM926T
905 select GENERIC_CLOCKEVENTS
906 select MIGHT_HAVE_CACHE_L2X0
907 select PINCTRL
908 select PINCTRL_STN8815
909 select SPARSE_IRQ
910 help
911 Support for the Nomadik platform by ST-Ericsson
913 config PLAT_SPEAR
914 bool "ST SPEAr"
915 select ARCH_HAS_CPUFREQ
916 select ARCH_REQUIRE_GPIOLIB
917 select ARM_AMBA
918 select CLKDEV_LOOKUP
919 select CLKSRC_MMIO
920 select COMMON_CLK
921 select GENERIC_CLOCKEVENTS
922 select HAVE_CLK
923 help
924 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
926 config ARCH_DAVINCI
927 bool "TI DaVinci"
928 select ARCH_HAS_HOLES_MEMORYMODEL
929 select ARCH_REQUIRE_GPIOLIB
930 select CLKDEV_LOOKUP
931 select GENERIC_ALLOCATOR
932 select GENERIC_CLOCKEVENTS
933 select GENERIC_IRQ_CHIP
934 select HAVE_IDE
935 select NEED_MACH_GPIO_H
936 select USE_OF
937 select ZONE_DMA
938 help
939 Support for TI's DaVinci platform.
941 config ARCH_OMAP
942 bool "TI OMAP"
943 depends on MMU
944 select ARCH_HAS_CPUFREQ
945 select ARCH_HAS_HOLES_MEMORYMODEL
946 select ARCH_REQUIRE_GPIOLIB
947 select CLKSRC_MMIO
948 select GENERIC_CLOCKEVENTS
949 select HAVE_CLK
950 help
951 Support for TI's OMAP platform (OMAP1/2/3/4).
953 config ARCH_VT8500_SINGLE
954 bool "VIA/WonderMedia 85xx"
955 select ARCH_HAS_CPUFREQ
956 select ARCH_REQUIRE_GPIOLIB
957 select CLKDEV_LOOKUP
958 select COMMON_CLK
959 select CPU_ARM926T
960 select GENERIC_CLOCKEVENTS
961 select GENERIC_GPIO
962 select HAVE_CLK
963 select MULTI_IRQ_HANDLER
964 select SPARSE_IRQ
965 select USE_OF
966 help
967 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
969 endchoice
971 menu "Multiple platform selection"
972 depends on ARCH_MULTIPLATFORM
974 comment "CPU Core family selection"
976 config ARCH_MULTI_V4
977 bool "ARMv4 based platforms (FA526, StrongARM)"
978 depends on !ARCH_MULTI_V6_V7
979 select ARCH_MULTI_V4_V5
981 config ARCH_MULTI_V4T
982 bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
983 depends on !ARCH_MULTI_V6_V7
984 select ARCH_MULTI_V4_V5
986 config ARCH_MULTI_V5
987 bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
988 depends on !ARCH_MULTI_V6_V7
989 select ARCH_MULTI_V4_V5
991 config ARCH_MULTI_V4_V5
992 bool
994 config ARCH_MULTI_V6
995 bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
996 select ARCH_MULTI_V6_V7
997 select CPU_V6
999 config ARCH_MULTI_V7
1000 bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
1001 default y
1002 select ARCH_MULTI_V6_V7
1003 select ARCH_VEXPRESS
1004 select CPU_V7
1006 config ARCH_MULTI_V6_V7
1007 bool
1009 config ARCH_MULTI_CPU_AUTO
1010 def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
1011 select ARCH_MULTI_V5
1013 endmenu
1015 #
1016 # This is sorted alphabetically by mach-* pathname. However, plat-*
1017 # Kconfigs may be included either alphabetically (according to the
1018 # plat- suffix) or along side the corresponding mach-* source.
1019 #
1020 source "arch/arm/mach-mvebu/Kconfig"
1022 source "arch/arm/mach-at91/Kconfig"
1024 source "arch/arm/mach-bcm/Kconfig"
1026 source "arch/arm/mach-clps711x/Kconfig"
1028 source "arch/arm/mach-cns3xxx/Kconfig"
1030 source "arch/arm/mach-davinci/Kconfig"
1032 source "arch/arm/mach-dove/Kconfig"
1034 source "arch/arm/mach-ep93xx/Kconfig"
1036 source "arch/arm/mach-footbridge/Kconfig"
1038 source "arch/arm/mach-gemini/Kconfig"
1040 source "arch/arm/mach-h720x/Kconfig"
1042 source "arch/arm/mach-highbank/Kconfig"
1044 source "arch/arm/mach-integrator/Kconfig"
1046 source "arch/arm/mach-iop32x/Kconfig"
1048 source "arch/arm/mach-iop33x/Kconfig"
1050 source "arch/arm/mach-iop13xx/Kconfig"
1052 source "arch/arm/mach-ixp4xx/Kconfig"
1054 source "arch/arm/mach-kirkwood/Kconfig"
1056 source "arch/arm/mach-ks8695/Kconfig"
1058 source "arch/arm/mach-msm/Kconfig"
1060 source "arch/arm/mach-mv78xx0/Kconfig"
1062 source "arch/arm/mach-imx/Kconfig"
1064 source "arch/arm/mach-mxs/Kconfig"
1066 source "arch/arm/mach-netx/Kconfig"
1068 source "arch/arm/mach-nomadik/Kconfig"
1070 source "arch/arm/plat-omap/Kconfig"
1072 source "arch/arm/mach-omap1/Kconfig"
1074 source "arch/arm/mach-omap2/Kconfig"
1076 source "arch/arm/mach-orion5x/Kconfig"
1078 source "arch/arm/mach-picoxcell/Kconfig"
1080 source "arch/arm/mach-pxa/Kconfig"
1081 source "arch/arm/plat-pxa/Kconfig"
1083 source "arch/arm/mach-mmp/Kconfig"
1085 source "arch/arm/mach-realview/Kconfig"
1087 source "arch/arm/mach-sa1100/Kconfig"
1089 source "arch/arm/plat-samsung/Kconfig"
1090 source "arch/arm/plat-s3c24xx/Kconfig"
1092 source "arch/arm/mach-socfpga/Kconfig"
1094 source "arch/arm/plat-spear/Kconfig"
1096 source "arch/arm/mach-s3c24xx/Kconfig"
1097 if ARCH_S3C24XX
1098 source "arch/arm/mach-s3c2412/Kconfig"
1099 source "arch/arm/mach-s3c2440/Kconfig"
1100 endif
1102 if ARCH_S3C64XX
1103 source "arch/arm/mach-s3c64xx/Kconfig"
1104 endif
1106 source "arch/arm/mach-s5p64x0/Kconfig"
1108 source "arch/arm/mach-s5pc100/Kconfig"
1110 source "arch/arm/mach-s5pv210/Kconfig"
1112 source "arch/arm/mach-exynos/Kconfig"
1114 source "arch/arm/mach-shmobile/Kconfig"
1116 source "arch/arm/mach-sunxi/Kconfig"
1118 source "arch/arm/mach-prima2/Kconfig"
1120 source "arch/arm/mach-tegra/Kconfig"
1122 source "arch/arm/mach-u300/Kconfig"
1124 source "arch/arm/mach-ux500/Kconfig"
1126 source "arch/arm/mach-versatile/Kconfig"
1128 source "arch/arm/mach-vexpress/Kconfig"
1129 source "arch/arm/plat-versatile/Kconfig"
1131 source "arch/arm/mach-vt8500/Kconfig"
1133 source "arch/arm/mach-w90x900/Kconfig"
1135 source "arch/arm/mach-zynq/Kconfig"
1137 # Definitions to make life easier
1138 config ARCH_ACORN
1139 bool
1141 config PLAT_IOP
1142 bool
1143 select GENERIC_CLOCKEVENTS
1145 config PLAT_ORION
1146 bool
1147 select CLKSRC_MMIO
1148 select COMMON_CLK
1149 select GENERIC_IRQ_CHIP
1150 select IRQ_DOMAIN
1152 config PLAT_ORION_LEGACY
1153 bool
1154 select PLAT_ORION
1156 config PLAT_PXA
1157 bool
1159 config PLAT_VERSATILE
1160 bool
1162 config ARM_TIMER_SP804
1163 bool
1164 select CLKSRC_MMIO
1165 select HAVE_SCHED_CLOCK
1167 source arch/arm/mm/Kconfig
1169 config ARM_NR_BANKS
1170 int
1171 default 16 if ARCH_EP93XX
1172 default 8
1174 config IWMMXT
1175 bool "Enable iWMMXt support"
1176 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1177 default y if PXA27x || PXA3xx || ARCH_MMP
1178 help
1179 Enable support for iWMMXt context switching at run time if
1180 running on a CPU that supports it.
1182 config XSCALE_PMU
1183 bool
1184 depends on CPU_XSCALE
1185 default y
1187 config MULTI_IRQ_HANDLER
1188 bool
1189 help
1190 Allow each machine to specify it's own IRQ handler at run time.
1192 if !MMU
1193 source "arch/arm/Kconfig-nommu"
1194 endif
1196 config ARM_ERRATA_326103
1197 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1198 depends on CPU_V6
1199 help
1200 Executing a SWP instruction to read-only memory does not set bit 11
1201 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1202 treat the access as a read, preventing a COW from occurring and
1203 causing the faulting task to livelock.
1205 config ARM_ERRATA_411920
1206 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1207 depends on CPU_V6 || CPU_V6K
1208 help
1209 Invalidation of the Instruction Cache operation can
1210 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1211 It does not affect the MPCore. This option enables the ARM Ltd.
1212 recommended workaround.
1214 config ARM_ERRATA_430973
1215 bool "ARM errata: Stale prediction on replaced interworking branch"
1216 depends on CPU_V7
1217 help
1218 This option enables the workaround for the 430973 Cortex-A8
1219 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1220 interworking branch is replaced with another code sequence at the
1221 same virtual address, whether due to self-modifying code or virtual
1222 to physical address re-mapping, Cortex-A8 does not recover from the
1223 stale interworking branch prediction. This results in Cortex-A8
1224 executing the new code sequence in the incorrect ARM or Thumb state.
1225 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1226 and also flushes the branch target cache at every context switch.
1227 Note that setting specific bits in the ACTLR register may not be
1228 available in non-secure mode.
1230 config ARM_ERRATA_458693
1231 bool "ARM errata: Processor deadlock when a false hazard is created"
1232 depends on CPU_V7
1233 depends on !ARCH_MULTIPLATFORM
1234 help
1235 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1236 erratum. For very specific sequences of memory operations, it is
1237 possible for a hazard condition intended for a cache line to instead
1238 be incorrectly associated with a different cache line. This false
1239 hazard might then cause a processor deadlock. The workaround enables
1240 the L1 caching of the NEON accesses and disables the PLD instruction
1241 in the ACTLR register. Note that setting specific bits in the ACTLR
1242 register may not be available in non-secure mode.
1244 config ARM_ERRATA_460075
1245 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1246 depends on CPU_V7
1247 depends on !ARCH_MULTIPLATFORM
1248 help
1249 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1250 erratum. Any asynchronous access to the L2 cache may encounter a
1251 situation in which recent store transactions to the L2 cache are lost
1252 and overwritten with stale memory contents from external memory. The
1253 workaround disables the write-allocate mode for the L2 cache via the
1254 ACTLR register. Note that setting specific bits in the ACTLR register
1255 may not be available in non-secure mode.
1257 config ARM_ERRATA_742230
1258 bool "ARM errata: DMB operation may be faulty"
1259 depends on CPU_V7 && SMP
1260 depends on !ARCH_MULTIPLATFORM
1261 help
1262 This option enables the workaround for the 742230 Cortex-A9
1263 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1264 between two write operations may not ensure the correct visibility
1265 ordering of the two writes. This workaround sets a specific bit in
1266 the diagnostic register of the Cortex-A9 which causes the DMB
1267 instruction to behave as a DSB, ensuring the correct behaviour of
1268 the two writes.
1270 config ARM_ERRATA_742231
1271 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1272 depends on CPU_V7 && SMP
1273 depends on !ARCH_MULTIPLATFORM
1274 help
1275 This option enables the workaround for the 742231 Cortex-A9
1276 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1277 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1278 accessing some data located in the same cache line, may get corrupted
1279 data due to bad handling of the address hazard when the line gets
1280 replaced from one of the CPUs at the same time as another CPU is
1281 accessing it. This workaround sets specific bits in the diagnostic
1282 register of the Cortex-A9 which reduces the linefill issuing
1283 capabilities of the processor.
1285 config PL310_ERRATA_588369
1286 bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1287 depends on CACHE_L2X0
1288 help
1289 The PL310 L2 cache controller implements three types of Clean &
1290 Invalidate maintenance operations: by Physical Address
1291 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1292 They are architecturally defined to behave as the execution of a
1293 clean operation followed immediately by an invalidate operation,
1294 both performing to the same memory location. This functionality
1295 is not correctly implemented in PL310 as clean lines are not
1296 invalidated as a result of these operations.
1298 config ARM_ERRATA_720789
1299 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1300 depends on CPU_V7
1301 help
1302 This option enables the workaround for the 720789 Cortex-A9 (prior to
1303 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1304 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1305 As a consequence of this erratum, some TLB entries which should be
1306 invalidated are not, resulting in an incoherency in the system page
1307 tables. The workaround changes the TLB flushing routines to invalidate
1308 entries regardless of the ASID.
1310 config PL310_ERRATA_727915
1311 bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1312 depends on CACHE_L2X0
1313 help
1314 PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1315 operation (offset 0x7FC). This operation runs in background so that
1316 PL310 can handle normal accesses while it is in progress. Under very
1317 rare circumstances, due to this erratum, write data can be lost when
1318 PL310 treats a cacheable write transaction during a Clean &
1319 Invalidate by Way operation.
1321 config ARM_ERRATA_743622
1322 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1323 depends on CPU_V7
1324 depends on !ARCH_MULTIPLATFORM
1325 help
1326 This option enables the workaround for the 743622 Cortex-A9
1327 (r2p*) erratum. Under very rare conditions, a faulty
1328 optimisation in the Cortex-A9 Store Buffer may lead to data
1329 corruption. This workaround sets a specific bit in the diagnostic
1330 register of the Cortex-A9 which disables the Store Buffer
1331 optimisation, preventing the defect from occurring. This has no
1332 visible impact on the overall performance or power consumption of the
1333 processor.
1335 config ARM_ERRATA_751472
1336 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1337 depends on CPU_V7
1338 depends on !ARCH_MULTIPLATFORM
1339 help
1340 This option enables the workaround for the 751472 Cortex-A9 (prior
1341 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1342 completion of a following broadcasted operation if the second
1343 operation is received by a CPU before the ICIALLUIS has completed,
1344 potentially leading to corrupted entries in the cache or TLB.
1346 config PL310_ERRATA_753970
1347 bool "PL310 errata: cache sync operation may be faulty"
1348 depends on CACHE_PL310
1349 help
1350 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1352 Under some condition the effect of cache sync operation on
1353 the store buffer still remains when the operation completes.
1354 This means that the store buffer is always asked to drain and
1355 this prevents it from merging any further writes. The workaround
1356 is to replace the normal offset of cache sync operation (0x730)
1357 by another offset targeting an unmapped PL310 register 0x740.
1358 This has the same effect as the cache sync operation: store buffer
1359 drain and waiting for all buffers empty.
1361 config ARM_ERRATA_754322
1362 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1363 depends on CPU_V7
1364 help
1365 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1366 r3p*) erratum. A speculative memory access may cause a page table walk
1367 which starts prior to an ASID switch but completes afterwards. This
1368 can populate the micro-TLB with a stale entry which may be hit with
1369 the new ASID. This workaround places two dsb instructions in the mm
1370 switching code so that no page table walks can cross the ASID switch.
1372 config ARM_ERRATA_754327
1373 bool "ARM errata: no automatic Store Buffer drain"
1374 depends on CPU_V7 && SMP
1375 help
1376 This option enables the workaround for the 754327 Cortex-A9 (prior to
1377 r2p0) erratum. The Store Buffer does not have any automatic draining
1378 mechanism and therefore a livelock may occur if an external agent
1379 continuously polls a memory location waiting to observe an update.
1380 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1381 written polling loops from denying visibility of updates to memory.
1383 config ARM_ERRATA_364296
1384 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1385 depends on CPU_V6 && !SMP
1386 help
1387 This options enables the workaround for the 364296 ARM1136
1388 r0p2 erratum (possible cache data corruption with
1389 hit-under-miss enabled). It sets the undocumented bit 31 in
1390 the auxiliary control register and the FI bit in the control
1391 register, thus disabling hit-under-miss without putting the
1392 processor into full low interrupt latency mode. ARM11MPCore
1393 is not affected.
1395 config ARM_ERRATA_764369
1396 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1397 depends on CPU_V7 && SMP
1398 help
1399 This option enables the workaround for erratum 764369
1400 affecting Cortex-A9 MPCore with two or more processors (all
1401 current revisions). Under certain timing circumstances, a data
1402 cache line maintenance operation by MVA targeting an Inner
1403 Shareable memory region may fail to proceed up to either the
1404 Point of Coherency or to the Point of Unification of the
1405 system. This workaround adds a DSB instruction before the
1406 relevant cache maintenance functions and sets a specific bit
1407 in the diagnostic control register of the SCU.
1409 config PL310_ERRATA_769419
1410 bool "PL310 errata: no automatic Store Buffer drain"
1411 depends on CACHE_L2X0
1412 help
1413 On revisions of the PL310 prior to r3p2, the Store Buffer does
1414 not automatically drain. This can cause normal, non-cacheable
1415 writes to be retained when the memory system is idle, leading
1416 to suboptimal I/O performance for drivers using coherent DMA.
1417 This option adds a write barrier to the cpu_idle loop so that,
1418 on systems with an outer cache, the store buffer is drained
1419 explicitly.
1421 config ARM_ERRATA_775420
1422 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1423 depends on CPU_V7
1424 help
1425 This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1426 r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1427 operation aborts with MMU exception, it might cause the processor
1428 to deadlock. This workaround puts DSB before executing ISB if
1429 an abort may occur on cache maintenance.
1431 endmenu
1433 source "arch/arm/common/Kconfig"
1435 menu "Bus support"
1437 config ARM_AMBA
1438 bool
1440 config ISA
1441 bool
1442 help
1443 Find out whether you have ISA slots on your motherboard. ISA is the
1444 name of a bus system, i.e. the way the CPU talks to the other stuff
1445 inside your box. Other bus systems are PCI, EISA, MicroChannel
1446 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1447 newer boards don't support it. If you have ISA, say Y, otherwise N.
1449 # Select ISA DMA controller support
1450 config ISA_DMA
1451 bool
1452 select ISA_DMA_API
1454 # Select ISA DMA interface
1455 config ISA_DMA_API
1456 bool
1458 config PCI
1459 bool "PCI support" if MIGHT_HAVE_PCI
1460 help
1461 Find out whether you have a PCI motherboard. PCI is the name of a
1462 bus system, i.e. the way the CPU talks to the other stuff inside
1463 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1464 VESA. If you have PCI, say Y, otherwise N.
1466 config PCI_DOMAINS
1467 bool
1468 depends on PCI
1470 config PCI_NANOENGINE
1471 bool "BSE nanoEngine PCI support"
1472 depends on SA1100_NANOENGINE
1473 help
1474 Enable PCI on the BSE nanoEngine board.
1476 config PCI_SYSCALL
1477 def_bool PCI
1479 # Select the host bridge type
1480 config PCI_HOST_VIA82C505
1481 bool
1482 depends on PCI && ARCH_SHARK
1483 default y
1485 config PCI_HOST_ITE8152
1486 bool
1487 depends on PCI && MACH_ARMCORE
1488 default y
1489 select DMABOUNCE
1491 source "drivers/pci/Kconfig"
1493 source "drivers/pcmcia/Kconfig"
1495 endmenu
1497 menu "Kernel Features"
1499 config HAVE_SMP
1500 bool
1501 help
1502 This option should be selected by machines which have an SMP-
1503 capable CPU.
1505 The only effect of this option is to make the SMP-related
1506 options available to the user for configuration.
1508 config SMP
1509 bool "Symmetric Multi-Processing"
1510 depends on CPU_V6K || CPU_V7
1511 depends on GENERIC_CLOCKEVENTS
1512 depends on HAVE_SMP
1513 depends on MMU
1514 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1515 select USE_GENERIC_SMP_HELPERS
1516 help
1517 This enables support for systems with more than one CPU. If you have
1518 a system with only one CPU, like most personal computers, say N. If
1519 you have a system with more than one CPU, say Y.
1521 If you say N here, the kernel will run on single and multiprocessor
1522 machines, but will use only one CPU of a multiprocessor machine. If
1523 you say Y here, the kernel will run on many, but not all, single
1524 processor machines. On a single processor machine, the kernel will
1525 run faster if you say N here.
1527 See also <file:Documentation/x86/i386/IO-APIC.txt>,
1528 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1529 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1531 If you don't know what to do here, say N.
1533 config SMP_ON_UP
1534 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1535 depends on EXPERIMENTAL
1536 depends on SMP && !XIP_KERNEL
1537 default y
1538 help
1539 SMP kernels contain instructions which fail on non-SMP processors.
1540 Enabling this option allows the kernel to modify itself to make
1541 these instructions safe. Disabling it allows about 1K of space
1542 savings.
1544 If you don't know what to do here, say Y.
1546 config ARM_CPU_TOPOLOGY
1547 bool "Support cpu topology definition"
1548 depends on SMP && CPU_V7
1549 default y
1550 help
1551 Support ARM cpu topology definition. The MPIDR register defines
1552 affinity between processors which is then used to describe the cpu
1553 topology of an ARM System.
1555 config SCHED_MC
1556 bool "Multi-core scheduler support"
1557 depends on ARM_CPU_TOPOLOGY
1558 help
1559 Multi-core scheduler support improves the CPU scheduler's decision
1560 making when dealing with multi-core CPU chips at a cost of slightly
1561 increased overhead in some places. If unsure say N here.
1563 config SCHED_SMT
1564 bool "SMT scheduler support"
1565 depends on ARM_CPU_TOPOLOGY
1566 help
1567 Improves the CPU scheduler's decision making when dealing with
1568 MultiThreading at a cost of slightly increased overhead in some
1569 places. If unsure say N here.
1571 config HAVE_ARM_SCU
1572 bool
1573 help
1574 This option enables support for the ARM system coherency unit
1576 config HAVE_ARM_ARCH_TIMER
1577 bool "Architected timer support"
1578 depends on CPU_V7
1579 select ARM_ARCH_TIMER
1580 help
1581 This option enables support for the ARM architected timer
1583 config HAVE_ARM_TWD
1584 bool
1585 depends on SMP
1586 help
1587 This options enables support for the ARM timer and watchdog unit
1589 choice
1590 prompt "Memory split"
1591 default VMSPLIT_3G
1592 help
1593 Select the desired split between kernel and user memory.
1595 If you are not absolutely sure what you are doing, leave this
1596 option alone!
1598 config VMSPLIT_3G
1599 bool "3G/1G user/kernel split"
1600 config VMSPLIT_2G
1601 bool "2G/2G user/kernel split"
1602 config VMSPLIT_1G
1603 bool "1G/3G user/kernel split"
1604 endchoice
1606 config PAGE_OFFSET
1607 hex
1608 default 0x40000000 if VMSPLIT_1G
1609 default 0x80000000 if VMSPLIT_2G
1610 default 0xC0000000
1612 config NR_CPUS
1613 int "Maximum number of CPUs (2-32)"
1614 range 2 32
1615 depends on SMP
1616 default "4"
1618 config HOTPLUG_CPU
1619 bool "Support for hot-pluggable CPUs"
1620 depends on SMP && HOTPLUG
1621 help
1622 Say Y here to experiment with turning CPUs off and on. CPUs
1623 can be controlled through /sys/devices/system/cpu.
1625 config LOCAL_TIMERS
1626 bool "Use local timer interrupts"
1627 depends on SMP
1628 default y
1629 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1630 help
1631 Enable support for local timers on SMP platforms, rather then the
1632 legacy IPI broadcast method. Local timers allows the system
1633 accounting to be spread across the timer interval, preventing a
1634 "thundering herd" at every timer tick.
1636 config ARCH_NR_GPIO
1637 int
1638 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1639 default 355 if ARCH_U8500
1640 default 264 if MACH_H4700
1641 default 512 if SOC_OMAP5
1642 default 288 if ARCH_VT8500
1643 default 0
1644 help
1645 Maximum number of GPIOs in the system.
1647 If unsure, leave the default value.
1649 source kernel/Kconfig.preempt
1651 config HZ
1652 int
1653 default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1654 ARCH_S5PV210 || ARCH_EXYNOS4
1655 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1656 default AT91_TIMER_HZ if ARCH_AT91
1657 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1658 default 100
1660 config THUMB2_KERNEL
1661 bool "Compile the kernel in Thumb-2 mode"
1662 depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1663 select AEABI
1664 select ARM_ASM_UNIFIED
1665 select ARM_UNWIND
1666 help
1667 By enabling this option, the kernel will be compiled in
1668 Thumb-2 mode. A compiler/assembler that understand the unified
1669 ARM-Thumb syntax is needed.
1671 If unsure, say N.
1673 config THUMB2_AVOID_R_ARM_THM_JUMP11
1674 bool "Work around buggy Thumb-2 short branch relocations in gas"
1675 depends on THUMB2_KERNEL && MODULES
1676 default y
1677 help
1678 Various binutils versions can resolve Thumb-2 branches to
1679 locally-defined, preemptible global symbols as short-range "b.n"
1680 branch instructions.
1682 This is a problem, because there's no guarantee the final
1683 destination of the symbol, or any candidate locations for a
1684 trampoline, are within range of the branch. For this reason, the
1685 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1686 relocation in modules at all, and it makes little sense to add
1687 support.
1689 The symptom is that the kernel fails with an "unsupported
1690 relocation" error when loading some modules.
1692 Until fixed tools are available, passing
1693 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1694 code which hits this problem, at the cost of a bit of extra runtime
1695 stack usage in some cases.
1697 The problem is described in more detail at:
1698 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1700 Only Thumb-2 kernels are affected.
1702 Unless you are sure your tools don't have this problem, say Y.
1704 config ARM_ASM_UNIFIED
1705 bool
1707 config AEABI
1708 bool "Use the ARM EABI to compile the kernel"
1709 help
1710 This option allows for the kernel to be compiled using the latest
1711 ARM ABI (aka EABI). This is only useful if you are using a user
1712 space environment that is also compiled with EABI.
1714 Since there are major incompatibilities between the legacy ABI and
1715 EABI, especially with regard to structure member alignment, this
1716 option also changes the kernel syscall calling convention to
1717 disambiguate both ABIs and allow for backward compatibility support
1718 (selected with CONFIG_OABI_COMPAT).
1720 To use this you need GCC version 4.0.0 or later.
1722 config OABI_COMPAT
1723 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1724 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1725 default y
1726 help
1727 This option preserves the old syscall interface along with the
1728 new (ARM EABI) one. It also provides a compatibility layer to
1729 intercept syscalls that have structure arguments which layout
1730 in memory differs between the legacy ABI and the new ARM EABI
1731 (only for non "thumb" binaries). This option adds a tiny
1732 overhead to all syscalls and produces a slightly larger kernel.
1733 If you know you'll be using only pure EABI user space then you
1734 can say N here. If this option is not selected and you attempt
1735 to execute a legacy ABI binary then the result will be
1736 UNPREDICTABLE (in fact it can be predicted that it won't work
1737 at all). If in doubt say Y.
1739 config ARCH_HAS_HOLES_MEMORYMODEL
1740 bool
1742 config ARCH_SPARSEMEM_ENABLE
1743 bool
1745 config ARCH_SPARSEMEM_DEFAULT
1746 def_bool ARCH_SPARSEMEM_ENABLE
1748 config ARCH_SELECT_MEMORY_MODEL
1749 def_bool ARCH_SPARSEMEM_ENABLE
1751 config HAVE_ARCH_PFN_VALID
1752 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1754 config HIGHMEM
1755 bool "High Memory Support"
1756 depends on MMU
1757 help
1758 The address space of ARM processors is only 4 Gigabytes large
1759 and it has to accommodate user address space, kernel address
1760 space as well as some memory mapped IO. That means that, if you
1761 have a large amount of physical memory and/or IO, not all of the
1762 memory can be "permanently mapped" by the kernel. The physical
1763 memory that is not permanently mapped is called "high memory".
1765 Depending on the selected kernel/user memory split, minimum
1766 vmalloc space and actual amount of RAM, you may not need this
1767 option which should result in a slightly faster kernel.
1769 If unsure, say n.
1771 config HIGHPTE
1772 bool "Allocate 2nd-level pagetables from highmem"
1773 depends on HIGHMEM
1775 config HW_PERF_EVENTS
1776 bool "Enable hardware performance counter support for perf events"
1777 depends on PERF_EVENTS
1778 default y
1779 help
1780 Enable hardware performance counter support for perf events. If
1781 disabled, perf events will use software events only.
1783 source "mm/Kconfig"
1785 config FORCE_MAX_ZONEORDER
1786 int "Maximum zone order" if ARCH_SHMOBILE
1787 range 11 64 if ARCH_SHMOBILE
1788 default "12" if SOC_AM33XX
1789 default "9" if SA1111
1790 default "11"
1791 help
1792 The kernel memory allocator divides physically contiguous memory
1793 blocks into "zones", where each zone is a power of two number of
1794 pages. This option selects the largest power of two that the kernel
1795 keeps in the memory allocator. If you need to allocate very large
1796 blocks of physically contiguous memory, then you may need to
1797 increase this value.
1799 This config option is actually maximum order plus one. For example,
1800 a value of 11 means that the largest free memory block is 2^10 pages.
1802 config ALIGNMENT_TRAP
1803 bool
1804 depends on CPU_CP15_MMU
1805 default y if !ARCH_EBSA110
1806 select HAVE_PROC_CPU if PROC_FS
1807 help
1808 ARM processors cannot fetch/store information which is not
1809 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1810 address divisible by 4. On 32-bit ARM processors, these non-aligned
1811 fetch/store instructions will be emulated in software if you say
1812 here, which has a severe performance impact. This is necessary for
1813 correct operation of some network protocols. With an IP-only
1814 configuration it is safe to say N, otherwise say Y.
1816 config UACCESS_WITH_MEMCPY
1817 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1818 depends on MMU
1819 default y if CPU_FEROCEON
1820 help
1821 Implement faster copy_to_user and clear_user methods for CPU
1822 cores where a 8-word STM instruction give significantly higher
1823 memory write throughput than a sequence of individual 32bit stores.
1825 A possible side effect is a slight increase in scheduling latency
1826 between threads sharing the same address space if they invoke
1827 such copy operations with large buffers.
1829 However, if the CPU data cache is using a write-allocate mode,
1830 this option is unlikely to provide any performance gain.
1832 config SECCOMP
1833 bool
1834 prompt "Enable seccomp to safely compute untrusted bytecode"
1835 ---help---
1836 This kernel feature is useful for number crunching applications
1837 that may need to compute untrusted bytecode during their
1838 execution. By using pipes or other transports made available to
1839 the process as file descriptors supporting the read/write
1840 syscalls, it's possible to isolate those applications in
1841 their own address space using seccomp. Once seccomp is
1842 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1843 and the task is only allowed to execute a few safe syscalls
1844 defined by each seccomp mode.
1846 config CC_STACKPROTECTOR
1847 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1848 depends on EXPERIMENTAL
1849 help
1850 This option turns on the -fstack-protector GCC feature. This
1851 feature puts, at the beginning of functions, a canary value on
1852 the stack just before the return address, and validates
1853 the value just before actually returning. Stack based buffer
1854 overflows (that need to overwrite this return address) now also
1855 overwrite the canary, which gets detected and the attack is then
1856 neutralized via a kernel panic.
1857 This feature requires gcc version 4.2 or above.
1859 config XEN_DOM0
1860 def_bool y
1861 depends on XEN
1863 config XEN
1864 bool "Xen guest support on ARM (EXPERIMENTAL)"
1865 depends on EXPERIMENTAL && ARM && OF
1866 depends on CPU_V7 && !CPU_V6
1867 help
1868 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1870 endmenu
1872 menu "Boot options"
1874 config USE_OF
1875 bool "Flattened Device Tree support"
1876 select IRQ_DOMAIN
1877 select OF
1878 select OF_EARLY_FLATTREE
1879 help
1880 Include support for flattened device tree machine descriptions.
1882 config ATAGS
1883 bool "Support for the traditional ATAGS boot data passing" if USE_OF
1884 default y
1885 help
1886 This is the traditional way of passing data to the kernel at boot
1887 time. If you are solely relying on the flattened device tree (or
1888 the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1889 to remove ATAGS support from your kernel binary. If unsure,
1890 leave this to y.
1892 config DEPRECATED_PARAM_STRUCT
1893 bool "Provide old way to pass kernel parameters"
1894 depends on ATAGS
1895 help
1896 This was deprecated in 2001 and announced to live on for 5 years.
1897 Some old boot loaders still use this way.
1899 # Compressed boot loader in ROM. Yes, we really want to ask about
1900 # TEXT and BSS so we preserve their values in the config files.
1901 config ZBOOT_ROM_TEXT
1902 hex "Compressed ROM boot loader base address"
1903 default "0"
1904 help
1905 The physical address at which the ROM-able zImage is to be
1906 placed in the target. Platforms which normally make use of
1907 ROM-able zImage formats normally set this to a suitable
1908 value in their defconfig file.
1910 If ZBOOT_ROM is not enabled, this has no effect.
1912 config ZBOOT_ROM_BSS
1913 hex "Compressed ROM boot loader BSS address"
1914 default "0"
1915 help
1916 The base address of an area of read/write memory in the target
1917 for the ROM-able zImage which must be available while the
1918 decompressor is running. It must be large enough to hold the
1919 entire decompressed kernel plus an additional 128 KiB.
1920 Platforms which normally make use of ROM-able zImage formats
1921 normally set this to a suitable value in their defconfig file.
1923 If ZBOOT_ROM is not enabled, this has no effect.
1925 config ZBOOT_ROM
1926 bool "Compressed boot loader in ROM/flash"
1927 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1928 help
1929 Say Y here if you intend to execute your compressed kernel image
1930 (zImage) directly from ROM or flash. If unsure, say N.
1932 choice
1933 prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1934 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1935 default ZBOOT_ROM_NONE
1936 help
1937 Include experimental SD/MMC loading code in the ROM-able zImage.
1938 With this enabled it is possible to write the ROM-able zImage
1939 kernel image to an MMC or SD card and boot the kernel straight
1940 from the reset vector. At reset the processor Mask ROM will load
1941 the first part of the ROM-able zImage which in turn loads the
1942 rest the kernel image to RAM.
1944 config ZBOOT_ROM_NONE
1945 bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1946 help
1947 Do not load image from SD or MMC
1949 config ZBOOT_ROM_MMCIF
1950 bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1951 help
1952 Load image from MMCIF hardware block.
1954 config ZBOOT_ROM_SH_MOBILE_SDHI
1955 bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1956 help
1957 Load image from SDHI hardware block
1959 endchoice
1961 config ARM_APPENDED_DTB
1962 bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1963 depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1964 help
1965 With this option, the boot code will look for a device tree binary
1966 (DTB) appended to zImage
1967 (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1969 This is meant as a backward compatibility convenience for those
1970 systems with a bootloader that can't be upgraded to accommodate
1971 the documented boot protocol using a device tree.
1973 Beware that there is very little in terms of protection against
1974 this option being confused by leftover garbage in memory that might
1975 look like a DTB header after a reboot if no actual DTB is appended
1976 to zImage. Do not leave this option active in a production kernel
1977 if you don't intend to always append a DTB. Proper passing of the
1978 location into r2 of a bootloader provided DTB is always preferable
1979 to this option.
1981 config ARM_ATAG_DTB_COMPAT
1982 bool "Supplement the appended DTB with traditional ATAG information"
1983 depends on ARM_APPENDED_DTB
1984 help
1985 Some old bootloaders can't be updated to a DTB capable one, yet
1986 they provide ATAGs with memory configuration, the ramdisk address,
1987 the kernel cmdline string, etc. Such information is dynamically
1988 provided by the bootloader and can't always be stored in a static
1989 DTB. To allow a device tree enabled kernel to be used with such
1990 bootloaders, this option allows zImage to extract the information
1991 from the ATAG list and store it at run time into the appended DTB.
1993 choice
1994 prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1995 default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1997 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1998 bool "Use bootloader kernel arguments if available"
1999 help
2000 Uses the command-line options passed by the boot loader instead of
2001 the device tree bootargs property. If the boot loader doesn't provide
2002 any, the device tree bootargs property will be used.
2004 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
2005 bool "Extend with bootloader kernel arguments"
2006 help
2007 The command-line arguments provided by the boot loader will be
2008 appended to the the device tree bootargs property.
2010 endchoice
2012 config CMDLINE
2013 string "Default kernel command string"
2014 default ""
2015 help
2016 On some architectures (EBSA110 and CATS), there is currently no way
2017 for the boot loader to pass arguments to the kernel. For these
2018 architectures, you should supply some command-line options at build
2019 time by entering them here. As a minimum, you should specify the
2020 memory size and the root device (e.g., mem=64M root=/dev/nfs).
2022 choice
2023 prompt "Kernel command line type" if CMDLINE != ""
2024 default CMDLINE_FROM_BOOTLOADER
2025 depends on ATAGS
2027 config CMDLINE_FROM_BOOTLOADER
2028 bool "Use bootloader kernel arguments if available"
2029 help
2030 Uses the command-line options passed by the boot loader. If
2031 the boot loader doesn't provide any, the default kernel command
2032 string provided in CMDLINE will be used.
2034 config CMDLINE_EXTEND
2035 bool "Extend bootloader kernel arguments"
2036 help
2037 The command-line arguments provided by the boot loader will be
2038 appended to the default kernel command string.
2040 config CMDLINE_FORCE
2041 bool "Always use the default kernel command string"
2042 help
2043 Always use the default kernel command string, even if the boot
2044 loader passes other arguments to the kernel.
2045 This is useful if you cannot or don't want to change the
2046 command-line options your boot loader passes to the kernel.
2047 endchoice
2049 config XIP_KERNEL
2050 bool "Kernel Execute-In-Place from ROM"
2051 depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
2052 help
2053 Execute-In-Place allows the kernel to run from non-volatile storage
2054 directly addressable by the CPU, such as NOR flash. This saves RAM
2055 space since the text section of the kernel is not loaded from flash
2056 to RAM. Read-write sections, such as the data section and stack,
2057 are still copied to RAM. The XIP kernel is not compressed since
2058 it has to run directly from flash, so it will take more space to
2059 store it. The flash address used to link the kernel object files,
2060 and for storing it, is configuration dependent. Therefore, if you
2061 say Y here, you must know the proper physical address where to
2062 store the kernel image depending on your own flash memory usage.
2064 Also note that the make target becomes "make xipImage" rather than
2065 "make zImage" or "make Image". The final kernel binary to put in
2066 ROM memory will be arch/arm/boot/xipImage.
2068 If unsure, say N.
2070 config XIP_PHYS_ADDR
2071 hex "XIP Kernel Physical Location"
2072 depends on XIP_KERNEL
2073 default "0x00080000"
2074 help
2075 This is the physical address in your flash memory the kernel will
2076 be linked for and stored to. This address is dependent on your
2077 own flash usage.
2079 config KEXEC
2080 bool "Kexec system call (EXPERIMENTAL)"
2081 depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2082 help
2083 kexec is a system call that implements the ability to shutdown your
2084 current kernel, and to start another kernel. It is like a reboot
2085 but it is independent of the system firmware. And like a reboot
2086 you can start any kernel with it, not just Linux.
2088 It is an ongoing process to be certain the hardware in a machine
2089 is properly shutdown, so do not be surprised if this code does not
2090 initially work for you. It may help to enable device hotplugging
2091 support.
2093 config ATAGS_PROC
2094 bool "Export atags in procfs"
2095 depends on ATAGS && KEXEC
2096 default y
2097 help
2098 Should the atags used to boot the kernel be exported in an "atags"
2099 file in procfs. Useful with kexec.
2101 config CRASH_DUMP
2102 bool "Build kdump crash kernel (EXPERIMENTAL)"
2103 depends on EXPERIMENTAL
2104 help
2105 Generate crash dump after being started by kexec. This should
2106 be normally only set in special crash dump kernels which are
2107 loaded in the main kernel with kexec-tools into a specially
2108 reserved region and then later executed after a crash by
2109 kdump/kexec. The crash dump kernel must be compiled to a
2110 memory address not used by the main kernel
2112 For more details see Documentation/kdump/kdump.txt
2114 config AUTO_ZRELADDR
2115 bool "Auto calculation of the decompressed kernel image address"
2116 depends on !ZBOOT_ROM && !ARCH_U300
2117 help
2118 ZRELADDR is the physical address where the decompressed kernel
2119 image will be placed. If AUTO_ZRELADDR is selected, the address
2120 will be determined at run-time by masking the current IP with
2121 0xf8000000. This assumes the zImage being placed in the first 128MB
2122 from start of memory.
2124 endmenu
2126 menu "CPU Power Management"
2128 if ARCH_HAS_CPUFREQ
2130 source "drivers/cpufreq/Kconfig"
2132 config CPU_FREQ_IMX
2133 tristate "CPUfreq driver for i.MX CPUs"
2134 depends on ARCH_MXC && CPU_FREQ
2135 select CPU_FREQ_TABLE
2136 help
2137 This enables the CPUfreq driver for i.MX CPUs.
2139 config CPU_FREQ_SA1100
2140 bool
2142 config CPU_FREQ_SA1110
2143 bool
2145 config CPU_FREQ_INTEGRATOR
2146 tristate "CPUfreq driver for ARM Integrator CPUs"
2147 depends on ARCH_INTEGRATOR && CPU_FREQ
2148 default y
2149 help
2150 This enables the CPUfreq driver for ARM Integrator CPUs.
2152 For details, take a look at <file:Documentation/cpu-freq>.
2154 If in doubt, say Y.
2156 config CPU_FREQ_PXA
2157 bool
2158 depends on CPU_FREQ && ARCH_PXA && PXA25x
2159 default y
2160 select CPU_FREQ_DEFAULT_GOV_USERSPACE
2161 select CPU_FREQ_TABLE
2163 config CPU_FREQ_S3C
2164 bool
2165 help
2166 Internal configuration node for common cpufreq on Samsung SoC
2168 config CPU_FREQ_S3C24XX
2169 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2170 depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
2171 select CPU_FREQ_S3C
2172 help
2173 This enables the CPUfreq driver for the Samsung S3C24XX family
2174 of CPUs.
2176 For details, take a look at <file:Documentation/cpu-freq>.
2178 If in doubt, say N.
2180 config CPU_FREQ_S3C24XX_PLL
2181 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2182 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2183 help
2184 Compile in support for changing the PLL frequency from the
2185 S3C24XX series CPUfreq driver. The PLL takes time to settle
2186 after a frequency change, so by default it is not enabled.
2188 This also means that the PLL tables for the selected CPU(s) will
2189 be built which may increase the size of the kernel image.
2191 config CPU_FREQ_S3C24XX_DEBUG
2192 bool "Debug CPUfreq Samsung driver core"
2193 depends on CPU_FREQ_S3C24XX
2194 help
2195 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2197 config CPU_FREQ_S3C24XX_IODEBUG
2198 bool "Debug CPUfreq Samsung driver IO timing"
2199 depends on CPU_FREQ_S3C24XX
2200 help
2201 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2203 config CPU_FREQ_S3C24XX_DEBUGFS
2204 bool "Export debugfs for CPUFreq"
2205 depends on CPU_FREQ_S3C24XX && DEBUG_FS
2206 help
2207 Export status information via debugfs.
2209 endif
2211 source "drivers/cpuidle/Kconfig"
2213 endmenu
2215 menu "Floating point emulation"
2217 comment "At least one emulation must be selected"
2219 config FPE_NWFPE
2220 bool "NWFPE math emulation"
2221 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2222 ---help---
2223 Say Y to include the NWFPE floating point emulator in the kernel.
2224 This is necessary to run most binaries. Linux does not currently
2225 support floating point hardware so you need to say Y here even if
2226 your machine has an FPA or floating point co-processor podule.
2228 You may say N here if you are going to load the Acorn FPEmulator
2229 early in the bootup.
2231 config FPE_NWFPE_XP
2232 bool "Support extended precision"
2233 depends on FPE_NWFPE
2234 help
2235 Say Y to include 80-bit support in the kernel floating-point
2236 emulator. Otherwise, only 32 and 64-bit support is compiled in.
2237 Note that gcc does not generate 80-bit operations by default,
2238 so in most cases this option only enlarges the size of the
2239 floating point emulator without any good reason.
2241 You almost surely want to say N here.
2243 config FPE_FASTFPE
2244 bool "FastFPE math emulation (EXPERIMENTAL)"
2245 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2246 ---help---
2247 Say Y here to include the FAST floating point emulator in the kernel.
2248 This is an experimental much faster emulator which now also has full
2249 precision for the mantissa. It does not support any exceptions.
2250 It is very simple, and approximately 3-6 times faster than NWFPE.
2252 It should be sufficient for most programs. It may be not suitable
2253 for scientific calculations, but you have to check this for yourself.
2254 If you do not feel you need a faster FP emulation you should better
2255 choose NWFPE.
2257 config VFP
2258 bool "VFP-format floating point maths"
2259 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2260 help
2261 Say Y to include VFP support code in the kernel. This is needed
2262 if your hardware includes a VFP unit.
2264 Please see <file:Documentation/arm/VFP/release-notes.txt> for
2265 release notes and additional status information.
2267 Say N if your target does not have VFP hardware.
2269 config VFPv3
2270 bool
2271 depends on VFP
2272 default y if CPU_V7
2274 config NEON
2275 bool "Advanced SIMD (NEON) Extension support"
2276 depends on VFPv3 && CPU_V7
2277 help
2278 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2279 Extension.
2281 endmenu
2283 menu "Userspace binary formats"
2285 source "fs/Kconfig.binfmt"
2287 config ARTHUR
2288 tristate "RISC OS personality"
2289 depends on !AEABI
2290 help
2291 Say Y here to include the kernel code necessary if you want to run
2292 Acorn RISC OS/Arthur binaries under Linux. This code is still very
2293 experimental; if this sounds frightening, say N and sleep in peace.
2294 You can also say M here to compile this support as a module (which
2295 will be called arthur).
2297 endmenu
2299 menu "Power management options"
2301 source "kernel/power/Kconfig"
2303 config ARCH_SUSPEND_POSSIBLE
2304 depends on !ARCH_S5PC100
2305 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2306 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2307 def_bool y
2309 config ARM_CPU_SUSPEND
2310 def_bool PM_SLEEP
2312 endmenu
2314 source "net/Kconfig"
2316 source "drivers/Kconfig"
2318 source "fs/Kconfig"
2320 source "arch/arm/Kconfig.debug"
2322 source "security/Kconfig"
2324 source "crypto/Kconfig"
2326 source "lib/Kconfig"