ARM: socfpga: Enable SMP for socfpga
[linux-2.6.git] / drivers / bcma / scan.h
blob30eb475e4d195e75d17d79b635181fa1ef87f00f
1 #ifndef BCMA_SCAN_H_
2 #define BCMA_SCAN_H_
4 #define BCMA_ADDR_BASE 0x18000000
5 #define BCMA_WRAP_BASE 0x18100000
7 #define SCAN_ER_VALID 0x00000001
8 #define SCAN_ER_TAGX 0x00000006 /* we have to ignore 0x8 bit when checking tag for SCAN_ER_TAG_ADDR */
9 #define SCAN_ER_TAG 0x0000000E
10 #define SCAN_ER_TAG_CI 0x00000000
11 #define SCAN_ER_TAG_MP 0x00000002
12 #define SCAN_ER_TAG_ADDR 0x00000004
13 #define SCAN_ER_TAG_END 0x0000000E
14 #define SCAN_ER_BAD 0xFFFFFFFF
16 #define SCAN_CIA_CLASS 0x000000F0
17 #define SCAN_CIA_CLASS_SHIFT 4
18 #define SCAN_CIA_ID 0x000FFF00
19 #define SCAN_CIA_ID_SHIFT 8
20 #define SCAN_CIA_MANUF 0xFFF00000
21 #define SCAN_CIA_MANUF_SHIFT 20
23 #define SCAN_CIB_NMP 0x000001F0
24 #define SCAN_CIB_NMP_SHIFT 4
25 #define SCAN_CIB_NSP 0x00003E00
26 #define SCAN_CIB_NSP_SHIFT 9
27 #define SCAN_CIB_NMW 0x0007C000
28 #define SCAN_CIB_NMW_SHIFT 14
29 #define SCAN_CIB_NSW 0x00F80000
30 #define SCAN_CIB_NSW_SHIFT 19
31 #define SCAN_CIB_REV 0xFF000000
32 #define SCAN_CIB_REV_SHIFT 24
34 #define SCAN_ADDR_AG32 0x00000008
35 #define SCAN_ADDR_SZ 0x00000030
36 #define SCAN_ADDR_SZ_SHIFT 4
37 #define SCAN_ADDR_SZ_4K 0x00000000
38 #define SCAN_ADDR_SZ_8K 0x00000010
39 #define SCAN_ADDR_SZ_16K 0x00000020
40 #define SCAN_ADDR_SZ_SZD 0x00000030
41 #define SCAN_ADDR_TYPE 0x000000C0
42 #define SCAN_ADDR_TYPE_SLAVE 0x00000000
43 #define SCAN_ADDR_TYPE_BRIDGE 0x00000040
44 #define SCAN_ADDR_TYPE_SWRAP 0x00000080
45 #define SCAN_ADDR_TYPE_MWRAP 0x000000C0
46 #define SCAN_ADDR_PORT 0x00000F00
47 #define SCAN_ADDR_PORT_SHIFT 8
48 #define SCAN_ADDR_ADDR 0xFFFFF000
50 #define SCAN_ADDR_SZ_BASE 0x00001000 /* 4KB */
52 #define SCAN_SIZE_SZ_ALIGN 0x00000FFF
53 #define SCAN_SIZE_SZ 0xFFFFF000
54 #define SCAN_SIZE_SG32 0x00000008
56 #endif /* BCMA_SCAN_H_ */