arch/i386/kernel/time_hpet.c

   1 /*
   2  *  linux/arch/i386/kernel/time_hpet.c
   3  *  This code largely copied from arch/x86_64/kernel/time.c
   4  *  See that file for credits.
   5  *
   6  *  2003-06-30    Venkatesh Pallipadi - Additional changes for HPET support
   7  */
   8
   9 #include <linux/errno.h>
  10 #include <linux/kernel.h>
  11 #include <linux/param.h>
  12 #include <linux/string.h>
  13 #include <linux/init.h>
  14 #include <linux/smp.h>
  15
  16 #include <asm/timer.h>
  17 #include <asm/fixmap.h>
  18 #include <asm/apic.h>
  19
  20 #include <linux/timex.h>
  21
  22 #include <asm/hpet.h>
  23 #include <linux/hpet.h>
  24
  25 static unsigned long hpet_period;       /* fsecs / HPET clock */
  26 unsigned long hpet_tick;                /* hpet clks count per tick */
  27 unsigned long hpet_address;             /* hpet memory map physical address */
  28 int hpet_use_timer;
  29
  30 static int use_hpet;            /* can be used for runtime check of hpet */
  31 static int boot_hpet_disable;   /* boottime override for HPET timer */
  32 static void __iomem * hpet_virt_address;        /* hpet kernel virtual address */
  33
  34 #define FSEC_TO_USEC (1000000000UL)
  35
  36 int hpet_readl(unsigned long a)
  37 {
  38         return readl(hpet_virt_address + a);
  39 }
  40
  41 static void hpet_writel(unsigned long d, unsigned long a)
  42 {
  43         writel(d, hpet_virt_address + a);
  44 }
  45
  46 #ifdef CONFIG_X86_LOCAL_APIC
  47 /*
  48  * HPET counters dont wrap around on every tick. They just change the
  49  * comparator value and continue. Next tick can be caught by checking
  50  * for a change in the comparator value. Used in apic.c.
  51  */
  52 static void __devinit wait_hpet_tick(void)
  53 {
  54         unsigned int start_cmp_val, end_cmp_val;
  55
  56         start_cmp_val = hpet_readl(HPET_T0_CMP);
  57         do {
  58                 end_cmp_val = hpet_readl(HPET_T0_CMP);
  59         } while (start_cmp_val == end_cmp_val);
  60 }
  61 #endif
  62
  63 static int hpet_timer_stop_set_go(unsigned long tick)
  64 {
  65         unsigned int cfg;
  66
  67         /*
  68          * Stop the timers and reset the main counter.
  69          */
  70         cfg = hpet_readl(HPET_CFG);
  71         cfg &= ~HPET_CFG_ENABLE;
  72         hpet_writel(cfg, HPET_CFG);
  73         hpet_writel(0, HPET_COUNTER);
  74         hpet_writel(0, HPET_COUNTER + 4);
  75
  76         if (hpet_use_timer) {
  77                 /*
  78                  * Set up timer 0, as periodic with first interrupt to happen at
  79                  * hpet_tick, and period also hpet_tick.
  80                  */
  81                 cfg = hpet_readl(HPET_T0_CFG);
  82                 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
  83                        HPET_TN_SETVAL | HPET_TN_32BIT;
  84                 hpet_writel(cfg, HPET_T0_CFG);
  85
  86                 /*
  87                  * The first write after writing TN_SETVAL to the config register sets
  88                  * the counter value, the second write sets the threshold.
  89                  */
  90                 hpet_writel(tick, HPET_T0_CMP);
  91                 hpet_writel(tick, HPET_T0_CMP);
  92         }
  93         /*
  94          * Go!
  95          */
  96         cfg = hpet_readl(HPET_CFG);
  97         if (hpet_use_timer)
  98                 cfg |= HPET_CFG_LEGACY;
  99         cfg |= HPET_CFG_ENABLE;
 100         hpet_writel(cfg, HPET_CFG);
 101
 102         return 0;
 103 }
 104
 105 /*
 106  * Check whether HPET was found by ACPI boot parse. If yes setup HPET
 107  * counter 0 for kernel base timer.
 108  */
 109 int __init hpet_enable(void)
 110 {
 111         unsigned int id;
 112         unsigned long tick_fsec_low, tick_fsec_high; /* tick in femto sec */
 113         unsigned long hpet_tick_rem;
 114
 115         if (boot_hpet_disable)
 116                 return -1;
 117
 118         if (!hpet_address) {
 119                 return -1;
 120         }
 121         hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
 122         /*
 123          * Read the period, compute tick and quotient.
 124          */
 125         id = hpet_readl(HPET_ID);
 126
 127         /*
 128          * We are checking for value '1' or more in number field if
 129          * CONFIG_HPET_EMULATE_RTC is set because we will need an
 130          * additional timer for RTC emulation.
 131          * However, we can do with one timer otherwise using the
 132          * the single HPET timer for system time.
 133          */
 134 #ifdef CONFIG_HPET_EMULATE_RTC
 135         if (!(id & HPET_ID_NUMBER))
 136                 return -1;
 137 #endif
 138
 139
 140         hpet_period = hpet_readl(HPET_PERIOD);
 141         if ((hpet_period < HPET_MIN_PERIOD) || (hpet_period > HPET_MAX_PERIOD))
 142                 return -1;
 143
 144         /*
 145          * 64 bit math
 146          * First changing tick into fsec
 147          * Then 64 bit div to find number of hpet clk per tick
 148          */
 149         ASM_MUL64_REG(tick_fsec_low, tick_fsec_high,
 150                         KERNEL_TICK_USEC, FSEC_TO_USEC);
 151         ASM_DIV64_REG(hpet_tick, hpet_tick_rem,
 152                         hpet_period, tick_fsec_low, tick_fsec_high);
 153
 154         if (hpet_tick_rem > (hpet_period >> 1))
 155                 hpet_tick++; /* rounding the result */
 156
 157         hpet_use_timer = id & HPET_ID_LEGSUP;
 158
 159         if (hpet_timer_stop_set_go(hpet_tick))
 160                 return -1;
 161
 162         use_hpet = 1;
 163
 164 #ifdef  CONFIG_HPET
 165         {
 166                 struct hpet_data        hd;
 167                 unsigned int            ntimer;
 168
 169                 memset(&hd, 0, sizeof (hd));
 170
 171                 ntimer = hpet_readl(HPET_ID);
 172                 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
 173                 ntimer++;
 174
 175                 /*
 176                  * Register with driver.
 177                  * Timer0 and Timer1 is used by platform.
 178                  */
 179                 hd.hd_phys_address = hpet_address;
 180                 hd.hd_address = hpet_virt_address;
 181                 hd.hd_nirqs = ntimer;
 182                 hd.hd_flags = HPET_DATA_PLATFORM;
 183                 hpet_reserve_timer(&hd, 0);
 184 #ifdef  CONFIG_HPET_EMULATE_RTC
 185                 hpet_reserve_timer(&hd, 1);
 186 #endif
 187                 hd.hd_irq[0] = HPET_LEGACY_8254;
 188                 hd.hd_irq[1] = HPET_LEGACY_RTC;
 189                 if (ntimer > 2) {
 190                         struct hpet __iomem     *hpet;
 191                         struct hpet_timer __iomem *timer;
 192                         int                     i;
 193
 194                         hpet = hpet_virt_address;
 195
 196                         for (i = 2, timer = &hpet->hpet_timers[2]; i < ntimer;
 197                                 timer++, i++)
 198                                 hd.hd_irq[i] = (timer->hpet_config &
 199                                         Tn_INT_ROUTE_CNF_MASK) >>
 200                                         Tn_INT_ROUTE_CNF_SHIFT;
 201
 202                 }
 203
 204                 hpet_alloc(&hd);
 205         }
 206 #endif
 207
 208 #ifdef CONFIG_X86_LOCAL_APIC
 209         if (hpet_use_timer)
 210                 wait_timer_tick = wait_hpet_tick;
 211 #endif
 212         return 0;
 213 }
 214
 215 int hpet_reenable(void)
 216 {
 217         return hpet_timer_stop_set_go(hpet_tick);
 218 }
 219
 220 int is_hpet_enabled(void)
 221 {
 222         return use_hpet;
 223 }
 224
 225 int is_hpet_capable(void)
 226 {
 227         if (!boot_hpet_disable && hpet_address)
 228                 return 1;
 229         return 0;
 230 }
 231
 232 static int __init hpet_setup(char* str)
 233 {
 234         if (str) {
 235                 if (!strncmp("disable", str, 7))
 236                         boot_hpet_disable = 1;
 237         }
 238         return 1;
 239 }
 240
 241 __setup("hpet=", hpet_setup);
 242
 243 #ifdef CONFIG_HPET_EMULATE_RTC
 244 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
 245  * is enabled, we support RTC interrupt functionality in software.
 246  * RTC has 3 kinds of interrupts:
 247  * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
 248  *    is updated
 249  * 2) Alarm Interrupt - generate an interrupt at a specific time of day
 250  * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
 251  *    2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
 252  * (1) and (2) above are implemented using polling at a frequency of
 253  * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
 254  * overhead. (DEFAULT_RTC_INT_FREQ)
 255  * For (3), we use interrupts at 64Hz or user specified periodic
 256  * frequency, whichever is higher.
 257  */
 258 #include <linux/mc146818rtc.h>
 259 #include <linux/rtc.h>
 260
 261 #define DEFAULT_RTC_INT_FREQ    64
 262 #define RTC_NUM_INTS            1
 263
 264 static unsigned long UIE_on;
 265 static unsigned long prev_update_sec;
 266
 267 static unsigned long AIE_on;
 268 static struct rtc_time alarm_time;
 269
 270 static unsigned long PIE_on;
 271 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
 272 static unsigned long PIE_count;
 273
 274 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
 275 static unsigned int hpet_t1_cmp; /* cached comparator register */
 276
 277 /*
 278  * Timer 1 for RTC, we do not use periodic interrupt feature,
 279  * even if HPET supports periodic interrupts on Timer 1.
 280  * The reason being, to set up a periodic interrupt in HPET, we need to
 281  * stop the main counter. And if we do that everytime someone diables/enables
 282  * RTC, we will have adverse effect on main kernel timer running on Timer 0.
 283  * So, for the time being, simulate the periodic interrupt in software.
 284  *
 285  * hpet_rtc_timer_init() is called for the first time and during subsequent
 286  * interuppts reinit happens through hpet_rtc_timer_reinit().
 287  */
 288 int hpet_rtc_timer_init(void)
 289 {
 290         unsigned int cfg, cnt;
 291         unsigned long flags;
 292
 293         if (!is_hpet_enabled())
 294                 return 0;
 295         /*
 296          * Set the counter 1 and enable the interrupts.
 297          */
 298         if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
 299                 hpet_rtc_int_freq = PIE_freq;
 300         else
 301                 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
 302
 303         local_irq_save(flags);
 304         cnt = hpet_readl(HPET_COUNTER);
 305         cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
 306         hpet_writel(cnt, HPET_T1_CMP);
 307         hpet_t1_cmp = cnt;
 308         local_irq_restore(flags);
 309
 310         cfg = hpet_readl(HPET_T1_CFG);
 311         cfg &= ~HPET_TN_PERIODIC;
 312         cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
 313         hpet_writel(cfg, HPET_T1_CFG);
 314
 315         return 1;
 316 }
 317
 318 static void hpet_rtc_timer_reinit(void)
 319 {
 320         unsigned int cfg, cnt;
 321
 322         if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
 323                 cfg = hpet_readl(HPET_T1_CFG);
 324                 cfg &= ~HPET_TN_ENABLE;
 325                 hpet_writel(cfg, HPET_T1_CFG);
 326                 return;
 327         }
 328
 329         if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
 330                 hpet_rtc_int_freq = PIE_freq;
 331         else
 332                 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
 333
 334         /* It is more accurate to use the comparator value than current count.*/
 335         cnt = hpet_t1_cmp;
 336         cnt += hpet_tick*HZ/hpet_rtc_int_freq;
 337         hpet_writel(cnt, HPET_T1_CMP);
 338         hpet_t1_cmp = cnt;
 339 }
 340
 341 /*
 342  * The functions below are called from rtc driver.
 343  * Return 0 if HPET is not being used.
 344  * Otherwise do the necessary changes and return 1.
 345  */
 346 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
 347 {
 348         if (!is_hpet_enabled())
 349                 return 0;
 350
 351         if (bit_mask & RTC_UIE)
 352                 UIE_on = 0;
 353         if (bit_mask & RTC_PIE)
 354                 PIE_on = 0;
 355         if (bit_mask & RTC_AIE)
 356                 AIE_on = 0;
 357
 358         return 1;
 359 }
 360
 361 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
 362 {
 363         int timer_init_reqd = 0;
 364
 365         if (!is_hpet_enabled())
 366                 return 0;
 367
 368         if (!(PIE_on | AIE_on | UIE_on))
 369                 timer_init_reqd = 1;
 370
 371         if (bit_mask & RTC_UIE) {
 372                 UIE_on = 1;
 373         }
 374         if (bit_mask & RTC_PIE) {
 375                 PIE_on = 1;
 376                 PIE_count = 0;
 377         }
 378         if (bit_mask & RTC_AIE) {
 379                 AIE_on = 1;
 380         }
 381
 382         if (timer_init_reqd)
 383                 hpet_rtc_timer_init();
 384
 385         return 1;
 386 }
 387
 388 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
 389 {
 390         if (!is_hpet_enabled())
 391                 return 0;
 392
 393         alarm_time.tm_hour = hrs;
 394         alarm_time.tm_min = min;
 395         alarm_time.tm_sec = sec;
 396
 397         return 1;
 398 }
 399
 400 int hpet_set_periodic_freq(unsigned long freq)
 401 {
 402         if (!is_hpet_enabled())
 403                 return 0;
 404
 405         PIE_freq = freq;
 406         PIE_count = 0;
 407
 408         return 1;
 409 }
 410
 411 int hpet_rtc_dropped_irq(void)
 412 {
 413         if (!is_hpet_enabled())
 414                 return 0;
 415
 416         return 1;
 417 }
 418
 419 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 420 {
 421         struct rtc_time curr_time;
 422         unsigned long rtc_int_flag = 0;
 423         int call_rtc_interrupt = 0;
 424
 425         hpet_rtc_timer_reinit();
 426
 427         if (UIE_on | AIE_on) {
 428                 rtc_get_rtc_time(&curr_time);
 429         }
 430         if (UIE_on) {
 431                 if (curr_time.tm_sec != prev_update_sec) {
 432                         /* Set update int info, call real rtc int routine */
 433                         call_rtc_interrupt = 1;
 434                         rtc_int_flag = RTC_UF;
 435                         prev_update_sec = curr_time.tm_sec;
 436                 }
 437         }
 438         if (PIE_on) {
 439                 PIE_count++;
 440                 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
 441                         /* Set periodic int info, call real rtc int routine */
 442                         call_rtc_interrupt = 1;
 443                         rtc_int_flag |= RTC_PF;
 444                         PIE_count = 0;
 445                 }
 446         }
 447         if (AIE_on) {
 448                 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
 449                     (curr_time.tm_min == alarm_time.tm_min) &&
 450                     (curr_time.tm_hour == alarm_time.tm_hour)) {
 451                         /* Set alarm int info, call real rtc int routine */
 452                         call_rtc_interrupt = 1;
 453                         rtc_int_flag |= RTC_AF;
 454                 }
 455         }
 456         if (call_rtc_interrupt) {
 457                 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
 458                 rtc_interrupt(rtc_int_flag, dev_id, regs);
 459         }
 460         return IRQ_HANDLED;
 461 }
 462 #endif
 463