1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* ethtool support for igb */
30 #include <linux/vmalloc.h>
31 #include <linux/netdevice.h>
32 #include <linux/pci.h>
33 #include <linux/delay.h>
34 #include <linux/interrupt.h>
35 #include <linux/if_ether.h>
36 #include <linux/ethtool.h>
37 #include <linux/sched.h>
42 char stat_string
[ETH_GSTRING_LEN
];
47 #define IGB_STAT(_name, _stat) { \
48 .stat_string = _name, \
49 .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
50 .stat_offset = offsetof(struct igb_adapter, _stat) \
52 static const struct igb_stats igb_gstrings_stats
[] = {
53 IGB_STAT("rx_packets", stats
.gprc
),
54 IGB_STAT("tx_packets", stats
.gptc
),
55 IGB_STAT("rx_bytes", stats
.gorc
),
56 IGB_STAT("tx_bytes", stats
.gotc
),
57 IGB_STAT("rx_broadcast", stats
.bprc
),
58 IGB_STAT("tx_broadcast", stats
.bptc
),
59 IGB_STAT("rx_multicast", stats
.mprc
),
60 IGB_STAT("tx_multicast", stats
.mptc
),
61 IGB_STAT("multicast", stats
.mprc
),
62 IGB_STAT("collisions", stats
.colc
),
63 IGB_STAT("rx_crc_errors", stats
.crcerrs
),
64 IGB_STAT("rx_no_buffer_count", stats
.rnbc
),
65 IGB_STAT("rx_missed_errors", stats
.mpc
),
66 IGB_STAT("tx_aborted_errors", stats
.ecol
),
67 IGB_STAT("tx_carrier_errors", stats
.tncrs
),
68 IGB_STAT("tx_window_errors", stats
.latecol
),
69 IGB_STAT("tx_abort_late_coll", stats
.latecol
),
70 IGB_STAT("tx_deferred_ok", stats
.dc
),
71 IGB_STAT("tx_single_coll_ok", stats
.scc
),
72 IGB_STAT("tx_multi_coll_ok", stats
.mcc
),
73 IGB_STAT("tx_timeout_count", tx_timeout_count
),
74 IGB_STAT("rx_long_length_errors", stats
.roc
),
75 IGB_STAT("rx_short_length_errors", stats
.ruc
),
76 IGB_STAT("rx_align_errors", stats
.algnerrc
),
77 IGB_STAT("tx_tcp_seg_good", stats
.tsctc
),
78 IGB_STAT("tx_tcp_seg_failed", stats
.tsctfc
),
79 IGB_STAT("rx_flow_control_xon", stats
.xonrxc
),
80 IGB_STAT("rx_flow_control_xoff", stats
.xoffrxc
),
81 IGB_STAT("tx_flow_control_xon", stats
.xontxc
),
82 IGB_STAT("tx_flow_control_xoff", stats
.xofftxc
),
83 IGB_STAT("rx_long_byte_count", stats
.gorc
),
84 IGB_STAT("tx_dma_out_of_sync", stats
.doosync
),
85 IGB_STAT("tx_smbus", stats
.mgptc
),
86 IGB_STAT("rx_smbus", stats
.mgprc
),
87 IGB_STAT("dropped_smbus", stats
.mgpdc
),
90 #define IGB_NETDEV_STAT(_net_stat) { \
91 .stat_string = __stringify(_net_stat), \
92 .sizeof_stat = FIELD_SIZEOF(struct net_device_stats, _net_stat), \
93 .stat_offset = offsetof(struct net_device_stats, _net_stat) \
95 static const struct igb_stats igb_gstrings_net_stats
[] = {
96 IGB_NETDEV_STAT(rx_errors
),
97 IGB_NETDEV_STAT(tx_errors
),
98 IGB_NETDEV_STAT(tx_dropped
),
99 IGB_NETDEV_STAT(rx_length_errors
),
100 IGB_NETDEV_STAT(rx_over_errors
),
101 IGB_NETDEV_STAT(rx_frame_errors
),
102 IGB_NETDEV_STAT(rx_fifo_errors
),
103 IGB_NETDEV_STAT(tx_fifo_errors
),
104 IGB_NETDEV_STAT(tx_heartbeat_errors
)
107 #define IGB_GLOBAL_STATS_LEN \
108 (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
109 #define IGB_NETDEV_STATS_LEN \
110 (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
111 #define IGB_RX_QUEUE_STATS_LEN \
112 (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
113 #define IGB_TX_QUEUE_STATS_LEN \
114 (sizeof(struct igb_tx_queue_stats) / sizeof(u64))
115 #define IGB_QUEUE_STATS_LEN \
116 ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
117 IGB_RX_QUEUE_STATS_LEN) + \
118 (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
119 IGB_TX_QUEUE_STATS_LEN))
120 #define IGB_STATS_LEN \
121 (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
123 static const char igb_gstrings_test
[][ETH_GSTRING_LEN
] = {
124 "Register test (offline)", "Eeprom test (offline)",
125 "Interrupt test (offline)", "Loopback test (offline)",
126 "Link test (on/offline)"
128 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
130 static int igb_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*ecmd
)
132 struct igb_adapter
*adapter
= netdev_priv(netdev
);
133 struct e1000_hw
*hw
= &adapter
->hw
;
136 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
138 ecmd
->supported
= (SUPPORTED_10baseT_Half
|
139 SUPPORTED_10baseT_Full
|
140 SUPPORTED_100baseT_Half
|
141 SUPPORTED_100baseT_Full
|
142 SUPPORTED_1000baseT_Full
|
145 ecmd
->advertising
= ADVERTISED_TP
;
147 if (hw
->mac
.autoneg
== 1) {
148 ecmd
->advertising
|= ADVERTISED_Autoneg
;
149 /* the e1000 autoneg seems to match ethtool nicely */
150 ecmd
->advertising
|= hw
->phy
.autoneg_advertised
;
153 ecmd
->port
= PORT_TP
;
154 ecmd
->phy_address
= hw
->phy
.addr
;
156 ecmd
->supported
= (SUPPORTED_1000baseT_Full
|
160 ecmd
->advertising
= (ADVERTISED_1000baseT_Full
|
164 ecmd
->port
= PORT_FIBRE
;
167 ecmd
->transceiver
= XCVR_INTERNAL
;
169 status
= rd32(E1000_STATUS
);
171 if (status
& E1000_STATUS_LU
) {
173 if ((status
& E1000_STATUS_SPEED_1000
) ||
174 hw
->phy
.media_type
!= e1000_media_type_copper
)
175 ecmd
->speed
= SPEED_1000
;
176 else if (status
& E1000_STATUS_SPEED_100
)
177 ecmd
->speed
= SPEED_100
;
179 ecmd
->speed
= SPEED_10
;
181 if ((status
& E1000_STATUS_FD
) ||
182 hw
->phy
.media_type
!= e1000_media_type_copper
)
183 ecmd
->duplex
= DUPLEX_FULL
;
185 ecmd
->duplex
= DUPLEX_HALF
;
191 ecmd
->autoneg
= hw
->mac
.autoneg
? AUTONEG_ENABLE
: AUTONEG_DISABLE
;
195 static int igb_set_settings(struct net_device
*netdev
, struct ethtool_cmd
*ecmd
)
197 struct igb_adapter
*adapter
= netdev_priv(netdev
);
198 struct e1000_hw
*hw
= &adapter
->hw
;
200 /* When SoL/IDER sessions are active, autoneg/speed/duplex
201 * cannot be changed */
202 if (igb_check_reset_block(hw
)) {
203 dev_err(&adapter
->pdev
->dev
, "Cannot change link "
204 "characteristics when SoL/IDER is active.\n");
208 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
211 if (ecmd
->autoneg
== AUTONEG_ENABLE
) {
213 hw
->phy
.autoneg_advertised
= ecmd
->advertising
|
216 ecmd
->advertising
= hw
->phy
.autoneg_advertised
;
217 if (adapter
->fc_autoneg
)
218 hw
->fc
.requested_mode
= e1000_fc_default
;
220 if (igb_set_spd_dplx(adapter
, ecmd
->speed
+ ecmd
->duplex
)) {
221 clear_bit(__IGB_RESETTING
, &adapter
->state
);
227 if (netif_running(adapter
->netdev
)) {
233 clear_bit(__IGB_RESETTING
, &adapter
->state
);
237 static void igb_get_pauseparam(struct net_device
*netdev
,
238 struct ethtool_pauseparam
*pause
)
240 struct igb_adapter
*adapter
= netdev_priv(netdev
);
241 struct e1000_hw
*hw
= &adapter
->hw
;
244 (adapter
->fc_autoneg
? AUTONEG_ENABLE
: AUTONEG_DISABLE
);
246 if (hw
->fc
.current_mode
== e1000_fc_rx_pause
)
248 else if (hw
->fc
.current_mode
== e1000_fc_tx_pause
)
250 else if (hw
->fc
.current_mode
== e1000_fc_full
) {
256 static int igb_set_pauseparam(struct net_device
*netdev
,
257 struct ethtool_pauseparam
*pause
)
259 struct igb_adapter
*adapter
= netdev_priv(netdev
);
260 struct e1000_hw
*hw
= &adapter
->hw
;
263 adapter
->fc_autoneg
= pause
->autoneg
;
265 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
268 if (adapter
->fc_autoneg
== AUTONEG_ENABLE
) {
269 hw
->fc
.requested_mode
= e1000_fc_default
;
270 if (netif_running(adapter
->netdev
)) {
277 if (pause
->rx_pause
&& pause
->tx_pause
)
278 hw
->fc
.requested_mode
= e1000_fc_full
;
279 else if (pause
->rx_pause
&& !pause
->tx_pause
)
280 hw
->fc
.requested_mode
= e1000_fc_rx_pause
;
281 else if (!pause
->rx_pause
&& pause
->tx_pause
)
282 hw
->fc
.requested_mode
= e1000_fc_tx_pause
;
283 else if (!pause
->rx_pause
&& !pause
->tx_pause
)
284 hw
->fc
.requested_mode
= e1000_fc_none
;
286 hw
->fc
.current_mode
= hw
->fc
.requested_mode
;
288 retval
= ((hw
->phy
.media_type
== e1000_media_type_copper
) ?
289 igb_force_mac_fc(hw
) : igb_setup_link(hw
));
292 clear_bit(__IGB_RESETTING
, &adapter
->state
);
296 static u32
igb_get_rx_csum(struct net_device
*netdev
)
298 struct igb_adapter
*adapter
= netdev_priv(netdev
);
299 return !!(adapter
->rx_ring
[0].flags
& IGB_RING_FLAG_RX_CSUM
);
302 static int igb_set_rx_csum(struct net_device
*netdev
, u32 data
)
304 struct igb_adapter
*adapter
= netdev_priv(netdev
);
307 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
309 adapter
->rx_ring
[i
].flags
|= IGB_RING_FLAG_RX_CSUM
;
311 adapter
->rx_ring
[i
].flags
&= ~IGB_RING_FLAG_RX_CSUM
;
317 static u32
igb_get_tx_csum(struct net_device
*netdev
)
319 return (netdev
->features
& NETIF_F_IP_CSUM
) != 0;
322 static int igb_set_tx_csum(struct net_device
*netdev
, u32 data
)
324 struct igb_adapter
*adapter
= netdev_priv(netdev
);
327 netdev
->features
|= (NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
);
328 if (adapter
->hw
.mac
.type
>= e1000_82576
)
329 netdev
->features
|= NETIF_F_SCTP_CSUM
;
331 netdev
->features
&= ~(NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
|
338 static int igb_set_tso(struct net_device
*netdev
, u32 data
)
340 struct igb_adapter
*adapter
= netdev_priv(netdev
);
343 netdev
->features
|= NETIF_F_TSO
;
344 netdev
->features
|= NETIF_F_TSO6
;
346 netdev
->features
&= ~NETIF_F_TSO
;
347 netdev
->features
&= ~NETIF_F_TSO6
;
350 dev_info(&adapter
->pdev
->dev
, "TSO is %s\n",
351 data
? "Enabled" : "Disabled");
355 static u32
igb_get_msglevel(struct net_device
*netdev
)
357 struct igb_adapter
*adapter
= netdev_priv(netdev
);
358 return adapter
->msg_enable
;
361 static void igb_set_msglevel(struct net_device
*netdev
, u32 data
)
363 struct igb_adapter
*adapter
= netdev_priv(netdev
);
364 adapter
->msg_enable
= data
;
367 static int igb_get_regs_len(struct net_device
*netdev
)
369 #define IGB_REGS_LEN 551
370 return IGB_REGS_LEN
* sizeof(u32
);
373 static void igb_get_regs(struct net_device
*netdev
,
374 struct ethtool_regs
*regs
, void *p
)
376 struct igb_adapter
*adapter
= netdev_priv(netdev
);
377 struct e1000_hw
*hw
= &adapter
->hw
;
381 memset(p
, 0, IGB_REGS_LEN
* sizeof(u32
));
383 regs
->version
= (1 << 24) | (hw
->revision_id
<< 16) | hw
->device_id
;
385 /* General Registers */
386 regs_buff
[0] = rd32(E1000_CTRL
);
387 regs_buff
[1] = rd32(E1000_STATUS
);
388 regs_buff
[2] = rd32(E1000_CTRL_EXT
);
389 regs_buff
[3] = rd32(E1000_MDIC
);
390 regs_buff
[4] = rd32(E1000_SCTL
);
391 regs_buff
[5] = rd32(E1000_CONNSW
);
392 regs_buff
[6] = rd32(E1000_VET
);
393 regs_buff
[7] = rd32(E1000_LEDCTL
);
394 regs_buff
[8] = rd32(E1000_PBA
);
395 regs_buff
[9] = rd32(E1000_PBS
);
396 regs_buff
[10] = rd32(E1000_FRTIMER
);
397 regs_buff
[11] = rd32(E1000_TCPTIMER
);
400 regs_buff
[12] = rd32(E1000_EECD
);
403 /* Reading EICS for EICR because they read the
404 * same but EICS does not clear on read */
405 regs_buff
[13] = rd32(E1000_EICS
);
406 regs_buff
[14] = rd32(E1000_EICS
);
407 regs_buff
[15] = rd32(E1000_EIMS
);
408 regs_buff
[16] = rd32(E1000_EIMC
);
409 regs_buff
[17] = rd32(E1000_EIAC
);
410 regs_buff
[18] = rd32(E1000_EIAM
);
411 /* Reading ICS for ICR because they read the
412 * same but ICS does not clear on read */
413 regs_buff
[19] = rd32(E1000_ICS
);
414 regs_buff
[20] = rd32(E1000_ICS
);
415 regs_buff
[21] = rd32(E1000_IMS
);
416 regs_buff
[22] = rd32(E1000_IMC
);
417 regs_buff
[23] = rd32(E1000_IAC
);
418 regs_buff
[24] = rd32(E1000_IAM
);
419 regs_buff
[25] = rd32(E1000_IMIRVP
);
422 regs_buff
[26] = rd32(E1000_FCAL
);
423 regs_buff
[27] = rd32(E1000_FCAH
);
424 regs_buff
[28] = rd32(E1000_FCTTV
);
425 regs_buff
[29] = rd32(E1000_FCRTL
);
426 regs_buff
[30] = rd32(E1000_FCRTH
);
427 regs_buff
[31] = rd32(E1000_FCRTV
);
430 regs_buff
[32] = rd32(E1000_RCTL
);
431 regs_buff
[33] = rd32(E1000_RXCSUM
);
432 regs_buff
[34] = rd32(E1000_RLPML
);
433 regs_buff
[35] = rd32(E1000_RFCTL
);
434 regs_buff
[36] = rd32(E1000_MRQC
);
435 regs_buff
[37] = rd32(E1000_VT_CTL
);
438 regs_buff
[38] = rd32(E1000_TCTL
);
439 regs_buff
[39] = rd32(E1000_TCTL_EXT
);
440 regs_buff
[40] = rd32(E1000_TIPG
);
441 regs_buff
[41] = rd32(E1000_DTXCTL
);
444 regs_buff
[42] = rd32(E1000_WUC
);
445 regs_buff
[43] = rd32(E1000_WUFC
);
446 regs_buff
[44] = rd32(E1000_WUS
);
447 regs_buff
[45] = rd32(E1000_IPAV
);
448 regs_buff
[46] = rd32(E1000_WUPL
);
451 regs_buff
[47] = rd32(E1000_PCS_CFG0
);
452 regs_buff
[48] = rd32(E1000_PCS_LCTL
);
453 regs_buff
[49] = rd32(E1000_PCS_LSTAT
);
454 regs_buff
[50] = rd32(E1000_PCS_ANADV
);
455 regs_buff
[51] = rd32(E1000_PCS_LPAB
);
456 regs_buff
[52] = rd32(E1000_PCS_NPTX
);
457 regs_buff
[53] = rd32(E1000_PCS_LPABNP
);
460 regs_buff
[54] = adapter
->stats
.crcerrs
;
461 regs_buff
[55] = adapter
->stats
.algnerrc
;
462 regs_buff
[56] = adapter
->stats
.symerrs
;
463 regs_buff
[57] = adapter
->stats
.rxerrc
;
464 regs_buff
[58] = adapter
->stats
.mpc
;
465 regs_buff
[59] = adapter
->stats
.scc
;
466 regs_buff
[60] = adapter
->stats
.ecol
;
467 regs_buff
[61] = adapter
->stats
.mcc
;
468 regs_buff
[62] = adapter
->stats
.latecol
;
469 regs_buff
[63] = adapter
->stats
.colc
;
470 regs_buff
[64] = adapter
->stats
.dc
;
471 regs_buff
[65] = adapter
->stats
.tncrs
;
472 regs_buff
[66] = adapter
->stats
.sec
;
473 regs_buff
[67] = adapter
->stats
.htdpmc
;
474 regs_buff
[68] = adapter
->stats
.rlec
;
475 regs_buff
[69] = adapter
->stats
.xonrxc
;
476 regs_buff
[70] = adapter
->stats
.xontxc
;
477 regs_buff
[71] = adapter
->stats
.xoffrxc
;
478 regs_buff
[72] = adapter
->stats
.xofftxc
;
479 regs_buff
[73] = adapter
->stats
.fcruc
;
480 regs_buff
[74] = adapter
->stats
.prc64
;
481 regs_buff
[75] = adapter
->stats
.prc127
;
482 regs_buff
[76] = adapter
->stats
.prc255
;
483 regs_buff
[77] = adapter
->stats
.prc511
;
484 regs_buff
[78] = adapter
->stats
.prc1023
;
485 regs_buff
[79] = adapter
->stats
.prc1522
;
486 regs_buff
[80] = adapter
->stats
.gprc
;
487 regs_buff
[81] = adapter
->stats
.bprc
;
488 regs_buff
[82] = adapter
->stats
.mprc
;
489 regs_buff
[83] = adapter
->stats
.gptc
;
490 regs_buff
[84] = adapter
->stats
.gorc
;
491 regs_buff
[86] = adapter
->stats
.gotc
;
492 regs_buff
[88] = adapter
->stats
.rnbc
;
493 regs_buff
[89] = adapter
->stats
.ruc
;
494 regs_buff
[90] = adapter
->stats
.rfc
;
495 regs_buff
[91] = adapter
->stats
.roc
;
496 regs_buff
[92] = adapter
->stats
.rjc
;
497 regs_buff
[93] = adapter
->stats
.mgprc
;
498 regs_buff
[94] = adapter
->stats
.mgpdc
;
499 regs_buff
[95] = adapter
->stats
.mgptc
;
500 regs_buff
[96] = adapter
->stats
.tor
;
501 regs_buff
[98] = adapter
->stats
.tot
;
502 regs_buff
[100] = adapter
->stats
.tpr
;
503 regs_buff
[101] = adapter
->stats
.tpt
;
504 regs_buff
[102] = adapter
->stats
.ptc64
;
505 regs_buff
[103] = adapter
->stats
.ptc127
;
506 regs_buff
[104] = adapter
->stats
.ptc255
;
507 regs_buff
[105] = adapter
->stats
.ptc511
;
508 regs_buff
[106] = adapter
->stats
.ptc1023
;
509 regs_buff
[107] = adapter
->stats
.ptc1522
;
510 regs_buff
[108] = adapter
->stats
.mptc
;
511 regs_buff
[109] = adapter
->stats
.bptc
;
512 regs_buff
[110] = adapter
->stats
.tsctc
;
513 regs_buff
[111] = adapter
->stats
.iac
;
514 regs_buff
[112] = adapter
->stats
.rpthc
;
515 regs_buff
[113] = adapter
->stats
.hgptc
;
516 regs_buff
[114] = adapter
->stats
.hgorc
;
517 regs_buff
[116] = adapter
->stats
.hgotc
;
518 regs_buff
[118] = adapter
->stats
.lenerrs
;
519 regs_buff
[119] = adapter
->stats
.scvpc
;
520 regs_buff
[120] = adapter
->stats
.hrmpc
;
522 for (i
= 0; i
< 4; i
++)
523 regs_buff
[121 + i
] = rd32(E1000_SRRCTL(i
));
524 for (i
= 0; i
< 4; i
++)
525 regs_buff
[125 + i
] = rd32(E1000_PSRTYPE(i
));
526 for (i
= 0; i
< 4; i
++)
527 regs_buff
[129 + i
] = rd32(E1000_RDBAL(i
));
528 for (i
= 0; i
< 4; i
++)
529 regs_buff
[133 + i
] = rd32(E1000_RDBAH(i
));
530 for (i
= 0; i
< 4; i
++)
531 regs_buff
[137 + i
] = rd32(E1000_RDLEN(i
));
532 for (i
= 0; i
< 4; i
++)
533 regs_buff
[141 + i
] = rd32(E1000_RDH(i
));
534 for (i
= 0; i
< 4; i
++)
535 regs_buff
[145 + i
] = rd32(E1000_RDT(i
));
536 for (i
= 0; i
< 4; i
++)
537 regs_buff
[149 + i
] = rd32(E1000_RXDCTL(i
));
539 for (i
= 0; i
< 10; i
++)
540 regs_buff
[153 + i
] = rd32(E1000_EITR(i
));
541 for (i
= 0; i
< 8; i
++)
542 regs_buff
[163 + i
] = rd32(E1000_IMIR(i
));
543 for (i
= 0; i
< 8; i
++)
544 regs_buff
[171 + i
] = rd32(E1000_IMIREXT(i
));
545 for (i
= 0; i
< 16; i
++)
546 regs_buff
[179 + i
] = rd32(E1000_RAL(i
));
547 for (i
= 0; i
< 16; i
++)
548 regs_buff
[195 + i
] = rd32(E1000_RAH(i
));
550 for (i
= 0; i
< 4; i
++)
551 regs_buff
[211 + i
] = rd32(E1000_TDBAL(i
));
552 for (i
= 0; i
< 4; i
++)
553 regs_buff
[215 + i
] = rd32(E1000_TDBAH(i
));
554 for (i
= 0; i
< 4; i
++)
555 regs_buff
[219 + i
] = rd32(E1000_TDLEN(i
));
556 for (i
= 0; i
< 4; i
++)
557 regs_buff
[223 + i
] = rd32(E1000_TDH(i
));
558 for (i
= 0; i
< 4; i
++)
559 regs_buff
[227 + i
] = rd32(E1000_TDT(i
));
560 for (i
= 0; i
< 4; i
++)
561 regs_buff
[231 + i
] = rd32(E1000_TXDCTL(i
));
562 for (i
= 0; i
< 4; i
++)
563 regs_buff
[235 + i
] = rd32(E1000_TDWBAL(i
));
564 for (i
= 0; i
< 4; i
++)
565 regs_buff
[239 + i
] = rd32(E1000_TDWBAH(i
));
566 for (i
= 0; i
< 4; i
++)
567 regs_buff
[243 + i
] = rd32(E1000_DCA_TXCTRL(i
));
569 for (i
= 0; i
< 4; i
++)
570 regs_buff
[247 + i
] = rd32(E1000_IP4AT_REG(i
));
571 for (i
= 0; i
< 4; i
++)
572 regs_buff
[251 + i
] = rd32(E1000_IP6AT_REG(i
));
573 for (i
= 0; i
< 32; i
++)
574 regs_buff
[255 + i
] = rd32(E1000_WUPM_REG(i
));
575 for (i
= 0; i
< 128; i
++)
576 regs_buff
[287 + i
] = rd32(E1000_FFMT_REG(i
));
577 for (i
= 0; i
< 128; i
++)
578 regs_buff
[415 + i
] = rd32(E1000_FFVT_REG(i
));
579 for (i
= 0; i
< 4; i
++)
580 regs_buff
[543 + i
] = rd32(E1000_FFLT_REG(i
));
582 regs_buff
[547] = rd32(E1000_TDFH
);
583 regs_buff
[548] = rd32(E1000_TDFT
);
584 regs_buff
[549] = rd32(E1000_TDFHS
);
585 regs_buff
[550] = rd32(E1000_TDFPC
);
589 static int igb_get_eeprom_len(struct net_device
*netdev
)
591 struct igb_adapter
*adapter
= netdev_priv(netdev
);
592 return adapter
->hw
.nvm
.word_size
* 2;
595 static int igb_get_eeprom(struct net_device
*netdev
,
596 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
598 struct igb_adapter
*adapter
= netdev_priv(netdev
);
599 struct e1000_hw
*hw
= &adapter
->hw
;
601 int first_word
, last_word
;
605 if (eeprom
->len
== 0)
608 eeprom
->magic
= hw
->vendor_id
| (hw
->device_id
<< 16);
610 first_word
= eeprom
->offset
>> 1;
611 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
613 eeprom_buff
= kmalloc(sizeof(u16
) *
614 (last_word
- first_word
+ 1), GFP_KERNEL
);
618 if (hw
->nvm
.type
== e1000_nvm_eeprom_spi
)
619 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
,
620 last_word
- first_word
+ 1,
623 for (i
= 0; i
< last_word
- first_word
+ 1; i
++) {
624 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
+ i
, 1,
631 /* Device's eeprom is always little-endian, word addressable */
632 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
633 le16_to_cpus(&eeprom_buff
[i
]);
635 memcpy(bytes
, (u8
*)eeprom_buff
+ (eeprom
->offset
& 1),
642 static int igb_set_eeprom(struct net_device
*netdev
,
643 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
645 struct igb_adapter
*adapter
= netdev_priv(netdev
);
646 struct e1000_hw
*hw
= &adapter
->hw
;
649 int max_len
, first_word
, last_word
, ret_val
= 0;
652 if (eeprom
->len
== 0)
655 if (eeprom
->magic
!= (hw
->vendor_id
| (hw
->device_id
<< 16)))
658 max_len
= hw
->nvm
.word_size
* 2;
660 first_word
= eeprom
->offset
>> 1;
661 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
662 eeprom_buff
= kmalloc(max_len
, GFP_KERNEL
);
666 ptr
= (void *)eeprom_buff
;
668 if (eeprom
->offset
& 1) {
669 /* need read/modify/write of first changed EEPROM word */
670 /* only the second byte of the word is being modified */
671 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
, 1,
675 if (((eeprom
->offset
+ eeprom
->len
) & 1) && (ret_val
== 0)) {
676 /* need read/modify/write of last changed EEPROM word */
677 /* only the first byte of the word is being modified */
678 ret_val
= hw
->nvm
.ops
.read(hw
, last_word
, 1,
679 &eeprom_buff
[last_word
- first_word
]);
682 /* Device's eeprom is always little-endian, word addressable */
683 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
684 le16_to_cpus(&eeprom_buff
[i
]);
686 memcpy(ptr
, bytes
, eeprom
->len
);
688 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
689 eeprom_buff
[i
] = cpu_to_le16(eeprom_buff
[i
]);
691 ret_val
= hw
->nvm
.ops
.write(hw
, first_word
,
692 last_word
- first_word
+ 1, eeprom_buff
);
694 /* Update the checksum over the first part of the EEPROM if needed
695 * and flush shadow RAM for 82573 controllers */
696 if ((ret_val
== 0) && ((first_word
<= NVM_CHECKSUM_REG
)))
697 igb_update_nvm_checksum(hw
);
703 static void igb_get_drvinfo(struct net_device
*netdev
,
704 struct ethtool_drvinfo
*drvinfo
)
706 struct igb_adapter
*adapter
= netdev_priv(netdev
);
707 char firmware_version
[32];
710 strncpy(drvinfo
->driver
, igb_driver_name
, 32);
711 strncpy(drvinfo
->version
, igb_driver_version
, 32);
713 /* EEPROM image version # is reported as firmware version # for
714 * 82575 controllers */
715 adapter
->hw
.nvm
.ops
.read(&adapter
->hw
, 5, 1, &eeprom_data
);
716 sprintf(firmware_version
, "%d.%d-%d",
717 (eeprom_data
& 0xF000) >> 12,
718 (eeprom_data
& 0x0FF0) >> 4,
719 eeprom_data
& 0x000F);
721 strncpy(drvinfo
->fw_version
, firmware_version
, 32);
722 strncpy(drvinfo
->bus_info
, pci_name(adapter
->pdev
), 32);
723 drvinfo
->n_stats
= IGB_STATS_LEN
;
724 drvinfo
->testinfo_len
= IGB_TEST_LEN
;
725 drvinfo
->regdump_len
= igb_get_regs_len(netdev
);
726 drvinfo
->eedump_len
= igb_get_eeprom_len(netdev
);
729 static void igb_get_ringparam(struct net_device
*netdev
,
730 struct ethtool_ringparam
*ring
)
732 struct igb_adapter
*adapter
= netdev_priv(netdev
);
734 ring
->rx_max_pending
= IGB_MAX_RXD
;
735 ring
->tx_max_pending
= IGB_MAX_TXD
;
736 ring
->rx_mini_max_pending
= 0;
737 ring
->rx_jumbo_max_pending
= 0;
738 ring
->rx_pending
= adapter
->rx_ring_count
;
739 ring
->tx_pending
= adapter
->tx_ring_count
;
740 ring
->rx_mini_pending
= 0;
741 ring
->rx_jumbo_pending
= 0;
744 static int igb_set_ringparam(struct net_device
*netdev
,
745 struct ethtool_ringparam
*ring
)
747 struct igb_adapter
*adapter
= netdev_priv(netdev
);
748 struct igb_ring
*temp_ring
;
750 u16 new_rx_count
, new_tx_count
;
752 if ((ring
->rx_mini_pending
) || (ring
->rx_jumbo_pending
))
755 new_rx_count
= min_t(u32
, ring
->rx_pending
, IGB_MAX_RXD
);
756 new_rx_count
= max_t(u16
, new_rx_count
, IGB_MIN_RXD
);
757 new_rx_count
= ALIGN(new_rx_count
, REQ_RX_DESCRIPTOR_MULTIPLE
);
759 new_tx_count
= min_t(u32
, ring
->tx_pending
, IGB_MAX_TXD
);
760 new_tx_count
= max_t(u16
, new_tx_count
, IGB_MIN_TXD
);
761 new_tx_count
= ALIGN(new_tx_count
, REQ_TX_DESCRIPTOR_MULTIPLE
);
763 if ((new_tx_count
== adapter
->tx_ring_count
) &&
764 (new_rx_count
== adapter
->rx_ring_count
)) {
769 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
772 if (!netif_running(adapter
->netdev
)) {
773 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
774 adapter
->tx_ring
[i
].count
= new_tx_count
;
775 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
776 adapter
->rx_ring
[i
].count
= new_rx_count
;
777 adapter
->tx_ring_count
= new_tx_count
;
778 adapter
->rx_ring_count
= new_rx_count
;
782 if (adapter
->num_tx_queues
> adapter
->num_rx_queues
)
783 temp_ring
= vmalloc(adapter
->num_tx_queues
* sizeof(struct igb_ring
));
785 temp_ring
= vmalloc(adapter
->num_rx_queues
* sizeof(struct igb_ring
));
795 * We can't just free everything and then setup again,
796 * because the ISRs in MSI-X mode get passed pointers
797 * to the tx and rx ring structs.
799 if (new_tx_count
!= adapter
->tx_ring_count
) {
800 memcpy(temp_ring
, adapter
->tx_ring
,
801 adapter
->num_tx_queues
* sizeof(struct igb_ring
));
803 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
804 temp_ring
[i
].count
= new_tx_count
;
805 err
= igb_setup_tx_resources(&temp_ring
[i
]);
809 igb_free_tx_resources(&temp_ring
[i
]);
815 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
816 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
818 memcpy(adapter
->tx_ring
, temp_ring
,
819 adapter
->num_tx_queues
* sizeof(struct igb_ring
));
821 adapter
->tx_ring_count
= new_tx_count
;
824 if (new_rx_count
!= adapter
->rx_ring
->count
) {
825 memcpy(temp_ring
, adapter
->rx_ring
,
826 adapter
->num_rx_queues
* sizeof(struct igb_ring
));
828 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
829 temp_ring
[i
].count
= new_rx_count
;
830 err
= igb_setup_rx_resources(&temp_ring
[i
]);
834 igb_free_rx_resources(&temp_ring
[i
]);
841 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
842 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
844 memcpy(adapter
->rx_ring
, temp_ring
,
845 adapter
->num_rx_queues
* sizeof(struct igb_ring
));
847 adapter
->rx_ring_count
= new_rx_count
;
853 clear_bit(__IGB_RESETTING
, &adapter
->state
);
857 /* ethtool register test data */
858 struct igb_reg_test
{
867 /* In the hardware, registers are laid out either singly, in arrays
868 * spaced 0x100 bytes apart, or in contiguous tables. We assume
869 * most tests take place on arrays or single registers (handled
870 * as a single-element array) and special-case the tables.
871 * Table tests are always pattern tests.
873 * We also make provision for some required setup steps by specifying
874 * registers to be written without any read-back testing.
877 #define PATTERN_TEST 1
878 #define SET_READ_TEST 2
879 #define WRITE_NO_TEST 3
880 #define TABLE32_TEST 4
881 #define TABLE64_TEST_LO 5
882 #define TABLE64_TEST_HI 6
885 static struct igb_reg_test reg_test_82580
[] = {
886 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
887 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
888 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
889 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
890 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
891 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
892 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
893 { E1000_RDBAL(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
894 { E1000_RDBAH(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
895 { E1000_RDLEN(4), 0x40, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
896 /* RDH is read-only for 82580, only test RDT. */
897 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
898 { E1000_RDT(4), 0x40, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
899 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
900 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
901 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
902 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
903 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
904 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
905 { E1000_TDBAL(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
906 { E1000_TDBAH(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
907 { E1000_TDLEN(4), 0x40, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
908 { E1000_TDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
909 { E1000_TDT(4), 0x40, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
910 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
911 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0x003FFFFB },
912 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0xFFFFFFFF },
913 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
914 { E1000_RA
, 0, 16, TABLE64_TEST_LO
,
915 0xFFFFFFFF, 0xFFFFFFFF },
916 { E1000_RA
, 0, 16, TABLE64_TEST_HI
,
917 0x83FFFFFF, 0xFFFFFFFF },
918 { E1000_RA2
, 0, 8, TABLE64_TEST_LO
,
919 0xFFFFFFFF, 0xFFFFFFFF },
920 { E1000_RA2
, 0, 8, TABLE64_TEST_HI
,
921 0x83FFFFFF, 0xFFFFFFFF },
922 { E1000_MTA
, 0, 128, TABLE32_TEST
,
923 0xFFFFFFFF, 0xFFFFFFFF },
928 static struct igb_reg_test reg_test_82576
[] = {
929 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
930 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
931 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
932 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
933 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
934 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
935 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
936 { E1000_RDBAL(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
937 { E1000_RDBAH(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
938 { E1000_RDLEN(4), 0x40, 12, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
939 /* Enable all RX queues before testing. */
940 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
941 { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
942 /* RDH is read-only for 82576, only test RDT. */
943 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
944 { E1000_RDT(4), 0x40, 12, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
945 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, 0 },
946 { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST
, 0, 0 },
947 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
948 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
949 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
950 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
951 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
952 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
953 { E1000_TDBAL(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
954 { E1000_TDBAH(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
955 { E1000_TDLEN(4), 0x40, 12, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
956 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
957 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0x003FFFFB },
958 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0xFFFFFFFF },
959 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
960 { E1000_RA
, 0, 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
961 { E1000_RA
, 0, 16, TABLE64_TEST_HI
, 0x83FFFFFF, 0xFFFFFFFF },
962 { E1000_RA2
, 0, 8, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
963 { E1000_RA2
, 0, 8, TABLE64_TEST_HI
, 0x83FFFFFF, 0xFFFFFFFF },
964 { E1000_MTA
, 0, 128,TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
968 /* 82575 register test */
969 static struct igb_reg_test reg_test_82575
[] = {
970 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
971 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
972 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
973 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
974 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
975 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
976 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
977 /* Enable all four RX queues before testing. */
978 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
979 /* RDH is read-only for 82575, only test RDT. */
980 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
981 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, 0 },
982 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
983 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
984 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
985 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
986 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
987 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
988 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
989 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB3FE, 0x003FFFFB },
990 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB3FE, 0xFFFFFFFF },
991 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
992 { E1000_TXCW
, 0x100, 1, PATTERN_TEST
, 0xC000FFFF, 0x0000FFFF },
993 { E1000_RA
, 0, 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
994 { E1000_RA
, 0, 16, TABLE64_TEST_HI
, 0x800FFFFF, 0xFFFFFFFF },
995 { E1000_MTA
, 0, 128, TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
999 static bool reg_pattern_test(struct igb_adapter
*adapter
, u64
*data
,
1000 int reg
, u32 mask
, u32 write
)
1002 struct e1000_hw
*hw
= &adapter
->hw
;
1004 static const u32 _test
[] =
1005 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1006 for (pat
= 0; pat
< ARRAY_SIZE(_test
); pat
++) {
1007 wr32(reg
, (_test
[pat
] & write
));
1009 if (val
!= (_test
[pat
] & write
& mask
)) {
1010 dev_err(&adapter
->pdev
->dev
, "pattern test reg %04X "
1011 "failed: got 0x%08X expected 0x%08X\n",
1012 reg
, val
, (_test
[pat
] & write
& mask
));
1021 static bool reg_set_and_check(struct igb_adapter
*adapter
, u64
*data
,
1022 int reg
, u32 mask
, u32 write
)
1024 struct e1000_hw
*hw
= &adapter
->hw
;
1026 wr32(reg
, write
& mask
);
1028 if ((write
& mask
) != (val
& mask
)) {
1029 dev_err(&adapter
->pdev
->dev
, "set/check reg %04X test failed:"
1030 " got 0x%08X expected 0x%08X\n", reg
,
1031 (val
& mask
), (write
& mask
));
1039 #define REG_PATTERN_TEST(reg, mask, write) \
1041 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1045 #define REG_SET_AND_CHECK(reg, mask, write) \
1047 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1051 static int igb_reg_test(struct igb_adapter
*adapter
, u64
*data
)
1053 struct e1000_hw
*hw
= &adapter
->hw
;
1054 struct igb_reg_test
*test
;
1055 u32 value
, before
, after
;
1058 switch (adapter
->hw
.mac
.type
) {
1060 test
= reg_test_82580
;
1061 toggle
= 0x7FEFF3FF;
1064 test
= reg_test_82576
;
1065 toggle
= 0x7FFFF3FF;
1068 test
= reg_test_82575
;
1069 toggle
= 0x7FFFF3FF;
1073 /* Because the status register is such a special case,
1074 * we handle it separately from the rest of the register
1075 * tests. Some bits are read-only, some toggle, and some
1076 * are writable on newer MACs.
1078 before
= rd32(E1000_STATUS
);
1079 value
= (rd32(E1000_STATUS
) & toggle
);
1080 wr32(E1000_STATUS
, toggle
);
1081 after
= rd32(E1000_STATUS
) & toggle
;
1082 if (value
!= after
) {
1083 dev_err(&adapter
->pdev
->dev
, "failed STATUS register test "
1084 "got: 0x%08X expected: 0x%08X\n", after
, value
);
1088 /* restore previous status */
1089 wr32(E1000_STATUS
, before
);
1091 /* Perform the remainder of the register test, looping through
1092 * the test table until we either fail or reach the null entry.
1095 for (i
= 0; i
< test
->array_len
; i
++) {
1096 switch (test
->test_type
) {
1098 REG_PATTERN_TEST(test
->reg
+
1099 (i
* test
->reg_offset
),
1104 REG_SET_AND_CHECK(test
->reg
+
1105 (i
* test
->reg_offset
),
1111 (adapter
->hw
.hw_addr
+ test
->reg
)
1112 + (i
* test
->reg_offset
));
1115 REG_PATTERN_TEST(test
->reg
+ (i
* 4),
1119 case TABLE64_TEST_LO
:
1120 REG_PATTERN_TEST(test
->reg
+ (i
* 8),
1124 case TABLE64_TEST_HI
:
1125 REG_PATTERN_TEST((test
->reg
+ 4) + (i
* 8),
1138 static int igb_eeprom_test(struct igb_adapter
*adapter
, u64
*data
)
1145 /* Read and add up the contents of the EEPROM */
1146 for (i
= 0; i
< (NVM_CHECKSUM_REG
+ 1); i
++) {
1147 if ((adapter
->hw
.nvm
.ops
.read(&adapter
->hw
, i
, 1, &temp
)) < 0) {
1154 /* If Checksum is not Correct return error else test passed */
1155 if ((checksum
!= (u16
) NVM_SUM
) && !(*data
))
1161 static irqreturn_t
igb_test_intr(int irq
, void *data
)
1163 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
1164 struct e1000_hw
*hw
= &adapter
->hw
;
1166 adapter
->test_icr
|= rd32(E1000_ICR
);
1171 static int igb_intr_test(struct igb_adapter
*adapter
, u64
*data
)
1173 struct e1000_hw
*hw
= &adapter
->hw
;
1174 struct net_device
*netdev
= adapter
->netdev
;
1175 u32 mask
, ics_mask
, i
= 0, shared_int
= true;
1176 u32 irq
= adapter
->pdev
->irq
;
1180 /* Hook up test interrupt handler just for this test */
1181 if (adapter
->msix_entries
) {
1182 if (request_irq(adapter
->msix_entries
[0].vector
,
1183 igb_test_intr
, 0, netdev
->name
, adapter
)) {
1187 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1189 if (request_irq(irq
,
1190 igb_test_intr
, 0, netdev
->name
, adapter
)) {
1194 } else if (!request_irq(irq
, igb_test_intr
, IRQF_PROBE_SHARED
,
1195 netdev
->name
, adapter
)) {
1197 } else if (request_irq(irq
, igb_test_intr
, IRQF_SHARED
,
1198 netdev
->name
, adapter
)) {
1202 dev_info(&adapter
->pdev
->dev
, "testing %s interrupt\n",
1203 (shared_int
? "shared" : "unshared"));
1205 /* Disable all the interrupts */
1206 wr32(E1000_IMC
, ~0);
1209 /* Define all writable bits for ICS */
1210 switch (hw
->mac
.type
) {
1212 ics_mask
= 0x37F47EDD;
1215 ics_mask
= 0x77D4FBFD;
1218 ics_mask
= 0x77DCFED5;
1221 ics_mask
= 0x7FFFFFFF;
1225 /* Test each interrupt */
1226 for (; i
< 31; i
++) {
1227 /* Interrupt to test */
1230 if (!(mask
& ics_mask
))
1234 /* Disable the interrupt to be reported in
1235 * the cause register and then force the same
1236 * interrupt and see if one gets posted. If
1237 * an interrupt was posted to the bus, the
1240 adapter
->test_icr
= 0;
1242 /* Flush any pending interrupts */
1243 wr32(E1000_ICR
, ~0);
1245 wr32(E1000_IMC
, mask
);
1246 wr32(E1000_ICS
, mask
);
1249 if (adapter
->test_icr
& mask
) {
1255 /* Enable the interrupt to be reported in
1256 * the cause register and then force the same
1257 * interrupt and see if one gets posted. If
1258 * an interrupt was not posted to the bus, the
1261 adapter
->test_icr
= 0;
1263 /* Flush any pending interrupts */
1264 wr32(E1000_ICR
, ~0);
1266 wr32(E1000_IMS
, mask
);
1267 wr32(E1000_ICS
, mask
);
1270 if (!(adapter
->test_icr
& mask
)) {
1276 /* Disable the other interrupts to be reported in
1277 * the cause register and then force the other
1278 * interrupts and see if any get posted. If
1279 * an interrupt was posted to the bus, the
1282 adapter
->test_icr
= 0;
1284 /* Flush any pending interrupts */
1285 wr32(E1000_ICR
, ~0);
1287 wr32(E1000_IMC
, ~mask
);
1288 wr32(E1000_ICS
, ~mask
);
1291 if (adapter
->test_icr
& mask
) {
1298 /* Disable all the interrupts */
1299 wr32(E1000_IMC
, ~0);
1302 /* Unhook test interrupt handler */
1303 if (adapter
->msix_entries
)
1304 free_irq(adapter
->msix_entries
[0].vector
, adapter
);
1306 free_irq(irq
, adapter
);
1311 static void igb_free_desc_rings(struct igb_adapter
*adapter
)
1313 igb_free_tx_resources(&adapter
->test_tx_ring
);
1314 igb_free_rx_resources(&adapter
->test_rx_ring
);
1317 static int igb_setup_desc_rings(struct igb_adapter
*adapter
)
1319 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1320 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1321 struct e1000_hw
*hw
= &adapter
->hw
;
1324 /* Setup Tx descriptor ring and Tx buffers */
1325 tx_ring
->count
= IGB_DEFAULT_TXD
;
1326 tx_ring
->pdev
= adapter
->pdev
;
1327 tx_ring
->netdev
= adapter
->netdev
;
1328 tx_ring
->reg_idx
= adapter
->vfs_allocated_count
;
1330 if (igb_setup_tx_resources(tx_ring
)) {
1335 igb_setup_tctl(adapter
);
1336 igb_configure_tx_ring(adapter
, tx_ring
);
1338 /* Setup Rx descriptor ring and Rx buffers */
1339 rx_ring
->count
= IGB_DEFAULT_RXD
;
1340 rx_ring
->pdev
= adapter
->pdev
;
1341 rx_ring
->netdev
= adapter
->netdev
;
1342 rx_ring
->rx_buffer_len
= IGB_RXBUFFER_2048
;
1343 rx_ring
->reg_idx
= adapter
->vfs_allocated_count
;
1345 if (igb_setup_rx_resources(rx_ring
)) {
1350 /* set the default queue to queue 0 of PF */
1351 wr32(E1000_MRQC
, adapter
->vfs_allocated_count
<< 3);
1353 /* enable receive ring */
1354 igb_setup_rctl(adapter
);
1355 igb_configure_rx_ring(adapter
, rx_ring
);
1357 igb_alloc_rx_buffers_adv(rx_ring
, igb_desc_unused(rx_ring
));
1362 igb_free_desc_rings(adapter
);
1366 static void igb_phy_disable_receiver(struct igb_adapter
*adapter
)
1368 struct e1000_hw
*hw
= &adapter
->hw
;
1370 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1371 igb_write_phy_reg(hw
, 29, 0x001F);
1372 igb_write_phy_reg(hw
, 30, 0x8FFC);
1373 igb_write_phy_reg(hw
, 29, 0x001A);
1374 igb_write_phy_reg(hw
, 30, 0x8FF0);
1377 static int igb_integrated_phy_loopback(struct igb_adapter
*adapter
)
1379 struct e1000_hw
*hw
= &adapter
->hw
;
1382 hw
->mac
.autoneg
= false;
1384 if (hw
->phy
.type
== e1000_phy_m88
) {
1385 /* Auto-MDI/MDIX Off */
1386 igb_write_phy_reg(hw
, M88E1000_PHY_SPEC_CTRL
, 0x0808);
1387 /* reset to update Auto-MDI/MDIX */
1388 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x9140);
1390 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x8140);
1391 } else if (hw
->phy
.type
== e1000_phy_82580
) {
1392 /* enable MII loopback */
1393 igb_write_phy_reg(hw
, I82580_PHY_LBK_CTRL
, 0x8041);
1396 ctrl_reg
= rd32(E1000_CTRL
);
1398 /* force 1000, set loopback */
1399 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x4140);
1401 /* Now set up the MAC to the same speed/duplex as the PHY. */
1402 ctrl_reg
= rd32(E1000_CTRL
);
1403 ctrl_reg
&= ~E1000_CTRL_SPD_SEL
; /* Clear the speed sel bits */
1404 ctrl_reg
|= (E1000_CTRL_FRCSPD
| /* Set the Force Speed Bit */
1405 E1000_CTRL_FRCDPX
| /* Set the Force Duplex Bit */
1406 E1000_CTRL_SPD_1000
|/* Force Speed to 1000 */
1407 E1000_CTRL_FD
| /* Force Duplex to FULL */
1408 E1000_CTRL_SLU
); /* Set link up enable bit */
1410 if (hw
->phy
.type
== e1000_phy_m88
)
1411 ctrl_reg
|= E1000_CTRL_ILOS
; /* Invert Loss of Signal */
1413 wr32(E1000_CTRL
, ctrl_reg
);
1415 /* Disable the receiver on the PHY so when a cable is plugged in, the
1416 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1418 if (hw
->phy
.type
== e1000_phy_m88
)
1419 igb_phy_disable_receiver(adapter
);
1426 static int igb_set_phy_loopback(struct igb_adapter
*adapter
)
1428 return igb_integrated_phy_loopback(adapter
);
1431 static int igb_setup_loopback_test(struct igb_adapter
*adapter
)
1433 struct e1000_hw
*hw
= &adapter
->hw
;
1436 reg
= rd32(E1000_CTRL_EXT
);
1438 /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1439 if (reg
& E1000_CTRL_EXT_LINK_MODE_MASK
) {
1440 reg
= rd32(E1000_RCTL
);
1441 reg
|= E1000_RCTL_LBM_TCVR
;
1442 wr32(E1000_RCTL
, reg
);
1444 wr32(E1000_SCTL
, E1000_ENABLE_SERDES_LOOPBACK
);
1446 reg
= rd32(E1000_CTRL
);
1447 reg
&= ~(E1000_CTRL_RFCE
|
1450 reg
|= E1000_CTRL_SLU
|
1452 wr32(E1000_CTRL
, reg
);
1454 /* Unset switch control to serdes energy detect */
1455 reg
= rd32(E1000_CONNSW
);
1456 reg
&= ~E1000_CONNSW_ENRGSRC
;
1457 wr32(E1000_CONNSW
, reg
);
1459 /* Set PCS register for forced speed */
1460 reg
= rd32(E1000_PCS_LCTL
);
1461 reg
&= ~E1000_PCS_LCTL_AN_ENABLE
; /* Disable Autoneg*/
1462 reg
|= E1000_PCS_LCTL_FLV_LINK_UP
| /* Force link up */
1463 E1000_PCS_LCTL_FSV_1000
| /* Force 1000 */
1464 E1000_PCS_LCTL_FDV_FULL
| /* SerDes Full duplex */
1465 E1000_PCS_LCTL_FSD
| /* Force Speed */
1466 E1000_PCS_LCTL_FORCE_LINK
; /* Force Link */
1467 wr32(E1000_PCS_LCTL
, reg
);
1472 return igb_set_phy_loopback(adapter
);
1475 static void igb_loopback_cleanup(struct igb_adapter
*adapter
)
1477 struct e1000_hw
*hw
= &adapter
->hw
;
1481 rctl
= rd32(E1000_RCTL
);
1482 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1483 wr32(E1000_RCTL
, rctl
);
1485 hw
->mac
.autoneg
= true;
1486 igb_read_phy_reg(hw
, PHY_CONTROL
, &phy_reg
);
1487 if (phy_reg
& MII_CR_LOOPBACK
) {
1488 phy_reg
&= ~MII_CR_LOOPBACK
;
1489 igb_write_phy_reg(hw
, PHY_CONTROL
, phy_reg
);
1490 igb_phy_sw_reset(hw
);
1494 static void igb_create_lbtest_frame(struct sk_buff
*skb
,
1495 unsigned int frame_size
)
1497 memset(skb
->data
, 0xFF, frame_size
);
1499 memset(&skb
->data
[frame_size
], 0xAA, frame_size
- 1);
1500 memset(&skb
->data
[frame_size
+ 10], 0xBE, 1);
1501 memset(&skb
->data
[frame_size
+ 12], 0xAF, 1);
1504 static int igb_check_lbtest_frame(struct sk_buff
*skb
, unsigned int frame_size
)
1507 if (*(skb
->data
+ 3) == 0xFF) {
1508 if ((*(skb
->data
+ frame_size
+ 10) == 0xBE) &&
1509 (*(skb
->data
+ frame_size
+ 12) == 0xAF)) {
1516 static int igb_clean_test_rings(struct igb_ring
*rx_ring
,
1517 struct igb_ring
*tx_ring
,
1520 union e1000_adv_rx_desc
*rx_desc
;
1521 struct igb_buffer
*buffer_info
;
1522 int rx_ntc
, tx_ntc
, count
= 0;
1525 /* initialize next to clean and descriptor values */
1526 rx_ntc
= rx_ring
->next_to_clean
;
1527 tx_ntc
= tx_ring
->next_to_clean
;
1528 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, rx_ntc
);
1529 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1531 while (staterr
& E1000_RXD_STAT_DD
) {
1532 /* check rx buffer */
1533 buffer_info
= &rx_ring
->buffer_info
[rx_ntc
];
1535 /* unmap rx buffer, will be remapped by alloc_rx_buffers */
1536 pci_unmap_single(rx_ring
->pdev
,
1538 rx_ring
->rx_buffer_len
,
1539 PCI_DMA_FROMDEVICE
);
1540 buffer_info
->dma
= 0;
1542 /* verify contents of skb */
1543 if (!igb_check_lbtest_frame(buffer_info
->skb
, size
))
1546 /* unmap buffer on tx side */
1547 buffer_info
= &tx_ring
->buffer_info
[tx_ntc
];
1548 igb_unmap_and_free_tx_resource(tx_ring
, buffer_info
);
1550 /* increment rx/tx next to clean counters */
1552 if (rx_ntc
== rx_ring
->count
)
1555 if (tx_ntc
== tx_ring
->count
)
1558 /* fetch next descriptor */
1559 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, rx_ntc
);
1560 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1563 /* re-map buffers to ring, store next to clean values */
1564 igb_alloc_rx_buffers_adv(rx_ring
, count
);
1565 rx_ring
->next_to_clean
= rx_ntc
;
1566 tx_ring
->next_to_clean
= tx_ntc
;
1571 static int igb_run_loopback_test(struct igb_adapter
*adapter
)
1573 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1574 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1575 int i
, j
, lc
, good_cnt
, ret_val
= 0;
1576 unsigned int size
= 1024;
1577 netdev_tx_t tx_ret_val
;
1578 struct sk_buff
*skb
;
1580 /* allocate test skb */
1581 skb
= alloc_skb(size
, GFP_KERNEL
);
1585 /* place data into test skb */
1586 igb_create_lbtest_frame(skb
, size
);
1590 * Calculate the loop count based on the largest descriptor ring
1591 * The idea is to wrap the largest ring a number of times using 64
1592 * send/receive pairs during each loop
1595 if (rx_ring
->count
<= tx_ring
->count
)
1596 lc
= ((tx_ring
->count
/ 64) * 2) + 1;
1598 lc
= ((rx_ring
->count
/ 64) * 2) + 1;
1600 for (j
= 0; j
<= lc
; j
++) { /* loop count loop */
1601 /* reset count of good packets */
1604 /* place 64 packets on the transmit queue*/
1605 for (i
= 0; i
< 64; i
++) {
1607 tx_ret_val
= igb_xmit_frame_ring_adv(skb
, tx_ring
);
1608 if (tx_ret_val
== NETDEV_TX_OK
)
1612 if (good_cnt
!= 64) {
1617 /* allow 200 milliseconds for packets to go from tx to rx */
1620 good_cnt
= igb_clean_test_rings(rx_ring
, tx_ring
, size
);
1621 if (good_cnt
!= 64) {
1625 } /* end loop count loop */
1627 /* free the original skb */
1633 static int igb_loopback_test(struct igb_adapter
*adapter
, u64
*data
)
1635 /* PHY loopback cannot be performed if SoL/IDER
1636 * sessions are active */
1637 if (igb_check_reset_block(&adapter
->hw
)) {
1638 dev_err(&adapter
->pdev
->dev
,
1639 "Cannot do PHY loopback test "
1640 "when SoL/IDER is active.\n");
1644 *data
= igb_setup_desc_rings(adapter
);
1647 *data
= igb_setup_loopback_test(adapter
);
1650 *data
= igb_run_loopback_test(adapter
);
1651 igb_loopback_cleanup(adapter
);
1654 igb_free_desc_rings(adapter
);
1659 static int igb_link_test(struct igb_adapter
*adapter
, u64
*data
)
1661 struct e1000_hw
*hw
= &adapter
->hw
;
1663 if (hw
->phy
.media_type
== e1000_media_type_internal_serdes
) {
1665 hw
->mac
.serdes_has_link
= false;
1667 /* On some blade server designs, link establishment
1668 * could take as long as 2-3 minutes */
1670 hw
->mac
.ops
.check_for_link(&adapter
->hw
);
1671 if (hw
->mac
.serdes_has_link
)
1674 } while (i
++ < 3750);
1678 hw
->mac
.ops
.check_for_link(&adapter
->hw
);
1679 if (hw
->mac
.autoneg
)
1682 if (!(rd32(E1000_STATUS
) & E1000_STATUS_LU
))
1688 static void igb_diag_test(struct net_device
*netdev
,
1689 struct ethtool_test
*eth_test
, u64
*data
)
1691 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1692 u16 autoneg_advertised
;
1693 u8 forced_speed_duplex
, autoneg
;
1694 bool if_running
= netif_running(netdev
);
1696 set_bit(__IGB_TESTING
, &adapter
->state
);
1697 if (eth_test
->flags
== ETH_TEST_FL_OFFLINE
) {
1700 /* save speed, duplex, autoneg settings */
1701 autoneg_advertised
= adapter
->hw
.phy
.autoneg_advertised
;
1702 forced_speed_duplex
= adapter
->hw
.mac
.forced_speed_duplex
;
1703 autoneg
= adapter
->hw
.mac
.autoneg
;
1705 dev_info(&adapter
->pdev
->dev
, "offline testing starting\n");
1707 /* Link test performed before hardware reset so autoneg doesn't
1708 * interfere with test result */
1709 if (igb_link_test(adapter
, &data
[4]))
1710 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1713 /* indicate we're in test mode */
1718 if (igb_reg_test(adapter
, &data
[0]))
1719 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1722 if (igb_eeprom_test(adapter
, &data
[1]))
1723 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1726 if (igb_intr_test(adapter
, &data
[2]))
1727 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1730 if (igb_loopback_test(adapter
, &data
[3]))
1731 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1733 /* restore speed, duplex, autoneg settings */
1734 adapter
->hw
.phy
.autoneg_advertised
= autoneg_advertised
;
1735 adapter
->hw
.mac
.forced_speed_duplex
= forced_speed_duplex
;
1736 adapter
->hw
.mac
.autoneg
= autoneg
;
1738 /* force this routine to wait until autoneg complete/timeout */
1739 adapter
->hw
.phy
.autoneg_wait_to_complete
= true;
1741 adapter
->hw
.phy
.autoneg_wait_to_complete
= false;
1743 clear_bit(__IGB_TESTING
, &adapter
->state
);
1747 dev_info(&adapter
->pdev
->dev
, "online testing starting\n");
1749 if (igb_link_test(adapter
, &data
[4]))
1750 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1752 /* Online tests aren't run; pass by default */
1758 clear_bit(__IGB_TESTING
, &adapter
->state
);
1760 msleep_interruptible(4 * 1000);
1763 static int igb_wol_exclusion(struct igb_adapter
*adapter
,
1764 struct ethtool_wolinfo
*wol
)
1766 struct e1000_hw
*hw
= &adapter
->hw
;
1767 int retval
= 1; /* fail by default */
1769 switch (hw
->device_id
) {
1770 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1771 /* WoL not supported */
1774 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1775 case E1000_DEV_ID_82576_FIBER
:
1776 case E1000_DEV_ID_82576_SERDES
:
1777 /* Wake events not supported on port B */
1778 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
) {
1782 /* return success for non excluded adapter ports */
1785 case E1000_DEV_ID_82576_QUAD_COPPER
:
1786 /* quad port adapters only support WoL on port A */
1787 if (!(adapter
->flags
& IGB_FLAG_QUAD_PORT_A
)) {
1791 /* return success for non excluded adapter ports */
1795 /* dual port cards only support WoL on port A from now on
1796 * unless it was enabled in the eeprom for port B
1797 * so exclude FUNC_1 ports from having WoL enabled */
1798 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
&&
1799 !adapter
->eeprom_wol
) {
1810 static void igb_get_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
1812 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1814 wol
->supported
= WAKE_UCAST
| WAKE_MCAST
|
1815 WAKE_BCAST
| WAKE_MAGIC
;
1818 /* this function will set ->supported = 0 and return 1 if wol is not
1819 * supported by this hardware */
1820 if (igb_wol_exclusion(adapter
, wol
) ||
1821 !device_can_wakeup(&adapter
->pdev
->dev
))
1824 /* apply any specific unsupported masks here */
1825 switch (adapter
->hw
.device_id
) {
1830 if (adapter
->wol
& E1000_WUFC_EX
)
1831 wol
->wolopts
|= WAKE_UCAST
;
1832 if (adapter
->wol
& E1000_WUFC_MC
)
1833 wol
->wolopts
|= WAKE_MCAST
;
1834 if (adapter
->wol
& E1000_WUFC_BC
)
1835 wol
->wolopts
|= WAKE_BCAST
;
1836 if (adapter
->wol
& E1000_WUFC_MAG
)
1837 wol
->wolopts
|= WAKE_MAGIC
;
1842 static int igb_set_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
1844 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1846 if (wol
->wolopts
& (WAKE_PHY
| WAKE_ARP
| WAKE_MAGICSECURE
))
1849 if (igb_wol_exclusion(adapter
, wol
) ||
1850 !device_can_wakeup(&adapter
->pdev
->dev
))
1851 return wol
->wolopts
? -EOPNOTSUPP
: 0;
1853 /* these settings will always override what we currently have */
1856 if (wol
->wolopts
& WAKE_UCAST
)
1857 adapter
->wol
|= E1000_WUFC_EX
;
1858 if (wol
->wolopts
& WAKE_MCAST
)
1859 adapter
->wol
|= E1000_WUFC_MC
;
1860 if (wol
->wolopts
& WAKE_BCAST
)
1861 adapter
->wol
|= E1000_WUFC_BC
;
1862 if (wol
->wolopts
& WAKE_MAGIC
)
1863 adapter
->wol
|= E1000_WUFC_MAG
;
1864 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1869 /* bit defines for adapter->led_status */
1870 #define IGB_LED_ON 0
1872 static int igb_phys_id(struct net_device
*netdev
, u32 data
)
1874 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1875 struct e1000_hw
*hw
= &adapter
->hw
;
1876 unsigned long timeout
;
1878 timeout
= data
* 1000;
1881 * msleep_interruptable only accepts unsigned int so we are limited
1882 * in how long a duration we can wait
1884 if (!timeout
|| timeout
> UINT_MAX
)
1888 msleep_interruptible(timeout
);
1891 clear_bit(IGB_LED_ON
, &adapter
->led_status
);
1892 igb_cleanup_led(hw
);
1897 static int igb_set_coalesce(struct net_device
*netdev
,
1898 struct ethtool_coalesce
*ec
)
1900 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1903 if ((ec
->rx_coalesce_usecs
> IGB_MAX_ITR_USECS
) ||
1904 ((ec
->rx_coalesce_usecs
> 3) &&
1905 (ec
->rx_coalesce_usecs
< IGB_MIN_ITR_USECS
)) ||
1906 (ec
->rx_coalesce_usecs
== 2))
1909 if ((ec
->tx_coalesce_usecs
> IGB_MAX_ITR_USECS
) ||
1910 ((ec
->tx_coalesce_usecs
> 3) &&
1911 (ec
->tx_coalesce_usecs
< IGB_MIN_ITR_USECS
)) ||
1912 (ec
->tx_coalesce_usecs
== 2))
1915 if ((adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
) && ec
->tx_coalesce_usecs
)
1918 /* convert to rate of irq's per second */
1919 if (ec
->rx_coalesce_usecs
&& ec
->rx_coalesce_usecs
<= 3)
1920 adapter
->rx_itr_setting
= ec
->rx_coalesce_usecs
;
1922 adapter
->rx_itr_setting
= ec
->rx_coalesce_usecs
<< 2;
1924 /* convert to rate of irq's per second */
1925 if (adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
)
1926 adapter
->tx_itr_setting
= adapter
->rx_itr_setting
;
1927 else if (ec
->tx_coalesce_usecs
&& ec
->tx_coalesce_usecs
<= 3)
1928 adapter
->tx_itr_setting
= ec
->tx_coalesce_usecs
;
1930 adapter
->tx_itr_setting
= ec
->tx_coalesce_usecs
<< 2;
1932 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1933 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
1934 if (q_vector
->rx_ring
)
1935 q_vector
->itr_val
= adapter
->rx_itr_setting
;
1937 q_vector
->itr_val
= adapter
->tx_itr_setting
;
1938 if (q_vector
->itr_val
&& q_vector
->itr_val
<= 3)
1939 q_vector
->itr_val
= IGB_START_ITR
;
1940 q_vector
->set_itr
= 1;
1946 static int igb_get_coalesce(struct net_device
*netdev
,
1947 struct ethtool_coalesce
*ec
)
1949 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1951 if (adapter
->rx_itr_setting
<= 3)
1952 ec
->rx_coalesce_usecs
= adapter
->rx_itr_setting
;
1954 ec
->rx_coalesce_usecs
= adapter
->rx_itr_setting
>> 2;
1956 if (!(adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
)) {
1957 if (adapter
->tx_itr_setting
<= 3)
1958 ec
->tx_coalesce_usecs
= adapter
->tx_itr_setting
;
1960 ec
->tx_coalesce_usecs
= adapter
->tx_itr_setting
>> 2;
1966 static int igb_nway_reset(struct net_device
*netdev
)
1968 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1969 if (netif_running(netdev
))
1970 igb_reinit_locked(adapter
);
1974 static int igb_get_sset_count(struct net_device
*netdev
, int sset
)
1978 return IGB_STATS_LEN
;
1980 return IGB_TEST_LEN
;
1986 static void igb_get_ethtool_stats(struct net_device
*netdev
,
1987 struct ethtool_stats
*stats
, u64
*data
)
1989 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1990 struct net_device_stats
*net_stats
= &netdev
->stats
;
1995 igb_update_stats(adapter
);
1997 for (i
= 0; i
< IGB_GLOBAL_STATS_LEN
; i
++) {
1998 p
= (char *)adapter
+ igb_gstrings_stats
[i
].stat_offset
;
1999 data
[i
] = (igb_gstrings_stats
[i
].sizeof_stat
==
2000 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
2002 for (j
= 0; j
< IGB_NETDEV_STATS_LEN
; j
++, i
++) {
2003 p
= (char *)net_stats
+ igb_gstrings_net_stats
[j
].stat_offset
;
2004 data
[i
] = (igb_gstrings_net_stats
[j
].sizeof_stat
==
2005 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
2007 for (j
= 0; j
< adapter
->num_tx_queues
; j
++) {
2008 queue_stat
= (u64
*)&adapter
->tx_ring
[j
].tx_stats
;
2009 for (k
= 0; k
< IGB_TX_QUEUE_STATS_LEN
; k
++, i
++)
2010 data
[i
] = queue_stat
[k
];
2012 for (j
= 0; j
< adapter
->num_rx_queues
; j
++) {
2013 queue_stat
= (u64
*)&adapter
->rx_ring
[j
].rx_stats
;
2014 for (k
= 0; k
< IGB_RX_QUEUE_STATS_LEN
; k
++, i
++)
2015 data
[i
] = queue_stat
[k
];
2019 static void igb_get_strings(struct net_device
*netdev
, u32 stringset
, u8
*data
)
2021 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2025 switch (stringset
) {
2027 memcpy(data
, *igb_gstrings_test
,
2028 IGB_TEST_LEN
*ETH_GSTRING_LEN
);
2031 for (i
= 0; i
< IGB_GLOBAL_STATS_LEN
; i
++) {
2032 memcpy(p
, igb_gstrings_stats
[i
].stat_string
,
2034 p
+= ETH_GSTRING_LEN
;
2036 for (i
= 0; i
< IGB_NETDEV_STATS_LEN
; i
++) {
2037 memcpy(p
, igb_gstrings_net_stats
[i
].stat_string
,
2039 p
+= ETH_GSTRING_LEN
;
2041 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2042 sprintf(p
, "tx_queue_%u_packets", i
);
2043 p
+= ETH_GSTRING_LEN
;
2044 sprintf(p
, "tx_queue_%u_bytes", i
);
2045 p
+= ETH_GSTRING_LEN
;
2046 sprintf(p
, "tx_queue_%u_restart", i
);
2047 p
+= ETH_GSTRING_LEN
;
2049 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2050 sprintf(p
, "rx_queue_%u_packets", i
);
2051 p
+= ETH_GSTRING_LEN
;
2052 sprintf(p
, "rx_queue_%u_bytes", i
);
2053 p
+= ETH_GSTRING_LEN
;
2054 sprintf(p
, "rx_queue_%u_drops", i
);
2055 p
+= ETH_GSTRING_LEN
;
2056 sprintf(p
, "rx_queue_%u_csum_err", i
);
2057 p
+= ETH_GSTRING_LEN
;
2058 sprintf(p
, "rx_queue_%u_alloc_failed", i
);
2059 p
+= ETH_GSTRING_LEN
;
2061 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2066 static const struct ethtool_ops igb_ethtool_ops
= {
2067 .get_settings
= igb_get_settings
,
2068 .set_settings
= igb_set_settings
,
2069 .get_drvinfo
= igb_get_drvinfo
,
2070 .get_regs_len
= igb_get_regs_len
,
2071 .get_regs
= igb_get_regs
,
2072 .get_wol
= igb_get_wol
,
2073 .set_wol
= igb_set_wol
,
2074 .get_msglevel
= igb_get_msglevel
,
2075 .set_msglevel
= igb_set_msglevel
,
2076 .nway_reset
= igb_nway_reset
,
2077 .get_link
= ethtool_op_get_link
,
2078 .get_eeprom_len
= igb_get_eeprom_len
,
2079 .get_eeprom
= igb_get_eeprom
,
2080 .set_eeprom
= igb_set_eeprom
,
2081 .get_ringparam
= igb_get_ringparam
,
2082 .set_ringparam
= igb_set_ringparam
,
2083 .get_pauseparam
= igb_get_pauseparam
,
2084 .set_pauseparam
= igb_set_pauseparam
,
2085 .get_rx_csum
= igb_get_rx_csum
,
2086 .set_rx_csum
= igb_set_rx_csum
,
2087 .get_tx_csum
= igb_get_tx_csum
,
2088 .set_tx_csum
= igb_set_tx_csum
,
2089 .get_sg
= ethtool_op_get_sg
,
2090 .set_sg
= ethtool_op_set_sg
,
2091 .get_tso
= ethtool_op_get_tso
,
2092 .set_tso
= igb_set_tso
,
2093 .self_test
= igb_diag_test
,
2094 .get_strings
= igb_get_strings
,
2095 .phys_id
= igb_phys_id
,
2096 .get_sset_count
= igb_get_sset_count
,
2097 .get_ethtool_stats
= igb_get_ethtool_stats
,
2098 .get_coalesce
= igb_get_coalesce
,
2099 .set_coalesce
= igb_set_coalesce
,
2102 void igb_set_ethtool_ops(struct net_device
*netdev
)
2104 SET_ETHTOOL_OPS(netdev
, &igb_ethtool_ops
);