blkcg: fix blkg_alloc() failure path
[linux-2.6.git] / drivers / mtd / nand / orion_nand.c
blob513dc88a05ca422ac23525dac7db3f20ef9b0bfc
1 /*
2 * drivers/mtd/nand/orion_nand.c
4 * NAND support for Marvell Orion SoC platforms
6 * Tzachi Perelstein <tzachi@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/slab.h>
14 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/of.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/nand.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/clk.h>
21 #include <linux/err.h>
22 #include <asm/io.h>
23 #include <asm/sizes.h>
24 #include <mach/hardware.h>
25 #include <plat/orion_nand.h>
27 static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
29 struct nand_chip *nc = mtd->priv;
30 struct orion_nand_data *board = nc->priv;
31 u32 offs;
33 if (cmd == NAND_CMD_NONE)
34 return;
36 if (ctrl & NAND_CLE)
37 offs = (1 << board->cle);
38 else if (ctrl & NAND_ALE)
39 offs = (1 << board->ale);
40 else
41 return;
43 if (nc->options & NAND_BUSWIDTH_16)
44 offs <<= 1;
46 writeb(cmd, nc->IO_ADDR_W + offs);
49 static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
51 struct nand_chip *chip = mtd->priv;
52 void __iomem *io_base = chip->IO_ADDR_R;
53 uint64_t *buf64;
54 int i = 0;
56 while (len && (unsigned long)buf & 7) {
57 *buf++ = readb(io_base);
58 len--;
60 buf64 = (uint64_t *)buf;
61 while (i < len/8) {
63 * Since GCC has no proper constraint (PR 43518)
64 * force x variable to r2/r3 registers as ldrd instruction
65 * requires first register to be even.
67 register uint64_t x asm ("r2");
69 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
70 buf64[i++] = x;
72 i *= 8;
73 while (i < len)
74 buf[i++] = readb(io_base);
77 static int __init orion_nand_probe(struct platform_device *pdev)
79 struct mtd_info *mtd;
80 struct mtd_part_parser_data ppdata = {};
81 struct nand_chip *nc;
82 struct orion_nand_data *board;
83 struct resource *res;
84 struct clk *clk;
85 void __iomem *io_base;
86 int ret = 0;
87 u32 val = 0;
89 nc = kzalloc(sizeof(struct nand_chip) + sizeof(struct mtd_info), GFP_KERNEL);
90 if (!nc) {
91 printk(KERN_ERR "orion_nand: failed to allocate device structure.\n");
92 ret = -ENOMEM;
93 goto no_res;
95 mtd = (struct mtd_info *)(nc + 1);
97 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
98 if (!res) {
99 ret = -ENODEV;
100 goto no_res;
103 io_base = ioremap(res->start, resource_size(res));
104 if (!io_base) {
105 printk(KERN_ERR "orion_nand: ioremap failed\n");
106 ret = -EIO;
107 goto no_res;
110 if (pdev->dev.of_node) {
111 board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data),
112 GFP_KERNEL);
113 if (!board) {
114 printk(KERN_ERR "orion_nand: failed to allocate board structure.\n");
115 ret = -ENOMEM;
116 goto no_res;
118 if (!of_property_read_u32(pdev->dev.of_node, "cle", &val))
119 board->cle = (u8)val;
120 else
121 board->cle = 0;
122 if (!of_property_read_u32(pdev->dev.of_node, "ale", &val))
123 board->ale = (u8)val;
124 else
125 board->ale = 1;
126 if (!of_property_read_u32(pdev->dev.of_node,
127 "bank-width", &val))
128 board->width = (u8)val * 8;
129 else
130 board->width = 8;
131 if (!of_property_read_u32(pdev->dev.of_node,
132 "chip-delay", &val))
133 board->chip_delay = (u8)val;
134 } else
135 board = pdev->dev.platform_data;
137 mtd->priv = nc;
138 mtd->owner = THIS_MODULE;
140 nc->priv = board;
141 nc->IO_ADDR_R = nc->IO_ADDR_W = io_base;
142 nc->cmd_ctrl = orion_nand_cmd_ctrl;
143 nc->read_buf = orion_nand_read_buf;
144 nc->ecc.mode = NAND_ECC_SOFT;
146 if (board->chip_delay)
147 nc->chip_delay = board->chip_delay;
149 WARN(board->width > 16,
150 "%d bit bus width out of range",
151 board->width);
153 if (board->width == 16)
154 nc->options |= NAND_BUSWIDTH_16;
156 if (board->dev_ready)
157 nc->dev_ready = board->dev_ready;
159 platform_set_drvdata(pdev, mtd);
161 /* Not all platforms can gate the clock, so it is not
162 an error if the clock does not exists. */
163 clk = clk_get(&pdev->dev, NULL);
164 if (!IS_ERR(clk)) {
165 clk_prepare_enable(clk);
166 clk_put(clk);
169 if (nand_scan(mtd, 1)) {
170 ret = -ENXIO;
171 goto no_dev;
174 mtd->name = "orion_nand";
175 ppdata.of_node = pdev->dev.of_node;
176 ret = mtd_device_parse_register(mtd, NULL, &ppdata,
177 board->parts, board->nr_parts);
178 if (ret) {
179 nand_release(mtd);
180 goto no_dev;
183 return 0;
185 no_dev:
186 platform_set_drvdata(pdev, NULL);
187 iounmap(io_base);
188 no_res:
189 kfree(nc);
191 return ret;
194 static int __devexit orion_nand_remove(struct platform_device *pdev)
196 struct mtd_info *mtd = platform_get_drvdata(pdev);
197 struct nand_chip *nc = mtd->priv;
198 struct clk *clk;
200 nand_release(mtd);
202 iounmap(nc->IO_ADDR_W);
204 kfree(nc);
206 clk = clk_get(&pdev->dev, NULL);
207 if (!IS_ERR(clk)) {
208 clk_disable_unprepare(clk);
209 clk_put(clk);
212 return 0;
215 #ifdef CONFIG_OF
216 static struct of_device_id orion_nand_of_match_table[] = {
217 { .compatible = "mrvl,orion-nand", },
220 #endif
222 static struct platform_driver orion_nand_driver = {
223 .remove = __devexit_p(orion_nand_remove),
224 .driver = {
225 .name = "orion_nand",
226 .owner = THIS_MODULE,
227 .of_match_table = of_match_ptr(orion_nand_of_match_table),
231 static int __init orion_nand_init(void)
233 return platform_driver_probe(&orion_nand_driver, orion_nand_probe);
236 static void __exit orion_nand_exit(void)
238 platform_driver_unregister(&orion_nand_driver);
241 module_init(orion_nand_init);
242 module_exit(orion_nand_exit);
244 MODULE_LICENSE("GPL");
245 MODULE_AUTHOR("Tzachi Perelstein");
246 MODULE_DESCRIPTION("NAND glue for Orion platforms");
247 MODULE_ALIAS("platform:orion_nand");