drivers/mtd/nand/ams-delta.c

   1 /*
   2  *  drivers/mtd/nand/ams-delta.c
   3  *
   4  *  Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
   5  *
   6  *  Derived from drivers/mtd/toto.c
   7  *  Converted to platform driver by Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
   8  *  Partially stolen from drivers/mtd/nand/plat_nand.c
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  *
  14  *  Overview:
  15  *   This is a device driver for the NAND flash device found on the
  16  *   Amstrad E3 (Delta).
  17  */
  18
  19 #include <linux/slab.h>
  20 #include <linux/init.h>
  21 #include <linux/module.h>
  22 #include <linux/delay.h>
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/nand.h>
  25 #include <linux/mtd/partitions.h>
  26 #include <asm/io.h>
  27 #include <mach/hardware.h>
  28 #include <asm/sizes.h>
  29 #include <linux/gpio.h>
  30 #include <plat/board-ams-delta.h>
  31
  32 /*
  33  * MTD structure for E3 (Delta)
  34  */
  35 static struct mtd_info *ams_delta_mtd = NULL;
  36
  37 /*
  38  * Define partitions for flash devices
  39  */
  40
  41 static struct mtd_partition partition_info[] = {
  42         { .name         = "Kernel",
  43           .offset       = 0,
  44           .size         = 3 * SZ_1M + SZ_512K },
  45         { .name         = "u-boot",
  46           .offset       = 3 * SZ_1M + SZ_512K,
  47           .size         = SZ_256K },
  48         { .name         = "u-boot params",
  49           .offset       = 3 * SZ_1M + SZ_512K + SZ_256K,
  50           .size         = SZ_256K },
  51         { .name         = "Amstrad LDR",
  52           .offset       = 4 * SZ_1M,
  53           .size         = SZ_256K },
  54         { .name         = "File system",
  55           .offset       = 4 * SZ_1M + 1 * SZ_256K,
  56           .size         = 27 * SZ_1M },
  57         { .name         = "PBL reserved",
  58           .offset       = 32 * SZ_1M - 3 * SZ_256K,
  59           .size         =  3 * SZ_256K },
  60 };
  61
  62 static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
  63 {
  64         struct nand_chip *this = mtd->priv;
  65         void __iomem *io_base = this->priv;
  66
  67         writew(0, io_base + OMAP_MPUIO_IO_CNTL);
  68         writew(byte, this->IO_ADDR_W);
  69         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 0);
  70         ndelay(40);
  71         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 1);
  72 }
  73
  74 static u_char ams_delta_read_byte(struct mtd_info *mtd)
  75 {
  76         u_char res;
  77         struct nand_chip *this = mtd->priv;
  78         void __iomem *io_base = this->priv;
  79
  80         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 0);
  81         ndelay(40);
  82         writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
  83         res = readw(this->IO_ADDR_R);
  84         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 1);
  85
  86         return res;
  87 }
  88
  89 static void ams_delta_write_buf(struct mtd_info *mtd, const u_char *buf,
  90                                 int len)
  91 {
  92         int i;
  93
  94         for (i=0; i<len; i++)
  95                 ams_delta_write_byte(mtd, buf[i]);
  96 }
  97
  98 static void ams_delta_read_buf(struct mtd_info *mtd, u_char *buf, int len)
  99 {
 100         int i;
 101
 102         for (i=0; i<len; i++)
 103                 buf[i] = ams_delta_read_byte(mtd);
 104 }
 105
 106 static int ams_delta_verify_buf(struct mtd_info *mtd, const u_char *buf,
 107                                 int len)
 108 {
 109         int i;
 110
 111         for (i=0; i<len; i++)
 112                 if (buf[i] != ams_delta_read_byte(mtd))
 113                         return -EFAULT;
 114
 115         return 0;
 116 }
 117
 118 /*
 119  * Command control function
 120  *
 121  * ctrl:
 122  * NAND_NCE: bit 0 -> bit 2
 123  * NAND_CLE: bit 1 -> bit 7
 124  * NAND_ALE: bit 2 -> bit 6
 125  */
 126 static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd,
 127                                 unsigned int ctrl)
 128 {
 129
 130         if (ctrl & NAND_CTRL_CHANGE) {
 131                 gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NCE,
 132                                 (ctrl & NAND_NCE) == 0);
 133                 gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_CLE,
 134                                 (ctrl & NAND_CLE) != 0);
 135                 gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_ALE,
 136                                 (ctrl & NAND_ALE) != 0);
 137         }
 138
 139         if (cmd != NAND_CMD_NONE)
 140                 ams_delta_write_byte(mtd, cmd);
 141 }
 142
 143 static int ams_delta_nand_ready(struct mtd_info *mtd)
 144 {
 145         return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB);
 146 }
 147
 148 static const struct gpio _mandatory_gpio[] = {
 149         {
 150                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NCE,
 151                 .flags  = GPIOF_OUT_INIT_HIGH,
 152                 .label  = "nand_nce",
 153         },
 154         {
 155                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NRE,
 156                 .flags  = GPIOF_OUT_INIT_HIGH,
 157                 .label  = "nand_nre",
 158         },
 159         {
 160                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NWP,
 161                 .flags  = GPIOF_OUT_INIT_HIGH,
 162                 .label  = "nand_nwp",
 163         },
 164         {
 165                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NWE,
 166                 .flags  = GPIOF_OUT_INIT_HIGH,
 167                 .label  = "nand_nwe",
 168         },
 169         {
 170                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_ALE,
 171                 .flags  = GPIOF_OUT_INIT_LOW,
 172                 .label  = "nand_ale",
 173         },
 174         {
 175                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_CLE,
 176                 .flags  = GPIOF_OUT_INIT_LOW,
 177                 .label  = "nand_cle",
 178         },
 179 };
 180
 181 /*
 182  * Main initialization routine
 183  */
 184 static int __devinit ams_delta_init(struct platform_device *pdev)
 185 {
 186         struct nand_chip *this;
 187         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 188         void __iomem *io_base;
 189         int err = 0;
 190
 191         if (!res)
 192                 return -ENXIO;
 193
 194         /* Allocate memory for MTD device structure and private data */
 195         ams_delta_mtd = kmalloc(sizeof(struct mtd_info) +
 196                                 sizeof(struct nand_chip), GFP_KERNEL);
 197         if (!ams_delta_mtd) {
 198                 printk (KERN_WARNING "Unable to allocate E3 NAND MTD device structure.\n");
 199                 err = -ENOMEM;
 200                 goto out;
 201         }
 202
 203         ams_delta_mtd->owner = THIS_MODULE;
 204
 205         /* Get pointer to private data */
 206         this = (struct nand_chip *) (&ams_delta_mtd[1]);
 207
 208         /* Initialize structures */
 209         memset(ams_delta_mtd, 0, sizeof(struct mtd_info));
 210         memset(this, 0, sizeof(struct nand_chip));
 211
 212         /* Link the private data with the MTD structure */
 213         ams_delta_mtd->priv = this;
 214
 215         /*
 216          * Don't try to request the memory region from here,
 217          * it should have been already requested from the
 218          * gpio-omap driver and requesting it again would fail.
 219          */
 220
 221         io_base = ioremap(res->start, resource_size(res));
 222         if (io_base == NULL) {
 223                 dev_err(&pdev->dev, "ioremap failed\n");
 224                 err = -EIO;
 225                 goto out_free;
 226         }
 227
 228         this->priv = io_base;
 229
 230         /* Set address of NAND IO lines */
 231         this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH;
 232         this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT;
 233         this->read_byte = ams_delta_read_byte;
 234         this->write_buf = ams_delta_write_buf;
 235         this->read_buf = ams_delta_read_buf;
 236         this->verify_buf = ams_delta_verify_buf;
 237         this->cmd_ctrl = ams_delta_hwcontrol;
 238         if (gpio_request(AMS_DELTA_GPIO_PIN_NAND_RB, "nand_rdy") == 0) {
 239                 this->dev_ready = ams_delta_nand_ready;
 240         } else {
 241                 this->dev_ready = NULL;
 242                 printk(KERN_NOTICE "Couldn't request gpio for Delta NAND ready.\n");
 243         }
 244         /* 25 us command delay time */
 245         this->chip_delay = 30;
 246         this->ecc.mode = NAND_ECC_SOFT;
 247
 248         platform_set_drvdata(pdev, io_base);
 249
 250         /* Set chip enabled, but  */
 251         err = gpio_request_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
 252         if (err)
 253                 goto out_gpio;
 254
 255         /* Scan to find existence of the device */
 256         if (nand_scan(ams_delta_mtd, 1)) {
 257                 err = -ENXIO;
 258                 goto out_mtd;
 259         }
 260
 261         /* Register the partitions */
 262         mtd_device_register(ams_delta_mtd, partition_info,
 263                             ARRAY_SIZE(partition_info));
 264
 265         goto out;
 266
 267  out_mtd:
 268         gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
 269 out_gpio:
 270         platform_set_drvdata(pdev, NULL);
 271         gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
 272         iounmap(io_base);
 273 out_free:
 274         kfree(ams_delta_mtd);
 275  out:
 276         return err;
 277 }
 278
 279 /*
 280  * Clean up routine
 281  */
 282 static int __devexit ams_delta_cleanup(struct platform_device *pdev)
 283 {
 284         void __iomem *io_base = platform_get_drvdata(pdev);
 285
 286         /* Release resources, unregister device */
 287         nand_release(ams_delta_mtd);
 288
 289         gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
 290         gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
 291         iounmap(io_base);
 292
 293         /* Free the MTD device structure */
 294         kfree(ams_delta_mtd);
 295
 296         return 0;
 297 }
 298
 299 static struct platform_driver ams_delta_nand_driver = {
 300         .probe          = ams_delta_init,
 301         .remove         = __devexit_p(ams_delta_cleanup),
 302         .driver         = {
 303                 .name   = "ams-delta-nand",
 304                 .owner  = THIS_MODULE,
 305         },
 306 };
 307
 308 module_platform_driver(ams_delta_nand_driver);
 309
 310 MODULE_LICENSE("GPL");
 311 MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>");
 312 MODULE_DESCRIPTION("Glue layer for NAND flash on Amstrad E3 (Delta)");