arch/blackfin/kernel/bfin_gpio.c

   1 /*
   2  * GPIO Abstraction Layer
   3  *
   4  * Copyright 2006-2009 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later
   7  */
   8
   9 #include <linux/delay.h>
  10 #include <linux/module.h>
  11 #include <linux/err.h>
  12 #include <linux/proc_fs.h>
  13 #include <asm/blackfin.h>
  14 #include <asm/gpio.h>
  15 #include <asm/portmux.h>
  16 #include <linux/irq.h>
  17
  18 #if ANOMALY_05000311 || ANOMALY_05000323
  19 enum {
  20         AWA_data = SYSCR,
  21         AWA_data_clear = SYSCR,
  22         AWA_data_set = SYSCR,
  23         AWA_toggle = SYSCR,
  24         AWA_maska = BFIN_UART_SCR,
  25         AWA_maska_clear = BFIN_UART_SCR,
  26         AWA_maska_set = BFIN_UART_SCR,
  27         AWA_maska_toggle = BFIN_UART_SCR,
  28         AWA_maskb = BFIN_UART_GCTL,
  29         AWA_maskb_clear = BFIN_UART_GCTL,
  30         AWA_maskb_set = BFIN_UART_GCTL,
  31         AWA_maskb_toggle = BFIN_UART_GCTL,
  32         AWA_dir = SPORT1_STAT,
  33         AWA_polar = SPORT1_STAT,
  34         AWA_edge = SPORT1_STAT,
  35         AWA_both = SPORT1_STAT,
  36 #if ANOMALY_05000311
  37         AWA_inen = TIMER_ENABLE,
  38 #elif ANOMALY_05000323
  39         AWA_inen = DMA1_1_CONFIG,
  40 #endif
  41 };
  42         /* Anomaly Workaround */
  43 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  44 #else
  45 #define AWA_DUMMY_READ(...)  do { } while (0)
  46 #endif
  47
  48 static struct gpio_port_t * const gpio_array[] = {
  49 #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
  50         (struct gpio_port_t *) FIO_FLAG_D,
  51 #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  52         (struct gpio_port_t *) PORTFIO,
  53         (struct gpio_port_t *) PORTGIO,
  54         (struct gpio_port_t *) PORTHIO,
  55 #elif defined(BF561_FAMILY)
  56         (struct gpio_port_t *) FIO0_FLAG_D,
  57         (struct gpio_port_t *) FIO1_FLAG_D,
  58         (struct gpio_port_t *) FIO2_FLAG_D,
  59 #elif defined(CONFIG_BF54x)
  60         (struct gpio_port_t *)PORTA_FER,
  61         (struct gpio_port_t *)PORTB_FER,
  62         (struct gpio_port_t *)PORTC_FER,
  63         (struct gpio_port_t *)PORTD_FER,
  64         (struct gpio_port_t *)PORTE_FER,
  65         (struct gpio_port_t *)PORTF_FER,
  66         (struct gpio_port_t *)PORTG_FER,
  67         (struct gpio_port_t *)PORTH_FER,
  68         (struct gpio_port_t *)PORTI_FER,
  69         (struct gpio_port_t *)PORTJ_FER,
  70 #else
  71 # error no gpio arrays defined
  72 #endif
  73 };
  74
  75 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  76 static unsigned short * const port_fer[] = {
  77         (unsigned short *) PORTF_FER,
  78         (unsigned short *) PORTG_FER,
  79         (unsigned short *) PORTH_FER,
  80 };
  81
  82 # if !defined(BF537_FAMILY)
  83 static unsigned short * const port_mux[] = {
  84         (unsigned short *) PORTF_MUX,
  85         (unsigned short *) PORTG_MUX,
  86         (unsigned short *) PORTH_MUX,
  87 };
  88
  89 static const
  90 u8 pmux_offset[][16] = {
  91 #  if defined(CONFIG_BF52x)
  92         { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
  93         { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
  94         { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
  95 #  elif defined(CONFIG_BF51x)
  96         { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
  97         { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
  98         { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
  99 #  endif
 100 };
 101 # endif
 102
 103 #elif defined(BF538_FAMILY)
 104 static unsigned short * const port_fer[] = {
 105         (unsigned short *) PORTCIO_FER,
 106         (unsigned short *) PORTDIO_FER,
 107         (unsigned short *) PORTEIO_FER,
 108 };
 109 #endif
 110
 111 static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
 112 static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
 113 static unsigned short reserved_gpio_irq_map[GPIO_BANK_NUM];
 114
 115 #define RESOURCE_LABEL_SIZE     16
 116
 117 static struct str_ident {
 118         char name[RESOURCE_LABEL_SIZE];
 119 } str_ident[MAX_RESOURCES];
 120
 121 #if defined(CONFIG_PM)
 122 static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
 123 #endif
 124
 125 inline int check_gpio(unsigned gpio)
 126 {
 127 #if defined(CONFIG_BF54x)
 128         if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
 129             || gpio == GPIO_PH14 || gpio == GPIO_PH15
 130             || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
 131                 return -EINVAL;
 132 #endif
 133         if (gpio >= MAX_BLACKFIN_GPIOS)
 134                 return -EINVAL;
 135         return 0;
 136 }
 137
 138 static void gpio_error(unsigned gpio)
 139 {
 140         printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
 141 }
 142
 143 static void set_label(unsigned short ident, const char *label)
 144 {
 145         if (label) {
 146                 strncpy(str_ident[ident].name, label,
 147                          RESOURCE_LABEL_SIZE);
 148                 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
 149         }
 150 }
 151
 152 static char *get_label(unsigned short ident)
 153 {
 154         return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
 155 }
 156
 157 static int cmp_label(unsigned short ident, const char *label)
 158 {
 159         if (label == NULL) {
 160                 dump_stack();
 161                 printk(KERN_ERR "Please provide none-null label\n");
 162         }
 163
 164         if (label)
 165                 return strcmp(str_ident[ident].name, label);
 166         else
 167                 return -EINVAL;
 168 }
 169
 170 static void port_setup(unsigned gpio, unsigned short usage)
 171 {
 172 #if defined(BF538_FAMILY)
 173         /*
 174          * BF538/9 Port C,D and E are special.
 175          * Inverted PORT_FER polarity on CDE and no PORF_FER on F
 176          * Regular PORT F GPIOs are handled here, CDE are exclusively
 177          * managed by GPIOLIB
 178          */
 179
 180         if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
 181                 return;
 182
 183         gpio -= MAX_BLACKFIN_GPIOS;
 184
 185         if (usage == GPIO_USAGE)
 186                 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
 187         else
 188                 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
 189         SSYNC();
 190         return;
 191 #endif
 192
 193         if (check_gpio(gpio))
 194                 return;
 195
 196 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 197         if (usage == GPIO_USAGE)
 198                 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
 199         else
 200                 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
 201         SSYNC();
 202 #elif defined(CONFIG_BF54x)
 203         if (usage == GPIO_USAGE)
 204                 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
 205         else
 206                 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
 207         SSYNC();
 208 #endif
 209 }
 210
 211 #ifdef BF537_FAMILY
 212 static struct {
 213         unsigned short res;
 214         unsigned short offset;
 215 } port_mux_lut[] = {
 216         {.res = P_PPI0_D13, .offset = 11},
 217         {.res = P_PPI0_D14, .offset = 11},
 218         {.res = P_PPI0_D15, .offset = 11},
 219         {.res = P_SPORT1_TFS, .offset = 11},
 220         {.res = P_SPORT1_TSCLK, .offset = 11},
 221         {.res = P_SPORT1_DTPRI, .offset = 11},
 222         {.res = P_PPI0_D10, .offset = 10},
 223         {.res = P_PPI0_D11, .offset = 10},
 224         {.res = P_PPI0_D12, .offset = 10},
 225         {.res = P_SPORT1_RSCLK, .offset = 10},
 226         {.res = P_SPORT1_RFS, .offset = 10},
 227         {.res = P_SPORT1_DRPRI, .offset = 10},
 228         {.res = P_PPI0_D8, .offset = 9},
 229         {.res = P_PPI0_D9, .offset = 9},
 230         {.res = P_SPORT1_DRSEC, .offset = 9},
 231         {.res = P_SPORT1_DTSEC, .offset = 9},
 232         {.res = P_TMR2, .offset = 8},
 233         {.res = P_PPI0_FS3, .offset = 8},
 234         {.res = P_TMR3, .offset = 7},
 235         {.res = P_SPI0_SSEL4, .offset = 7},
 236         {.res = P_TMR4, .offset = 6},
 237         {.res = P_SPI0_SSEL5, .offset = 6},
 238         {.res = P_TMR5, .offset = 5},
 239         {.res = P_SPI0_SSEL6, .offset = 5},
 240         {.res = P_UART1_RX, .offset = 4},
 241         {.res = P_UART1_TX, .offset = 4},
 242         {.res = P_TMR6, .offset = 4},
 243         {.res = P_TMR7, .offset = 4},
 244         {.res = P_UART0_RX, .offset = 3},
 245         {.res = P_UART0_TX, .offset = 3},
 246         {.res = P_DMAR0, .offset = 3},
 247         {.res = P_DMAR1, .offset = 3},
 248         {.res = P_SPORT0_DTSEC, .offset = 1},
 249         {.res = P_SPORT0_DRSEC, .offset = 1},
 250         {.res = P_CAN0_RX, .offset = 1},
 251         {.res = P_CAN0_TX, .offset = 1},
 252         {.res = P_SPI0_SSEL7, .offset = 1},
 253         {.res = P_SPORT0_TFS, .offset = 0},
 254         {.res = P_SPORT0_DTPRI, .offset = 0},
 255         {.res = P_SPI0_SSEL2, .offset = 0},
 256         {.res = P_SPI0_SSEL3, .offset = 0},
 257 };
 258
 259 static void portmux_setup(unsigned short per)
 260 {
 261         u16 y, offset, muxreg;
 262         u16 function = P_FUNCT2MUX(per);
 263
 264         for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
 265                 if (port_mux_lut[y].res == per) {
 266
 267                         /* SET PORTMUX REG */
 268
 269                         offset = port_mux_lut[y].offset;
 270                         muxreg = bfin_read_PORT_MUX();
 271
 272                         if (offset != 1)
 273                                 muxreg &= ~(1 << offset);
 274                         else
 275                                 muxreg &= ~(3 << 1);
 276
 277                         muxreg |= (function << offset);
 278                         bfin_write_PORT_MUX(muxreg);
 279                 }
 280         }
 281 }
 282 #elif defined(CONFIG_BF54x)
 283 inline void portmux_setup(unsigned short per)
 284 {
 285         u32 pmux;
 286         u16 ident = P_IDENT(per);
 287         u16 function = P_FUNCT2MUX(per);
 288
 289         pmux = gpio_array[gpio_bank(ident)]->port_mux;
 290
 291         pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
 292         pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
 293
 294         gpio_array[gpio_bank(ident)]->port_mux = pmux;
 295 }
 296
 297 inline u16 get_portmux(unsigned short per)
 298 {
 299         u32 pmux;
 300         u16 ident = P_IDENT(per);
 301
 302         pmux = gpio_array[gpio_bank(ident)]->port_mux;
 303
 304         return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
 305 }
 306 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 307 inline void portmux_setup(unsigned short per)
 308 {
 309         u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
 310         u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
 311
 312         pmux = *port_mux[gpio_bank(ident)];
 313         pmux &= ~(3 << offset);
 314         pmux |= (function & 3) << offset;
 315         *port_mux[gpio_bank(ident)] = pmux;
 316         SSYNC();
 317 }
 318 #else
 319 # define portmux_setup(...)  do { } while (0)
 320 #endif
 321
 322 #ifndef CONFIG_BF54x
 323 /***********************************************************
 324 *
 325 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
 326 *
 327 * INPUTS/OUTPUTS:
 328 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
 329 *
 330 *
 331 * DESCRIPTION: These functions abstract direct register access
 332 *              to Blackfin processor General Purpose
 333 *              Ports Regsiters
 334 *
 335 * CAUTION: These functions do not belong to the GPIO Driver API
 336 *************************************************************
 337 * MODIFICATION HISTORY :
 338 **************************************************************/
 339
 340 /* Set a specific bit */
 341
 342 #define SET_GPIO(name) \
 343 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
 344 { \
 345         unsigned long flags; \
 346         local_irq_save_hw(flags); \
 347         if (arg) \
 348                 gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
 349         else \
 350                 gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
 351         AWA_DUMMY_READ(name); \
 352         local_irq_restore_hw(flags); \
 353 } \
 354 EXPORT_SYMBOL(set_gpio_ ## name);
 355
 356 SET_GPIO(dir)   /* set_gpio_dir() */
 357 SET_GPIO(inen)  /* set_gpio_inen() */
 358 SET_GPIO(polar) /* set_gpio_polar() */
 359 SET_GPIO(edge)  /* set_gpio_edge() */
 360 SET_GPIO(both)  /* set_gpio_both() */
 361
 362
 363 #define SET_GPIO_SC(name) \
 364 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
 365 { \
 366         unsigned long flags; \
 367         if (ANOMALY_05000311 || ANOMALY_05000323) \
 368                 local_irq_save_hw(flags); \
 369         if (arg) \
 370                 gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
 371         else \
 372                 gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
 373         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 374                 AWA_DUMMY_READ(name); \
 375                 local_irq_restore_hw(flags); \
 376         } \
 377 } \
 378 EXPORT_SYMBOL(set_gpio_ ## name);
 379
 380 SET_GPIO_SC(maska)
 381 SET_GPIO_SC(maskb)
 382 SET_GPIO_SC(data)
 383
 384 void set_gpio_toggle(unsigned gpio)
 385 {
 386         unsigned long flags;
 387         if (ANOMALY_05000311 || ANOMALY_05000323)
 388                 local_irq_save_hw(flags);
 389         gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
 390         if (ANOMALY_05000311 || ANOMALY_05000323) {
 391                 AWA_DUMMY_READ(toggle);
 392                 local_irq_restore_hw(flags);
 393         }
 394 }
 395 EXPORT_SYMBOL(set_gpio_toggle);
 396
 397
 398 /*Set current PORT date (16-bit word)*/
 399
 400 #define SET_GPIO_P(name) \
 401 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
 402 { \
 403         unsigned long flags; \
 404         if (ANOMALY_05000311 || ANOMALY_05000323) \
 405                 local_irq_save_hw(flags); \
 406         gpio_array[gpio_bank(gpio)]->name = arg; \
 407         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 408                 AWA_DUMMY_READ(name); \
 409                 local_irq_restore_hw(flags); \
 410         } \
 411 } \
 412 EXPORT_SYMBOL(set_gpiop_ ## name);
 413
 414 SET_GPIO_P(data)
 415 SET_GPIO_P(dir)
 416 SET_GPIO_P(inen)
 417 SET_GPIO_P(polar)
 418 SET_GPIO_P(edge)
 419 SET_GPIO_P(both)
 420 SET_GPIO_P(maska)
 421 SET_GPIO_P(maskb)
 422
 423 /* Get a specific bit */
 424 #define GET_GPIO(name) \
 425 unsigned short get_gpio_ ## name(unsigned gpio) \
 426 { \
 427         unsigned long flags; \
 428         unsigned short ret; \
 429         if (ANOMALY_05000311 || ANOMALY_05000323) \
 430                 local_irq_save_hw(flags); \
 431         ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
 432         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 433                 AWA_DUMMY_READ(name); \
 434                 local_irq_restore_hw(flags); \
 435         } \
 436         return ret; \
 437 } \
 438 EXPORT_SYMBOL(get_gpio_ ## name);
 439
 440 GET_GPIO(data)
 441 GET_GPIO(dir)
 442 GET_GPIO(inen)
 443 GET_GPIO(polar)
 444 GET_GPIO(edge)
 445 GET_GPIO(both)
 446 GET_GPIO(maska)
 447 GET_GPIO(maskb)
 448
 449 /*Get current PORT date (16-bit word)*/
 450
 451 #define GET_GPIO_P(name) \
 452 unsigned short get_gpiop_ ## name(unsigned gpio) \
 453 { \
 454         unsigned long flags; \
 455         unsigned short ret; \
 456         if (ANOMALY_05000311 || ANOMALY_05000323) \
 457                 local_irq_save_hw(flags); \
 458         ret = (gpio_array[gpio_bank(gpio)]->name); \
 459         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 460                 AWA_DUMMY_READ(name); \
 461                 local_irq_restore_hw(flags); \
 462         } \
 463         return ret; \
 464 } \
 465 EXPORT_SYMBOL(get_gpiop_ ## name);
 466
 467 GET_GPIO_P(data)
 468 GET_GPIO_P(dir)
 469 GET_GPIO_P(inen)
 470 GET_GPIO_P(polar)
 471 GET_GPIO_P(edge)
 472 GET_GPIO_P(both)
 473 GET_GPIO_P(maska)
 474 GET_GPIO_P(maskb)
 475
 476
 477 #ifdef CONFIG_PM
 478 static unsigned short wakeup_map[GPIO_BANK_NUM];
 479
 480 static const unsigned int sic_iwr_irqs[] = {
 481 #if defined(BF533_FAMILY)
 482         IRQ_PROG_INTB
 483 #elif defined(BF537_FAMILY)
 484         IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
 485 #elif defined(BF538_FAMILY)
 486         IRQ_PORTF_INTB
 487 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 488         IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
 489 #elif defined(BF561_FAMILY)
 490         IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
 491 #else
 492 # error no SIC_IWR defined
 493 #endif
 494 };
 495
 496 /***********************************************************
 497 *
 498 * FUNCTIONS: Blackfin PM Setup API
 499 *
 500 * INPUTS/OUTPUTS:
 501 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
 502 * type -
 503 *       PM_WAKE_RISING
 504 *       PM_WAKE_FALLING
 505 *       PM_WAKE_HIGH
 506 *       PM_WAKE_LOW
 507 *       PM_WAKE_BOTH_EDGES
 508 *
 509 * DESCRIPTION: Blackfin PM Driver API
 510 *
 511 * CAUTION:
 512 *************************************************************
 513 * MODIFICATION HISTORY :
 514 **************************************************************/
 515 int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
 516 {
 517         unsigned long flags;
 518
 519         if (check_gpio(gpio) < 0)
 520                 return -EINVAL;
 521
 522         local_irq_save_hw(flags);
 523         if (ctrl)
 524                 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
 525         else
 526                 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
 527
 528         set_gpio_maskb(gpio, ctrl);
 529         local_irq_restore_hw(flags);
 530
 531         return 0;
 532 }
 533
 534 int bfin_pm_standby_ctrl(unsigned ctrl)
 535 {
 536         u16 bank, mask, i;
 537
 538         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 539                 mask = wakeup_map[gpio_bank(i)];
 540                 bank = gpio_bank(i);
 541
 542                 if (mask)
 543                         bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl);
 544         }
 545         return 0;
 546 }
 547
 548 void bfin_gpio_pm_hibernate_suspend(void)
 549 {
 550         int i, bank;
 551
 552         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 553                 bank = gpio_bank(i);
 554
 555 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 556                 gpio_bank_saved[bank].fer = *port_fer[bank];
 557 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 558                 gpio_bank_saved[bank].mux = *port_mux[bank];
 559 #else
 560                 if (bank == 0)
 561                         gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
 562 #endif
 563 #endif
 564                 gpio_bank_saved[bank].data  = gpio_array[bank]->data;
 565                 gpio_bank_saved[bank].inen  = gpio_array[bank]->inen;
 566                 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
 567                 gpio_bank_saved[bank].dir   = gpio_array[bank]->dir;
 568                 gpio_bank_saved[bank].edge  = gpio_array[bank]->edge;
 569                 gpio_bank_saved[bank].both  = gpio_array[bank]->both;
 570                 gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
 571         }
 572
 573         AWA_DUMMY_READ(maska);
 574 }
 575
 576 void bfin_gpio_pm_hibernate_restore(void)
 577 {
 578         int i, bank;
 579
 580         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 581                 bank = gpio_bank(i);
 582
 583 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 584 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 585                 *port_mux[bank] = gpio_bank_saved[bank].mux;
 586 #else
 587                 if (bank == 0)
 588                         bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
 589 #endif
 590                 *port_fer[bank] = gpio_bank_saved[bank].fer;
 591 #endif
 592                 gpio_array[bank]->inen  = gpio_bank_saved[bank].inen;
 593                 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
 594                                                 & gpio_bank_saved[bank].dir;
 595                 gpio_array[bank]->dir   = gpio_bank_saved[bank].dir;
 596                 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
 597                 gpio_array[bank]->edge  = gpio_bank_saved[bank].edge;
 598                 gpio_array[bank]->both  = gpio_bank_saved[bank].both;
 599                 gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
 600         }
 601         AWA_DUMMY_READ(maska);
 602 }
 603
 604
 605 #endif
 606 #else /* CONFIG_BF54x */
 607 #ifdef CONFIG_PM
 608
 609 int bfin_pm_standby_ctrl(unsigned ctrl)
 610 {
 611         return 0;
 612 }
 613
 614 void bfin_gpio_pm_hibernate_suspend(void)
 615 {
 616         int i, bank;
 617
 618         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 619                 bank = gpio_bank(i);
 620
 621                 gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
 622                 gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
 623                 gpio_bank_saved[bank].data = gpio_array[bank]->data;
 624                 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
 625                 gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
 626         }
 627 }
 628
 629 void bfin_gpio_pm_hibernate_restore(void)
 630 {
 631         int i, bank;
 632
 633         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 634                 bank = gpio_bank(i);
 635
 636                 gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
 637                 gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
 638                 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
 639                 gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
 640                 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
 641                                                 | gpio_bank_saved[bank].dir;
 642         }
 643 }
 644 #endif
 645
 646 unsigned short get_gpio_dir(unsigned gpio)
 647 {
 648         return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
 649 }
 650 EXPORT_SYMBOL(get_gpio_dir);
 651
 652 #endif /* CONFIG_BF54x */
 653
 654 /***********************************************************
 655 *
 656 * FUNCTIONS:    Blackfin Peripheral Resource Allocation
 657 *               and PortMux Setup
 658 *
 659 * INPUTS/OUTPUTS:
 660 * per   Peripheral Identifier
 661 * label String
 662 *
 663 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
 664 *
 665 * CAUTION:
 666 *************************************************************
 667 * MODIFICATION HISTORY :
 668 **************************************************************/
 669
 670 int peripheral_request(unsigned short per, const char *label)
 671 {
 672         unsigned long flags;
 673         unsigned short ident = P_IDENT(per);
 674
 675         /*
 676          * Don't cares are pins with only one dedicated function
 677          */
 678
 679         if (per & P_DONTCARE)
 680                 return 0;
 681
 682         if (!(per & P_DEFINED))
 683                 return -ENODEV;
 684
 685         BUG_ON(ident >= MAX_RESOURCES);
 686
 687         local_irq_save_hw(flags);
 688
 689         /* If a pin can be muxed as either GPIO or peripheral, make
 690          * sure it is not already a GPIO pin when we request it.
 691          */
 692         if (unlikely(!check_gpio(ident) &&
 693             reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
 694                 if (system_state == SYSTEM_BOOTING)
 695                         dump_stack();
 696                 printk(KERN_ERR
 697                        "%s: Peripheral %d is already reserved as GPIO by %s !\n",
 698                        __func__, ident, get_label(ident));
 699                 local_irq_restore_hw(flags);
 700                 return -EBUSY;
 701         }
 702
 703         if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
 704
 705                 /*
 706                  * Pin functions like AMC address strobes my
 707                  * be requested and used by several drivers
 708                  */
 709
 710 #ifdef CONFIG_BF54x
 711                 if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
 712 #else
 713                 if (!(per & P_MAYSHARE)) {
 714 #endif
 715                         /*
 716                          * Allow that the identical pin function can
 717                          * be requested from the same driver twice
 718                          */
 719
 720                         if (cmp_label(ident, label) == 0)
 721                                 goto anyway;
 722
 723                         if (system_state == SYSTEM_BOOTING)
 724                                 dump_stack();
 725                         printk(KERN_ERR
 726                                "%s: Peripheral %d function %d is already reserved by %s !\n",
 727                                __func__, ident, P_FUNCT2MUX(per), get_label(ident));
 728                         local_irq_restore_hw(flags);
 729                         return -EBUSY;
 730                 }
 731         }
 732
 733  anyway:
 734         reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
 735
 736         portmux_setup(per);
 737         port_setup(ident, PERIPHERAL_USAGE);
 738
 739         local_irq_restore_hw(flags);
 740         set_label(ident, label);
 741
 742         return 0;
 743 }
 744 EXPORT_SYMBOL(peripheral_request);
 745
 746 int peripheral_request_list(const unsigned short per[], const char *label)
 747 {
 748         u16 cnt;
 749         int ret;
 750
 751         for (cnt = 0; per[cnt] != 0; cnt++) {
 752
 753                 ret = peripheral_request(per[cnt], label);
 754
 755                 if (ret < 0) {
 756                         for ( ; cnt > 0; cnt--)
 757                                 peripheral_free(per[cnt - 1]);
 758
 759                         return ret;
 760                 }
 761         }
 762
 763         return 0;
 764 }
 765 EXPORT_SYMBOL(peripheral_request_list);
 766
 767 void peripheral_free(unsigned short per)
 768 {
 769         unsigned long flags;
 770         unsigned short ident = P_IDENT(per);
 771
 772         if (per & P_DONTCARE)
 773                 return;
 774
 775         if (!(per & P_DEFINED))
 776                 return;
 777
 778         local_irq_save_hw(flags);
 779
 780         if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
 781                 local_irq_restore_hw(flags);
 782                 return;
 783         }
 784
 785         if (!(per & P_MAYSHARE))
 786                 port_setup(ident, GPIO_USAGE);
 787
 788         reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
 789
 790         set_label(ident, "free");
 791
 792         local_irq_restore_hw(flags);
 793 }
 794 EXPORT_SYMBOL(peripheral_free);
 795
 796 void peripheral_free_list(const unsigned short per[])
 797 {
 798         u16 cnt;
 799         for (cnt = 0; per[cnt] != 0; cnt++)
 800                 peripheral_free(per[cnt]);
 801 }
 802 EXPORT_SYMBOL(peripheral_free_list);
 803
 804 /***********************************************************
 805 *
 806 * FUNCTIONS: Blackfin GPIO Driver
 807 *
 808 * INPUTS/OUTPUTS:
 809 * gpio  PIO Number between 0 and MAX_BLACKFIN_GPIOS
 810 * label String
 811 *
 812 * DESCRIPTION: Blackfin GPIO Driver API
 813 *
 814 * CAUTION:
 815 *************************************************************
 816 * MODIFICATION HISTORY :
 817 **************************************************************/
 818
 819 int bfin_gpio_request(unsigned gpio, const char *label)
 820 {
 821         unsigned long flags;
 822
 823         if (check_gpio(gpio) < 0)
 824                 return -EINVAL;
 825
 826         local_irq_save_hw(flags);
 827
 828         /*
 829          * Allow that the identical GPIO can
 830          * be requested from the same driver twice
 831          * Do nothing and return -
 832          */
 833
 834         if (cmp_label(gpio, label) == 0) {
 835                 local_irq_restore_hw(flags);
 836                 return 0;
 837         }
 838
 839         if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 840                 if (system_state == SYSTEM_BOOTING)
 841                         dump_stack();
 842                 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
 843                        gpio, get_label(gpio));
 844                 local_irq_restore_hw(flags);
 845                 return -EBUSY;
 846         }
 847         if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 848                 if (system_state == SYSTEM_BOOTING)
 849                         dump_stack();
 850                 printk(KERN_ERR
 851                        "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
 852                        gpio, get_label(gpio));
 853                 local_irq_restore_hw(flags);
 854                 return -EBUSY;
 855         }
 856         if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 857                 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
 858                        " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
 859         }
 860 #ifndef CONFIG_BF54x
 861         else {  /* Reset POLAR setting when acquiring a gpio for the first time */
 862                 set_gpio_polar(gpio, 0);
 863         }
 864 #endif
 865
 866         reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
 867         set_label(gpio, label);
 868
 869         local_irq_restore_hw(flags);
 870
 871         port_setup(gpio, GPIO_USAGE);
 872
 873         return 0;
 874 }
 875 EXPORT_SYMBOL(bfin_gpio_request);
 876
 877 void bfin_gpio_free(unsigned gpio)
 878 {
 879         unsigned long flags;
 880
 881         if (check_gpio(gpio) < 0)
 882                 return;
 883
 884         might_sleep();
 885
 886         local_irq_save_hw(flags);
 887
 888         if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
 889                 if (system_state == SYSTEM_BOOTING)
 890                         dump_stack();
 891                 gpio_error(gpio);
 892                 local_irq_restore_hw(flags);
 893                 return;
 894         }
 895
 896         reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
 897
 898         set_label(gpio, "free");
 899
 900         local_irq_restore_hw(flags);
 901 }
 902 EXPORT_SYMBOL(bfin_gpio_free);
 903
 904 #ifdef BFIN_SPECIAL_GPIO_BANKS
 905 static unsigned short reserved_special_gpio_map[gpio_bank(MAX_RESOURCES)];
 906
 907 int bfin_special_gpio_request(unsigned gpio, const char *label)
 908 {
 909         unsigned long flags;
 910
 911         local_irq_save_hw(flags);
 912
 913         /*
 914          * Allow that the identical GPIO can
 915          * be requested from the same driver twice
 916          * Do nothing and return -
 917          */
 918
 919         if (cmp_label(gpio, label) == 0) {
 920                 local_irq_restore_hw(flags);
 921                 return 0;
 922         }
 923
 924         if (unlikely(reserved_special_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 925                 local_irq_restore_hw(flags);
 926                 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
 927                        gpio, get_label(gpio));
 928
 929                 return -EBUSY;
 930         }
 931         if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 932                 local_irq_restore_hw(flags);
 933                 printk(KERN_ERR
 934                        "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
 935                        gpio, get_label(gpio));
 936
 937                 return -EBUSY;
 938         }
 939
 940         reserved_special_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
 941         reserved_peri_map[gpio_bank(gpio)] |= gpio_bit(gpio);
 942
 943         set_label(gpio, label);
 944         local_irq_restore_hw(flags);
 945         port_setup(gpio, GPIO_USAGE);
 946
 947         return 0;
 948 }
 949 EXPORT_SYMBOL(bfin_special_gpio_request);
 950
 951 void bfin_special_gpio_free(unsigned gpio)
 952 {
 953         unsigned long flags;
 954
 955         might_sleep();
 956
 957         local_irq_save_hw(flags);
 958
 959         if (unlikely(!(reserved_special_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
 960                 gpio_error(gpio);
 961                 local_irq_restore_hw(flags);
 962                 return;
 963         }
 964
 965         reserved_special_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
 966         reserved_peri_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
 967         set_label(gpio, "free");
 968         local_irq_restore_hw(flags);
 969 }
 970 EXPORT_SYMBOL(bfin_special_gpio_free);
 971 #endif
 972
 973
 974 int bfin_gpio_irq_request(unsigned gpio, const char *label)
 975 {
 976         unsigned long flags;
 977
 978         if (check_gpio(gpio) < 0)
 979                 return -EINVAL;
 980
 981         local_irq_save_hw(flags);
 982
 983         if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 984                 if (system_state == SYSTEM_BOOTING)
 985                         dump_stack();
 986                 printk(KERN_ERR
 987                        "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
 988                        gpio, get_label(gpio));
 989                 local_irq_restore_hw(flags);
 990                 return -EBUSY;
 991         }
 992         if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))
 993                 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
 994                        "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
 995                        gpio, get_label(gpio));
 996
 997         reserved_gpio_irq_map[gpio_bank(gpio)] |= gpio_bit(gpio);
 998         set_label(gpio, label);
 999
1000         local_irq_restore_hw(flags);
1001
1002         port_setup(gpio, GPIO_USAGE);
1003
1004         return 0;
1005 }
1006
1007 void bfin_gpio_irq_free(unsigned gpio)
1008 {
1009         unsigned long flags;
1010
1011         if (check_gpio(gpio) < 0)
1012                 return;
1013
1014         local_irq_save_hw(flags);
1015
1016         if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1017                 if (system_state == SYSTEM_BOOTING)
1018                         dump_stack();
1019                 gpio_error(gpio);
1020                 local_irq_restore_hw(flags);
1021                 return;
1022         }
1023
1024         reserved_gpio_irq_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1025
1026         set_label(gpio, "free");
1027
1028         local_irq_restore_hw(flags);
1029 }
1030
1031 static inline void __bfin_gpio_direction_input(unsigned gpio)
1032 {
1033 #ifdef CONFIG_BF54x
1034         gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
1035 #else
1036         gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1037 #endif
1038         gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1039 }
1040
1041 int bfin_gpio_direction_input(unsigned gpio)
1042 {
1043         unsigned long flags;
1044
1045         if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1046                 gpio_error(gpio);
1047                 return -EINVAL;
1048         }
1049
1050         local_irq_save_hw(flags);
1051         __bfin_gpio_direction_input(gpio);
1052         AWA_DUMMY_READ(inen);
1053         local_irq_restore_hw(flags);
1054
1055         return 0;
1056 }
1057 EXPORT_SYMBOL(bfin_gpio_direction_input);
1058
1059 void bfin_gpio_irq_prepare(unsigned gpio)
1060 {
1061 #ifdef CONFIG_BF54x
1062         unsigned long flags;
1063 #endif
1064
1065         port_setup(gpio, GPIO_USAGE);
1066
1067 #ifdef CONFIG_BF54x
1068         local_irq_save_hw(flags);
1069         __bfin_gpio_direction_input(gpio);
1070         local_irq_restore_hw(flags);
1071 #endif
1072 }
1073
1074 void bfin_gpio_set_value(unsigned gpio, int arg)
1075 {
1076         if (arg)
1077                 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1078         else
1079                 gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
1080 }
1081 EXPORT_SYMBOL(bfin_gpio_set_value);
1082
1083 int bfin_gpio_direction_output(unsigned gpio, int value)
1084 {
1085         unsigned long flags;
1086
1087         if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1088                 gpio_error(gpio);
1089                 return -EINVAL;
1090         }
1091
1092         local_irq_save_hw(flags);
1093
1094         gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1095         gpio_set_value(gpio, value);
1096 #ifdef CONFIG_BF54x
1097         gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
1098 #else
1099         gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1100 #endif
1101
1102         AWA_DUMMY_READ(dir);
1103         local_irq_restore_hw(flags);
1104
1105         return 0;
1106 }
1107 EXPORT_SYMBOL(bfin_gpio_direction_output);
1108
1109 int bfin_gpio_get_value(unsigned gpio)
1110 {
1111 #ifdef CONFIG_BF54x
1112         return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
1113 #else
1114         unsigned long flags;
1115
1116         if (unlikely(get_gpio_edge(gpio))) {
1117                 int ret;
1118                 local_irq_save_hw(flags);
1119                 set_gpio_edge(gpio, 0);
1120                 ret = get_gpio_data(gpio);
1121                 set_gpio_edge(gpio, 1);
1122                 local_irq_restore_hw(flags);
1123                 return ret;
1124         } else
1125                 return get_gpio_data(gpio);
1126 #endif
1127 }
1128 EXPORT_SYMBOL(bfin_gpio_get_value);
1129
1130 /* If we are booting from SPI and our board lacks a strong enough pull up,
1131  * the core can reset and execute the bootrom faster than the resistor can
1132  * pull the signal logically high.  To work around this (common) error in
1133  * board design, we explicitly set the pin back to GPIO mode, force /CS
1134  * high, and wait for the electrons to do their thing.
1135  *
1136  * This function only makes sense to be called from reset code, but it
1137  * lives here as we need to force all the GPIO states w/out going through
1138  * BUG() checks and such.
1139  */
1140 void bfin_reset_boot_spi_cs(unsigned short pin)
1141 {
1142         unsigned short gpio = P_IDENT(pin);
1143         port_setup(gpio, GPIO_USAGE);
1144         gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1145         AWA_DUMMY_READ(data_set);
1146         udelay(1);
1147 }
1148
1149 #if defined(CONFIG_PROC_FS)
1150 static int gpio_proc_read(char *buf, char **start, off_t offset,
1151                           int len, int *unused_i, void *unused_v)
1152 {
1153         int c, irq, gpio, outlen = 0;
1154
1155         for (c = 0; c < MAX_RESOURCES; c++) {
1156                 irq = reserved_gpio_irq_map[gpio_bank(c)] & gpio_bit(c);
1157                 gpio = reserved_gpio_map[gpio_bank(c)] & gpio_bit(c);
1158                 if (!check_gpio(c) && (gpio || irq))
1159                         len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
1160                                  get_label(c), (gpio && irq) ? " *" : "",
1161                                  get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1162                 else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
1163                         len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
1164                 else
1165                         continue;
1166                 buf += len;
1167                 outlen += len;
1168         }
1169         return outlen;
1170 }
1171
1172 static __init int gpio_register_proc(void)
1173 {
1174         struct proc_dir_entry *proc_gpio;
1175
1176         proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
1177         if (proc_gpio)
1178                 proc_gpio->read_proc = gpio_proc_read;
1179         return proc_gpio != NULL;
1180 }
1181 __initcall(gpio_register_proc);
1182 #endif
1183
1184 #ifdef CONFIG_GPIOLIB
1185 static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
1186 {
1187         return bfin_gpio_direction_input(gpio);
1188 }
1189
1190 static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
1191 {
1192         return bfin_gpio_direction_output(gpio, level);
1193 }
1194
1195 static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
1196 {
1197         return bfin_gpio_get_value(gpio);
1198 }
1199
1200 static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
1201 {
1202         return bfin_gpio_set_value(gpio, value);
1203 }
1204
1205 static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
1206 {
1207         return bfin_gpio_request(gpio, chip->label);
1208 }
1209
1210 static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
1211 {
1212         return bfin_gpio_free(gpio);
1213 }
1214
1215 static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
1216 {
1217         return gpio + GPIO_IRQ_BASE;
1218 }
1219
1220 static struct gpio_chip bfin_chip = {
1221         .label                  = "BFIN-GPIO",
1222         .direction_input        = bfin_gpiolib_direction_input,
1223         .get                    = bfin_gpiolib_get_value,
1224         .direction_output       = bfin_gpiolib_direction_output,
1225         .set                    = bfin_gpiolib_set_value,
1226         .request                = bfin_gpiolib_gpio_request,
1227         .free                   = bfin_gpiolib_gpio_free,
1228         .to_irq                 = bfin_gpiolib_gpio_to_irq,
1229         .base                   = 0,
1230         .ngpio                  = MAX_BLACKFIN_GPIOS,
1231 };
1232
1233 static int __init bfin_gpiolib_setup(void)
1234 {
1235         return gpiochip_add(&bfin_chip);
1236 }
1237 arch_initcall(bfin_gpiolib_setup);
1238 #endif