drivers/net/wireless/mwifiex/ioctl.h

   1 /*
   2  * Marvell Wireless LAN device driver: ioctl data structures & APIs
   3  *
   4  * Copyright (C) 2011, Marvell International Ltd.
   5  *
   6  * This software file (the "File") is distributed by Marvell International
   7  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
   8  * (the "License").  You may use, redistribute and/or modify this File in
   9  * accordance with the terms and conditions of the License, a copy of which
  10  * is available by writing to the Free Software Foundation, Inc.,
  11  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
  12  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
  13  *
  14  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
  17  * this warranty disclaimer.
  18  */
  19
  20 #ifndef _MWIFIEX_IOCTL_H_
  21 #define _MWIFIEX_IOCTL_H_
  22
  23 #include <net/mac80211.h>
  24
  25 enum {
  26         MWIFIEX_SCAN_TYPE_UNCHANGED = 0,
  27         MWIFIEX_SCAN_TYPE_ACTIVE,
  28         MWIFIEX_SCAN_TYPE_PASSIVE
  29 };
  30
  31 struct mwifiex_user_scan {
  32         u32 scan_cfg_len;
  33         u8 scan_cfg_buf[1];
  34 };
  35
  36 #define MWIFIEX_PROMISC_MODE            1
  37 #define MWIFIEX_MULTICAST_MODE          2
  38 #define MWIFIEX_ALL_MULTI_MODE          4
  39 #define MWIFIEX_MAX_MULTICAST_LIST_SIZE 32
  40
  41 struct mwifiex_multicast_list {
  42         u32 mode;
  43         u32 num_multicast_addr;
  44         u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
  45 };
  46
  47 struct mwifiex_chan_freq {
  48         u32 channel;
  49         u32 freq;
  50 };
  51
  52 struct mwifiex_ssid_bssid {
  53         struct cfg80211_ssid ssid;
  54         u8 bssid[ETH_ALEN];
  55 };
  56
  57 enum {
  58         BAND_B = 1,
  59         BAND_G = 2,
  60         BAND_A = 4,
  61         BAND_GN = 8,
  62         BAND_AN = 16,
  63 };
  64
  65 enum {
  66         ADHOC_IDLE,
  67         ADHOC_STARTED,
  68         ADHOC_JOINED,
  69         ADHOC_COALESCED
  70 };
  71
  72 struct mwifiex_ds_get_stats {
  73         u32 mcast_tx_frame;
  74         u32 failed;
  75         u32 retry;
  76         u32 multi_retry;
  77         u32 frame_dup;
  78         u32 rts_success;
  79         u32 rts_failure;
  80         u32 ack_failure;
  81         u32 rx_frag;
  82         u32 mcast_rx_frame;
  83         u32 fcs_error;
  84         u32 tx_frame;
  85         u32 wep_icv_error[4];
  86 };
  87
  88 #define MWIFIEX_MAX_VER_STR_LEN    128
  89
  90 struct mwifiex_ver_ext {
  91         u32 version_str_sel;
  92         char version_str[MWIFIEX_MAX_VER_STR_LEN];
  93 };
  94
  95 struct mwifiex_bss_info {
  96         u32 bss_mode;
  97         struct cfg80211_ssid ssid;
  98         u32 bss_chan;
  99         u32 region_code;
 100         u32 media_connected;
 101         u32 max_power_level;
 102         u32 min_power_level;
 103         u32 adhoc_state;
 104         signed int bcn_nf_last;
 105         u32 wep_status;
 106         u32 is_hs_configured;
 107         u32 is_deep_sleep;
 108         u8 bssid[ETH_ALEN];
 109 };
 110
 111 #define MAX_NUM_TID     8
 112
 113 #define MAX_RX_WINSIZE  64
 114
 115 struct mwifiex_ds_rx_reorder_tbl {
 116         u16 tid;
 117         u8 ta[ETH_ALEN];
 118         u32 start_win;
 119         u32 win_size;
 120         u32 buffer[MAX_RX_WINSIZE];
 121 };
 122
 123 struct mwifiex_ds_tx_ba_stream_tbl {
 124         u16 tid;
 125         u8 ra[ETH_ALEN];
 126 };
 127
 128 #define DBG_CMD_NUM     5
 129
 130 struct mwifiex_debug_info {
 131         u32 int_counter;
 132         u32 packets_out[MAX_NUM_TID];
 133         u32 max_tx_buf_size;
 134         u32 tx_buf_size;
 135         u32 curr_tx_buf_size;
 136         u32 tx_tbl_num;
 137         struct mwifiex_ds_tx_ba_stream_tbl
 138                 tx_tbl[MWIFIEX_MAX_TX_BASTREAM_SUPPORTED];
 139         u32 rx_tbl_num;
 140         struct mwifiex_ds_rx_reorder_tbl rx_tbl
 141                 [MWIFIEX_MAX_RX_BASTREAM_SUPPORTED];
 142         u16 ps_mode;
 143         u32 ps_state;
 144         u8 is_deep_sleep;
 145         u8 pm_wakeup_card_req;
 146         u32 pm_wakeup_fw_try;
 147         u8 is_hs_configured;
 148         u8 hs_activated;
 149         u32 num_cmd_host_to_card_failure;
 150         u32 num_cmd_sleep_cfm_host_to_card_failure;
 151         u32 num_tx_host_to_card_failure;
 152         u32 num_event_deauth;
 153         u32 num_event_disassoc;
 154         u32 num_event_link_lost;
 155         u32 num_cmd_deauth;
 156         u32 num_cmd_assoc_success;
 157         u32 num_cmd_assoc_failure;
 158         u32 num_tx_timeout;
 159         u32 num_cmd_timeout;
 160         u16 timeout_cmd_id;
 161         u16 timeout_cmd_act;
 162         u16 last_cmd_id[DBG_CMD_NUM];
 163         u16 last_cmd_act[DBG_CMD_NUM];
 164         u16 last_cmd_index;
 165         u16 last_cmd_resp_id[DBG_CMD_NUM];
 166         u16 last_cmd_resp_index;
 167         u16 last_event[DBG_CMD_NUM];
 168         u16 last_event_index;
 169         u8 data_sent;
 170         u8 cmd_sent;
 171         u8 cmd_resp_received;
 172         u8 event_received;
 173 };
 174
 175 #define MWIFIEX_KEY_INDEX_UNICAST       0x40000000
 176 #define WAPI_RXPN_LEN                   16
 177
 178 struct mwifiex_ds_encrypt_key {
 179         u32 key_disable;
 180         u32 key_index;
 181         u32 key_len;
 182         u8 key_material[WLAN_MAX_KEY_LEN];
 183         u8 mac_addr[ETH_ALEN];
 184         u32 is_wapi_key;
 185         u8 wapi_rxpn[WAPI_RXPN_LEN];
 186 };
 187
 188 struct mwifiex_rate_cfg {
 189         u32 action;
 190         u32 is_rate_auto;
 191         u32 rate;
 192 };
 193
 194 struct mwifiex_power_cfg {
 195         u32 is_power_auto;
 196         u32 power_level;
 197 };
 198
 199 struct mwifiex_ds_hs_cfg {
 200         u32 is_invoke_hostcmd;
 201         /*  Bit0: non-unicast data
 202          *  Bit1: unicast data
 203          *  Bit2: mac events
 204          *  Bit3: magic packet
 205          */
 206         u32 conditions;
 207         u32 gpio;
 208         u32 gap;
 209 };
 210
 211 #define DEEP_SLEEP_ON  1
 212 #define DEEP_SLEEP_OFF 0
 213 #define DEEP_SLEEP_IDLE_TIME    100
 214 #define PS_MODE_AUTO            1
 215
 216 struct mwifiex_ds_auto_ds {
 217         u16 auto_ds;
 218         u16 idle_time;
 219 };
 220
 221 struct mwifiex_ds_pm_cfg {
 222         union {
 223                 u32 ps_mode;
 224                 struct mwifiex_ds_hs_cfg hs_cfg;
 225                 struct mwifiex_ds_auto_ds auto_deep_sleep;
 226                 u32 sleep_period;
 227         } param;
 228 };
 229
 230 struct mwifiex_ds_11n_tx_cfg {
 231         u16 tx_htcap;
 232         u16 tx_htinfo;
 233 };
 234
 235 struct mwifiex_ds_11n_amsdu_aggr_ctrl {
 236         u16 enable;
 237         u16 curr_buf_size;
 238 };
 239
 240 #define MWIFIEX_NUM_OF_CMD_BUFFER       20
 241 #define MWIFIEX_SIZE_OF_CMD_BUFFER      2048
 242
 243 enum {
 244         MWIFIEX_IE_TYPE_GEN_IE = 0,
 245         MWIFIEX_IE_TYPE_ARP_FILTER,
 246 };
 247
 248 enum {
 249         MWIFIEX_REG_MAC = 1,
 250         MWIFIEX_REG_BBP,
 251         MWIFIEX_REG_RF,
 252         MWIFIEX_REG_PMIC,
 253         MWIFIEX_REG_CAU,
 254 };
 255
 256 struct mwifiex_ds_reg_rw {
 257         __le32 type;
 258         __le32 offset;
 259         __le32 value;
 260 };
 261
 262 #define MAX_EEPROM_DATA 256
 263
 264 struct mwifiex_ds_read_eeprom {
 265         __le16 offset;
 266         __le16 byte_count;
 267         u8 value[MAX_EEPROM_DATA];
 268 };
 269
 270 #define IEEE_MAX_IE_SIZE                256
 271
 272 struct mwifiex_ds_misc_gen_ie {
 273         u32 type;
 274         u32 len;
 275         u8 ie_data[IEEE_MAX_IE_SIZE];
 276 };
 277
 278 struct mwifiex_ds_misc_cmd {
 279         u32 len;
 280         u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];
 281 };
 282
 283 #define MWIFIEX_MAX_VSIE_LEN       (256)
 284 #define MWIFIEX_MAX_VSIE_NUM       (8)
 285 #define MWIFIEX_VSIE_MASK_SCAN     0x01
 286 #define MWIFIEX_VSIE_MASK_ASSOC    0x02
 287 #define MWIFIEX_VSIE_MASK_ADHOC    0x04
 288
 289 enum {
 290         MWIFIEX_FUNC_INIT = 1,
 291         MWIFIEX_FUNC_SHUTDOWN,
 292 };
 293
 294 #endif /* !_MWIFIEX_IOCTL_H_ */