2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
20 #include "x86_emulate.h"
23 #include "segment_descriptor.h"
25 #include <linux/module.h>
26 #include <linux/kernel.h>
28 #include <linux/highmem.h>
29 #include <linux/sched.h>
30 #include <linux/moduleparam.h>
35 MODULE_AUTHOR("Qumranet");
36 MODULE_LICENSE("GPL");
38 static int bypass_guest_pf
= 1;
39 module_param(bypass_guest_pf
, bool, 0);
51 u32 idt_vectoring_info
;
52 struct kvm_msr_entry
*guest_msrs
;
53 struct kvm_msr_entry
*host_msrs
;
58 int msr_offset_kernel_gs_base
;
63 u16 fs_sel
, gs_sel
, ldt_sel
;
64 int gs_ldt_reload_needed
;
66 int guest_efer_loaded
;
77 static inline struct vcpu_vmx
*to_vmx(struct kvm_vcpu
*vcpu
)
79 return container_of(vcpu
, struct vcpu_vmx
, vcpu
);
82 static int init_rmode_tss(struct kvm
*kvm
);
84 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
85 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
87 static struct page
*vmx_io_bitmap_a
;
88 static struct page
*vmx_io_bitmap_b
;
90 static struct vmcs_config
{
94 u32 pin_based_exec_ctrl
;
95 u32 cpu_based_exec_ctrl
;
96 u32 cpu_based_2nd_exec_ctrl
;
101 #define VMX_SEGMENT_FIELD(seg) \
102 [VCPU_SREG_##seg] = { \
103 .selector = GUEST_##seg##_SELECTOR, \
104 .base = GUEST_##seg##_BASE, \
105 .limit = GUEST_##seg##_LIMIT, \
106 .ar_bytes = GUEST_##seg##_AR_BYTES, \
109 static struct kvm_vmx_segment_field
{
114 } kvm_vmx_segment_fields
[] = {
115 VMX_SEGMENT_FIELD(CS
),
116 VMX_SEGMENT_FIELD(DS
),
117 VMX_SEGMENT_FIELD(ES
),
118 VMX_SEGMENT_FIELD(FS
),
119 VMX_SEGMENT_FIELD(GS
),
120 VMX_SEGMENT_FIELD(SS
),
121 VMX_SEGMENT_FIELD(TR
),
122 VMX_SEGMENT_FIELD(LDTR
),
126 * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
127 * away by decrementing the array size.
129 static const u32 vmx_msr_index
[] = {
131 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
133 MSR_EFER
, MSR_K6_STAR
,
135 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
137 static void load_msrs(struct kvm_msr_entry
*e
, int n
)
141 for (i
= 0; i
< n
; ++i
)
142 wrmsrl(e
[i
].index
, e
[i
].data
);
145 static void save_msrs(struct kvm_msr_entry
*e
, int n
)
149 for (i
= 0; i
< n
; ++i
)
150 rdmsrl(e
[i
].index
, e
[i
].data
);
153 static inline int is_page_fault(u32 intr_info
)
155 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
156 INTR_INFO_VALID_MASK
)) ==
157 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
160 static inline int is_no_device(u32 intr_info
)
162 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
163 INTR_INFO_VALID_MASK
)) ==
164 (INTR_TYPE_EXCEPTION
| NM_VECTOR
| INTR_INFO_VALID_MASK
);
167 static inline int is_invalid_opcode(u32 intr_info
)
169 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
170 INTR_INFO_VALID_MASK
)) ==
171 (INTR_TYPE_EXCEPTION
| UD_VECTOR
| INTR_INFO_VALID_MASK
);
174 static inline int is_external_interrupt(u32 intr_info
)
176 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
177 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
180 static inline int cpu_has_vmx_tpr_shadow(void)
182 return (vmcs_config
.cpu_based_exec_ctrl
& CPU_BASED_TPR_SHADOW
);
185 static inline int vm_need_tpr_shadow(struct kvm
*kvm
)
187 return ((cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm
)));
190 static inline int cpu_has_secondary_exec_ctrls(void)
192 return (vmcs_config
.cpu_based_exec_ctrl
&
193 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS
);
196 static inline int vm_need_secondary_exec_ctrls(struct kvm
*kvm
)
198 return ((cpu_has_secondary_exec_ctrls()) && (irqchip_in_kernel(kvm
)));
201 static inline int cpu_has_vmx_virtualize_apic_accesses(void)
203 return (vmcs_config
.cpu_based_2nd_exec_ctrl
&
204 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES
);
207 static inline int vm_need_virtualize_apic_accesses(struct kvm
*kvm
)
209 return ((cpu_has_vmx_virtualize_apic_accesses()) &&
210 (irqchip_in_kernel(kvm
)));
213 static int __find_msr_index(struct vcpu_vmx
*vmx
, u32 msr
)
217 for (i
= 0; i
< vmx
->nmsrs
; ++i
)
218 if (vmx
->guest_msrs
[i
].index
== msr
)
223 static struct kvm_msr_entry
*find_msr_entry(struct vcpu_vmx
*vmx
, u32 msr
)
227 i
= __find_msr_index(vmx
, msr
);
229 return &vmx
->guest_msrs
[i
];
233 static void vmcs_clear(struct vmcs
*vmcs
)
235 u64 phys_addr
= __pa(vmcs
);
238 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
239 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
242 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
246 static void __vcpu_clear(void *arg
)
248 struct vcpu_vmx
*vmx
= arg
;
249 int cpu
= raw_smp_processor_id();
251 if (vmx
->vcpu
.cpu
== cpu
)
252 vmcs_clear(vmx
->vmcs
);
253 if (per_cpu(current_vmcs
, cpu
) == vmx
->vmcs
)
254 per_cpu(current_vmcs
, cpu
) = NULL
;
255 rdtscll(vmx
->vcpu
.host_tsc
);
258 static void vcpu_clear(struct vcpu_vmx
*vmx
)
260 if (vmx
->vcpu
.cpu
== -1)
262 smp_call_function_single(vmx
->vcpu
.cpu
, __vcpu_clear
, vmx
, 0, 1);
266 static unsigned long vmcs_readl(unsigned long field
)
270 asm volatile (ASM_VMX_VMREAD_RDX_RAX
271 : "=a"(value
) : "d"(field
) : "cc");
275 static u16
vmcs_read16(unsigned long field
)
277 return vmcs_readl(field
);
280 static u32
vmcs_read32(unsigned long field
)
282 return vmcs_readl(field
);
285 static u64
vmcs_read64(unsigned long field
)
288 return vmcs_readl(field
);
290 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
294 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
296 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
297 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
301 static void vmcs_writel(unsigned long field
, unsigned long value
)
305 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
306 : "=q"(error
) : "a"(value
), "d"(field
) : "cc");
308 vmwrite_error(field
, value
);
311 static void vmcs_write16(unsigned long field
, u16 value
)
313 vmcs_writel(field
, value
);
316 static void vmcs_write32(unsigned long field
, u32 value
)
318 vmcs_writel(field
, value
);
321 static void vmcs_write64(unsigned long field
, u64 value
)
324 vmcs_writel(field
, value
);
326 vmcs_writel(field
, value
);
328 vmcs_writel(field
+1, value
>> 32);
332 static void vmcs_clear_bits(unsigned long field
, u32 mask
)
334 vmcs_writel(field
, vmcs_readl(field
) & ~mask
);
337 static void vmcs_set_bits(unsigned long field
, u32 mask
)
339 vmcs_writel(field
, vmcs_readl(field
) | mask
);
342 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
346 eb
= (1u << PF_VECTOR
) | (1u << UD_VECTOR
);
347 if (!vcpu
->fpu_active
)
348 eb
|= 1u << NM_VECTOR
;
349 if (vcpu
->guest_debug
.enabled
)
351 if (vcpu
->rmode
.active
)
353 vmcs_write32(EXCEPTION_BITMAP
, eb
);
356 static void reload_tss(void)
358 #ifndef CONFIG_X86_64
361 * VT restores TR but not its size. Useless.
363 struct descriptor_table gdt
;
364 struct segment_descriptor
*descs
;
367 descs
= (void *)gdt
.base
;
368 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
373 static void load_transition_efer(struct vcpu_vmx
*vmx
)
375 int efer_offset
= vmx
->msr_offset_efer
;
376 u64 host_efer
= vmx
->host_msrs
[efer_offset
].data
;
377 u64 guest_efer
= vmx
->guest_msrs
[efer_offset
].data
;
383 * NX is emulated; LMA and LME handled by hardware; SCE meaninless
386 ignore_bits
= EFER_NX
| EFER_SCE
;
388 ignore_bits
|= EFER_LMA
| EFER_LME
;
389 /* SCE is meaningful only in long mode on Intel */
390 if (guest_efer
& EFER_LMA
)
391 ignore_bits
&= ~(u64
)EFER_SCE
;
393 if ((guest_efer
& ~ignore_bits
) == (host_efer
& ~ignore_bits
))
396 vmx
->host_state
.guest_efer_loaded
= 1;
397 guest_efer
&= ~ignore_bits
;
398 guest_efer
|= host_efer
& ignore_bits
;
399 wrmsrl(MSR_EFER
, guest_efer
);
400 vmx
->vcpu
.stat
.efer_reload
++;
403 static void reload_host_efer(struct vcpu_vmx
*vmx
)
405 if (vmx
->host_state
.guest_efer_loaded
) {
406 vmx
->host_state
.guest_efer_loaded
= 0;
407 load_msrs(vmx
->host_msrs
+ vmx
->msr_offset_efer
, 1);
411 static void vmx_save_host_state(struct kvm_vcpu
*vcpu
)
413 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
415 if (vmx
->host_state
.loaded
)
418 vmx
->host_state
.loaded
= 1;
420 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
421 * allow segment selectors with cpl > 0 or ti == 1.
423 vmx
->host_state
.ldt_sel
= read_ldt();
424 vmx
->host_state
.gs_ldt_reload_needed
= vmx
->host_state
.ldt_sel
;
425 vmx
->host_state
.fs_sel
= read_fs();
426 if (!(vmx
->host_state
.fs_sel
& 7)) {
427 vmcs_write16(HOST_FS_SELECTOR
, vmx
->host_state
.fs_sel
);
428 vmx
->host_state
.fs_reload_needed
= 0;
430 vmcs_write16(HOST_FS_SELECTOR
, 0);
431 vmx
->host_state
.fs_reload_needed
= 1;
433 vmx
->host_state
.gs_sel
= read_gs();
434 if (!(vmx
->host_state
.gs_sel
& 7))
435 vmcs_write16(HOST_GS_SELECTOR
, vmx
->host_state
.gs_sel
);
437 vmcs_write16(HOST_GS_SELECTOR
, 0);
438 vmx
->host_state
.gs_ldt_reload_needed
= 1;
442 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
443 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
445 vmcs_writel(HOST_FS_BASE
, segment_base(vmx
->host_state
.fs_sel
));
446 vmcs_writel(HOST_GS_BASE
, segment_base(vmx
->host_state
.gs_sel
));
450 if (is_long_mode(&vmx
->vcpu
))
451 save_msrs(vmx
->host_msrs
+
452 vmx
->msr_offset_kernel_gs_base
, 1);
455 load_msrs(vmx
->guest_msrs
, vmx
->save_nmsrs
);
456 load_transition_efer(vmx
);
459 static void vmx_load_host_state(struct vcpu_vmx
*vmx
)
463 if (!vmx
->host_state
.loaded
)
466 ++vmx
->vcpu
.stat
.host_state_reload
;
467 vmx
->host_state
.loaded
= 0;
468 if (vmx
->host_state
.fs_reload_needed
)
469 load_fs(vmx
->host_state
.fs_sel
);
470 if (vmx
->host_state
.gs_ldt_reload_needed
) {
471 load_ldt(vmx
->host_state
.ldt_sel
);
473 * If we have to reload gs, we must take care to
474 * preserve our gs base.
476 local_irq_save(flags
);
477 load_gs(vmx
->host_state
.gs_sel
);
479 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
481 local_irq_restore(flags
);
484 save_msrs(vmx
->guest_msrs
, vmx
->save_nmsrs
);
485 load_msrs(vmx
->host_msrs
, vmx
->save_nmsrs
);
486 reload_host_efer(vmx
);
490 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
491 * vcpu mutex is already taken.
493 static void vmx_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
495 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
496 u64 phys_addr
= __pa(vmx
->vmcs
);
499 if (vcpu
->cpu
!= cpu
) {
501 kvm_migrate_apic_timer(vcpu
);
504 if (per_cpu(current_vmcs
, cpu
) != vmx
->vmcs
) {
507 per_cpu(current_vmcs
, cpu
) = vmx
->vmcs
;
508 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
509 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
512 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
513 vmx
->vmcs
, phys_addr
);
516 if (vcpu
->cpu
!= cpu
) {
517 struct descriptor_table dt
;
518 unsigned long sysenter_esp
;
522 * Linux uses per-cpu TSS and GDT, so set these when switching
525 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
527 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
529 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
530 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
533 * Make sure the time stamp counter is monotonous.
536 delta
= vcpu
->host_tsc
- tsc_this
;
537 vmcs_write64(TSC_OFFSET
, vmcs_read64(TSC_OFFSET
) + delta
);
541 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
543 vmx_load_host_state(to_vmx(vcpu
));
546 static void vmx_fpu_activate(struct kvm_vcpu
*vcpu
)
548 if (vcpu
->fpu_active
)
550 vcpu
->fpu_active
= 1;
551 vmcs_clear_bits(GUEST_CR0
, X86_CR0_TS
);
552 if (vcpu
->cr0
& X86_CR0_TS
)
553 vmcs_set_bits(GUEST_CR0
, X86_CR0_TS
);
554 update_exception_bitmap(vcpu
);
557 static void vmx_fpu_deactivate(struct kvm_vcpu
*vcpu
)
559 if (!vcpu
->fpu_active
)
561 vcpu
->fpu_active
= 0;
562 vmcs_set_bits(GUEST_CR0
, X86_CR0_TS
);
563 update_exception_bitmap(vcpu
);
566 static void vmx_vcpu_decache(struct kvm_vcpu
*vcpu
)
568 vcpu_clear(to_vmx(vcpu
));
571 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
573 return vmcs_readl(GUEST_RFLAGS
);
576 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
578 if (vcpu
->rmode
.active
)
579 rflags
|= X86_EFLAGS_IOPL
| X86_EFLAGS_VM
;
580 vmcs_writel(GUEST_RFLAGS
, rflags
);
583 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
586 u32 interruptibility
;
588 rip
= vmcs_readl(GUEST_RIP
);
589 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
590 vmcs_writel(GUEST_RIP
, rip
);
593 * We emulated an instruction, so temporary interrupt blocking
594 * should be removed, if set.
596 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
597 if (interruptibility
& 3)
598 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
599 interruptibility
& ~3);
600 vcpu
->interrupt_window_open
= 1;
603 static void vmx_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
605 printk(KERN_DEBUG
"inject_general_protection: rip 0x%lx\n",
606 vmcs_readl(GUEST_RIP
));
607 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
608 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
610 INTR_TYPE_EXCEPTION
|
611 INTR_INFO_DELIEVER_CODE_MASK
|
612 INTR_INFO_VALID_MASK
);
615 static void vmx_inject_ud(struct kvm_vcpu
*vcpu
)
617 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
619 INTR_TYPE_EXCEPTION
|
620 INTR_INFO_VALID_MASK
);
624 * Swap MSR entry in host/guest MSR entry array.
627 static void move_msr_up(struct vcpu_vmx
*vmx
, int from
, int to
)
629 struct kvm_msr_entry tmp
;
631 tmp
= vmx
->guest_msrs
[to
];
632 vmx
->guest_msrs
[to
] = vmx
->guest_msrs
[from
];
633 vmx
->guest_msrs
[from
] = tmp
;
634 tmp
= vmx
->host_msrs
[to
];
635 vmx
->host_msrs
[to
] = vmx
->host_msrs
[from
];
636 vmx
->host_msrs
[from
] = tmp
;
641 * Set up the vmcs to automatically save and restore system
642 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
643 * mode, as fiddling with msrs is very expensive.
645 static void setup_msrs(struct vcpu_vmx
*vmx
)
651 if (is_long_mode(&vmx
->vcpu
)) {
654 index
= __find_msr_index(vmx
, MSR_SYSCALL_MASK
);
656 move_msr_up(vmx
, index
, save_nmsrs
++);
657 index
= __find_msr_index(vmx
, MSR_LSTAR
);
659 move_msr_up(vmx
, index
, save_nmsrs
++);
660 index
= __find_msr_index(vmx
, MSR_CSTAR
);
662 move_msr_up(vmx
, index
, save_nmsrs
++);
663 index
= __find_msr_index(vmx
, MSR_KERNEL_GS_BASE
);
665 move_msr_up(vmx
, index
, save_nmsrs
++);
667 * MSR_K6_STAR is only needed on long mode guests, and only
668 * if efer.sce is enabled.
670 index
= __find_msr_index(vmx
, MSR_K6_STAR
);
671 if ((index
>= 0) && (vmx
->vcpu
.shadow_efer
& EFER_SCE
))
672 move_msr_up(vmx
, index
, save_nmsrs
++);
675 vmx
->save_nmsrs
= save_nmsrs
;
678 vmx
->msr_offset_kernel_gs_base
=
679 __find_msr_index(vmx
, MSR_KERNEL_GS_BASE
);
681 vmx
->msr_offset_efer
= __find_msr_index(vmx
, MSR_EFER
);
685 * reads and returns guest's timestamp counter "register"
686 * guest_tsc = host_tsc + tsc_offset -- 21.3
688 static u64
guest_read_tsc(void)
690 u64 host_tsc
, tsc_offset
;
693 tsc_offset
= vmcs_read64(TSC_OFFSET
);
694 return host_tsc
+ tsc_offset
;
698 * writes 'guest_tsc' into guest's timestamp counter "register"
699 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
701 static void guest_write_tsc(u64 guest_tsc
)
706 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
710 * Reads an msr value (of 'msr_index') into 'pdata'.
711 * Returns 0 on success, non-0 otherwise.
712 * Assumes vcpu_load() was already called.
714 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
717 struct kvm_msr_entry
*msr
;
720 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
727 data
= vmcs_readl(GUEST_FS_BASE
);
730 data
= vmcs_readl(GUEST_GS_BASE
);
733 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
735 case MSR_IA32_TIME_STAMP_COUNTER
:
736 data
= guest_read_tsc();
738 case MSR_IA32_SYSENTER_CS
:
739 data
= vmcs_read32(GUEST_SYSENTER_CS
);
741 case MSR_IA32_SYSENTER_EIP
:
742 data
= vmcs_readl(GUEST_SYSENTER_EIP
);
744 case MSR_IA32_SYSENTER_ESP
:
745 data
= vmcs_readl(GUEST_SYSENTER_ESP
);
748 msr
= find_msr_entry(to_vmx(vcpu
), msr_index
);
753 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
761 * Writes msr value into into the appropriate "register".
762 * Returns 0 on success, non-0 otherwise.
763 * Assumes vcpu_load() was already called.
765 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
767 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
768 struct kvm_msr_entry
*msr
;
774 ret
= kvm_set_msr_common(vcpu
, msr_index
, data
);
775 if (vmx
->host_state
.loaded
) {
776 reload_host_efer(vmx
);
777 load_transition_efer(vmx
);
781 vmcs_writel(GUEST_FS_BASE
, data
);
784 vmcs_writel(GUEST_GS_BASE
, data
);
787 case MSR_IA32_SYSENTER_CS
:
788 vmcs_write32(GUEST_SYSENTER_CS
, data
);
790 case MSR_IA32_SYSENTER_EIP
:
791 vmcs_writel(GUEST_SYSENTER_EIP
, data
);
793 case MSR_IA32_SYSENTER_ESP
:
794 vmcs_writel(GUEST_SYSENTER_ESP
, data
);
796 case MSR_IA32_TIME_STAMP_COUNTER
:
797 guest_write_tsc(data
);
800 msr
= find_msr_entry(vmx
, msr_index
);
803 if (vmx
->host_state
.loaded
)
804 load_msrs(vmx
->guest_msrs
, vmx
->save_nmsrs
);
807 ret
= kvm_set_msr_common(vcpu
, msr_index
, data
);
814 * Sync the rsp and rip registers into the vcpu structure. This allows
815 * registers to be accessed by indexing vcpu->regs.
817 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
819 vcpu
->regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
820 vcpu
->rip
= vmcs_readl(GUEST_RIP
);
824 * Syncs rsp and rip back into the vmcs. Should be called after possible
827 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
829 vmcs_writel(GUEST_RSP
, vcpu
->regs
[VCPU_REGS_RSP
]);
830 vmcs_writel(GUEST_RIP
, vcpu
->rip
);
833 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
835 unsigned long dr7
= 0x400;
838 old_singlestep
= vcpu
->guest_debug
.singlestep
;
840 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
841 if (vcpu
->guest_debug
.enabled
) {
844 dr7
|= 0x200; /* exact */
845 for (i
= 0; i
< 4; ++i
) {
846 if (!dbg
->breakpoints
[i
].enabled
)
848 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
849 dr7
|= 2 << (i
*2); /* global enable */
850 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
853 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
855 vcpu
->guest_debug
.singlestep
= 0;
857 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
860 flags
= vmcs_readl(GUEST_RFLAGS
);
861 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
862 vmcs_writel(GUEST_RFLAGS
, flags
);
865 update_exception_bitmap(vcpu
);
866 vmcs_writel(GUEST_DR7
, dr7
);
871 static int vmx_get_irq(struct kvm_vcpu
*vcpu
)
873 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
876 idtv_info_field
= vmx
->idt_vectoring_info
;
877 if (idtv_info_field
& INTR_INFO_VALID_MASK
) {
878 if (is_external_interrupt(idtv_info_field
))
879 return idtv_info_field
& VECTORING_INFO_VECTOR_MASK
;
881 printk(KERN_DEBUG
"pending exception: not handled yet\n");
886 static __init
int cpu_has_kvm_support(void)
888 unsigned long ecx
= cpuid_ecx(1);
889 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
892 static __init
int vmx_disabled_by_bios(void)
896 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
897 return (msr
& (MSR_IA32_FEATURE_CONTROL_LOCKED
|
898 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
))
899 == MSR_IA32_FEATURE_CONTROL_LOCKED
;
900 /* locked but not enabled */
903 static void hardware_enable(void *garbage
)
905 int cpu
= raw_smp_processor_id();
906 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
909 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
910 if ((old
& (MSR_IA32_FEATURE_CONTROL_LOCKED
|
911 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
))
912 != (MSR_IA32_FEATURE_CONTROL_LOCKED
|
913 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
))
914 /* enable and lock */
915 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
|
916 MSR_IA32_FEATURE_CONTROL_LOCKED
|
917 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
);
918 write_cr4(read_cr4() | X86_CR4_VMXE
); /* FIXME: not cpu hotplug safe */
919 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
923 static void hardware_disable(void *garbage
)
925 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
928 static __init
int adjust_vmx_controls(u32 ctl_min
, u32 ctl_opt
,
929 u32 msr
, u32
*result
)
931 u32 vmx_msr_low
, vmx_msr_high
;
932 u32 ctl
= ctl_min
| ctl_opt
;
934 rdmsr(msr
, vmx_msr_low
, vmx_msr_high
);
936 ctl
&= vmx_msr_high
; /* bit == 0 in high word ==> must be zero */
937 ctl
|= vmx_msr_low
; /* bit == 1 in low word ==> must be one */
939 /* Ensure minimum (required) set of control bits are supported. */
947 static __init
int setup_vmcs_config(struct vmcs_config
*vmcs_conf
)
949 u32 vmx_msr_low
, vmx_msr_high
;
951 u32 _pin_based_exec_control
= 0;
952 u32 _cpu_based_exec_control
= 0;
953 u32 _cpu_based_2nd_exec_control
= 0;
954 u32 _vmexit_control
= 0;
955 u32 _vmentry_control
= 0;
957 min
= PIN_BASED_EXT_INTR_MASK
| PIN_BASED_NMI_EXITING
;
959 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_PINBASED_CTLS
,
960 &_pin_based_exec_control
) < 0)
963 min
= CPU_BASED_HLT_EXITING
|
965 CPU_BASED_CR8_LOAD_EXITING
|
966 CPU_BASED_CR8_STORE_EXITING
|
968 CPU_BASED_USE_IO_BITMAPS
|
969 CPU_BASED_MOV_DR_EXITING
|
970 CPU_BASED_USE_TSC_OFFSETING
;
971 opt
= CPU_BASED_TPR_SHADOW
|
972 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS
;
973 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_PROCBASED_CTLS
,
974 &_cpu_based_exec_control
) < 0)
977 if ((_cpu_based_exec_control
& CPU_BASED_TPR_SHADOW
))
978 _cpu_based_exec_control
&= ~CPU_BASED_CR8_LOAD_EXITING
&
979 ~CPU_BASED_CR8_STORE_EXITING
;
981 if (_cpu_based_exec_control
& CPU_BASED_ACTIVATE_SECONDARY_CONTROLS
) {
983 opt
= SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES
|
984 SECONDARY_EXEC_WBINVD_EXITING
;
985 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_PROCBASED_CTLS2
,
986 &_cpu_based_2nd_exec_control
) < 0)
989 #ifndef CONFIG_X86_64
990 if (!(_cpu_based_2nd_exec_control
&
991 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES
))
992 _cpu_based_exec_control
&= ~CPU_BASED_TPR_SHADOW
;
997 min
|= VM_EXIT_HOST_ADDR_SPACE_SIZE
;
1000 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_EXIT_CTLS
,
1001 &_vmexit_control
) < 0)
1005 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_ENTRY_CTLS
,
1006 &_vmentry_control
) < 0)
1009 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
1011 /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
1012 if ((vmx_msr_high
& 0x1fff) > PAGE_SIZE
)
1015 #ifdef CONFIG_X86_64
1016 /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
1017 if (vmx_msr_high
& (1u<<16))
1021 /* Require Write-Back (WB) memory type for VMCS accesses. */
1022 if (((vmx_msr_high
>> 18) & 15) != 6)
1025 vmcs_conf
->size
= vmx_msr_high
& 0x1fff;
1026 vmcs_conf
->order
= get_order(vmcs_config
.size
);
1027 vmcs_conf
->revision_id
= vmx_msr_low
;
1029 vmcs_conf
->pin_based_exec_ctrl
= _pin_based_exec_control
;
1030 vmcs_conf
->cpu_based_exec_ctrl
= _cpu_based_exec_control
;
1031 vmcs_conf
->cpu_based_2nd_exec_ctrl
= _cpu_based_2nd_exec_control
;
1032 vmcs_conf
->vmexit_ctrl
= _vmexit_control
;
1033 vmcs_conf
->vmentry_ctrl
= _vmentry_control
;
1038 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
1040 int node
= cpu_to_node(cpu
);
1044 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_config
.order
);
1047 vmcs
= page_address(pages
);
1048 memset(vmcs
, 0, vmcs_config
.size
);
1049 vmcs
->revision_id
= vmcs_config
.revision_id
; /* vmcs revision id */
1053 static struct vmcs
*alloc_vmcs(void)
1055 return alloc_vmcs_cpu(raw_smp_processor_id());
1058 static void free_vmcs(struct vmcs
*vmcs
)
1060 free_pages((unsigned long)vmcs
, vmcs_config
.order
);
1063 static void free_kvm_area(void)
1067 for_each_online_cpu(cpu
)
1068 free_vmcs(per_cpu(vmxarea
, cpu
));
1071 static __init
int alloc_kvm_area(void)
1075 for_each_online_cpu(cpu
) {
1078 vmcs
= alloc_vmcs_cpu(cpu
);
1084 per_cpu(vmxarea
, cpu
) = vmcs
;
1089 static __init
int hardware_setup(void)
1091 if (setup_vmcs_config(&vmcs_config
) < 0)
1093 return alloc_kvm_area();
1096 static __exit
void hardware_unsetup(void)
1101 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
1103 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1105 if (vmcs_readl(sf
->base
) == save
->base
&& (save
->base
& AR_S_MASK
)) {
1106 vmcs_write16(sf
->selector
, save
->selector
);
1107 vmcs_writel(sf
->base
, save
->base
);
1108 vmcs_write32(sf
->limit
, save
->limit
);
1109 vmcs_write32(sf
->ar_bytes
, save
->ar
);
1111 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
1113 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
1117 static void enter_pmode(struct kvm_vcpu
*vcpu
)
1119 unsigned long flags
;
1121 vcpu
->rmode
.active
= 0;
1123 vmcs_writel(GUEST_TR_BASE
, vcpu
->rmode
.tr
.base
);
1124 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->rmode
.tr
.limit
);
1125 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->rmode
.tr
.ar
);
1127 flags
= vmcs_readl(GUEST_RFLAGS
);
1128 flags
&= ~(X86_EFLAGS_IOPL
| X86_EFLAGS_VM
);
1129 flags
|= (vcpu
->rmode
.save_iopl
<< IOPL_SHIFT
);
1130 vmcs_writel(GUEST_RFLAGS
, flags
);
1132 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~X86_CR4_VME
) |
1133 (vmcs_readl(CR4_READ_SHADOW
) & X86_CR4_VME
));
1135 update_exception_bitmap(vcpu
);
1137 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
1138 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
1139 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
1140 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
1142 vmcs_write16(GUEST_SS_SELECTOR
, 0);
1143 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
1145 vmcs_write16(GUEST_CS_SELECTOR
,
1146 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
1147 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1150 static gva_t
rmode_tss_base(struct kvm
*kvm
)
1152 if (!kvm
->tss_addr
) {
1153 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+
1154 kvm
->memslots
[0].npages
- 3;
1155 return base_gfn
<< PAGE_SHIFT
;
1157 return kvm
->tss_addr
;
1160 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
1162 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1164 save
->selector
= vmcs_read16(sf
->selector
);
1165 save
->base
= vmcs_readl(sf
->base
);
1166 save
->limit
= vmcs_read32(sf
->limit
);
1167 save
->ar
= vmcs_read32(sf
->ar_bytes
);
1168 vmcs_write16(sf
->selector
, vmcs_readl(sf
->base
) >> 4);
1169 vmcs_write32(sf
->limit
, 0xffff);
1170 vmcs_write32(sf
->ar_bytes
, 0xf3);
1173 static void enter_rmode(struct kvm_vcpu
*vcpu
)
1175 unsigned long flags
;
1177 vcpu
->rmode
.active
= 1;
1179 vcpu
->rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
1180 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
1182 vcpu
->rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
1183 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
1185 vcpu
->rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
1186 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1188 flags
= vmcs_readl(GUEST_RFLAGS
);
1189 vcpu
->rmode
.save_iopl
= (flags
& X86_EFLAGS_IOPL
) >> IOPL_SHIFT
;
1191 flags
|= X86_EFLAGS_IOPL
| X86_EFLAGS_VM
;
1193 vmcs_writel(GUEST_RFLAGS
, flags
);
1194 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | X86_CR4_VME
);
1195 update_exception_bitmap(vcpu
);
1197 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
1198 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
1199 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
1201 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
1202 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1203 if (vmcs_readl(GUEST_CS_BASE
) == 0xffff0000)
1204 vmcs_writel(GUEST_CS_BASE
, 0xf0000);
1205 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
1207 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
1208 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
1209 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
1210 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
1212 kvm_mmu_reset_context(vcpu
);
1213 init_rmode_tss(vcpu
->kvm
);
1216 #ifdef CONFIG_X86_64
1218 static void enter_lmode(struct kvm_vcpu
*vcpu
)
1222 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
1223 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
1224 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
1226 vmcs_write32(GUEST_TR_AR_BYTES
,
1227 (guest_tr_ar
& ~AR_TYPE_MASK
)
1228 | AR_TYPE_BUSY_64_TSS
);
1231 vcpu
->shadow_efer
|= EFER_LMA
;
1233 find_msr_entry(to_vmx(vcpu
), MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
1234 vmcs_write32(VM_ENTRY_CONTROLS
,
1235 vmcs_read32(VM_ENTRY_CONTROLS
)
1236 | VM_ENTRY_IA32E_MODE
);
1239 static void exit_lmode(struct kvm_vcpu
*vcpu
)
1241 vcpu
->shadow_efer
&= ~EFER_LMA
;
1243 vmcs_write32(VM_ENTRY_CONTROLS
,
1244 vmcs_read32(VM_ENTRY_CONTROLS
)
1245 & ~VM_ENTRY_IA32E_MODE
);
1250 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
1252 vcpu
->cr4
&= KVM_GUEST_CR4_MASK
;
1253 vcpu
->cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
1256 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
1258 vmx_fpu_deactivate(vcpu
);
1260 if (vcpu
->rmode
.active
&& (cr0
& X86_CR0_PE
))
1263 if (!vcpu
->rmode
.active
&& !(cr0
& X86_CR0_PE
))
1266 #ifdef CONFIG_X86_64
1267 if (vcpu
->shadow_efer
& EFER_LME
) {
1268 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
))
1270 if (is_paging(vcpu
) && !(cr0
& X86_CR0_PG
))
1275 vmcs_writel(CR0_READ_SHADOW
, cr0
);
1276 vmcs_writel(GUEST_CR0
,
1277 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
1280 if (!(cr0
& X86_CR0_TS
) || !(cr0
& X86_CR0_PE
))
1281 vmx_fpu_activate(vcpu
);
1284 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1286 vmcs_writel(GUEST_CR3
, cr3
);
1287 if (vcpu
->cr0
& X86_CR0_PE
)
1288 vmx_fpu_deactivate(vcpu
);
1291 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1293 vmcs_writel(CR4_READ_SHADOW
, cr4
);
1294 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->rmode
.active
?
1295 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
1299 #ifdef CONFIG_X86_64
1301 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1303 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
1304 struct kvm_msr_entry
*msr
= find_msr_entry(vmx
, MSR_EFER
);
1306 vcpu
->shadow_efer
= efer
;
1307 if (efer
& EFER_LMA
) {
1308 vmcs_write32(VM_ENTRY_CONTROLS
,
1309 vmcs_read32(VM_ENTRY_CONTROLS
) |
1310 VM_ENTRY_IA32E_MODE
);
1314 vmcs_write32(VM_ENTRY_CONTROLS
,
1315 vmcs_read32(VM_ENTRY_CONTROLS
) &
1316 ~VM_ENTRY_IA32E_MODE
);
1318 msr
->data
= efer
& ~EFER_LME
;
1325 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
1327 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1329 return vmcs_readl(sf
->base
);
1332 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
1333 struct kvm_segment
*var
, int seg
)
1335 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1338 var
->base
= vmcs_readl(sf
->base
);
1339 var
->limit
= vmcs_read32(sf
->limit
);
1340 var
->selector
= vmcs_read16(sf
->selector
);
1341 ar
= vmcs_read32(sf
->ar_bytes
);
1342 if (ar
& AR_UNUSABLE_MASK
)
1344 var
->type
= ar
& 15;
1345 var
->s
= (ar
>> 4) & 1;
1346 var
->dpl
= (ar
>> 5) & 3;
1347 var
->present
= (ar
>> 7) & 1;
1348 var
->avl
= (ar
>> 12) & 1;
1349 var
->l
= (ar
>> 13) & 1;
1350 var
->db
= (ar
>> 14) & 1;
1351 var
->g
= (ar
>> 15) & 1;
1352 var
->unusable
= (ar
>> 16) & 1;
1355 static u32
vmx_segment_access_rights(struct kvm_segment
*var
)
1362 ar
= var
->type
& 15;
1363 ar
|= (var
->s
& 1) << 4;
1364 ar
|= (var
->dpl
& 3) << 5;
1365 ar
|= (var
->present
& 1) << 7;
1366 ar
|= (var
->avl
& 1) << 12;
1367 ar
|= (var
->l
& 1) << 13;
1368 ar
|= (var
->db
& 1) << 14;
1369 ar
|= (var
->g
& 1) << 15;
1371 if (ar
== 0) /* a 0 value means unusable */
1372 ar
= AR_UNUSABLE_MASK
;
1377 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
1378 struct kvm_segment
*var
, int seg
)
1380 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1383 if (vcpu
->rmode
.active
&& seg
== VCPU_SREG_TR
) {
1384 vcpu
->rmode
.tr
.selector
= var
->selector
;
1385 vcpu
->rmode
.tr
.base
= var
->base
;
1386 vcpu
->rmode
.tr
.limit
= var
->limit
;
1387 vcpu
->rmode
.tr
.ar
= vmx_segment_access_rights(var
);
1390 vmcs_writel(sf
->base
, var
->base
);
1391 vmcs_write32(sf
->limit
, var
->limit
);
1392 vmcs_write16(sf
->selector
, var
->selector
);
1393 if (vcpu
->rmode
.active
&& var
->s
) {
1395 * Hack real-mode segments into vm86 compatibility.
1397 if (var
->base
== 0xffff0000 && var
->selector
== 0xf000)
1398 vmcs_writel(sf
->base
, 0xf0000);
1401 ar
= vmx_segment_access_rights(var
);
1402 vmcs_write32(sf
->ar_bytes
, ar
);
1405 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
1407 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1409 *db
= (ar
>> 14) & 1;
1410 *l
= (ar
>> 13) & 1;
1413 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1415 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
1416 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
1419 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1421 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
1422 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
1425 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1427 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
1428 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
1431 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1433 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
1434 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
1437 static int init_rmode_tss(struct kvm
*kvm
)
1439 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
1443 r
= kvm_clear_guest_page(kvm
, fn
, 0, PAGE_SIZE
);
1446 data
= TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
1447 r
= kvm_write_guest_page(kvm
, fn
++, &data
, 0x66, sizeof(u16
));
1450 r
= kvm_clear_guest_page(kvm
, fn
++, 0, PAGE_SIZE
);
1453 r
= kvm_clear_guest_page(kvm
, fn
, 0, PAGE_SIZE
);
1457 r
= kvm_write_guest_page(kvm
, fn
, &data
, RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1,
1464 static void seg_setup(int seg
)
1466 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1468 vmcs_write16(sf
->selector
, 0);
1469 vmcs_writel(sf
->base
, 0);
1470 vmcs_write32(sf
->limit
, 0xffff);
1471 vmcs_write32(sf
->ar_bytes
, 0x93);
1474 static int alloc_apic_access_page(struct kvm
*kvm
)
1476 struct kvm_userspace_memory_region kvm_userspace_mem
;
1479 mutex_lock(&kvm
->lock
);
1480 if (kvm
->apic_access_page
)
1482 kvm_userspace_mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
1483 kvm_userspace_mem
.flags
= 0;
1484 kvm_userspace_mem
.guest_phys_addr
= 0xfee00000ULL
;
1485 kvm_userspace_mem
.memory_size
= PAGE_SIZE
;
1486 r
= __kvm_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
1489 kvm
->apic_access_page
= gfn_to_page(kvm
, 0xfee00);
1491 mutex_unlock(&kvm
->lock
);
1496 * Sets up the vmcs for emulated real mode.
1498 static int vmx_vcpu_setup(struct vcpu_vmx
*vmx
)
1500 u32 host_sysenter_cs
;
1503 struct descriptor_table dt
;
1505 unsigned long kvm_vmx_return
;
1509 vmcs_write64(IO_BITMAP_A
, page_to_phys(vmx_io_bitmap_a
));
1510 vmcs_write64(IO_BITMAP_B
, page_to_phys(vmx_io_bitmap_b
));
1512 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1515 vmcs_write32(PIN_BASED_VM_EXEC_CONTROL
,
1516 vmcs_config
.pin_based_exec_ctrl
);
1518 exec_control
= vmcs_config
.cpu_based_exec_ctrl
;
1519 if (!vm_need_tpr_shadow(vmx
->vcpu
.kvm
)) {
1520 exec_control
&= ~CPU_BASED_TPR_SHADOW
;
1521 #ifdef CONFIG_X86_64
1522 exec_control
|= CPU_BASED_CR8_STORE_EXITING
|
1523 CPU_BASED_CR8_LOAD_EXITING
;
1526 if (!vm_need_secondary_exec_ctrls(vmx
->vcpu
.kvm
))
1527 exec_control
&= ~CPU_BASED_ACTIVATE_SECONDARY_CONTROLS
;
1528 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, exec_control
);
1530 if (vm_need_secondary_exec_ctrls(vmx
->vcpu
.kvm
))
1531 vmcs_write32(SECONDARY_VM_EXEC_CONTROL
,
1532 vmcs_config
.cpu_based_2nd_exec_ctrl
);
1534 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, !!bypass_guest_pf
);
1535 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, !!bypass_guest_pf
);
1536 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1538 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1539 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1540 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1542 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1543 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1544 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1545 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1546 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1547 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1548 #ifdef CONFIG_X86_64
1549 rdmsrl(MSR_FS_BASE
, a
);
1550 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1551 rdmsrl(MSR_GS_BASE
, a
);
1552 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1554 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1555 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1558 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1561 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1563 asm("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return
));
1564 vmcs_writel(HOST_RIP
, kvm_vmx_return
); /* 22.2.5 */
1565 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, 0);
1566 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, 0);
1567 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, 0);
1569 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1570 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1571 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1572 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1573 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1574 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1576 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1577 u32 index
= vmx_msr_index
[i
];
1578 u32 data_low
, data_high
;
1582 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1584 if (wrmsr_safe(index
, data_low
, data_high
) < 0)
1586 data
= data_low
| ((u64
)data_high
<< 32);
1587 vmx
->host_msrs
[j
].index
= index
;
1588 vmx
->host_msrs
[j
].reserved
= 0;
1589 vmx
->host_msrs
[j
].data
= data
;
1590 vmx
->guest_msrs
[j
] = vmx
->host_msrs
[j
];
1594 vmcs_write32(VM_EXIT_CONTROLS
, vmcs_config
.vmexit_ctrl
);
1596 /* 22.2.1, 20.8.1 */
1597 vmcs_write32(VM_ENTRY_CONTROLS
, vmcs_config
.vmentry_ctrl
);
1599 vmcs_writel(CR0_GUEST_HOST_MASK
, ~0UL);
1600 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1602 if (vm_need_virtualize_apic_accesses(vmx
->vcpu
.kvm
))
1603 if (alloc_apic_access_page(vmx
->vcpu
.kvm
) != 0)
1609 static int vmx_vcpu_reset(struct kvm_vcpu
*vcpu
)
1611 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
1615 if (!init_rmode_tss(vmx
->vcpu
.kvm
)) {
1620 vmx
->vcpu
.rmode
.active
= 0;
1622 vmx
->vcpu
.regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
1623 set_cr8(&vmx
->vcpu
, 0);
1624 msr
= 0xfee00000 | MSR_IA32_APICBASE_ENABLE
;
1625 if (vmx
->vcpu
.vcpu_id
== 0)
1626 msr
|= MSR_IA32_APICBASE_BSP
;
1627 kvm_set_apic_base(&vmx
->vcpu
, msr
);
1629 fx_init(&vmx
->vcpu
);
1632 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1633 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1635 if (vmx
->vcpu
.vcpu_id
== 0) {
1636 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1637 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1639 vmcs_write16(GUEST_CS_SELECTOR
, vmx
->vcpu
.sipi_vector
<< 8);
1640 vmcs_writel(GUEST_CS_BASE
, vmx
->vcpu
.sipi_vector
<< 12);
1642 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1643 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1645 seg_setup(VCPU_SREG_DS
);
1646 seg_setup(VCPU_SREG_ES
);
1647 seg_setup(VCPU_SREG_FS
);
1648 seg_setup(VCPU_SREG_GS
);
1649 seg_setup(VCPU_SREG_SS
);
1651 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1652 vmcs_writel(GUEST_TR_BASE
, 0);
1653 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1654 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1656 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1657 vmcs_writel(GUEST_LDTR_BASE
, 0);
1658 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1659 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1661 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1662 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1663 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1665 vmcs_writel(GUEST_RFLAGS
, 0x02);
1666 if (vmx
->vcpu
.vcpu_id
== 0)
1667 vmcs_writel(GUEST_RIP
, 0xfff0);
1669 vmcs_writel(GUEST_RIP
, 0);
1670 vmcs_writel(GUEST_RSP
, 0);
1672 /* todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0 */
1673 vmcs_writel(GUEST_DR7
, 0x400);
1675 vmcs_writel(GUEST_GDTR_BASE
, 0);
1676 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1678 vmcs_writel(GUEST_IDTR_BASE
, 0);
1679 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1681 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1682 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1683 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1687 /* Special registers */
1688 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1692 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1694 if (cpu_has_vmx_tpr_shadow()) {
1695 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR
, 0);
1696 if (vm_need_tpr_shadow(vmx
->vcpu
.kvm
))
1697 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR
,
1698 page_to_phys(vmx
->vcpu
.apic
->regs_page
));
1699 vmcs_write32(TPR_THRESHOLD
, 0);
1702 if (vm_need_virtualize_apic_accesses(vmx
->vcpu
.kvm
))
1703 vmcs_write64(APIC_ACCESS_ADDR
,
1704 page_to_phys(vmx
->vcpu
.kvm
->apic_access_page
));
1706 vmx
->vcpu
.cr0
= 0x60000010;
1707 vmx_set_cr0(&vmx
->vcpu
, vmx
->vcpu
.cr0
); /* enter rmode */
1708 vmx_set_cr4(&vmx
->vcpu
, 0);
1709 #ifdef CONFIG_X86_64
1710 vmx_set_efer(&vmx
->vcpu
, 0);
1712 vmx_fpu_activate(&vmx
->vcpu
);
1713 update_exception_bitmap(&vmx
->vcpu
);
1721 static void vmx_inject_irq(struct kvm_vcpu
*vcpu
, int irq
)
1723 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
1725 if (vcpu
->rmode
.active
) {
1726 vmx
->rmode
.irq
.pending
= true;
1727 vmx
->rmode
.irq
.vector
= irq
;
1728 vmx
->rmode
.irq
.rip
= vmcs_readl(GUEST_RIP
);
1729 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1730 irq
| INTR_TYPE_SOFT_INTR
| INTR_INFO_VALID_MASK
);
1731 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN
, 1);
1732 vmcs_writel(GUEST_RIP
, vmx
->rmode
.irq
.rip
- 1);
1735 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1736 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1739 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1741 int word_index
= __ffs(vcpu
->irq_summary
);
1742 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1743 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1745 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1746 if (!vcpu
->irq_pending
[word_index
])
1747 clear_bit(word_index
, &vcpu
->irq_summary
);
1748 vmx_inject_irq(vcpu
, irq
);
1752 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1753 struct kvm_run
*kvm_run
)
1755 u32 cpu_based_vm_exec_control
;
1757 vcpu
->interrupt_window_open
=
1758 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1759 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1761 if (vcpu
->interrupt_window_open
&&
1762 vcpu
->irq_summary
&&
1763 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1765 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1767 kvm_do_inject_irq(vcpu
);
1769 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1770 if (!vcpu
->interrupt_window_open
&&
1771 (vcpu
->irq_summary
|| kvm_run
->request_interrupt_window
))
1773 * Interrupts blocked. Wait for unblock.
1775 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1777 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1778 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1781 static int vmx_set_tss_addr(struct kvm
*kvm
, unsigned int addr
)
1784 struct kvm_userspace_memory_region tss_mem
= {
1786 .guest_phys_addr
= addr
,
1787 .memory_size
= PAGE_SIZE
* 3,
1791 ret
= kvm_set_memory_region(kvm
, &tss_mem
, 0);
1794 kvm
->tss_addr
= addr
;
1798 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1800 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1802 set_debugreg(dbg
->bp
[0], 0);
1803 set_debugreg(dbg
->bp
[1], 1);
1804 set_debugreg(dbg
->bp
[2], 2);
1805 set_debugreg(dbg
->bp
[3], 3);
1807 if (dbg
->singlestep
) {
1808 unsigned long flags
;
1810 flags
= vmcs_readl(GUEST_RFLAGS
);
1811 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1812 vmcs_writel(GUEST_RFLAGS
, flags
);
1816 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1817 int vec
, u32 err_code
)
1819 if (!vcpu
->rmode
.active
)
1823 * Instruction with address size override prefix opcode 0x67
1824 * Cause the #SS fault with 0 error code in VM86 mode.
1826 if (((vec
== GP_VECTOR
) || (vec
== SS_VECTOR
)) && err_code
== 0)
1827 if (emulate_instruction(vcpu
, NULL
, 0, 0, 0) == EMULATE_DONE
)
1832 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1834 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
1835 u32 intr_info
, error_code
;
1836 unsigned long cr2
, rip
;
1838 enum emulation_result er
;
1840 vect_info
= vmx
->idt_vectoring_info
;
1841 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1843 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1844 !is_page_fault(intr_info
))
1845 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1846 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1848 if (!irqchip_in_kernel(vcpu
->kvm
) && is_external_interrupt(vect_info
)) {
1849 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1850 set_bit(irq
, vcpu
->irq_pending
);
1851 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
1854 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) /* nmi */
1855 return 1; /* already handled by vmx_vcpu_run() */
1857 if (is_no_device(intr_info
)) {
1858 vmx_fpu_activate(vcpu
);
1862 if (is_invalid_opcode(intr_info
)) {
1863 er
= emulate_instruction(vcpu
, kvm_run
, 0, 0, 0);
1864 if (er
!= EMULATE_DONE
)
1865 vmx_inject_ud(vcpu
);
1871 rip
= vmcs_readl(GUEST_RIP
);
1872 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1873 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1874 if (is_page_fault(intr_info
)) {
1875 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1876 return kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1879 if (vcpu
->rmode
.active
&&
1880 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1882 if (vcpu
->halt_request
) {
1883 vcpu
->halt_request
= 0;
1884 return kvm_emulate_halt(vcpu
);
1889 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) ==
1890 (INTR_TYPE_EXCEPTION
| 1)) {
1891 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1894 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1895 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1896 kvm_run
->ex
.error_code
= error_code
;
1900 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1901 struct kvm_run
*kvm_run
)
1903 ++vcpu
->stat
.irq_exits
;
1907 static int handle_triple_fault(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1909 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1913 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1915 unsigned long exit_qualification
;
1916 int size
, down
, in
, string
, rep
;
1919 ++vcpu
->stat
.io_exits
;
1920 exit_qualification
= vmcs_readl(EXIT_QUALIFICATION
);
1921 string
= (exit_qualification
& 16) != 0;
1924 if (emulate_instruction(vcpu
,
1925 kvm_run
, 0, 0, 0) == EMULATE_DO_MMIO
)
1930 size
= (exit_qualification
& 7) + 1;
1931 in
= (exit_qualification
& 8) != 0;
1932 down
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1933 rep
= (exit_qualification
& 32) != 0;
1934 port
= exit_qualification
>> 16;
1936 return kvm_emulate_pio(vcpu
, kvm_run
, in
, size
, port
);
1940 vmx_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1943 * Patch in the VMCALL instruction:
1945 hypercall
[0] = 0x0f;
1946 hypercall
[1] = 0x01;
1947 hypercall
[2] = 0xc1;
1950 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1952 unsigned long exit_qualification
;
1956 exit_qualification
= vmcs_readl(EXIT_QUALIFICATION
);
1957 cr
= exit_qualification
& 15;
1958 reg
= (exit_qualification
>> 8) & 15;
1959 switch ((exit_qualification
>> 4) & 3) {
1960 case 0: /* mov to cr */
1963 vcpu_load_rsp_rip(vcpu
);
1964 set_cr0(vcpu
, vcpu
->regs
[reg
]);
1965 skip_emulated_instruction(vcpu
);
1968 vcpu_load_rsp_rip(vcpu
);
1969 set_cr3(vcpu
, vcpu
->regs
[reg
]);
1970 skip_emulated_instruction(vcpu
);
1973 vcpu_load_rsp_rip(vcpu
);
1974 set_cr4(vcpu
, vcpu
->regs
[reg
]);
1975 skip_emulated_instruction(vcpu
);
1978 vcpu_load_rsp_rip(vcpu
);
1979 set_cr8(vcpu
, vcpu
->regs
[reg
]);
1980 skip_emulated_instruction(vcpu
);
1981 kvm_run
->exit_reason
= KVM_EXIT_SET_TPR
;
1986 vcpu_load_rsp_rip(vcpu
);
1987 vmx_fpu_deactivate(vcpu
);
1988 vcpu
->cr0
&= ~X86_CR0_TS
;
1989 vmcs_writel(CR0_READ_SHADOW
, vcpu
->cr0
);
1990 vmx_fpu_activate(vcpu
);
1991 skip_emulated_instruction(vcpu
);
1993 case 1: /*mov from cr*/
1996 vcpu_load_rsp_rip(vcpu
);
1997 vcpu
->regs
[reg
] = vcpu
->cr3
;
1998 vcpu_put_rsp_rip(vcpu
);
1999 skip_emulated_instruction(vcpu
);
2002 vcpu_load_rsp_rip(vcpu
);
2003 vcpu
->regs
[reg
] = get_cr8(vcpu
);
2004 vcpu_put_rsp_rip(vcpu
);
2005 skip_emulated_instruction(vcpu
);
2010 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
2012 skip_emulated_instruction(vcpu
);
2017 kvm_run
->exit_reason
= 0;
2018 pr_unimpl(vcpu
, "unhandled control register: op %d cr %d\n",
2019 (int)(exit_qualification
>> 4) & 3, cr
);
2023 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2025 unsigned long exit_qualification
;
2030 * FIXME: this code assumes the host is debugging the guest.
2031 * need to deal with guest debugging itself too.
2033 exit_qualification
= vmcs_readl(EXIT_QUALIFICATION
);
2034 dr
= exit_qualification
& 7;
2035 reg
= (exit_qualification
>> 8) & 15;
2036 vcpu_load_rsp_rip(vcpu
);
2037 if (exit_qualification
& 16) {
2049 vcpu
->regs
[reg
] = val
;
2053 vcpu_put_rsp_rip(vcpu
);
2054 skip_emulated_instruction(vcpu
);
2058 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2060 kvm_emulate_cpuid(vcpu
);
2064 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2066 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
2069 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
2070 vmx_inject_gp(vcpu
, 0);
2074 /* FIXME: handling of bits 32:63 of rax, rdx */
2075 vcpu
->regs
[VCPU_REGS_RAX
] = data
& -1u;
2076 vcpu
->regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
2077 skip_emulated_instruction(vcpu
);
2081 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2083 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
2084 u64 data
= (vcpu
->regs
[VCPU_REGS_RAX
] & -1u)
2085 | ((u64
)(vcpu
->regs
[VCPU_REGS_RDX
] & -1u) << 32);
2087 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
2088 vmx_inject_gp(vcpu
, 0);
2092 skip_emulated_instruction(vcpu
);
2096 static int handle_tpr_below_threshold(struct kvm_vcpu
*vcpu
,
2097 struct kvm_run
*kvm_run
)
2102 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
2103 struct kvm_run
*kvm_run
)
2105 u32 cpu_based_vm_exec_control
;
2107 /* clear pending irq */
2108 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
2109 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
2110 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
2112 * If the user space waits to inject interrupts, exit as soon as
2115 if (kvm_run
->request_interrupt_window
&&
2116 !vcpu
->irq_summary
) {
2117 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
2118 ++vcpu
->stat
.irq_window_exits
;
2124 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2126 skip_emulated_instruction(vcpu
);
2127 return kvm_emulate_halt(vcpu
);
2130 static int handle_vmcall(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2132 skip_emulated_instruction(vcpu
);
2133 kvm_emulate_hypercall(vcpu
);
2137 static int handle_wbinvd(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2139 skip_emulated_instruction(vcpu
);
2140 /* TODO: Add support for VT-d/pass-through device */
2144 static int handle_apic_access(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2146 u64 exit_qualification
;
2147 enum emulation_result er
;
2148 unsigned long offset
;
2150 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
2151 offset
= exit_qualification
& 0xffful
;
2153 er
= emulate_instruction(vcpu
, kvm_run
, 0, 0, 0);
2155 if (er
!= EMULATE_DONE
) {
2157 "Fail to handle apic access vmexit! Offset is 0x%lx\n",
2165 * The exit handlers return 1 if the exit was handled fully and guest execution
2166 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
2167 * to be done to userspace and return 0.
2169 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
2170 struct kvm_run
*kvm_run
) = {
2171 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
2172 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
2173 [EXIT_REASON_TRIPLE_FAULT
] = handle_triple_fault
,
2174 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
2175 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
2176 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
2177 [EXIT_REASON_CPUID
] = handle_cpuid
,
2178 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
2179 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
2180 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
2181 [EXIT_REASON_HLT
] = handle_halt
,
2182 [EXIT_REASON_VMCALL
] = handle_vmcall
,
2183 [EXIT_REASON_TPR_BELOW_THRESHOLD
] = handle_tpr_below_threshold
,
2184 [EXIT_REASON_APIC_ACCESS
] = handle_apic_access
,
2185 [EXIT_REASON_WBINVD
] = handle_wbinvd
,
2188 static const int kvm_vmx_max_exit_handlers
=
2189 ARRAY_SIZE(kvm_vmx_exit_handlers
);
2192 * The guest has exited. See if we can fix it or if we need userspace
2195 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
2197 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
2198 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2199 u32 vectoring_info
= vmx
->idt_vectoring_info
;
2201 if (unlikely(vmx
->fail
)) {
2202 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
2203 kvm_run
->fail_entry
.hardware_entry_failure_reason
2204 = vmcs_read32(VM_INSTRUCTION_ERROR
);
2208 if ((vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
2209 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
2210 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
2211 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
2212 if (exit_reason
< kvm_vmx_max_exit_handlers
2213 && kvm_vmx_exit_handlers
[exit_reason
])
2214 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
2216 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
2217 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
2222 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
2226 static void update_tpr_threshold(struct kvm_vcpu
*vcpu
)
2230 if (!vm_need_tpr_shadow(vcpu
->kvm
))
2233 if (!kvm_lapic_enabled(vcpu
) ||
2234 ((max_irr
= kvm_lapic_find_highest_irr(vcpu
)) == -1)) {
2235 vmcs_write32(TPR_THRESHOLD
, 0);
2239 tpr
= (kvm_lapic_get_cr8(vcpu
) & 0x0f) << 4;
2240 vmcs_write32(TPR_THRESHOLD
, (max_irr
> tpr
) ? tpr
>> 4 : max_irr
>> 4);
2243 static void enable_irq_window(struct kvm_vcpu
*vcpu
)
2245 u32 cpu_based_vm_exec_control
;
2247 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
2248 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
2249 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
2252 static void vmx_intr_assist(struct kvm_vcpu
*vcpu
)
2254 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2255 u32 idtv_info_field
, intr_info_field
;
2256 int has_ext_irq
, interrupt_window_open
;
2259 update_tpr_threshold(vcpu
);
2261 has_ext_irq
= kvm_cpu_has_interrupt(vcpu
);
2262 intr_info_field
= vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
);
2263 idtv_info_field
= vmx
->idt_vectoring_info
;
2264 if (intr_info_field
& INTR_INFO_VALID_MASK
) {
2265 if (idtv_info_field
& INTR_INFO_VALID_MASK
) {
2266 /* TODO: fault when IDT_Vectoring */
2267 printk(KERN_ERR
"Fault when IDT_Vectoring\n");
2270 enable_irq_window(vcpu
);
2273 if (unlikely(idtv_info_field
& INTR_INFO_VALID_MASK
)) {
2274 if ((idtv_info_field
& VECTORING_INFO_TYPE_MASK
)
2275 == INTR_TYPE_EXT_INTR
2276 && vcpu
->rmode
.active
) {
2277 u8 vect
= idtv_info_field
& VECTORING_INFO_VECTOR_MASK
;
2279 vmx_inject_irq(vcpu
, vect
);
2280 if (unlikely(has_ext_irq
))
2281 enable_irq_window(vcpu
);
2285 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, idtv_info_field
);
2286 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN
,
2287 vmcs_read32(VM_EXIT_INSTRUCTION_LEN
));
2289 if (unlikely(idtv_info_field
& INTR_INFO_DELIEVER_CODE_MASK
))
2290 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
,
2291 vmcs_read32(IDT_VECTORING_ERROR_CODE
));
2292 if (unlikely(has_ext_irq
))
2293 enable_irq_window(vcpu
);
2298 interrupt_window_open
=
2299 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
2300 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
2301 if (interrupt_window_open
) {
2302 vector
= kvm_cpu_get_interrupt(vcpu
);
2303 vmx_inject_irq(vcpu
, vector
);
2304 kvm_timer_intr_post(vcpu
, vector
);
2306 enable_irq_window(vcpu
);
2310 * Failure to inject an interrupt should give us the information
2311 * in IDT_VECTORING_INFO_FIELD. However, if the failure occurs
2312 * when fetching the interrupt redirection bitmap in the real-mode
2313 * tss, this doesn't happen. So we do it ourselves.
2315 static void fixup_rmode_irq(struct vcpu_vmx
*vmx
)
2317 vmx
->rmode
.irq
.pending
= 0;
2318 if (vmcs_readl(GUEST_RIP
) + 1 != vmx
->rmode
.irq
.rip
)
2320 vmcs_writel(GUEST_RIP
, vmx
->rmode
.irq
.rip
);
2321 if (vmx
->idt_vectoring_info
& VECTORING_INFO_VALID_MASK
) {
2322 vmx
->idt_vectoring_info
&= ~VECTORING_INFO_TYPE_MASK
;
2323 vmx
->idt_vectoring_info
|= INTR_TYPE_EXT_INTR
;
2326 vmx
->idt_vectoring_info
=
2327 VECTORING_INFO_VALID_MASK
2328 | INTR_TYPE_EXT_INTR
2329 | vmx
->rmode
.irq
.vector
;
2332 static void vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2334 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2338 * Loading guest fpu may have cleared host cr0.ts
2340 vmcs_writel(HOST_CR0
, read_cr0());
2343 /* Store host registers */
2344 #ifdef CONFIG_X86_64
2345 "push %%rdx; push %%rbp;"
2348 "push %%edx; push %%ebp;"
2351 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
2352 /* Check if vmlaunch of vmresume is needed */
2353 "cmpl $0, %c[launched](%0) \n\t"
2354 /* Load guest registers. Don't clobber flags. */
2355 #ifdef CONFIG_X86_64
2356 "mov %c[cr2](%0), %%rax \n\t"
2357 "mov %%rax, %%cr2 \n\t"
2358 "mov %c[rax](%0), %%rax \n\t"
2359 "mov %c[rbx](%0), %%rbx \n\t"
2360 "mov %c[rdx](%0), %%rdx \n\t"
2361 "mov %c[rsi](%0), %%rsi \n\t"
2362 "mov %c[rdi](%0), %%rdi \n\t"
2363 "mov %c[rbp](%0), %%rbp \n\t"
2364 "mov %c[r8](%0), %%r8 \n\t"
2365 "mov %c[r9](%0), %%r9 \n\t"
2366 "mov %c[r10](%0), %%r10 \n\t"
2367 "mov %c[r11](%0), %%r11 \n\t"
2368 "mov %c[r12](%0), %%r12 \n\t"
2369 "mov %c[r13](%0), %%r13 \n\t"
2370 "mov %c[r14](%0), %%r14 \n\t"
2371 "mov %c[r15](%0), %%r15 \n\t"
2372 "mov %c[rcx](%0), %%rcx \n\t" /* kills %0 (rcx) */
2374 "mov %c[cr2](%0), %%eax \n\t"
2375 "mov %%eax, %%cr2 \n\t"
2376 "mov %c[rax](%0), %%eax \n\t"
2377 "mov %c[rbx](%0), %%ebx \n\t"
2378 "mov %c[rdx](%0), %%edx \n\t"
2379 "mov %c[rsi](%0), %%esi \n\t"
2380 "mov %c[rdi](%0), %%edi \n\t"
2381 "mov %c[rbp](%0), %%ebp \n\t"
2382 "mov %c[rcx](%0), %%ecx \n\t" /* kills %0 (ecx) */
2384 /* Enter guest mode */
2385 "jne .Llaunched \n\t"
2386 ASM_VMX_VMLAUNCH
"\n\t"
2387 "jmp .Lkvm_vmx_return \n\t"
2388 ".Llaunched: " ASM_VMX_VMRESUME
"\n\t"
2389 ".Lkvm_vmx_return: "
2390 /* Save guest registers, load host registers, keep flags */
2391 #ifdef CONFIG_X86_64
2392 "xchg %0, (%%rsp) \n\t"
2393 "mov %%rax, %c[rax](%0) \n\t"
2394 "mov %%rbx, %c[rbx](%0) \n\t"
2395 "pushq (%%rsp); popq %c[rcx](%0) \n\t"
2396 "mov %%rdx, %c[rdx](%0) \n\t"
2397 "mov %%rsi, %c[rsi](%0) \n\t"
2398 "mov %%rdi, %c[rdi](%0) \n\t"
2399 "mov %%rbp, %c[rbp](%0) \n\t"
2400 "mov %%r8, %c[r8](%0) \n\t"
2401 "mov %%r9, %c[r9](%0) \n\t"
2402 "mov %%r10, %c[r10](%0) \n\t"
2403 "mov %%r11, %c[r11](%0) \n\t"
2404 "mov %%r12, %c[r12](%0) \n\t"
2405 "mov %%r13, %c[r13](%0) \n\t"
2406 "mov %%r14, %c[r14](%0) \n\t"
2407 "mov %%r15, %c[r15](%0) \n\t"
2408 "mov %%cr2, %%rax \n\t"
2409 "mov %%rax, %c[cr2](%0) \n\t"
2411 "pop %%rbp; pop %%rbp; pop %%rdx \n\t"
2413 "xchg %0, (%%esp) \n\t"
2414 "mov %%eax, %c[rax](%0) \n\t"
2415 "mov %%ebx, %c[rbx](%0) \n\t"
2416 "pushl (%%esp); popl %c[rcx](%0) \n\t"
2417 "mov %%edx, %c[rdx](%0) \n\t"
2418 "mov %%esi, %c[rsi](%0) \n\t"
2419 "mov %%edi, %c[rdi](%0) \n\t"
2420 "mov %%ebp, %c[rbp](%0) \n\t"
2421 "mov %%cr2, %%eax \n\t"
2422 "mov %%eax, %c[cr2](%0) \n\t"
2424 "pop %%ebp; pop %%ebp; pop %%edx \n\t"
2426 "setbe %c[fail](%0) \n\t"
2427 : : "c"(vmx
), "d"((unsigned long)HOST_RSP
),
2428 [launched
]"i"(offsetof(struct vcpu_vmx
, launched
)),
2429 [fail
]"i"(offsetof(struct vcpu_vmx
, fail
)),
2430 [rax
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_RAX
])),
2431 [rbx
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_RBX
])),
2432 [rcx
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_RCX
])),
2433 [rdx
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_RDX
])),
2434 [rsi
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_RSI
])),
2435 [rdi
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_RDI
])),
2436 [rbp
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_RBP
])),
2437 #ifdef CONFIG_X86_64
2438 [r8
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_R8
])),
2439 [r9
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_R9
])),
2440 [r10
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_R10
])),
2441 [r11
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_R11
])),
2442 [r12
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_R12
])),
2443 [r13
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_R13
])),
2444 [r14
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_R14
])),
2445 [r15
]"i"(offsetof(struct vcpu_vmx
, vcpu
.regs
[VCPU_REGS_R15
])),
2447 [cr2
]"i"(offsetof(struct vcpu_vmx
, vcpu
.cr2
))
2449 #ifdef CONFIG_X86_64
2450 , "rbx", "rdi", "rsi"
2451 , "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2453 , "ebx", "edi", "rsi"
2457 vmx
->idt_vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
2458 if (vmx
->rmode
.irq
.pending
)
2459 fixup_rmode_irq(vmx
);
2461 vcpu
->interrupt_window_open
=
2462 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
2464 asm("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
2467 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
2469 /* We need to handle NMIs before interrupts are enabled */
2470 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) /* nmi */
2474 static void vmx_inject_page_fault(struct kvm_vcpu
*vcpu
,
2478 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2479 u32 vect_info
= vmx
->idt_vectoring_info
;
2481 ++vcpu
->stat
.pf_guest
;
2483 if (is_page_fault(vect_info
)) {
2484 printk(KERN_DEBUG
"inject_page_fault: "
2485 "double fault 0x%lx @ 0x%lx\n",
2486 addr
, vmcs_readl(GUEST_RIP
));
2487 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, 0);
2488 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2490 INTR_TYPE_EXCEPTION
|
2491 INTR_INFO_DELIEVER_CODE_MASK
|
2492 INTR_INFO_VALID_MASK
);
2496 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, err_code
);
2497 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2499 INTR_TYPE_EXCEPTION
|
2500 INTR_INFO_DELIEVER_CODE_MASK
|
2501 INTR_INFO_VALID_MASK
);
2505 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
2507 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2510 on_each_cpu(__vcpu_clear
, vmx
, 0, 1);
2511 free_vmcs(vmx
->vmcs
);
2516 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
2518 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2520 vmx_free_vmcs(vcpu
);
2521 kfree(vmx
->host_msrs
);
2522 kfree(vmx
->guest_msrs
);
2523 kvm_vcpu_uninit(vcpu
);
2524 kmem_cache_free(kvm_vcpu_cache
, vmx
);
2527 static struct kvm_vcpu
*vmx_create_vcpu(struct kvm
*kvm
, unsigned int id
)
2530 struct vcpu_vmx
*vmx
= kmem_cache_zalloc(kvm_vcpu_cache
, GFP_KERNEL
);
2534 return ERR_PTR(-ENOMEM
);
2536 err
= kvm_vcpu_init(&vmx
->vcpu
, kvm
, id
);
2540 vmx
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2541 if (!vmx
->guest_msrs
) {
2546 vmx
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2547 if (!vmx
->host_msrs
)
2548 goto free_guest_msrs
;
2550 vmx
->vmcs
= alloc_vmcs();
2554 vmcs_clear(vmx
->vmcs
);
2557 vmx_vcpu_load(&vmx
->vcpu
, cpu
);
2558 err
= vmx_vcpu_setup(vmx
);
2559 vmx_vcpu_put(&vmx
->vcpu
);
2567 free_vmcs(vmx
->vmcs
);
2569 kfree(vmx
->host_msrs
);
2571 kfree(vmx
->guest_msrs
);
2573 kvm_vcpu_uninit(&vmx
->vcpu
);
2575 kmem_cache_free(kvm_vcpu_cache
, vmx
);
2576 return ERR_PTR(err
);
2579 static void __init
vmx_check_processor_compat(void *rtn
)
2581 struct vmcs_config vmcs_conf
;
2584 if (setup_vmcs_config(&vmcs_conf
) < 0)
2586 if (memcmp(&vmcs_config
, &vmcs_conf
, sizeof(struct vmcs_config
)) != 0) {
2587 printk(KERN_ERR
"kvm: CPU %d feature inconsistency!\n",
2588 smp_processor_id());
2593 static struct kvm_x86_ops vmx_x86_ops
= {
2594 .cpu_has_kvm_support
= cpu_has_kvm_support
,
2595 .disabled_by_bios
= vmx_disabled_by_bios
,
2596 .hardware_setup
= hardware_setup
,
2597 .hardware_unsetup
= hardware_unsetup
,
2598 .check_processor_compatibility
= vmx_check_processor_compat
,
2599 .hardware_enable
= hardware_enable
,
2600 .hardware_disable
= hardware_disable
,
2602 .vcpu_create
= vmx_create_vcpu
,
2603 .vcpu_free
= vmx_free_vcpu
,
2604 .vcpu_reset
= vmx_vcpu_reset
,
2606 .prepare_guest_switch
= vmx_save_host_state
,
2607 .vcpu_load
= vmx_vcpu_load
,
2608 .vcpu_put
= vmx_vcpu_put
,
2609 .vcpu_decache
= vmx_vcpu_decache
,
2611 .set_guest_debug
= set_guest_debug
,
2612 .guest_debug_pre
= kvm_guest_debug_pre
,
2613 .get_msr
= vmx_get_msr
,
2614 .set_msr
= vmx_set_msr
,
2615 .get_segment_base
= vmx_get_segment_base
,
2616 .get_segment
= vmx_get_segment
,
2617 .set_segment
= vmx_set_segment
,
2618 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2619 .decache_cr4_guest_bits
= vmx_decache_cr4_guest_bits
,
2620 .set_cr0
= vmx_set_cr0
,
2621 .set_cr3
= vmx_set_cr3
,
2622 .set_cr4
= vmx_set_cr4
,
2623 #ifdef CONFIG_X86_64
2624 .set_efer
= vmx_set_efer
,
2626 .get_idt
= vmx_get_idt
,
2627 .set_idt
= vmx_set_idt
,
2628 .get_gdt
= vmx_get_gdt
,
2629 .set_gdt
= vmx_set_gdt
,
2630 .cache_regs
= vcpu_load_rsp_rip
,
2631 .decache_regs
= vcpu_put_rsp_rip
,
2632 .get_rflags
= vmx_get_rflags
,
2633 .set_rflags
= vmx_set_rflags
,
2635 .tlb_flush
= vmx_flush_tlb
,
2636 .inject_page_fault
= vmx_inject_page_fault
,
2638 .inject_gp
= vmx_inject_gp
,
2640 .run
= vmx_vcpu_run
,
2641 .handle_exit
= kvm_handle_exit
,
2642 .skip_emulated_instruction
= skip_emulated_instruction
,
2643 .patch_hypercall
= vmx_patch_hypercall
,
2644 .get_irq
= vmx_get_irq
,
2645 .set_irq
= vmx_inject_irq
,
2646 .inject_pending_irq
= vmx_intr_assist
,
2647 .inject_pending_vectors
= do_interrupt_requests
,
2649 .set_tss_addr
= vmx_set_tss_addr
,
2652 static int __init
vmx_init(void)
2657 vmx_io_bitmap_a
= alloc_page(GFP_KERNEL
| __GFP_HIGHMEM
);
2658 if (!vmx_io_bitmap_a
)
2661 vmx_io_bitmap_b
= alloc_page(GFP_KERNEL
| __GFP_HIGHMEM
);
2662 if (!vmx_io_bitmap_b
) {
2668 * Allow direct access to the PC debug port (it is often used for I/O
2669 * delays, but the vmexits simply slow things down).
2671 iova
= kmap(vmx_io_bitmap_a
);
2672 memset(iova
, 0xff, PAGE_SIZE
);
2673 clear_bit(0x80, iova
);
2674 kunmap(vmx_io_bitmap_a
);
2676 iova
= kmap(vmx_io_bitmap_b
);
2677 memset(iova
, 0xff, PAGE_SIZE
);
2678 kunmap(vmx_io_bitmap_b
);
2680 r
= kvm_init(&vmx_x86_ops
, sizeof(struct vcpu_vmx
), THIS_MODULE
);
2684 if (bypass_guest_pf
)
2685 kvm_mmu_set_nonpresent_ptes(~0xffeull
, 0ull);
2690 __free_page(vmx_io_bitmap_b
);
2692 __free_page(vmx_io_bitmap_a
);
2696 static void __exit
vmx_exit(void)
2698 __free_page(vmx_io_bitmap_b
);
2699 __free_page(vmx_io_bitmap_a
);
2704 module_init(vmx_init
)
2705 module_exit(vmx_exit
)