x86: Support for this_cpu_add, sub, dec, inc_return
[linux-2.6.git] / drivers / pcmcia / soc_common.h
blobbbcd5385a221ae40d5dc0ffb0d21cbf1a09de602
1 /*
2 * linux/drivers/pcmcia/soc_common.h
4 * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
6 * This file contains definitions for the PCMCIA support code common to
7 * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
8 */
9 #ifndef _ASM_ARCH_PCMCIA
10 #define _ASM_ARCH_PCMCIA
12 /* include the world */
13 #include <linux/cpufreq.h>
14 #include <pcmcia/ss.h>
15 #include <pcmcia/cistpl.h>
18 struct device;
19 struct pcmcia_low_level;
22 * This structure encapsulates per-socket state which we might need to
23 * use when responding to a Card Services query of some kind.
25 struct soc_pcmcia_socket {
26 struct pcmcia_socket socket;
29 * Info from low level handler
31 unsigned int nr;
34 * Core PCMCIA state
36 const struct pcmcia_low_level *ops;
38 unsigned int status;
39 socket_state_t cs_state;
41 unsigned short spd_io[MAX_IO_WIN];
42 unsigned short spd_mem[MAX_WIN];
43 unsigned short spd_attr[MAX_WIN];
45 struct resource res_skt;
46 struct resource res_io;
47 struct resource res_mem;
48 struct resource res_attr;
49 void __iomem *virt_io;
51 unsigned int irq_state;
53 struct timer_list poll_timer;
54 struct list_head node;
57 struct skt_dev_info {
58 int nskt;
59 struct soc_pcmcia_socket skt[0];
62 struct pcmcia_state {
63 unsigned detect: 1,
64 ready: 1,
65 bvd1: 1,
66 bvd2: 1,
67 wrprot: 1,
68 vs_3v: 1,
69 vs_Xv: 1;
72 struct pcmcia_low_level {
73 struct module *owner;
75 /* first socket in system */
76 int first;
77 /* nr of sockets */
78 int nr;
80 int (*hw_init)(struct soc_pcmcia_socket *);
81 void (*hw_shutdown)(struct soc_pcmcia_socket *);
83 void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *);
84 int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *);
87 * Enable card status IRQs on (re-)initialisation. This can
88 * be called at initialisation, power management event, or
89 * pcmcia event.
91 void (*socket_init)(struct soc_pcmcia_socket *);
94 * Disable card status IRQs and PCMCIA bus on suspend.
96 void (*socket_suspend)(struct soc_pcmcia_socket *);
99 * Hardware specific timing routines.
100 * If provided, the get_timing routine overrides the SOC default.
102 unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int);
103 int (*set_timing)(struct soc_pcmcia_socket *);
104 int (*show_timing)(struct soc_pcmcia_socket *, char *);
106 #ifdef CONFIG_CPU_FREQ
108 * CPUFREQ support.
110 int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *);
111 #endif
115 struct pcmcia_irqs {
116 int sock;
117 int irq;
118 const char *str;
121 struct soc_pcmcia_timing {
122 unsigned short io;
123 unsigned short mem;
124 unsigned short attr;
127 extern int soc_pcmcia_request_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
128 extern void soc_pcmcia_free_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
129 extern void soc_pcmcia_disable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
130 extern void soc_pcmcia_enable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
131 extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
134 void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt);
135 int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt);
138 #ifdef CONFIG_PCMCIA_DEBUG
140 extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
141 int lvl, const char *fmt, ...);
143 #define debug(skt, lvl, fmt, arg...) \
144 soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
146 #else
147 #define debug(skt, lvl, fmt, arg...) do { } while (0)
148 #endif
152 * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
153 * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
154 * a minimum value of 165ns, as well. Section 4.7.2 (describing
155 * common and attribute memory write timing) says that twWE has a
156 * minimum value of 150ns for a 250ns cycle time (for 5V operation;
157 * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
158 * operation, also section 4.7.4). Section 4.7.3 says that taOE
159 * has a maximum value of 150ns for a 300ns cycle time (for 5V
160 * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
162 * When configuring memory maps, Card Services appears to adopt the policy
163 * that a memory access time of "0" means "use the default." The default
164 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
165 * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
166 * memory command width time is 300ns.
168 #define SOC_PCMCIA_IO_ACCESS (165)
169 #define SOC_PCMCIA_5V_MEM_ACCESS (150)
170 #define SOC_PCMCIA_3V_MEM_ACCESS (300)
171 #define SOC_PCMCIA_ATTR_MEM_ACCESS (300)
174 * The socket driver actually works nicely in interrupt-driven form,
175 * so the (relatively infrequent) polling is "just to be sure."
177 #define SOC_PCMCIA_POLL_PERIOD (2*HZ)
180 /* I/O pins replacing memory pins
181 * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
183 * These signals change meaning when going from memory-only to
184 * memory-or-I/O interface:
186 #define iostschg bvd1
187 #define iospkr bvd2
189 #endif